[PATCH ] dt-bindings: PCI: rcar: Add device tree support for r8a7743
Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller is identical to the R-Car Gen2 family. No driver change is needed due to the fallback compatible value "renesas,pcie-rcar-gen2". Adding the SoC-specific compatible values here has three purposes: 1. Document which SoCs have this hardware module, 2. Allow checkpatch to validate compatible values. 3. Allow the driver to support SoC specific implementations in future as necessary. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 76ba3a6..2c43e38 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -1,13 +1,15 @@ * Renesas R-Car PCIe interface Required properties: -compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; +compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; + "renesas,pcie-r8a7779" for the R8A7779 SoC; "renesas,pcie-r8a7790" for the R8A7790 SoC; "renesas,pcie-r8a7791" for the R8A7791 SoC; "renesas,pcie-r8a7793" for the R8A7793 SoC; "renesas,pcie-r8a7795" for the R8A7795 SoC; "renesas,pcie-r8a7796" for the R8A7796 SoC; - "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. + "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or +RZ-G1 compatible device. "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device. When compatible with the generic version, nodes must list the -- 1.9.1
[PATCH 1/3] ARM: dts: r8a7743: Add default PCIe bus clock
This patch adds a default PCIe bus clock node.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch has dependency on below patch
* ARM: dts: r8a7743: Add CAN[01] SoC support
https://patchwork.kernel.org/patch/10046875/
arch/arm/boot/dts/r8a7743.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 12c7b92..de4b8c6 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1189,6 +1189,13 @@
clock-frequency = <0>;
};
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
--
1.9.1
[PATCH 3/3] ARM: dts: iwg20d-q7: Enable PCIe Controller
Enable PCIe Controller & set PCIe bus clock frequency.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch has dependency on below patch
* ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
https://patchwork.kernel.org/patch/10046879/
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 3e4bc4d..54470c6 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -96,6 +96,14 @@
pinctrl-names = "default";
};
+&pcie_bus_clk {
+ clock-frequency = <1>;
+};
+
+&pciec {
+ status = "okay";
+};
+
&pfc {
can0_pins: can0 {
groups = "can0_data_d";
--
1.9.1
[PATCH 2/3] ARM: dts: r8a7743: Add PCIe Controller device node
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index de4b8c6..9e26c40 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1164,6 +1164,34 @@
phy-names = "usb";
};
};
+
+ pciec: pcie@fe00 {
+ compatible = "renesas,pcie-r8a7743",
+"renesas,pcie-rcar-gen2";
+ reg = <0 0xfe00 0 0x8>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x0100 0 0x 0 0xfe10 0
0x0010
+ 0x0200 0 0xfe20 0 0xfe20 0
0x0020
+ 0x0200 0 0x3000 0 0x3000 0
0x0800
+ 0x4200 0 0x3800 0 0x3800 0
0x0800>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x4200 0 0x4000 0 0x4000 0
0x8000
+ 0x4300 2 0x 2 0x 1
0x>;
+ interrupts = ,
+,
+;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116
IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
};
/* External root clock */
--
1.9.1
[PATCH 0/3] ARM: dts: Add PCIEC support
Hello, This series aims to add PCIEC support for iWave RZ/G1M (R8A7743) board. This patch has documentation dependency on below patch * dt-bindings: PCI: rcar: Add device tree support for r8a7743 https://patchwork.kernel.org/patch/10056407/ This patch series has dependency on below patches * ARM: dts: r8a7743: Add CAN[01] SoC support https://patchwork.kernel.org/patch/10046875/ * ARM: dts: iwg20d-q7-common: Add can0 support to carrier board https://patchwork.kernel.org/patch/10046879/ Biju Das (3): ARM: dts: r8a7743: Add default PCIe bus clock ARM: dts: r8a7743: Add PCIe Controller device node ARM: dts: iwg20d-q7: Enable PCIe Controller arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8 arch/arm/boot/dts/r8a7743.dtsi | 35 + 2 files changed, 43 insertions(+) -- 1.9.1
RE: [PATCH ] dt-bindings: PCI: rcar: Add device tree support for r8a7743
Thanks. I will send a V2 for fixing this.
Regards,
Biju
> -Original Message-
> From: geert.uytterhoe...@gmail.com [mailto:geert.uytterhoe...@gmail.com]
> On Behalf Of Geert Uytterhoeven
> Sent: 13 November 2017 19:11
> To: Biju Das
> Cc: Bjorn Helgaas ; Rob Herring
> ; Mark Rutland ; Simon
> Horman ; Chris Paterson
> ; Fabrizio Castro
> ; linux-pci ;
> Linux-Renesas
> Subject: Re: [PATCH ] dt-bindings: PCI: rcar: Add device tree support for
> r8a7743
>
> Hi Biju,
>
> On Mon, Nov 13, 2017 at 5:37 PM, Biju Das wrote:
> > Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller is
> > identical to the R-Car Gen2 family.
> >
> > No driver change is needed due to the fallback compatible value
> > "renesas,pcie-rcar-gen2".
> > Adding the SoC-specific compatible values here has three purposes:
> > 1. Document which SoCs have this hardware module, 2. Allow checkpatch
> > to validate compatible values.
> > 3. Allow the driver to support SoC specific implementations in future
> >as necessary.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Thanks for your patch!
>
> With the below fixed:
> Reviewed-by: Geert Uytterhoeven
>
> > --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
> > +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> > @@ -1,13 +1,15 @@
> > * Renesas R-Car PCIe interface
> >
> > Required properties:
> > -compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
> > +compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
> > + "renesas,pcie-r8a7779" for the R8A7779 SoC;
> > "renesas,pcie-r8a7790" for the R8A7790 SoC;
> > "renesas,pcie-r8a7791" for the R8A7791 SoC;
> > "renesas,pcie-r8a7793" for the R8A7793 SoC;
> > "renesas,pcie-r8a7795" for the R8A7795 SoC;
> > "renesas,pcie-r8a7796" for the R8A7796 SoC;
> > - "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible
> > device.
> > + "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
> > +RZ-G1 compatible device.
>
> RZ/G1
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when
> I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH v2] dt-bindings: PCI: rcar: Add device tree support for r8a7743
Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller is identical to the R-Car Gen2 family. No driver change is needed due to the fallback compatible value "renesas,pcie-rcar-gen2". Adding the SoC-specific compatible values here has three purposes: 1. Document which SoCs have this hardware module, 2. Allow checkpatch to validate compatible values. 3. Allow the driver to support SoC specific implementations in future as necessary. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- v1-->v2 Corrected RZ-G1 to RZ/G1. Documentation/devicetree/bindings/pci/rcar-pci.txt | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 76ba3a6..1fb614e 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -1,13 +1,15 @@ * Renesas R-Car PCIe interface Required properties: -compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; +compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; + "renesas,pcie-r8a7779" for the R8A7779 SoC; "renesas,pcie-r8a7790" for the R8A7790 SoC; "renesas,pcie-r8a7791" for the R8A7791 SoC; "renesas,pcie-r8a7793" for the R8A7793 SoC; "renesas,pcie-r8a7795" for the R8A7795 SoC; "renesas,pcie-r8a7796" for the R8A7796 SoC; - "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. + "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or +RZ/G1 compatible device. "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device. When compatible with the generic version, nodes must list the -- 1.9.1
RE: [PATCH v2] dt-bindings: PCI: rcar: Add device tree support for r8a7743
Hi Bjorn Helgaas, Does this patch look okay to you? Regards, Biju > -Original Message- > From: Biju Das [mailto:biju@bp.renesas.com] > Sent: 14 November 2017 09:59 > To: Bjorn Helgaas ; Rob Herring > ; Mark Rutland > Cc: Simon Horman ; Magnus Damm > ; Chris Paterson ; > Fabrizio Castro ; linux-...@vger.kernel.org; > linux-renesas-soc@vger.kernel.org; Biju Das > Subject: [PATCH v2] dt-bindings: PCI: rcar: Add device tree support for > r8a7743 > > Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller is > identical to the R-Car Gen2 family. > > No driver change is needed due to the fallback compatible value "renesas,pcie- > rcar-gen2". > Adding the SoC-specific compatible values here has three purposes: > 1. Document which SoCs have this hardware module, 2. Allow checkpatch to > validate compatible values. > 3. Allow the driver to support SoC specific implementations in future >as necessary. > > Signed-off-by: Biju Das > Reviewed-by: Fabrizio Castro > Reviewed-by: Geert Uytterhoeven > --- > v1-->v2 >Corrected RZ-G1 to RZ/G1. > > Documentation/devicetree/bindings/pci/rcar-pci.txt | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt > b/Documentation/devicetree/bindings/pci/rcar-pci.txt > index 76ba3a6..1fb614e 100644 > --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt > +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt > @@ -1,13 +1,15 @@ > * Renesas R-Car PCIe interface > > Required properties: > -compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; > +compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; > +"renesas,pcie-r8a7779" for the R8A7779 SoC; > "renesas,pcie-r8a7790" for the R8A7790 SoC; > "renesas,pcie-r8a7791" for the R8A7791 SoC; > "renesas,pcie-r8a7793" for the R8A7793 SoC; > "renesas,pcie-r8a7795" for the R8A7795 SoC; > "renesas,pcie-r8a7796" for the R8A7796 SoC; > -"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. > +"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or > + RZ/G1 compatible device. > "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device. > > When compatible with the generic version, nodes must list the > -- > 1.9.1 [https://www2.renesas.eu/media/email/unicef_2017.jpg] This Christmas, instead of sending out cards, Renesas Electronics Europe have decided to support Unicef with a donation. For further details click here<https://www.unicef.org/> to find out about the valuable work they do, helping children all over the world. We would like to take this opportunity to wish you a Merry Christmas and a prosperous New Year. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH] dt-bindings: ASoC: rsnd: Add device tree support for r8a774[35]
Document r8a774[35] specific compatible strings. The Renesas RZ/G1[ME] (r8a774[35]) sound modules are identical to the R-Car Gen2 family. No driver change is needed as the fallback compatible string "renesas,rcar_sound-gen2" activates the right code in the driver. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt index 085bec3..b3c28bd 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt @@ -4,7 +4,7 @@ Renesas R-Car sound * Modules = -Renesas R-Car sound is constructed from below modules +Renesas R-Car and RZ/G sound is constructed from below modules (for Gen2 or later) SCU : Sampling Rate Converter Unit @@ -334,9 +334,11 @@ Required properties: - compatible : "renesas,rcar_sound-", fallbacks "renesas,rcar_sound-gen1" if generation1, and - "renesas,rcar_sound-gen2" if generation2 + "renesas,rcar_sound-gen2" if generation2 (or RZ/G1) "renesas,rcar_sound-gen3" if generation3 Examples with soctypes are: + - "renesas,rcar_sound-r8a7743" (RZ/G1M) + - "renesas,rcar_sound-r8a7745" (RZ/G1E) - "renesas,rcar_sound-r8a7778" (R-Car M1A) - "renesas,rcar_sound-r8a7779" (R-Car H1) - "renesas,rcar_sound-r8a7790" (R-Car H2) -- 1.9.1
[PATCH 0/5] Add Sound support for iWave RZ/G1M board
This series aims to add sound support for iWave RZ/G1M board. This patch series has documentation dependency on https://patchwork.kernel.org/patch/10108014/ Biju Das (5): ARM: shmobile: defconfig: Enable SGTL5000 audio codec ARM: dts: r8a7743: Add audio clocks ARM: dts: r8a7743: Add audio DMAC support ARM: dts: r8a7743: Add sound support ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec arch/arm/boot/dts/iwg20d-q7-common.dtsi | 24 +++ arch/arm/boot/dts/r8a7743.dtsi | 270 arch/arm/configs/shmobile_defconfig | 1 + 3 files changed, 295 insertions(+) -- 1.9.1
[PATCH 5/5] ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec
This patch enables SGTL5000 audio codec on the carrier board.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 54470c6..2070b14 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -20,6 +20,20 @@
stdout-path = "serial0:115200n8";
};
+ audio_clock: audio_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2600>;
+ };
+
+ reg_1p5v: 1p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P5V";
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-always-on;
+ };
+
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
@@ -83,6 +97,16 @@
compatible = "ti,bq32000";
reg = <0x68>;
};
+
+ sgtl5000: codec@0a {
+ compatible = "fsl,sgtl5000";
+ #sound-dai-cells = <0>;
+ reg = <0x0a>;
+ clocks = <&audio_clock>;
+ VDDA-supply = <®_3p3v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p5v>;
+ };
};
&pci0 {
--
1.9.1
[PATCH 3/5] ARM: dts: r8a7743: Add audio DMAC support
Instantiate the two audio DMA controllers on the r8a7743 device tree.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 62 ++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 2f0ec9d..b60527a 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -359,6 +359,68 @@
dma-channels = <15>;
};
+ audma0: dma-controller@ec70 {
+ compatible = "renesas,dmac-r8a7743",
+"renesas,rcar-dmac";
+ reg = <0 0xec70 0 0x1>;
+ interrupts = ;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller@ec72 {
+ compatible = "renesas,dmac-r8a7743",
+"renesas,rcar-dmac";
+ reg = <0 0xec72 0 0x1>;
+ interrupts = ;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
usb_dmac0: dma-controller@e65a {
compatible = "renesas,r8a7743-usb-dmac",
"renesas,usb-dmac";
--
1.9.1
[PATCH 1/5] ARM: shmobile: defconfig: Enable SGTL5000 audio codec
The iWave RZ/G1M Q7 carrier board supports I2S audio codec "SGTL5000". To increase hardware support enable the driver in the shmobile_defconfig multiplatform configuration. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- arch/arm/configs/shmobile_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index 7b4fc01..d60dbe1 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -173,6 +173,7 @@ CONFIG_SND_SOC=y CONFIG_SND_SOC_SH4_FSI=y CONFIG_SND_SOC_RCAR=y CONFIG_SND_SOC_AK4642=y +CONFIG_SND_SOC_SGTL5000=y CONFIG_SND_SOC_WM8978=y CONFIG_SND_SIMPLE_SCU_CARD=y CONFIG_USB=y -- 1.9.1
[PATCH 2/5] ARM: dts: r8a7743: Add audio clocks
Describe the external audio clocks required by the sound driver.
Boards that provide audio clocks need to override the clock frequencies.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index c09c667..2f0ec9d 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1238,6 +1238,29 @@
clock-frequency = <0>;
};
+ /*
+* The external audio clocks are configured as 0 Hz fixed frequency
+* clocks by default.
+* Boards that provide audio clocks should override them.
+*/
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
--
1.9.1
[PATCH 4/5] ARM: dts: r8a7743: Add sound support
Define the generic r8a7743(RZ/G1M) part of the sound device node.
This patch is based on the r8a7791 sound work by Kuninori Morimoto.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 185 +
1 file changed, 185 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index b60527a..59860c8 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1290,6 +1290,191 @@
resets = <&cpg 319>;
status = "disabled";
};
+
+ rcar_sound: sound@ec50 {
+ /*
+* #sound-dai-cells is required
+*
+* Single DAI : #sound-dai-cells = <0>;
<&rcar_sound>;
+* Multi DAI : #sound-dai-cells = <1>;
<&rcar_sound N>;
+*/
+ compatible = "renesas,rcar_sound-r8a7743",
+"renesas,rcar_sound-gen2";
+ reg = <0 0xec50 0 0x1000>, /* SCU */
+ <0 0xec5a 0 0x100>, /* ADG */
+ <0 0xec54 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec74 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+<&cpg CPG_CORE R8A7743_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1",
"ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
"src.5",
+ "src.4", "src.3", "src.2", "src.1",
"src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg
1009>,
+<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg
1013>,
+<&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1",
"ssi.0";
+ status = "disabled";
+
+
RE: [PATCH 0/5] Add Sound support for iWave RZ/G1M board
Hi Simon, Thanks. There is a typo in the documentation dependency link. The correct one is https://patchwork.kernel.org/patch/10108015/ Regards, Biju > -Original Message- > From: Simon Horman [mailto:ho...@verge.net.au] > Sent: 13 December 2017 09:03 > To: Biju Das > Cc: Rob Herring ; Mark Rutland > ; Russell King ; Magnus > Damm ; Chris Paterson > ; devicet...@vger.kernel.org; linux-renesas- > s...@vger.kernel.org; linux-arm-ker...@lists.infradead.org > Subject: Re: [PATCH 0/5] Add Sound support for iWave RZ/G1M board > > On Tue, Dec 12, 2017 at 06:25:06PM +, Biju Das wrote: > > This series aims to add sound support for iWave RZ/G1M board. > > > > This patch series has documentation dependency on > > https://patchwork.kernel.org/patch/10108014/ > > > > Biju Das (5): > > ARM: shmobile: defconfig: Enable SGTL5000 audio codec > > ARM: dts: r8a7743: Add audio clocks > > ARM: dts: r8a7743: Add audio DMAC support > > ARM: dts: r8a7743: Add sound support > > ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec > > > > arch/arm/boot/dts/iwg20d-q7-common.dtsi | 24 +++ > > arch/arm/boot/dts/r8a7743.dtsi | 270 > > > arch/arm/configs/shmobile_defconfig | 1 + > > 3 files changed, 295 insertions(+) > > These patches seem clean to me although I do not have sufficient > documentation to properly review the last patch. > > I will leave these sit for a few days to allow others to review them. [https://www2.renesas.eu/media/email/unicef_2017.jpg] This Christmas, instead of sending out cards, Renesas Electronics Europe have decided to support Unicef with a donation. For further details click here<https://www.unicef.org/> to find out about the valuable work they do, helping children all over the world. We would like to take this opportunity to wish you a Merry Christmas and a prosperous New Year. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH 0/2] Add thermal support for iWave RZ/G1M board
This series aims to add thermal support for iWave RZ/G1M board. This patch series based on renesas tag renesas-devel-20171211-v4.15-rc3. Biju Das (2): dt-bindings: thermal: rcar: Add device tree support for r8a7743 ARM: dts: r8a7743: Add thermal device to DT .../devicetree/bindings/thermal/rcar-thermal.txt | 1 + arch/arm/boot/dts/r8a7743.dtsi | 32 ++ 2 files changed, 33 insertions(+) -- 1.9.1
[PATCH 1/2] dt-bindings: thermal: rcar: Add device tree support for r8a7743
Add thermal sensor support for r8a7743 SoC. The Renesas RZ/G1M (r8a7743) thermal sensor module is identical to the R-Car Gen2 family. No driver change is needed due to the fallback compatible value "renesas,rcar-gen2-thermal". Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt index a8e52c8..349e635 100644 --- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt @@ -6,6 +6,7 @@ Required properties: "renesas,rcar-thermal" (without thermal-zone) as fallback. Examples with soctypes are: - "renesas,thermal-r8a73a4" (R-Mobile APE6) + - "renesas,thermal-r8a7743" (RZ/G1M) - "renesas,thermal-r8a7779" (R-Car H1) - "renesas,thermal-r8a7790" (R-Car H2) - "renesas,thermal-r8a7791" (R-Car M2-W) -- 1.9.1
[PATCH 2/2] ARM: dts: r8a7743: Add thermal device to DT
This patch instantiates the thermal sensor module with thermal-zone
support.
This patch is based on the commit cac68a56e34b
("ARM: dts: r8a7791: enable to use thermal-zone") by Kuninori Morimoto.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0e2834a..e056bc5 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -250,6 +250,38 @@
resets = <&cpg 407>;
};
+ thermal: thermal@e61f {
+ compatible = "renesas,thermal-r8a7743",
+"renesas,rcar-gen2-thermal",
+"renesas,rcar-thermal";
+ reg = <0 0xe61f 0 0x14>, <0 0xe61f0100 0 0x38>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts =
RE: [PATCH] dt-bindings: ASoC: rsnd: Add device tree support for r8a774[35]
Hi all, Thanks for the feedback, I will send a v2. Regards, Biju > -Original Message- > From: Mark Brown [mailto:broo...@kernel.org] > Sent: 13 December 2017 12:56 > To: Geert Uytterhoeven > Cc: Biju Das ; Liam Girdwood > ; Rob Herring ; Mark Rutland > ; Simon Horman ; Magnus > Damm ; Chris Paterson > ; Fabrizio Castro > ; ALSA Development Mailing List de...@alsa-project.org>; Linux-Renesas > Subject: Re: [PATCH] dt-bindings: ASoC: rsnd: Add device tree support for > r8a774[35] > > On Wed, Dec 13, 2017 at 01:34:40PM +0100, Geert Uytterhoeven wrote: > > > The confusing part here is that for most[*] subsystems, patches > > touching only DT bindings should have a "dt-bindings" prefix, while > > patches touching both DT bindings and driver code should have the drivers' > subsystem prefix. > > > [*] I think you're about the only maintainer who insists on patches > > touching only DT bindings having the drivers' subsystem prefix, which > > people tend to forget, if they're even aware of that rule... > > > Can we improve this? > > This is something Rob's been pushing which seems like a step back to me so > I've > been pushing back on it - it's causing problems for me spotting things I need > to > look at and later on in review (including my scripting, which does pay > attention > to subject lines). I suspect I'm at the upper end of people getting lots of > irrelevant stuff in copy which doesn't help here. [https://www2.renesas.eu/media/email/unicef_2017.jpg] This Christmas, instead of sending out cards, Renesas Electronics Europe have decided to support Unicef with a donation. For further details click here<https://www.unicef.org/> to find out about the valuable work they do, helping children all over the world. We would like to take this opportunity to wish you a Merry Christmas and a prosperous New Year. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH v2] ASoC: rsnd: Add device tree support for r8a774[35]
Document r8a774[35] specific compatible strings. The Renesas RZ/G1[ME] (r8a774[35]) sound modules are identical to the R-Car Gen2 family. No driver change is needed as the fallback compatible string "renesas,rcar_sound-gen2" activates the right code in the driver. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- v1-->v2 Updated the subject line. Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt index 085bec3..b3c28bd 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt @@ -4,7 +4,7 @@ Renesas R-Car sound * Modules = -Renesas R-Car sound is constructed from below modules +Renesas R-Car and RZ/G sound is constructed from below modules (for Gen2 or later) SCU : Sampling Rate Converter Unit @@ -334,9 +334,11 @@ Required properties: - compatible : "renesas,rcar_sound-", fallbacks "renesas,rcar_sound-gen1" if generation1, and - "renesas,rcar_sound-gen2" if generation2 + "renesas,rcar_sound-gen2" if generation2 (or RZ/G1) "renesas,rcar_sound-gen3" if generation3 Examples with soctypes are: + - "renesas,rcar_sound-r8a7743" (RZ/G1M) + - "renesas,rcar_sound-r8a7745" (RZ/G1E) - "renesas,rcar_sound-r8a7778" (R-Car M1A) - "renesas,rcar_sound-r8a7779" (R-Car H1) - "renesas,rcar_sound-r8a7790" (R-Car H2) -- 1.9.1
[PATCH 0/5] Add sound support
This series aims to add sound support for iWave RZ/G1M board. This patch series has below dependencies 1) https://www.spinics.net/lists/arm-kernel/msg622754.html 2) https://patchwork.kernel.org/patch/10108041/ Biju Das (5): ARM: dts: iwg20d-q7-common: Sound PIO support ARM: dts: iwg20d-q7-common: Sound DMA support on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS arch/arm/boot/dts/iwg20d-q7-common.dtsi | 64 + 1 file changed, 64 insertions(+) -- 1.9.1
[PATCH 5/5] ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 9f6ec25..ccbdf5a 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -8,6 +8,29 @@
* kind, whether express or implied.
*/
+/*
+ * SSI-SGTL5000
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer set "DVC Out" 100%
+ * amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ * amixer set "DVC Out Mute" on
+ * amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ * amixer set "DVC Out Ramp" on
+ * aplay xxx.wav &
+ * amixer set "DVC Out" 80% // Volume Down
+ * amixer set "DVC Out" 100% // Volume Up
+ */
+
/ {
aliases {
serial0 = &scif0;
@@ -240,8 +263,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi1 &src3>;
- capture = <&ssi0 &src2>;
+ playback = <&ssi1 &src3 &dvc1>;
+ capture = <&ssi0 &src2 &dvc0>;
};
};
};
--
1.9.1
[PATCH 4/5] ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting SSI/SRC random connection.
So, this patch is trying
SSI1 -> SRC3
SSI0 <- SRC2
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 38f1e2b..9f6ec25 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -240,8 +240,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi1>;
- capture = <&ssi0>;
+ playback = <&ssi1 &src3>;
+ capture = <&ssi0 &src2>;
};
};
};
--
1.9.1
[PATCH 3/5] ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index fd50065..38f1e2b 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -246,11 +246,6 @@
};
};
-&ssi0 {
- no-busif;
-};
-
&ssi1 {
- no-busif;
shared-pin;
};
--
1.9.1
[PATCH 2/5] ARM: dts: iwg20d-q7-common: Sound DMA support on DTS
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 41bc4ed..fd50065 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -247,10 +247,10 @@
};
&ssi0 {
- pio-transfer;
+ no-busif;
};
&ssi1 {
- pio-transfer;
+ no-busif;
shared-pin;
};
--
1.9.1
[PATCH 1/5] ARM: dts: iwg20d-q7-common: Sound PIO support
Enable sound PIO support on carrier board.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 46 +
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 2070b14..41bc4ed 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -34,6 +34,22 @@
regulator-always-on;
};
+ rsnd_sgtl5000: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&sndcodec>;
+ simple-audio-card,frame-master = <&sndcodec>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
+ };
+
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
@@ -166,6 +182,11 @@
power-source = <1800>;
};
+ sound_pins: sound {
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
+ };
+
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@@ -208,3 +229,28 @@
&usbphy {
status = "okay";
};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi1>;
+ capture = <&ssi0>;
+ };
+ };
+};
+
+&ssi0 {
+ pio-transfer;
+};
+
+&ssi1 {
+ pio-transfer;
+ shared-pin;
+};
--
1.9.1
RE: [PATCH 1/5] ARM: dts: iwg20d-q7-common: Sound PIO support
Hi Simon, Thanks. I will send v2. Regards, Biju > -Original Message- > From: Simon Horman [mailto:ho...@verge.net.au] > Sent: 18 December 2017 11:22 > To: Biju Das > Cc: Rob Herring ; Mark Rutland > ; Kuninori Morimoto > ; Magnus Damm > ; Chris Paterson ; > Fabrizio Castro ; > devicet...@vger.kernel.org; linux-renesas-soc@vger.kernel.org > Subject: Re: [PATCH 1/5] ARM: dts: iwg20d-q7-common: Sound PIO support > > On Fri, Dec 15, 2017 at 02:50:49PM +, Biju Das wrote: > > Enable sound PIO support on carrier board. > > > > Signed-off-by: Biju Das > > Reviewed-by: Fabrizio Castro > > --- > > arch/arm/boot/dts/iwg20d-q7-common.dtsi | 46 > > + > > It appears that the nodes in this file are in (or close to in) alphabetical > order. > Please add new nodes in a manner that preserves that. If necessary please > provide a clean-up patch to shift nodes into alphabetical order. [https://www2.renesas.eu/media/email/unicef_2017.jpg] This Christmas, instead of sending out cards, Renesas Electronics Europe have decided to support Unicef with a donation. For further details click here<https://www.unicef.org/> to find out about the valuable work they do, helping children all over the world. We would like to take this opportunity to wish you a Merry Christmas and a prosperous New Year. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH] pinctrl: sh-pfc: r8a7794: Add i2c5 pin groups and function
Add i2c5 pin groups and function to r8a7745 PFC driver.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch is based on renesas devel tag renesas-devel-20171218-v4.15-rc4
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 41
1 file changed, 41 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
index f133b4f..1640024 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -2228,6 +2228,35 @@ enum {
static const unsigned int i2c4_e_mux[] = {
I2C4_SCL_E_MARK, I2C4_SDA_E_MARK,
};
+/* - I2C5 ---
*/
+static const unsigned int i2c5_pins[] = {
+ /* SCL, SDA */
+ RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
+};
+static const unsigned int i2c5_mux[] = {
+ I2C5_SCL_MARK, I2C5_SDA_MARK,
+};
+static const unsigned int i2c5_b_pins[] = {
+ /* SCL, SDA */
+ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+};
+static const unsigned int i2c5_b_mux[] = {
+ I2C5_SCL_B_MARK, I2C5_SDA_B_MARK,
+};
+static const unsigned int i2c5_c_pins[] = {
+ /* SCL, SDA */
+ RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
+};
+static const unsigned int i2c5_c_mux[] = {
+ I2C5_SCL_C_MARK, I2C5_SDA_C_MARK,
+};
+static const unsigned int i2c5_d_pins[] = {
+ /* SCL, SDA */
+ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
+};
+static const unsigned int i2c5_d_mux[] = {
+ I2C5_SCL_D_MARK, I2C5_SDA_D_MARK,
+};
/* - INTC ---
*/
static const unsigned int intc_irq0_pins[] = {
/* IRQ0 */
@@ -3821,6 +3850,10 @@ enum {
SH_PFC_PIN_GROUP(i2c4_c),
SH_PFC_PIN_GROUP(i2c4_d),
SH_PFC_PIN_GROUP(i2c4_e),
+ SH_PFC_PIN_GROUP(i2c5),
+ SH_PFC_PIN_GROUP(i2c5_b),
+ SH_PFC_PIN_GROUP(i2c5_c),
+ SH_PFC_PIN_GROUP(i2c5_d),
SH_PFC_PIN_GROUP(intc_irq0),
SH_PFC_PIN_GROUP(intc_irq1),
SH_PFC_PIN_GROUP(intc_irq2),
@@ -4196,6 +4229,13 @@ enum {
"i2c4_e",
};
+static const char * const i2c5_groups[] = {
+ "i2c5",
+ "i2c5_b",
+ "i2c5_c",
+ "i2c5_d",
+};
+
static const char * const intc_groups[] = {
"intc_irq0",
"intc_irq1",
@@ -4537,6 +4577,7 @@ enum {
SH_PFC_FUNCTION(i2c2),
SH_PFC_FUNCTION(i2c3),
SH_PFC_FUNCTION(i2c4),
+ SH_PFC_FUNCTION(i2c5),
SH_PFC_FUNCTION(intc),
SH_PFC_FUNCTION(mmc),
SH_PFC_FUNCTION(msiof0),
--
1.9.1
[PATCH v2 1/5] ARM: dts: iwg20d-q7-common: Sound PIO support
Enable sound PIO support on carrier board.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Acked-by: Kuninori Morimoto
---
v1-->v2
* Reworked sorting
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 46 +
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 2070b14..ed67201 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -34,6 +34,22 @@
regulator-always-on;
};
+ rsnd_sgtl5000: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&sndcodec>;
+ simple-audio-card,frame-master = <&sndcodec>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
+ };
+
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
@@ -166,6 +182,11 @@
power-source = <1800>;
};
+ sound_pins: sound {
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
+ };
+
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@@ -177,6 +198,22 @@
};
};
+&rcar_sound {
+ pinctrl-0 = <&sound_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi1>;
+ capture = <&ssi0>;
+ };
+ };
+};
+
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
@@ -205,6 +242,15 @@
status = "okay";
};
+&ssi0 {
+ pio-transfer;
+};
+
+&ssi1 {
+ pio-transfer;
+ shared-pin;
+};
+
&usbphy {
status = "okay";
};
--
1.9.1
[PATCH v2 0/5] Add sound support
This series aims to add sound support for iWave RZ/G1M board. This patch series has below dependency 1)https://patchwork.kernel.org/patch/10108041/ Biju Das (5): ARM: dts: iwg20d-q7-common: Sound PIO support ARM: dts: iwg20d-q7-common: Sound DMA support on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS arch/arm/boot/dts/iwg20d-q7-common.dtsi | 64 + 1 file changed, 64 insertions(+) -- 1.9.1
[PATCH v2 3/5] ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Acked-by: Kuninori Morimoto
---
v1->v2
* No change
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index bc8d253..19467fc 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -242,12 +242,7 @@
status = "okay";
};
-&ssi0 {
- no-busif;
-};
-
&ssi1 {
- no-busif;
shared-pin;
};
--
1.9.1
[PATCH v2 2/5] ARM: dts: iwg20d-q7-common: Sound DMA support on DTS
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Acked-by: Kuninori Morimoto
---
v1->v2
* No change
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index ed67201..bc8d253 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -243,11 +243,11 @@
};
&ssi0 {
- pio-transfer;
+ no-busif;
};
&ssi1 {
- pio-transfer;
+ no-busif;
shared-pin;
};
--
1.9.1
[PATCH v2 4/5] ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting SSI/SRC random connection.
So, this patch is trying
SSI1 -> SRC3
SSI0 <- SRC2
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Acked-by: Kuninori Morimoto
---
v1->v2
* No change
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 19467fc..7b283e0 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -208,8 +208,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi1>;
- capture = <&ssi0>;
+ playback = <&ssi1 &src3>;
+ capture = <&ssi0 &src2>;
};
};
};
--
1.9.1
[PATCH v2 5/5] ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Acked-by: Kuninori Morimoto
---
v1->v2
* No change
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 7b283e0..5c604c74 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -8,6 +8,29 @@
* kind, whether express or implied.
*/
+/*
+ * SSI-SGTL5000
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer set "DVC Out" 100%
+ * amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ * amixer set "DVC Out Mute" on
+ * amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ * amixer set "DVC Out Ramp" on
+ * aplay xxx.wav &
+ * amixer set "DVC Out" 80% // Volume Down
+ * amixer set "DVC Out" 100% // Volume Up
+ */
+
/ {
aliases {
serial0 = &scif0;
@@ -208,8 +231,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi1 &src3>;
- capture = <&ssi0 &src2>;
+ playback = <&ssi1 &src3 &dvc1>;
+ capture = <&ssi0 &src2 &dvc0>;
};
};
};
--
1.9.1
RE: [PATCH 2/2] ARM: dts: r8a7743: Add thermal device to DT
Hi Geert,
Thanks, I will send v2.
Regards,
Biju
> -Original Message-
> From: geert.uytterhoe...@gmail.com [mailto:geert.uytterhoe...@gmail.com]
> On Behalf Of Geert Uytterhoeven
> Sent: 19 December 2017 11:45
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Zhang Rui ; Eduardo
> Valentin ; Simon Horman ;
> Magnus Damm ; Chris Paterson
> ; devicet...@vger.kernel.org; Linux-Renesas
> ; Linux PM list p...@vger.kernel.org>
> Subject: Re: [PATCH 2/2] ARM: dts: r8a7743: Add thermal device to DT
>
> On Wed, Dec 13, 2017 at 11:57 AM, Biju Das
> wrote:
> > This patch instantiates the thermal sensor module with thermal-zone
> > support.
> >
> > This patch is based on the commit cac68a56e34b
> > ("ARM: dts: r8a7791: enable to use thermal-zone") by Kuninori Morimoto.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Reviewed-by: Geert Uytterhoeven
>
> Minor nit below...
>
> > --- a/arch/arm/boot/dts/r8a7743.dtsi
> > +++ b/arch/arm/boot/dts/r8a7743.dtsi
> > @@ -250,6 +250,38 @@
> > resets = <&cpg 407>;
> > };
> >
> > + thermal: thermal@e61f {
> > + compatible = "renesas,thermal-r8a7743",
> > +"renesas,rcar-gen2-thermal",
> > +"renesas,rcar-thermal";
> > + reg = <0 0xe61f 0 0x14>, <0 0xe61f0100 0
> > + 0x38>;
>
> <0 0xe61f 0 0x10>?
>
> The register at offset 0x10 seems to exist on R-Mobile APE6 only, but all
> R-Car
> Gen2 .dtsis include it in the range...
>
> Not that it matters much, mapping granularity is PAGE_SIZE anyway...
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when
> I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
[https://www2.renesas.eu/media/email/unicef_2017.jpg]
This Christmas, instead of sending out cards, Renesas Electronics Europe have
decided to support Unicef with a donation. For further details click
here<https://www.unicef.org/> to find out about the valuable work they do,
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a
prosperous New Year.
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH v2 2/2] ARM: dts: r8a7743: Add thermal device to DT
This patch instantiates the thermal sensor module with thermal-zone
support.
This patch is based on the commit cac68a56e34b
("ARM: dts: r8a7791: enable to use thermal-zone") by Kuninori Morimoto.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
---
v1->v2
* Fixed the size.
arch/arm/boot/dts/r8a7743.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index f250147..6a6c40c 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -250,6 +250,38 @@
resets = <&cpg 407>;
};
+ thermal: thermal@e61f {
+ compatible = "renesas,thermal-r8a7743",
+"renesas,rcar-gen2-thermal",
+"renesas,rcar-thermal";
+ reg = <0 0xe61f 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts =
[PATCH v2 1/2] dt-bindings: thermal: rcar: Add device tree support for r8a7743
Add thermal sensor support for r8a7743 SoC. The Renesas RZ/G1M (r8a7743) thermal sensor module is identical to the R-Car Gen2 family. No driver change is needed due to the fallback compatible value "renesas,rcar-gen2-thermal". Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring --- v1->v2 * No Change Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt index a8e52c8..349e635 100644 --- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt @@ -6,6 +6,7 @@ Required properties: "renesas,rcar-thermal" (without thermal-zone) as fallback. Examples with soctypes are: - "renesas,thermal-r8a73a4" (R-Mobile APE6) + - "renesas,thermal-r8a7743" (RZ/G1M) - "renesas,thermal-r8a7779" (R-Car H1) - "renesas,thermal-r8a7790" (R-Car H2) - "renesas,thermal-r8a7791" (R-Car M2-W) -- 1.9.1
[PATCH v2 0/2] Add thermal support for iWave RZ/G1M board
This series aims to add thermal support for iWave RZ/G1M board. This patch series based on renesas tag renesas-devel-20171218-v4.15-rc4 Biju Das (2): dt-bindings: thermal: rcar: Add device tree support for r8a7743 ARM: dts: r8a7743: Add thermal device to DT .../devicetree/bindings/thermal/rcar-thermal.txt | 1 + arch/arm/boot/dts/r8a7743.dtsi | 32 ++ 2 files changed, 33 insertions(+) -- 1.9.1
RE: [PATCH 5/5] ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec
Thanks Simon for this information.
Next time I will make sure that compiler won't give any warning message with
make dtbs W=1
Regards,
Biju
> -Original Message-
> From: Simon Horman [mailto:ho...@verge.net.au]
> Sent: 20 December 2017 09:58
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Russell King ; Magnus
> Damm ; Chris Paterson
> ; devicet...@vger.kernel.org; linux-renesas-
> s...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 5/5] ARM: dts: iwg20d-q7-common: Enable SGTL5000
> audio codec
>
> On Tue, Dec 12, 2017 at 06:25:11PM +, Biju Das wrote:
> > This patch enables SGTL5000 audio codec on the carrier board.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Somehow I missed applying this one.
> I have now done so with the minor update noted below.
>
> > ---
> > arch/arm/boot/dts/iwg20d-q7-common.dtsi | 24
>
> > 1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> > index 54470c6..2070b14 100644
> > --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> > +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> > @@ -20,6 +20,20 @@
> > stdout-path = "serial0:115200n8";
> > };
> >
> > +audio_clock: audio_clock {
> > +compatible = "fixed-clock";
> > +#clock-cells = <0>;
> > +clock-frequency = <2600>;
> > +};
> > +
> > +reg_1p5v: 1p5v {
> > +compatible = "regulator-fixed";
> > +regulator-name = "1P5V";
> > +regulator-min-microvolt = <150>;
> > +regulator-max-microvolt = <150>;
> > +regulator-always-on;
> > +};
> > +
> > vcc_sdhi1: regulator-vcc-sdhi1 {
> > compatible = "regulator-fixed";
> >
> > @@ -83,6 +97,16 @@
> > compatible = "ti,bq32000";
> > reg = <0x68>;
> > };
> > +
> > +sgtl5000: codec@0a {
>
> s/@0a/@a/
>
> Base addresses should not have a leading 0.
>
> # make dtbs W=1
> DTC arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dtb
> arch/arm/boot/dts/r8a7743-iwg20d-q7.dtb: Warning (unit_address_format):
> Node /soc/i2c@e653/codec@0a unit name should not have leading 0s
>
> > +compatible = "fsl,sgtl5000";
> > +#sound-dai-cells = <0>;
> > +reg = <0x0a>;
> > +clocks = <&audio_clock>;
> > +VDDA-supply = <®_3p3v>;
> > +VDDIO-supply = <®_3p3v>;
> > +VDDD-supply = <®_1p5v>;
> > +};
> > };
> >
> > &pci0 {
> > --
> > 1.9.1
> >
[https://www2.renesas.eu/media/email/unicef_2017.jpg]
This Christmas, instead of sending out cards, Renesas Electronics Europe have
decided to support Unicef with a donation. For further details click
here<https://www.unicef.org/> to find out about the valuable work they do,
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a
prosperous New Year.
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH v2 2/2] ARM: dts: r8a7743: Add thermal device to DT
Hi Simon,
Just noticed that
# make dtbs W=1 is giving below warning message.
arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dtb: Warning (simple_bus_reg): Node
/soc/thermal-zones missing or empty reg/ranges property
Do you prefer a fix patch or a v2 ?
Regards,
Biju
> -Original Message-
> From: Simon Horman [mailto:ho...@verge.net.au]
> Sent: 20 December 2017 08:51
> To: Biju Das
> Cc: Zhang Rui ; Eduardo Valentin
> ; Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> Chris Paterson ; Fabrizio Castro
> ; devicet...@vger.kernel.org; linux-renesas-
> s...@vger.kernel.org; linux...@vger.kernel.org
> Subject: Re: [PATCH v2 2/2] ARM: dts: r8a7743: Add thermal device to DT
>
> On Tue, Dec 19, 2017 at 01:17:29PM +, Biju Das wrote:
> > This patch instantiates the thermal sensor module with thermal-zone
> > support.
> >
> > This patch is based on the commit cac68a56e34b
> > ("ARM: dts: r8a7791: enable to use thermal-zone") by Kuninori Morimoto.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
> > Reviewed-by: Geert Uytterhoeven
> > ---
> > v1->v2
> > * Fixed the size.
>
> Thanks, applied.
[https://www2.renesas.eu/media/email/unicef_2017.jpg]
This Christmas, instead of sending out cards, Renesas Electronics Europe have
decided to support Unicef with a donation. For further details click
here<https://www.unicef.org/> to find out about the valuable work they do,
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a
prosperous New Year.
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH v2 2/2] ARM: dts: r8a7743: Add thermal device to DT
Thanks, I will check and provide feedback if any. Regards, Biju > -Original Message- > From: Simon Horman [mailto:ho...@verge.net.au] > Sent: 20 December 2017 11:49 > To: Biju Das > Cc: Zhang Rui ; Eduardo Valentin > ; Rob Herring ; Mark Rutland > ; Magnus Damm ; > Chris Paterson ; Fabrizio Castro > ; devicet...@vger.kernel.org; linux-renesas- > s...@vger.kernel.org; linux...@vger.kernel.org > Subject: Re: [PATCH v2 2/2] ARM: dts: r8a7743: Add thermal device to DT > > On Wed, Dec 20, 2017 at 11:36:51AM +, Biju Das wrote: > > Hi Simon, > > > > Just noticed that > > > > # make dtbs W=1 is giving below warning message. > > > > arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dtb: Warning > (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges > property > > > > Do you prefer a fix patch or a v2 ? > > I believe I have fixed that by applying > "ARM: dts: r8a7743: move timer and thermal-zones nodes out of bus" > > Could you check the devel branch when I push it a little later today? [https://www2.renesas.eu/media/email/unicef_2017.jpg] This Christmas, instead of sending out cards, Renesas Electronics Europe have decided to support Unicef with a donation. For further details click here<https://www.unicef.org/> to find out about the valuable work they do, helping children all over the world. We would like to take this opportunity to wish you a Merry Christmas and a prosperous New Year. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH 9/9] ARM: dts: iwg22d-sodimm: Sound DMA support via DVC on DTS
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 2cac57c..a4058f4 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -8,6 +8,29 @@
* kind, whether express or implied.
*/
+/*
+ * SSI-SGTL5000
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer set "DVC Out" 100%
+ * amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ * amixer set "DVC Out Mute" on
+ * amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ * amixer set "DVC Out Ramp" on
+ * aplay xxx.wav &
+ * amixer set "DVC Out" 80% // Volume Down
+ * amixer set "DVC Out" 100% // Volume Up
+ */
+
/dts-v1/;
#include "r8a7745-iwg22m.dtsi"
@@ -183,8 +206,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi3 &src3>;
- capture = <&ssi4 &src4>;
+ playback = <&ssi3 &src3 &dvc0>;
+ capture = <&ssi4 &src4 &dvc1>;
};
};
};
--
1.9.1
[PATCH 3/9] ARM: dts: r8a7745: Add sound support
Define the generic r8a7745(RZ/G1E) part of the sound device node.
This patch is based on the r8a7794 sound work by Sergei Shtylyov.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745.dtsi | 180 +
1 file changed, 180 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index d9488a1..835a282 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1293,6 +1293,186 @@
resets = <&cpg 915>;
status = "disabled";
};
+
+ rcar_sound: sound@ec50 {
+ /*
+* #sound-dai-cells is required
+*
+* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+*/
+ compatible = "renesas,rcar_sound-r8a7745",
+"renesas,rcar_sound-gen2";
+ reg = <0 0xec50 0 0x1000>, /* SCU */
+ <0 0xec5a 0 0x100>, /* ADG */
+ <0 0xec54 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec74 0 0x200>; /* Audio DMAC peri peri
*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+<&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
+<&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
+<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+<&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+<&cpg CPG_CORE R8A7745_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.6", "src.5", "src.4", "src.3",
+ "src.2", "src.1",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+<&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
+<&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
+<&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
+<&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma0 0xbc>;
+ dma-names = "
[PATCH 6/9] ARM: dts: iwg22d-sodimm: Sound DMA support on DTS
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index b6521da..a9ba46d 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -207,11 +207,11 @@
};
&ssi3 {
- pio-transfer;
+ no-busif;
};
&ssi4 {
- pio-transfer;
+ no-busif;
shared-pin;
};
--
1.9.1
[PATCH 8/9] ARM: dts: iwg22d-sodimm: Sound DMA support via SRC on DTS
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting SSI/SRC random connection.
So, this patch is trying
SSI3 -> SRC3
SSI4 <- SRC4
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 0f880c1..2cac57c 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -183,8 +183,8 @@
rcar_sound,dai {
dai0 {
- playback = <&ssi3>;
- capture = <&ssi4>;
+ playback = <&ssi3 &src3>;
+ capture = <&ssi4 &src4>;
};
};
};
--
1.9.1
[PATCH 5/9] ARM: dts: iwg22d-sodimm: Sound PIO support
Enable sound PIO support on carrier board.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 46 +
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 5d4b7d2..b6521da 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -32,6 +32,21 @@
clock-frequency = <2600>;
};
+ rsnd_sgtl5000: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&sndcodec>;
+ simple-audio-card,frame-master = <&sndcodec>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
+ };
+
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
@@ -141,6 +156,11 @@
power-source = <3300>;
};
+ sound_pins: sound {
+ groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
+ function = "ssi";
+ };
+
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@@ -152,6 +172,23 @@
};
};
+&rcar_sound {
+ pinctrl-0 = <&sound_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /* Single DAI */
+
+ #sound-dai-cells = <0>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi3>;
+ capture = <&ssi4>;
+ };
+ };
+};
+
&scif4 {
pinctrl-0 = <&scif4_pins>;
pinctrl-names = "default";
@@ -169,6 +206,15 @@
status = "okay";
};
+&ssi3 {
+ pio-transfer;
+};
+
+&ssi4 {
+ pio-transfer;
+ shared-pin;
+};
+
&usbphy {
status = "okay";
};
--
1.9.1
[PATCH 4/9] ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec
This patch enables SGTL5000 audio codec on the carrier board.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 39ce7e7..5d4b7d2 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -26,6 +26,12 @@
stdout-path = "serial3:115200n8";
};
+ audio_clock: audio_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2600>;
+ };
+
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
@@ -80,6 +86,23 @@
pinctrl-names = "default";
};
+&i2c5 {
+ pinctrl-0 = <&i2c5_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <40>;
+
+ sgtl5000: codec@a {
+ compatible = "fsl,sgtl5000";
+ #sound-dai-cells = <0>;
+ reg = <0x0a>;
+ clocks = <&audio_clock>;
+ VDDA-supply = <®_3p3v>;
+ VDDIO-supply = <®_3p3v>;
+ };
+};
+
&pci1 {
status = "okay";
pinctrl-0 = <&usb1_pins>;
@@ -102,6 +125,11 @@
function = "hscif1";
};
+ i2c5_pins: i2c5 {
+ groups = "i2c5_b";
+ function = "i2c5";
+ };
+
scif4_pins: scif4 {
groups = "scif4_data_b";
function = "scif4";
--
1.9.1
[PATCH 1/9] ARM: dts: r8a7745: Add audio clocks
Describe the external audio clocks required by the sound driver.
Boards that provide audio clocks need to override the clock frequencies.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 2be7485..6d085f0 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -35,6 +35,27 @@
vin1 = &vin1;
};
+ /*
+* The external audio clocks are configured as 0 Hz fixed
+* frequency clocks by default. Boards that provide audio
+* clocks should override them.
+*/
+ audio_clka: audio_clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkb: audio_clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkc: audio_clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
--
1.9.1
[PATCH 7/9] ARM: dts: iwg22d-sodimm: Sound DMA support via BUSIF on DTS
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index a9ba46d..0f880c1 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -206,12 +206,7 @@
status = "okay";
};
-&ssi3 {
- no-busif;
-};
-
&ssi4 {
- no-busif;
shared-pin;
};
--
1.9.1
[PATCH 0/9] Add sound support
This series aims to add sound support for iWave RZ/G1E board. Biju Das (9): ARM: dts: r8a7745: Add audio clocks ARM: dts: r8a7745: Add audio DMAC support ARM: dts: r8a7745: Add sound support ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec ARM: dts: iwg22d-sodimm: Sound PIO support ARM: dts: iwg22d-sodimm: Sound DMA support on DTS ARM: dts: iwg22d-sodimm: Sound DMA support via BUSIF on DTS ARM: dts: iwg22d-sodimm: Sound DMA support via SRC on DTS ARM: dts: iwg22d-sodimm: Sound DMA support via DVC on DTS arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 92 +++ arch/arm/boot/dts/r8a7745.dtsi | 232 2 files changed, 324 insertions(+) -- 1.9.1
[PATCH 2/9] ARM: dts: r8a7745: Add audio DMAC support
Instantiate the audio DMA controller on the r8a7745 device tree.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7745.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6d085f0..d9488a1 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -397,6 +397,37 @@
dma-channels = <15>;
};
+ audma0: dma-controller@ec70 {
+ compatible = "renesas,dmac-r8a7745",
+"renesas,rcar-dmac";
+ reg = <0 0xec70 0 0x1>;
+ interrupts = ;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
usb_dmac0: dma-controller@e65a {
compatible = "renesas,r8a7745-usb-dmac",
"renesas,usb-dmac";
--
1.9.1
RE: [PATCH 8/9] ARM: dts: iwg22d-sodimm: Sound DMA support via SRC on DTS
Hi Simon,
> -Original Message-
> From: Simon Horman [mailto:ho...@verge.net.au]
> Sent: 21 December 2017 10:45
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> Chris Paterson ; Fabrizio Castro
> ; devicet...@vger.kernel.org; linux-renesas-
> s...@vger.kernel.org
> Subject: Re: [PATCH 8/9] ARM: dts: iwg22d-sodimm: Sound DMA support via
> SRC on DTS
>
> On Wed, Dec 20, 2017 at 08:02:04PM +, Biju Das wrote:
> > DMA transfer to/from SRC
> >
> > DMA DMApp
> > [MEM] -> [SRC] -> [SSIU] -> [SSI]
> >
> > DMA DMApp
> > [MEM] <- [SRC] <- [SSIU] <- [SSI]
> >
> > Current sound driver is supporting SSI/SRC random connection.
> > So, this patch is trying
> > SSI3 -> SRC3
> > SSI4 <- SRC4
>
> I am curious to know why the selection here differs from that present in
> iwg20d-q7-common. Is it an arbitrary decision?
>
> Likewise for other uses of ssi*, src* and dvc* in this patchset.
For ssi*, on this board, SSI3/4 interface is connected to Audio In/Out.
For src*, the original bsp from iwave is using src3/src4, also it is arbitrary
as per the data sheet.
For dvc*, Again it is arbitrary as per the data sheet.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
> > ---
> > arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> > b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> > index 0f880c1..2cac57c 100644
> > --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> > +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> > @@ -183,8 +183,8 @@
> >
> > rcar_sound,dai {
> > dai0 {
> > -playback = <&ssi3>;
> > -capture = <&ssi4>;
> > +playback = <&ssi3 &src3>;
> > +capture = <&ssi4 &src4>;
> > };
> > };
> > };
> > --
> > 1.9.1
> >
[https://www2.renesas.eu/media/email/unicef_2017.jpg]
This Christmas, instead of sending out cards, Renesas Electronics Europe have
decided to support Unicef with a donation. For further details click
here<https://www.unicef.org/> to find out about the valuable work they do,
helping children all over the world.
We would like to take this opportunity to wish you a Merry Christmas and a
prosperous New Year.
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH] ARM: dts: r8a7745: Add missing clock for secondary CA7 CPU core
Add the missing clock to CA7 CPU1 node. Signed-off-by: Biju Das --- arch/arm/boot/dts/r8a7745.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 835a282..ae918e9 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -84,6 +84,7 @@ compatible = "arm,cortex-a7"; reg = <1>; clock-frequency = <10>; + clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; power-domains = <&sysc R8A7745_PD_CA7_CPU1>; next-level-cache = <&L2_CA7>; }; -- 1.9.1
RE: [PATCH 01/10] dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings
Hi, > Subject: [PATCH 01/10] dt-bindings: display: renesas: Add R-Car LVDS encoder > DT bindings > > The Renesas R-Car Gen2 and Gen3 SoCs have internal LVDS encoders. Add > corresponding device tree bindings. > > Signed-off-by: Laurent Pinchart > > --- > .../bindings/display/bridge/renesas,lvds.txt | 54 > ++ > MAINTAINERS| 1 + > 2 files changed, 55 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > > diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > new file mode 100644 > index ..459c56822eda > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > @@ -0,0 +1,54 @@ > +Renesas R-Car LVDS Encoder > +== > + > +These DT bindings describe the LVDS encoder embedded in the Renesas > +R-Car Gen2 and Gen3 SoCs. > + > +Required properties: > + > +- compatible : Shall contain one of > + - "renesas,lvds-r8a7743" for R8A7790 (R-Car RZ/G1M) compatible LVDS > +encoders Typo. It should be R8A7743 . Regards, Biju Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH vY 1/2] ARM: dts: iwg22d-sodimm-dbhd-ca: use demuxer for I2C1
Create a separate bus for HDMI related I2C1 and provide fallback to GPIO.
Based on work for r8a7794/Alt by Wolfram Sang: "ARM: dts: alt: use demuxer
for I2C1"
Add Fixes: 97b94d256d432ba9 ("ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI
video output")
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
We have observed that randomly HDMI slave device is holding data line after a
soft reboot.
We applied this patch and using an oscilloscope verified that i2c recovery
works on the
failure condition.
.../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 96 +-
1 file changed, 59 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index d34de82..de120a3 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -19,6 +19,8 @@
serial0 = &scif1;
serial4 = &scif5;
serial6 = &hscif2;
+ i2c8 = &gpioi2c1;
+ i2c10 = &i2chdmi;
};
cec_clock: cec-clock {
@@ -27,6 +29,16 @@
clock-frequency = <1200>;
};
+ gpioi2c1: i2c-8 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "i2c-gpio";
+ status = "disabled";
+ scl-gpios = <&gpio0 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <5>;
+ };
+
hdmi-out {
compatible = "hdmi-connector";
type = "a";
@@ -37,6 +49,52 @@
};
};
};
+
+ /*
+* A fallback to GPIO is provided for I2C1.
+*/
+ i2chdmi: i2c-10 {
+ compatible = "i2c-demux-pinctrl";
+ i2c-parent = <&i2c1>, <&gpioi2c1>;
+ i2c-bus-name = "i2c-hdmi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&cec_clock>;
+ clock-names = "cec";
+ pd-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint =
<&du_out_rgb0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+ };
};
&du {
@@ -70,45 +128,9 @@
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
- pinctrl-names = "default";
+ pinctrl-names = "i2c-hdmi";
- status = "okay";
clock-frequency = <40>;
-
- hdmi@39 {
- compatible = "adi,adv7511w";
- reg = <0x39>;
- interrupt-parent = <&gpio1>;
- interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&cec_clock>;
- clock-names = "cec";
- pd-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
-
- adi,input-depth = <8>;
- adi,input-colorspace = "rgb";
- adi,input-clock = "1x";
- adi,input-style = <1>;
- adi,input-justification = "evenly";
-
- ports {
- #address-cells = <1>;
- #s
[PATCH vY 2/2] ARM: dts: iwg22d-sodimm: use demuxer for I2C5
Create a separate bus for audiocodec related I2C5 and provide fallback to GPIO.
Based on work for r8a7794/Alt by Wolfram Sang: "ARM: dts: alt: use demuxer
for I2C1"
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 44 +
1 file changed, 33 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index a4058f4..b2ea43f 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -42,6 +42,8 @@
ethernet0 = &avb;
serial3 = &scif4;
serial5 = &hscif1;
+ i2c9 = &gpioi2c5;
+ i2c11 = &i2caudiocodec;
};
chosen {
@@ -55,6 +57,36 @@
clock-frequency = <2600>;
};
+ gpioi2c5: i2c-9 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "i2c-gpio";
+ status = "disabled";
+ scl-gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio0 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <5>;
+ };
+
+ /*
+* A fallback to GPIO is provided for I2C5.
+*/
+ i2caudiocodec: i2c-11 {
+ compatible = "i2c-demux-pinctrl";
+ i2c-parent = <&i2c5>, <&gpioi2c5>;
+ i2c-bus-name = "i2c-audiocodec";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgtl5000: codec@a {
+ compatible = "fsl,sgtl5000";
+ #sound-dai-cells = <0>;
+ reg = <0x0a>;
+ clocks = <&audio_clock>;
+ VDDA-supply = <®_3p3v>;
+ VDDIO-supply = <®_3p3v>;
+ };
+ };
+
rsnd_sgtl5000: sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@@ -126,19 +158,9 @@
&i2c5 {
pinctrl-0 = <&i2c5_pins>;
- pinctrl-names = "default";
+ pinctrl-names = "i2c-audiocodec";
- status = "okay";
clock-frequency = <40>;
-
- sgtl5000: codec@a {
- compatible = "fsl,sgtl5000";
- #sound-dai-cells = <0>;
- reg = <0x0a>;
- clocks = <&audio_clock>;
- VDDA-supply = <®_3p3v>;
- VDDIO-supply = <®_3p3v>;
- };
};
&pci1 {
--
2.7.4
[PATCH 0/2] Use demuxer for i2c1 and i2c5
We have observed that on iWave RZ/G1E boards, randomly HDMI slave device is holding data line after a soft reboot. We applied demuxer patch for i2c1 and using an oscilloscope verified that i2c recovery works on the failure condition. This patch depends on the below patch set https://patchwork.ozlabs.org/cover/857505/ it is tested against renesas-devel-20180122-v4.15-rc9 Biju Das (2): ARM: dts: iwg22d-sodimm-dbhd-ca: use demuxer for I2C1 ARM: dts: iwg22d-sodimm: use demuxer for I2C5 .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 96 +- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts| 44 +++--- 2 files changed, 92 insertions(+), 48 deletions(-) -- 2.7.4
RE: [PATCH 0/2] Use demuxer for i2c1 and i2c5
> Subject: Re: [PATCH 0/2] Use demuxer for i2c1 and i2c5 > > On Mon, Jan 22, 2018 at 11:29:21AM +0000, Biju Das wrote: > > We have observed that on iWave RZ/G1E boards, randomly HDMI slave > > device is holding data line after a soft reboot. > > > > We applied demuxer patch for i2c1 and using an oscilloscope verified > > that i2c recovery works on the failure condition. > > Do you really need the demuxer for that? How do i2c-bus gets details of gpio lines associated with i2c bus for bus recovery? For eg:- i2c1 scl line --> gpio0 11 I2c1 sda line --> gpio0 12 > I posted and just merged bus recovery to the i2c-rcar driver. Did you test > that? > In theory, this should be enough. On top of renesas-dev branch, I am using the below i2c-rcar driver related patches. https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg22278.html Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 0/2] Use demuxer for i2c1 and i2c5
> Subject: Re: [PATCH 0/2] Use demuxer for i2c1 and i2c5 [>] > > How do i2c-bus gets details of gpio lines associated with i2c bus for bus > recovery? > > As you can see in the code, you don't need GPIOs if you can control SDA and > SCL > directly. The I2C IP can do this. I agree. Thanks for correcting me. > > On top of renesas-dev branch, I am using the below i2c-rcar driver related > patches. > > > > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg2227 > > 8.html > > Those should be enough. They are not? Yes. I have tested without demuxer patches, I confirm, it can recover the bus. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 0/2] Use demuxer for i2c1 and i2c5
Hi, > Subject: Re: [PATCH 0/2] Use demuxer for i2c1 and i2c5 > > > > > > On top of renesas-dev branch, I am using the below i2c-rcar driver > > > > related > > > patches. > > > > > > > > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg > > > > 2227 > > > > 8.html > > > > > > Those should be enough. They are not? > > > > Yes. I have tested without demuxer patches, I confirm, it can recover the > > bus. > > That is great news! Thanks for the additional testing. I was a little worried > that > the 'bus stalled' detection might have failed for you, but it seems it works > for > your case as well. > > With that put aside, it is still valid, to add the demuxer to the DTS file in > case you > want to switch to bitbanged GPIO at runtime for some reason. Only the commit > message would need updating then, however, because it is not relevant for bus > recovery. Ok. I will fix the commit message and send v2. Regards, Biju Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
[PATCH 1/3] dt-bindings: iommu: ipmmu-vmsa: Add device tree support for r8a774[35]
Document r8a774[35] specific compatible strings. The Renesas RZ/G1[ME] (r8a774[35]) IPMMU are identical to the R-Car Gen2 family. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt index 857df92..7d300af 100644 --- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt @@ -11,12 +11,15 @@ Required Properties: the device is compatible with the R-Car Gen2 VMSA-compatible IPMMU. - "renesas,ipmmu-r8a73a4" for the R8A73A4 (R-Mobile APE6) IPMMU. +- "renesas,ipmmu-r8a7743" for the R8A7743 (RZ/G1M) IPMMU. +- "renesas,ipmmu-r8a7745" for the R8A7745 (RZ/G1E) IPMMU. - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU. - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU. - "renesas,ipmmu-r8a7793" for the R8A7793 (R-Car M2-N) IPMMU. - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU. - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU. -- "renesas,ipmmu-vmsa" for generic R-Car Gen2 VMSA-compatible IPMMU. +- "renesas,ipmmu-vmsa" for generic R-Car Gen2 or RZ/G1 VMSA-compatible + IPMMU. - reg: Base address and size of the IPMMU registers. - interrupts: Specifiers for the MMU fault interrupts. For instances that -- 2.7.4
[PATCH 3/3] ARM: dts: r8a7745: Add IPMMU DT nodes
Add the six IPMMU instances found in the r8a7745 to DT with a disabled
status.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7745.dtsi | 58 ++
1 file changed, 58 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index ae918e9..a9da80c 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1295,6 +1295,64 @@
status = "disabled";
};
+ ipmmu_sy0: mmu@e628 {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe628 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu@e629 {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe629 0 0x1000>;
+ interrupts = ;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu@e674 {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe674 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec68 {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xec68 0 0x1000>;
+ interrupts = ;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu@e62a {
+ compatible = "renesas,ipmmu-r8a7745",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe62a 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
rcar_sound: sound@ec50 {
/*
* #sound-dai-cells is required
--
2.7.4
[PATCH 0/3] Add IPMMU support for r8a774[35]
This patch series aims to add IPMMU support for r8a774[35] SoC. It is tested with modetest utility and the patches present in the below git for enabling ipmmu support in the vsp1 and DU. git://linuxtv.org/pinchartl/media.git iommu/devel/dt It is tested against renesas-devel-20180122-v4.15-rc9 Biju Das (3): dt-bindings: iommu: ipmmu-vmsa: Add device tree support for r8a774[35] ARM: dts: r8a7743: Add IPMMU DT nodes ARM: dts: r8a7745: Add IPMMU DT nodes .../bindings/iommu/renesas,ipmmu-vmsa.txt | 5 +- arch/arm/boot/dts/r8a7743.dtsi | 58 ++ arch/arm/boot/dts/r8a7745.dtsi | 58 ++ 3 files changed, 120 insertions(+), 1 deletion(-) -- 2.7.4
[PATCH 2/3] ARM: dts: r8a7743: Add IPMMU DT nodes
Add the six IPMMU instances found in the r8a7743 to DT with a disabled
status.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7743.dtsi | 58 ++
1 file changed, 58 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0b74c6c..759ce97 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1457,6 +1457,64 @@
status = "disabled";
};
+ ipmmu_sy0: mmu@e628 {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe628 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu@e629 {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe629 0 0x1000>;
+ interrupts = ;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu@e674 {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe674 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec68 {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xec68 0 0x1000>;
+ interrupts = ;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu@e62a {
+ compatible = "renesas,ipmmu-r8a7743",
+"renesas,ipmmu-vmsa";
+ reg = <0 0xe62a 0 0x1000>;
+ interrupts = ,
+;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
rcar_sound: sound@ec50 {
/*
* #sound-dai-cells is required
--
2.7.4
[PATCH 0/2] Add VSP support for r8a774[35]
This patch series aims to add VSP support for r8a774[35] SoC. It is tested with VSP unit tests available in the below git git://git.ideasonboard.com/renesas/vsp-tests.git It is tested against renesas-devel-20180122-v4.15-rc9 This patch depend on https://patchwork.kernel.org/patch/10182757/ https://patchwork.kernel.org/patch/10182755/ Biju Das (2): ARM: dts: r8a7743: Add VSP support ARM: dts: r8a7745: Add VSP support arch/arm/boot/dts/r8a7743.dtsi | 27 +++ arch/arm/boot/dts/r8a7745.dtsi | 18 ++ 2 files changed, 45 insertions(+) -- 2.7.4
[PATCH 2/2] ARM: dts: r8a7745: Add VSP support
Add VSP support to SoC DT.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7745.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index a9da80c..ddc3da2 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -958,6 +958,24 @@
status = "disabled";
};
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe93 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe93 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
du: display@feb0 {
compatible = "renesas,du-r8a7745";
reg = <0 0xfeb0 0 0x4>;
--
2.7.4
[PATCH 1/2] ARM: dts: r8a7743: Add VSP support
Add VSP support to SoC DT.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7743.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 759ce97..47b62f6 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1301,6 +1301,33 @@
status = "disabled";
};
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe93 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe93 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
du: display@feb0 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb0 0 0x4>,
--
2.7.4
[PATCH 2/4] ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
Document the iW-RainboW-G20D-Qseven-RZG1M device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the iW-RainboW-G20D-Qseven-RZG1M board. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 4b60ce2..13fbfe0 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -69,6 +69,8 @@ Boards: compatible = "renesas,kzm9d", "renesas,emev2" - Kyoto Microcomputer Co. KZM-A9-GT compatible = "renesas,kzm9g", "renesas,sh73a0" + - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) +compatible = "iwave,g20d", "renesas,r8a7743" - Lager (RTP0RC7790SEB00010S) compatible = "renesas,lager", "renesas,r8a7790" - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S) -- 1.9.1
[PATCH 1/4] of: Add vendor prefix for iWave Systems Technologies Pvt. Ltd
This patch adds vendor prefix for iWave Systems Technologies Pvt. Ltd. Website: http://www.iwavesystems.com/ Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index d808f24..a74400a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -160,6 +160,7 @@ iseeISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. itead ITEAD Intelligent Systems Co.Ltd +iwave iWave Systems Technologies Pvt. Ltd. jdiJapan Display Inc. jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH -- 1.9.1
[PATCH 4/4] ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1M.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 25 +
2 files changed, 26 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3bd29fe..1642fd1 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7743-sk-rzg1m.dtb \
+ r8a7743-iwg20d-q7.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
new file mode 100644
index 000..0f609291
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
@@ -0,0 +1,25 @@
+/*
+ * Device Tree Source for the iWave-RZG1M Qseven carrier board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7743-iwg20m.dtsi"
+
+/ {
+ model = "iWave Systems RainboW-G20D-Qseven board based on RZ/G1M";
+ compatible = "iwave,g20d", "renesas,r8a7743";
+
+ aliases {
+ serial0 = &scif0;
+ };
+};
+
+&scif0 {
+ status = "okay";
+};
--
1.9.1
[PATCH 0/4] ARM: dts: Add iWave RZ/G1M board support
Hello, This series aims to add iWave RZ/G1M R8A7743 based Qseven SOM and RainboW-G20D- Qseven board support. This series has been tested against linux-next tag next-20170602. Regards, Biju Das (4): of: Add vendor prefix for iWave Systems Technologies Pvt. Ltd ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ .../devicetree/bindings/vendor-prefixes.txt| 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/r8a7743-iwg20d-q7.dts| 25 arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 27 ++ 5 files changed, 56 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts create mode 100644 arch/arm/boot/dts/r8a7743-iwg20m.dtsi -- 1.9.1
[PATCH 3/4] ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
Add support for iWave RZG1M Qseven System On Module.
http://www.iwavesystems.com/rz-g1m-qseven-module.html
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a7743-iwg20m.dtsi
diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
new file mode 100644
index 000..d7bdf5d
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
@@ -0,0 +1,27 @@
+/*
+ * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "r8a7743.dtsi"
+
+/ {
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x2000>;
+ };
+
+ memory@2 {
+ device_type = "memory";
+ reg = <2 0x 0 0x2000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <2000>;
+};
--
1.9.1
RE: [PATCH 3/4] ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
> On Fri, Jun 2, 2017 at 6:22 PM, Biju Das wrote:
> > Add support for iWave RZG1M Qseven System On Module.
> > http://www.iwavesystems.com/rz-g1m-qseven-module.html
>
> Thanks for your patch!
>
> > Signed-off-by: Biju Das
> > Reviewed-by: Chris Paterson
>
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
> > @@ -0,0 +1,27 @@
> > +/*
> > + * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
> > + *
> > + * Copyright (C) 2017 Renesas Electronics Corp.
> > + *
> > + * This file is licensed under the terms of the GNU General Public
> > +License
> > + * version 2. This program is licensed "as is" without any warranty
> > +of any
> > + * kind, whether express or implied.
> > + */
> > +
> > +#include "r8a7743.dtsi"
> > +
> > +/ {
>
> Given this is a sub-board with many other components, I think it should have
> its own (documented) compatible value, e.g.
>
> compatible = "iwave,g20m", "renesas,r8a7743";
Thanks for the input. I will document this system on module and apply the above
change.
> > + memory@4000 {
> > + device_type = "memory";
> > + reg = <0 0x4000 0 0x2000>;
> > + };
> > +
> > + memory@2 {
> > + device_type = "memory";
> > + reg = <2 0x 0 0x2000>;
> > + };
> > +};
>
[>]
Regards,
Biju
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 2/4] ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
> On Fri, Jun 2, 2017 at 6:22 PM, Biju Das wrote: > > Document the iW-RainboW-G20D-Qseven-RZG1M device tree bindings, > > listing it as a supported board. > > > > This allows to use checkpatch.pl to validate .dts files referring to > > the iW-RainboW-G20D-Qseven-RZG1M board. > > Thanks for your patch! > > > Signed-off-by: Biju Das > > Reviewed-by: Chris Paterson > > Reviewed-by: Geert Uytterhoeven > > > --- a/Documentation/devicetree/bindings/arm/shmobile.txt > > +++ b/Documentation/devicetree/bindings/arm/shmobile.txt > > @@ -69,6 +69,8 @@ Boards: > > compatible = "renesas,kzm9d", "renesas,emev2" > >- Kyoto Microcomputer Co. KZM-A9-GT > > compatible = "renesas,kzm9g", "renesas,sh73a0" > > + - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW- > G20D-Qseven) > > +compatible = "iwave,g20d", "renesas,r8a7743" > > Please keep the list sorted alphabetically. Thanks for the input. I will correct it. > >- Lager (RTP0RC7790SEB00010S) > > compatible = "renesas,lager", "renesas,r8a7790" > >- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S) Regards, Biju Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 4/4] ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
> On Fri, Jun 2, 2017 at 6:22 PM, Biju Das wrote:
> > Add support for iWave RainboW-G20D-Qseven board based on RZ/G1M.
>
> Thanks for your patch!
>
> > Signed-off-by: Biju Das
> > Reviewed-by: Chris Paterson
>
> Reviewed-by: Geert Uytterhoeven
>
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
> > r8a73a4-ape6evm.dtb \
> > r8a7740-armadillo800eva.dtb \
> > r8a7743-sk-rzg1m.dtb \
> > + r8a7743-iwg20d-q7.dtb \
>
> Please preserve sort order.
>
> > r8a7745-sk-rzg1e.dtb \
> > r8a7778-bockw.dtb \
> > r8a7779-marzen.dtb \
>
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
> > @@ -0,0 +1,25 @@
> > +/*
> > + * Device Tree Source for the iWave-RZG1M Qseven carrier board
> > + *
> > + * Copyright (C) 2017 Renesas Electronics Corp.
> > + *
> > + * This file is licensed under the terms of the GNU General Public
> > +License
> > + * version 2. This program is licensed "as is" without any warranty
> > +of any
> > + * kind, whether express or implied.
> > + */
> > +
> > +/dts-v1/;
> > +#include "r8a7743-iwg20m.dtsi"
> > +
> > +/ {
> > + model = "iWave Systems RainboW-G20D-Qseven board based on
> RZ/G1M";
> > + compatible = "iwave,g20d", "renesas,r8a7743";
>
> With my comment on patch [3/4], this should become:
>
> compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
>
Agreed. I will do this change.
> > +
> > + aliases {
> > + serial0 = &scif0;
> > + };
> > +};
> > +
> > +&scif0 {
> > + status = "okay";
> > +};
>
Regards,
Biju
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH v2 4/5] ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
Add support for iWave RZG1M Qseven System On Module.
http://www.iwavesystems.com/rz-g1m-qseven-module.html
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 29 +
2 files changed, 30 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a7743-iwg20m.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3d6e288..8da0897 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -710,6 +710,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r7s72100-rskrza1.dtb \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
+ r8a7743-iwg20d-q7.dtb \
r8a7743-sk-rzg1m.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
new file mode 100644
index 000..001ca91
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
@@ -0,0 +1,29 @@
+/*
+ * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "r8a7743.dtsi"
+
+/ {
+ compatible = "iwave,g20m", "renesas,r8a7743";
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x2000>;
+ };
+
+ memory@2 {
+ device_type = "memory";
+ reg = <2 0x 0 0x2000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <2000>;
+};
--
1.9.1
[PATCH v2 0/5] ARM: dts: Add iWave RZ/G1M board support
Hello, This series aims to add iWave RZ/G1M R8A7743 based Qseven SOM and RainboW-G20D- Qseven board support. This series has been tested against linux-next tag next-20170606. Modifications: v1->v2 -Documented iWave iW-RainboW-G20M-Qseven-RZG1M system on module -Documented iW-RainboW-G20D-Qseven-RZG1M board in alphabatical order -Added compatible string in iWave RZG1M Qseven SOM -Modified the compatible string in iWave G20D-Q7 board History: --- [v1]: http://www.spinics.net/lists/devicetree/msg179565.html Biju Das (5): of: Add vendor prefix for iWave Systems Technologies Pvt. Ltd ARM: shmobile: document iW-RainboW-G20M-Qseven-RZG1M system on module ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M Documentation/devicetree/bindings/arm/shmobile.txt | 4 +++ .../devicetree/bindings/vendor-prefixes.txt| 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/r8a7743-iwg20d-q7.dts| 25 +++ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 29 ++ 5 files changed, 60 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts create mode 100644 arch/arm/boot/dts/r8a7743-iwg20m.dtsi -- 1.9.1
[PATCH v2 1/5] of: Add vendor prefix for iWave Systems Technologies Pvt. Ltd
This patch adds vendor prefix for iWave Systems Technologies Pvt. Ltd. Website: http://www.iwavesystems.com/ Signed-off-by: Biju Das Reviewed-by: Chris Paterson Acked-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index d808f24..a74400a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -160,6 +160,7 @@ iseeISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. itead ITEAD Intelligent Systems Co.Ltd +iwave iWave Systems Technologies Pvt. Ltd. jdiJapan Display Inc. jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH -- 1.9.1
[PATCH v2 2/5] ARM: shmobile: document iW-RainboW-G20M-Qseven-RZG1M system on module
Document the iW-RainboW-G20M-Qseven-RZG1M device tree bindings, listing it as a supported system on module. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 4b60ce2..ace4fe3 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -63,6 +63,8 @@ Boards: compatible = "renesas,h3ulcb", "renesas,r8a7795"; - Henninger compatible = "renesas,henninger", "renesas,r8a7791" + - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) +compatible = "iwave,g20m", "renesas,r8a7743" - Koelsch (RTP0RC7791SEB00010S) compatible = "renesas,koelsch", "renesas,r8a7791" - Kyoto Microcomputer Co. KZM-A9-Dual -- 1.9.1
[PATCH v2 3/5] ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
Document the iW-RainboW-G20D-Qseven-RZG1M device tree bindings, listing it as a supported board. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index ace4fe3..9b6f6cc 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -63,6 +63,8 @@ Boards: compatible = "renesas,h3ulcb", "renesas,r8a7795"; - Henninger compatible = "renesas,henninger", "renesas,r8a7791" + - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) +compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743" - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) compatible = "iwave,g20m", "renesas,r8a7743" - Koelsch (RTP0RC7791SEB00010S) -- 1.9.1
[PATCH v2 5/5] ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1M.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 25 +
1 file changed, 25 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
new file mode 100644
index 000..9b54783
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
@@ -0,0 +1,25 @@
+/*
+ * Device Tree Source for the iWave-RZG1M Qseven carrier board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7743-iwg20m.dtsi"
+
+/ {
+ model = "iWave Systems RainboW-G20D-Qseven board based on RZ/G1M";
+ compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
+
+ aliases {
+ serial0 = &scif0;
+ };
+};
+
+&scif0 {
+ status = "okay";
+};
--
1.9.1
[PATCH] gpio: rcar: Add R8A7743 (RZ/G1M) support
Renesas RZ/G1M (R8A7743 SoC) GPIO blocks are identical to the R-Car Gen2
family. Add support for its GPIO controllers.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
---
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
drivers/gpio/gpio-rcar.c | 4
2 files changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
index 7c1ab3b..1cc3cfe 100644
--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
@@ -3,6 +3,7 @@
Required Properties:
- compatible: should contain one of the following.
+- "renesas,gpio-r8a7743": for R8A7743 (RZ-G1M) compatible GPIO controller.
- "renesas,gpio-r8a7778": for R8A7778 (R-Mobile M1) compatible GPIO
controller.
- "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO
controller.
- "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO
controller.
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 31ad288..4a1536a 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -344,6 +344,10 @@ struct gpio_rcar_info {
static const struct of_device_id gpio_rcar_of_table[] = {
{
+ .compatible = "renesas,gpio-r8a7743",
+ /* RZ/G1 GPIO is identical to R-Car Gen2. */
+ .data = &gpio_rcar_info_gen2,
+ }, {
.compatible = "renesas,gpio-r8a7790",
.data = &gpio_rcar_info_gen2,
}, {
--
1.9.1
[PATCH] ARM: dts: iwg20d-q7: Add pinctl support for scif0
Adding pinctrl support for scif0 interface.
Signed-off-by: Biju Das
---
This patch is been tested against linux-next tag next-20170616.
It depends upon the patch "[PATCH v2 1/3] ARM: dts: r8a7743: add PFC support"
https://www.spinics.net/lists/arm-kernel/msg577301.html
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
index 9b54783..497aec0 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
@@ -20,6 +20,16 @@
};
};
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data_d";
+ function = "scif0";
+ };
+};
+
&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
1.9.1
[PATCH 02/12] soc: renesas: Identify RZ/G1C
Add support for identifying the RZ/G1C (r8a77470) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/soc/renesas/renesas-soc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/soc/renesas/renesas-soc.c
b/drivers/soc/renesas/renesas-soc.c
index ea71c41..3912a71 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -100,6 +100,11 @@ static const struct renesas_soc soc_rz_g1e __initconst
__maybe_unused = {
.id = 0x4c,
};
+static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x53,
+};
+
static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
.family = &fam_rcar_gen1,
};
@@ -192,6 +197,9 @@ static const struct of_device_id renesas_socs[] __initconst
= {
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
#endif
+#ifdef CONFIG_ARCH_R8A77470
+ { .compatible = "renesas,r8a77470", .data = &soc_rz_g1c },
+#endif
#ifdef CONFIG_ARCH_R8A7778
{ .compatible = "renesas,r8a7778", .data = &soc_rcar_m1a },
#endif
--
2.7.4
[PATCH 00/12] Add r8a77470/iW-RainboW-G23S single board computer support
Hello, This series adds support for Rensas RZ/G1C (r8a77470) SoC and RZ/G1C based iW-RainboW-G23S single board computer. The series introduces a cpg-mssr clock/power gating module, a power/reset controller for the SoC. power areas for RZ/G1C are similar to RZ/G1E. Few functionalities have currently been enabled in DTS and tested: serial boot console. This patch series tested against linux-next tag next-20180327 and renesas-dev branch tag "renesas-dev-20180326v2-v4.16-rc7 Biju Das (12): soc: renesas: rcar-sysc: Add r8a77470 support soc: renesas: Identify RZ/G1C soc: renesas: rcar-rst: Add support for RZ/G1C serial: sh-sci: Document r8a77470 bindings clk: renesas: Add r8a77470 CPG Core Clock Definitions clk: renesas: cpg-mssr: Add r8a77470 support ARM: shmobile: r8a77470: basic SoC support ARM: dts: r8a77470: Initial SoC device tree ARM: shmobile: Document iW-RainboW-G23S single board computer ARM: dts: iwg23s-sbc: Add support for iWave G23S-SBC based on RZ/G1C ARM: shmobile: defconfig: Enable r8a77470 SoC ARM: multi_v7_defconfig: Enable r8a77470 SoC Documentation/devicetree/bindings/arm/shmobile.txt | 4 + .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 9 +- .../bindings/power/renesas,rcar-sysc.txt | 1 + .../devicetree/bindings/reset/renesas,rst.txt | 1 + .../bindings/serial/renesas,sci-serial.txt | 2 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 30 +++ arch/arm/boot/dts/r8a77470.dtsi| 156 ++ arch/arm/configs/multi_v7_defconfig| 1 + arch/arm/configs/shmobile_defconfig| 1 + arch/arm/mach-shmobile/Kconfig | 4 + arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 + drivers/clk/renesas/Kconfig| 5 + drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/r8a7747x-cpg-mssr.c| 229 + drivers/clk/renesas/rcar-gen2-cpg.c| 34 ++- drivers/clk/renesas/renesas-cpg-mssr.c | 6 + drivers/clk/renesas/renesas-cpg-mssr.h | 1 + drivers/soc/renesas/Kconfig| 5 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/r8a7747x-sysc.c| 29 +++ drivers/soc/renesas/rcar-rst.c | 1 + drivers/soc/renesas/rcar-sysc.c| 3 + drivers/soc/renesas/rcar-sysc.h| 1 + drivers/soc/renesas/renesas-soc.c | 8 + include/dt-bindings/clock/r8a7747x-cpg-mssr.h | 36 include/dt-bindings/power/r8a7747x-sysc.h | 22 ++ 27 files changed, 587 insertions(+), 7 deletions(-) create mode 100644 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts create mode 100644 arch/arm/boot/dts/r8a77470.dtsi create mode 100644 drivers/clk/renesas/r8a7747x-cpg-mssr.c create mode 100644 drivers/soc/renesas/r8a7747x-sysc.c create mode 100644 include/dt-bindings/clock/r8a7747x-cpg-mssr.h create mode 100644 include/dt-bindings/power/r8a7747x-sysc.h -- 2.7.4
[PATCH 04/12] serial: sh-sci: Document r8a77470 bindings
RZ/G1C (R8A77470) SoC also has the R-Car gen2 compatible SCIF and HSCIF ports, so document the SoC specific bindings. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt index ad962f4..a006ea4 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt @@ -17,6 +17,8 @@ Required properties: - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART. - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART. - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART. +- "renesas,scif-r8a77470" for R8A77470 (RZ/G1C) SCIF compatible UART. +- "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. -- 2.7.4
[PATCH 03/12] soc: renesas: rcar-rst: Add support for RZ/G1C
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
drivers/soc/renesas/rcar-rst.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt
b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index 294a0da..7be61ef 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -17,6 +17,7 @@ Required properties:
Examples with soctypes are:
- "renesas,r8a7743-rst" (RZ/G1M)
- "renesas,r8a7745-rst" (RZ/G1E)
+ - "renesas,r8a77470-rst" (RZ/G1C)
- "renesas,r8a7778-reset-wdt" (R-Car M1A)
- "renesas,r8a7779-reset-wdt" (R-Car H1)
- "renesas,r8a7790-rst" (R-Car H2)
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 8e9cb79..66d7dba 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -44,6 +44,7 @@ static const struct of_device_id rcar_rst_matches[]
__initconst = {
/* RZ/G is handled like R-Car Gen2 */
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
/* R-Car Gen1 */
{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
--
2.7.4
[PATCH 08/12] ARM: dts: r8a77470: Initial SoC device tree
The initial R8A77470 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a77470.dtsi | 156
1 file changed, 156 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a77470.dtsi
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
new file mode 100644
index 000..24e3da6
--- /dev/null
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the r8a77470 SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include
+#include
+#include
+#include
+/ {
+ compatible = "renesas,r8a77470";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0>;
+ clock-frequency = <10>;
+ clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
+ power-domains = <&sysc R8A77470_PD_CA7_CPU0>;
+ next-level-cache = <&L2_CA7>;
+ };
+
+
+ L2_CA7: cache-controller-0 {
+ compatible = "cache";
+ cache-unified;
+ cache-level = <2>;
+ power-domains = <&sysc R8A77470_PD_CA7_SCU>;
+ };
+ };
+
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ cpg: clock-controller@e615 {
+ compatible = "renesas,r8a77470-cpg-mssr";
+ reg = <0 0xe615 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e616 {
+ compatible = "renesas,r8a77470-rst";
+ reg = <0 0xe616 0 0x100>;
+ };
+
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a77470-sysc";
+ reg = <0 0xe618 0 0x200>;
+ #power-domain-cells = <1>;
+ };
+
+ icram0: sram@e63a {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a 0 0x12000>;
+ };
+
+ icram1: sram@e63c {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x100>;
+ };
+ };
+
+ icram2: sram@e630 {
+ compatible = "mmio-sram";
+ reg = <0 0xe630 0 0x4>;
+ };
+
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a77470",
+"renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 0x40>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 720>,
+<&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int&
[PATCH 06/12] clk: renesas: cpg-mssr: Add r8a77470 support
Add RZ/G1C (R8A77470) Clock Pulse Generator / Module Standby and Software
Reset support.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
.../devicetree/bindings/clock/renesas,cpg-mssr.txt | 9 +-
drivers/clk/renesas/Kconfig| 5 +
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r8a7747x-cpg-mssr.c| 229 +
drivers/clk/renesas/rcar-gen2-cpg.c| 34 ++-
drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
7 files changed, 278 insertions(+), 7 deletions(-)
create mode 100644 drivers/clk/renesas/r8a7747x-cpg-mssr.c
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
index 773a522..c3473df 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -15,6 +15,7 @@ Required Properties:
- compatible: Must be one of:
- "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
- "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)
+ - "renesas,r8a77470-cpg-mssr" for the r8a77470 SoC (RZ/G1C)
- "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2)
- "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W)
- "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H)
@@ -33,10 +34,12 @@ Required Properties:
- clocks: References to external parent clocks, one entry for each entry in
clock-names
- clock-names: List of external parent clock names. Valid names are:
- - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,
-r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77995)
+ - "extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7792,
+r8a7793, r8a7794, r8a7795, r8a7796, r8a77965, r8a77970,
+r8a77980, r8a77995)
- "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980)
- - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)
+ - "usb_extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7793,
+r8a7794)
- #clock-cells: Must be 2
- For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index ef76c86..f32896fa 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -7,6 +7,7 @@ config CLK_RENESAS
select CLK_R8A7740 if ARCH_R8A7740
select CLK_R8A7743 if ARCH_R8A7743
select CLK_R8A7745 if ARCH_R8A7745
+ select CLK_R8A77470 if ARCH_R8A77470
select CLK_R8A7778 if ARCH_R8A7778
select CLK_R8A7779 if ARCH_R8A7779
select CLK_R8A7790 if ARCH_R8A7790
@@ -60,6 +61,10 @@ config CLK_R8A7745
bool "RZ/G1E clock support" if COMPILE_TEST
select CLK_RCAR_GEN2_CPG
+config CLK_R8A77470
+ bool "RZ/G1C clock support" if COMPILE_TEST
+ select CLK_RCAR_GEN2_CPG
+
config CLK_R8A7778
bool "R-Car M1A clock support" if COMPILE_TEST
select CLK_RENESAS_CPG_MSTP
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 6c0f196..59c65d0 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o
obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o
obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77470) += r8a7747x-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7778) += clk-r8a7778.o
obj-$(CONFIG_CLK_R8A7779) += clk-r8a7779.o
obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a7747x-cpg-mssr.c
b/drivers/clk/renesas/r8a7747x-cpg-mssr.c
new file mode 100644
index 000..b6ff95f
--- /dev/null
+++ b/drivers/clk/renesas/r8a7747x-cpg-mssr.c
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a7747 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen2-cpg.h"
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A77470_CLK_OSC,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_USB_EXTAL,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL3,
+ CLK_PLL1_DIV2,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_c
[PATCH 07/12] ARM: shmobile: r8a77470: basic SoC support
Add minimal support for the RZ/G1C (R8A77470) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
arch/arm/mach-shmobile/Kconfig | 4
arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 ++
3 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt
b/Documentation/devicetree/bindings/arm/shmobile.txt
index d3d1df9..86ac320 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -21,6 +21,8 @@ SoCs:
compatible = "renesas,r8a7744"
- RZ/G1E (R8A77450)
compatible = "renesas,r8a7745"
+ - RZ/G1C (R8A77470)
+compatible = "renesas,r8a77470"
- R-Car M1A (R8A77781)
compatible = "renesas,r8a7778"
- R-Car H1 (R8A77790)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 280e731..6b91114 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -75,6 +75,10 @@ config ARCH_R8A7745
bool "RZ/G1E (R8A77450)"
select ARCH_RCAR_GEN2
+config ARCH_R8A77470
+ bool "RZ/G1C (R8A77470)"
+ select ARCH_RCAR_GEN2
+
config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
select ARCH_RCAR_GEN1
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c
b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5561dbe..80de6be 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -73,6 +73,7 @@ void __init rcar_gen2_timer_init(void)
shmobile_init_cntvoff();
if (of_machine_is_compatible("renesas,r8a7745") ||
+ of_machine_is_compatible("renesas,r8a77470") ||
of_machine_is_compatible("renesas,r8a7792") ||
of_machine_is_compatible("renesas,r8a7794")) {
freq = 26000 / 8; /* ZS / 8 */
@@ -205,6 +206,7 @@ MACHINE_END
static const char * const rz_g1_boards_compat_dt[] __initconst = {
"renesas,r8a7743",
"renesas,r8a7745",
+ "renesas,r8a77470",
NULL,
};
--
2.7.4
[PATCH 09/12] ARM: shmobile: Document iW-RainboW-G23S single board computer
Document the iW-RainboW-G23S single board computer device tree bindings, listing it as a supported board. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 86ac320..4401369 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -80,6 +80,8 @@ Boards: compatible = "renesas,h3ulcb", "renesas,r8a7795" - Henninger compatible = "renesas,henninger", "renesas,r8a7791" + - iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S) +compatible = "iwave,g23s", "renesas,r8a77470" - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D) compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745" - iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) -- 2.7.4
[PATCH 12/12] ARM: multi_v7_defconfig: Enable r8a77470 SoC
Enable recently added r8a77470 (RZ/G1C) SoC. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index c1e045a..3623900 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -90,6 +90,7 @@ CONFIG_ARCH_R8A73A4=y CONFIG_ARCH_R8A7740=y CONFIG_ARCH_R8A7743=y CONFIG_ARCH_R8A7745=y +CONFIG_ARCH_R8A7747=y CONFIG_ARCH_R8A7778=y CONFIG_ARCH_R8A7779=y CONFIG_ARCH_R8A7790=y -- 2.7.4
[PATCH 10/12] ARM: dts: iwg23s-sbc: Add support for iWave G23S-SBC based on RZ/G1C
Add support for iWave iW-RainboW-G23S single board computer based on
RZ/G1C.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 30 ++
2 files changed, 31 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3b4cc1b..3e4df0d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -795,6 +795,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a7745-iwg22d-sodimm.dtb \
r8a7745-iwg22d-sodimm-dbhd-ca.dtb \
r8a7745-sk-rzg1e.dtb \
+ r8a77470-iwg23s-sbc.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
r8a7790-lager.dtb \
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
new file mode 100644
index 000..ebbfb36
--- /dev/null
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the iWave-RZ/G1C single board computer
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a77470.dtsi"
+/ {
+ model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
+ compatible = "iwave,g23s", "renesas,r8a77470";
+
+ aliases {
+ serial1 = &scif1;
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x2000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <2000>;
+};
+
+&scif1 {
+ status = "okay";
+};
--
2.7.4
[PATCH 01/12] soc: renesas: rcar-sysc: Add r8a77470 support
Add support for RZ/G1C (R8A77470) SoC power areas to the R-Car SYSC
driver.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
.../bindings/power/renesas,rcar-sysc.txt | 1 +
drivers/soc/renesas/Kconfig| 5
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a7747x-sysc.c| 29 ++
drivers/soc/renesas/rcar-sysc.c| 3 +++
drivers/soc/renesas/rcar-sysc.h| 1 +
include/dt-bindings/power/r8a7747x-sysc.h | 22
7 files changed, 62 insertions(+)
create mode 100644 drivers/soc/renesas/r8a7747x-sysc.c
create mode 100644 include/dt-bindings/power/r8a7747x-sysc.h
diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index ab399e5..3e91d20 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -9,6 +9,7 @@ Required properties:
- compatible: Must contain exactly one of the following:
- "renesas,r8a7743-sysc" (RZ/G1M)
- "renesas,r8a7745-sysc" (RZ/G1E)
+ - "renesas,r8a77470-sysc" (RZ/G1C)
- "renesas,r8a7779-sysc" (R-Car H1)
- "renesas,r8a7790-sysc" (R-Car H2)
- "renesas,r8a7791-sysc" (R-Car M2-W)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 3bbe611..96dd936 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -7,6 +7,7 @@ config SOC_RENESAS
ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
select SYSC_R8A7743 if ARCH_R8A7743
select SYSC_R8A7745 if ARCH_R8A7745
+ select SYSC_R8A77470 if ARCH_R8A77470
select SYSC_R8A7779 if ARCH_R8A7779
select SYSC_R8A7790 if ARCH_R8A7790
select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
@@ -30,6 +31,10 @@ config SYSC_R8A7745
bool "RZ/G1E System Controller support" if COMPILE_TEST
select SYSC_RCAR
+config SYSC_R8A77470
+ bool "RZ/G1C System Controller support" if COMPILE_TEST
+ select SYSC_RCAR
+
config SYSC_R8A7779
bool "R-Car H1 System Controller support" if COMPILE_TEST
select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index ccb5ec5..3dd6c41 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SOC_RENESAS) += renesas-soc.o
# SoC
obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
+obj-$(CONFIG_SYSC_R8A77470)+= r8a7747x-sysc.o
obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
obj-$(CONFIG_SYSC_R8A7790) += r8a7790-sysc.o
obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o
diff --git a/drivers/soc/renesas/r8a7747x-sysc.c
b/drivers/soc/renesas/r8a7747x-sysc.c
new file mode 100644
index 000..2306680
--- /dev/null
+++ b/drivers/soc/renesas/r8a7747x-sysc.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G1C System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77470_areas[] __initconst = {
+ { "always-on", 0, 0, R8A77470_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca7-scu",0x100, 0, R8A77470_PD_CA7_SCU, R8A77470_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca7-cpu0", 0x1c0, 0, R8A77470_PD_CA7_CPU0, R8A77470_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu1", 0x1c0, 1, R8A77470_PD_CA7_CPU1, R8A77470_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "sgx", 0xc0, 0, R8A77470_PD_SGX, R8A77470_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a77470_sysc_info __initconst = {
+ .areas = r8a77470_areas,
+ .num_areas = ARRAY_SIZE(r8a77470_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index faf20e7..99203bd 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -261,6 +261,9 @@ static const struct of_device_id rcar_sysc_matches[]
__initconst = {
#ifdef CONFIG_SYSC_R8A7745
{ .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
#endif
+#ifdef CONFIG_SYSC_R8A77470
+ { .compatible = "renesas,r8a77470-sysc", .data = &r8a77470_sysc_info },
+#endif
#ifdef CONFIG_SYSC_R8A7779
{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
#endif
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index dcdc9ec..9b24e3a 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -51,6 +51,7 @@ struct rcar_sysc_inf
[PATCH 05/12] clk: renesas: Add r8a77470 CPG Core Clock Definitions
Add all RZ/G1C Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2 ("List of Clocks [RZ/G1C]") of the RZ/G1C Hardware User's
Manual.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
include/dt-bindings/clock/r8a7747x-cpg-mssr.h | 36 +++
1 file changed, 36 insertions(+)
create mode 100644 include/dt-bindings/clock/r8a7747x-cpg-mssr.h
diff --git a/include/dt-bindings/clock/r8a7747x-cpg-mssr.h
b/include/dt-bindings/clock/r8a7747x-cpg-mssr.h
new file mode 100644
index 000..57a4de3
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7747x-cpg-mssr.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A7747X_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A7747X_CPG_MSSR_H__
+
+#include
+
+/* r8a77470 CPG Core Clocks */
+#define R8A77470_CLK_Z20
+#define R8A77470_CLK_ZTR 2
+#define R8A77470_CLK_ZTRD2 3
+#define R8A77470_CLK_ZT4
+#define R8A77470_CLK_ZX5
+#define R8A77470_CLK_ZS6
+#define R8A77470_CLK_HP7
+#define R8A77470_CLK_B 9
+#define R8A77470_CLK_LB10
+#define R8A77470_CLK_P 11
+#define R8A77470_CLK_CL12
+#define R8A77470_CLK_CP13
+#define R8A77470_CLK_M214
+#define R8A77470_CLK_ZB3 16
+#define R8A77470_CLK_SDH 19
+#define R8A77470_CLK_SD0 20
+#define R8A77470_CLK_SD1 21
+#define R8A77470_CLK_SD2 22
+#define R8A77470_CLK_MP24
+#define R8A77470_CLK_QSPI 25
+#define R8A77470_CLK_CPEX 26
+#define R8A77470_CLK_RCAN 27
+#define R8A77470_CLK_R 28
+#define R8A77470_CLK_OSC 29
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7747X_CPG_MSSR_H__ */
--
2.7.4
[PATCH 11/12] ARM: shmobile: defconfig: Enable r8a77470 SoC
Enable recently added r8a77470 (RZ/G1C) SoC. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- arch/arm/configs/shmobile_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index a701601..dc650db 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -14,6 +14,7 @@ CONFIG_ARCH_R8A73A4=y CONFIG_ARCH_R8A7740=y CONFIG_ARCH_R8A7743=y CONFIG_ARCH_R8A7745=y +CONFIG_ARCH_R8A77470=y CONFIG_ARCH_R8A7778=y CONFIG_ARCH_R8A7779=y CONFIG_ARCH_R8A7790=y -- 2.7.4
RE: [PATCH 12/12] ARM: multi_v7_defconfig: Enable r8a77470 SoC
Hello Fabrizio, Thanks for the feedback. > > Subject: [PATCH 12/12] ARM: multi_v7_defconfig: Enable r8a77470 SoC > > > > Enable recently added r8a77470 (RZ/G1C) SoC. > > > > Signed-off-by: Biju Das > > Reviewed-by: Fabrizio Castro > > --- > > arch/arm/configs/multi_v7_defconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/configs/multi_v7_defconfig > > b/arch/arm/configs/multi_v7_defconfig > > index c1e045a..3623900 100644 > > --- a/arch/arm/configs/multi_v7_defconfig > > +++ b/arch/arm/configs/multi_v7_defconfig > > @@ -90,6 +90,7 @@ CONFIG_ARCH_R8A73A4=y > CONFIG_ARCH_R8A7740=y > > CONFIG_ARCH_R8A7743=y CONFIG_ARCH_R8A7745=y > > +CONFIG_ARCH_R8A7747=y > > s/CONFIG_ARCH_R8A7747/CONFIG_ARCH_R8A77470/ Will send V2. > > CONFIG_ARCH_R8A7778=y > > CONFIG_ARCH_R8A7779=y > > CONFIG_ARCH_R8A7790=y > > -- > > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 01/12] soc: renesas: rcar-sysc: Add r8a77470 support
Hi Geert,
Thanks for the feedback.
> On Tue, Mar 27, 2018 at 4:37 PM, Biju Das wrote:
> > Add support for RZ/G1C (R8A77470) SoC power areas to the R-Car SYSC
> > driver.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Thanks for your patch!
>
> > drivers/soc/renesas/r8a7747x-sysc.c| 29
> ++
>
> While using "x" in drivers doesn't hurt, as it can be changed at any time
> later...
>
> > include/dt-bindings/power/r8a7747x-sysc.h | 22
>
> ... this is not true for DT bindings.
>
> I know you do this to anticipate the use of this header file for r8a77471,
> which is
> also called RZ/G1C, and identical to r8a77470, modulo a few on-SoC devices.
> But using wildcards in DT bindings is a bad idea, as you cannot predict what
> e.g.
> r8a77477 will be ;-)
>
> So I'd settle for r8a77470-sysc.h. The actual defines in the file use
> R8A77470_PD_* anyway.
Will send V2 with the file name changed to r8a77470-sysc.h
> BTW, I'm considering dropping all R8A*_PD_* definitions, as we can easily use
> the numbers directly, cfr. module clock and interrupt numbers. That would be
> one step closer to more .dtsi sharing.
> The only thing that is keeping me back is that the value "32" (for the
> always-on
> area) is not defined in the datasheet.
>
> With the above fixed:
> Reviewed-by: Geert Uytterhoeven
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when
> I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 05/12] clk: renesas: Add r8a77470 CPG Core Clock Definitions
Hi Geert,
Thanks for the feedback.
> On Tue, Mar 27, 2018 at 4:37 PM, Biju Das wrote:
> > Add all RZ/G1C Clock Pulse Generator Core Clock Outputs, as listed in
> > Table 7.2 ("List of Clocks [RZ/G1C]") of the RZ/G1C Hardware User's
> > Manual.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Thanks for your patch!
>
> > include/dt-bindings/clock/r8a7747x-cpg-mssr.h | 36
> > +++
>
> Same comment as for r8a7747x-sysc.h: Please use 0 instead of x.
Will send V2 with the file name changed to r8a77470-cpg-mssr.h
> With that fixed:
> Reviewed-by: Geert Uytterhoeven
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when
> I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
