Re: [PATCH] ARM: dts: renesas: replace toshiba, mmc-wrprotect-disable with disable-wp

Hi Yamada-san, On Mon, Apr 16, 2018 at 5:02 PM, Masahiro Yamada wrote: > Follow up commit 788778b0d21a ("mmc: tmio: deprecate "toshiba, > mmc-wrprotect-disable" DT property"). Thanks for following up this work. (I had the exact same changes queued up in my local

Re: [PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

Hi Geert, On Mon, Apr 16, 2018 at 01:12:06PM +0200, Geert Uytterhoeven wrote: > Hi Jacopo, > > On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi > wrote: > > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar. > > > > Signed-off-by: Jacopo Mondi

Applied "spi: sh-msiof: Simplify calculation of divisors for transfer rate" to the spi tree

The patch spi: sh-msiof: Simplify calculation of divisors for transfer rate has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24

Applied "spi: sh-msiof: Fix bit field overflow writes to TSCR/RSCR" to the spi tree

The patch spi: sh-msiof: Fix bit field overflow writes to TSCR/RSCR has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours)

[PATCH] DT: mmc: tmio_mmc: document R8A77980 bindings

Document the R-Car V3H (R8A77980) SoC in the Renesas SDHI bindings. Signed-off-by: Sergei Shtylyov --- This patch is against the 'next' branch of Ulf Hansson's 'mmc.git' repo. Documentation/devicetree/bindings/mmc/tmio_mmc.txt |1 + 1 file changed, 1

[PATCH] ARM: dts: renesas: replace toshiba,mmc-wrprotect-disable with disable-wp

Follow up commit 788778b0d21a ("mmc: tmio: deprecate "toshiba, mmc-wrprotect-disable" DT property"). Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 4 ++-- arch/arm/boot/dts/sh73a0.dtsi | 4 ++-- 2 files changed, 4

Re: [PATCH] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

On Mon, Apr 16, 2018 at 03:55:28PM +0200, Jacopo Mondi wrote: > Add documentation for r8a77965 compatible string to Renesas sci-serial > device tree bindings documentation. > > Signed-off-by: Jacopo Mondi > --- > > Renesas R-Car M3-N support has been merged for v4.17.

Re: [PATCH] ARM: dts: renesas: replace toshiba,mmc-wrprotect-disable with disable-wp

On Tue, Apr 17, 2018 at 12:02:32AM +0900, Masahiro Yamada wrote: > Follow up commit 788778b0d21a ("mmc: tmio: deprecate "toshiba, > mmc-wrprotect-disable" DT property"). > > Signed-off-by: Masahiro Yamada Reviewed-by: Wolfram Sang

Re: [PATCH] pinctrl: sh-pfc: r8a77970: add pin I/O voltage control

Hello! On 04/16/2018 04:02 PM, Geert Uytterhoeven wrote: >> Add the pin I/O voltage level control to the R8A77980 PFC driver. > > Subject says r8a77970? Typo, I guess. :-) >> Loosely based on the original (and large) patch by Vladimir Barinov. >> >> Signed-off-by: Vladimir Barinov

Re: [PATCH] dt-bindings: gpio: Add support for r8a77965

On Mon, Apr 16, 2018 at 03:55:04PM +0200, Jacopo Mondi wrote: > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven > --- You missed Simon's and my R-by's on v2. >

Re: [PATCH v7] media: platform: Renesas IMR driver

On 04/16/2018 04:27 PM, Geert Uytterhoeven wrote: >> The image renderer, or the distortion correction engine, is a drawing >> processor with a simple instruction system capable of referencing video >> capture data or data in an external memory as the 2D texture data and >> performing texture

Re: [PATCH] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

On Mon, Apr 16, 2018 at 03:56:08PM +0200, Jacopo Mondi wrote: > Add documentation for r8a77965 compatible string to rcar-dmac device > tree bindings documentation. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven >

Re: [PATCH] dt-bindings: net: ravb: Add support for r8a77965 SoC

On Mon, Apr 16, 2018 at 03:55:17PM +0200, Jacopo Mondi wrote: > Add documentation for r8a77965 compatible string to renesas ravb device > tree bindings documentation. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven >

Re: [PATCH v13 2/2] rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver

Hi Niklas, On Mon, Apr 16, 2018 at 01:16:35AM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your feedback. > > Comments I have snipped out from this reply are addressed, thanks for > bringing them to my attention! > > On 2018-04-05 11:10:01 +0200, Jacopo Mondi wrote: > > [snip] > > >

Re: [PATCH v7] media: platform: Renesas IMR driver

Hi Sergei, On Fri, Aug 4, 2017 at 8:03 PM, Sergei Shtylyov wrote: > The image renderer, or the distortion correction engine, is a drawing > processor with a simple instruction system capable of referencing video > capture data or data in an external memory as

[PATCH] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

Add documentation for r8a77965 compatible string to rcar-dmac device tree bindings documentation. Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman --- Renesas R-Car M3-N

[PATCH] dt-bindings: gpio: Add support for r8a77965

Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar. Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven --- Renesas R-Car M3-N support has been merged for v4.17. Document the missing device tree bindings. ---

Re: [PATCH] dt-bindings: net: ravb: Add support for r8a77965 SoC

From: Jacopo Mondi Date: Mon, 16 Apr 2018 15:55:17 +0200 > Add documentation for r8a77965 compatible string to renesas ravb device > tree bindings documentation. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven

Re: [PATCH] pinctrl: sh-pfc: r8a77970: add pin I/O voltage control

Hi Sergei, Thanks for your patch! On Fri, Apr 13, 2018 at 8:29 PM, Sergei Shtylyov wrote: > Add the pin I/O voltage level control to the R8A77980 PFC driver. Subject says r8a77970? > Loosely based on the original (and large) patch by Vladimir Barinov. > >

[PATCH] dt-bindings: net: ravb: Add support for r8a77965 SoC

Add documentation for r8a77965 compatible string to renesas ravb device tree bindings documentation. Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman Acked-by: Sergei Shtylyov

[PATCH] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

Add documentation for r8a77965 compatible string to Renesas sci-serial device tree bindings documentation. Signed-off-by: Jacopo Mondi --- Renesas R-Car M3-N support has been merged for v4.17. Document the missing device tree bindings. ---

Re: [PATCH] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

On Mon, Apr 16, 2018 at 3:55 PM, Jacopo Mondi wrote: > Add documentation for r8a77965 compatible string to Renesas sci-serial > device tree bindings documentation. > > Signed-off-by: Jacopo Mondi My Reviewed-by: Geert Uytterhoeven

Re: [PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

Hi Jacopo, On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi wrote: > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven Can you please

Re: [PATCH qemu v3] device_tree: Increase FDT_MAX_SIZE to 1 MiB

On 12 April 2018 at 14:55, Geert Uytterhoeven wrote: > It is not uncommon for a contemporary FDT to be larger than 64 KiB, > leading to failures loading the device tree from sysfs: > > qemu-system-aarch64: qemu_fdt_setprop: Couldn't set ...: FDT_ERR_NOSPACE > > Hence

[PATCH v2] dt-bindings: gpio: Add support for r8a77965

Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar. Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman Reviewed-by: Rob Herring --- Renesas R-Car M3-N

Re: [PATCH] dt-bindings: net: ravb: Add support for r8a77965 SoC

Hi David, On Mon, Apr 16, 2018 at 10:17:55AM -0400, David Miller wrote: > From: Jacopo Mondi > Date: Mon, 16 Apr 2018 15:55:17 +0200 > > > Add documentation for r8a77965 compatible string to renesas ravb device > > tree bindings documentation. > > > > Signed-off-by:

Re: [PATCH] DT: mmc: tmio_mmc: document R8A77980 bindings

On Mon, Apr 16, 2018 at 09:30:02PM +0300, Sergei Shtylyov wrote: > Document the R-Car V3H (R8A77980) SoC in the Renesas SDHI bindings. > > Signed-off-by: Sergei Shtylyov Reviewed-by: Wolfram Sang signature.asc

Re: [PATCH v3] gpio: dwapb: Add support for 1 interrupt per port A GPIO

On Fri, Apr 13, 2018 at 09:51:12AM +0100, Phil Edworthy wrote: > The DesignWare GPIO IP can be configured for either 1 interrupt or 1 > per GPIO in port A, but the driver currently only supports 1 interrupt. > See the DesignWare DW_apb_gpio Databook description of the > 'GPIO_INTR_IO' parameter. >

Re: [RFC 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.

On Mon, Apr 16, 2018 at 10:34:57AM +0100, Michel Pollet wrote: > Add a special enable method for second CA8 of the Renesas RZ/N1D > (R9A06G032). > > Signed-off-by: Michel Pollet > --- > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > 1 file changed, 1

Re: [RFC 3/3] arm: shmobile: Add the RZ/N1D SMP enabler driver.

Hi Michel, On 04/16/2018 02:34 AM, Michel Pollet wrote: > The Renesas RZ/N1D second CA7 is parked in a ROM pen at boot time, it > requires a special enable method to get it started at boot time. > > Signed-off-by: Michel Pollet Some few comments below. This patch

Re: [PATCH] DT: mmc: tmio_mmc: document R8A77980 bindings

On Mon, Apr 16, 2018 at 09:30:02PM +0300, Sergei Shtylyov wrote: > Document the R-Car V3H (R8A77980) SoC in the Renesas SDHI bindings. > > Signed-off-by: Sergei Shtylyov > > --- > This patch is against the 'next' branch of Ulf Hansson's 'mmc.git' repo. > >

[PATCH v6 11/11] ARM: shmobile: Convert file to use cntvoff

Now that a common function is available for CNTVOFF's initialization, let's convert shmobile-apmu code to use this function. Signed-off-by: Mylène Josserand --- arch/arm/mach-shmobile/common.h | 1 - arch/arm/mach-shmobile/headsmp-apmu.S| 22

[PATCH v6 10/11] ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC

Add the use of enable-method property for SMP support which allows to handle the SMP support for this specific SoC. This commit adds enable-method properties to all CPU nodes. Signed-off-by: Mylène Josserand --- arch/arm/boot/dts/sun8i-a83t.dtsi | 8 1

[PATCH v6 09/11] ARM: sun8i: smp: Add support for A83T

Add the support for A83T. A83T SoC has an additional register than A80 to handle CPU configurations: R_CPUS_CFG. Information about the register comes from Allwinner's BSP driver. An important difference is the Power Off Gating register for clusters which is BIT(4) in case of SUN9I-A80 and BIT(0)

[PATCH v6 08/11] ARM: sun9i: smp: Add is_sun8i field

To prepare the support of sun8i-a83t, add a field in the smp_data structure to know if we are on sun9i-a80 or sun8i-a83t. Add also a global variable to retrieve which architecture we are having. Signed-off-by: Mylène Josserand --- arch/arm/mach-sunxi/mc_smp.c | 5

[PATCH v6 07/11] ARM: sun9i: smp: Rename clusters's power-off

To prepare the support for sun8i-a83t, rename the variable name that handles the power-off of clusters because it is different from sun9i-a80 to sun8i-a83t. The power off register for clusters are different from a80 and a83t. Signed-off-by: Mylène Josserand

[PATCH v6 06/11] ARM: sunxi: Add initialization of CNTVOFF

Add the initialization of CNTVOFF for sun8i-a83t. For boot CPU, create a new machine that handles this function's call in an "init_early" callback. We need to initialize CNTVOFF before the arch timer's initialization otherwise, it will not be taken into account and fails to boot correctly.

[PATCH v6 05/11] ARM: smp: Add initialization of CNTVOFF

The CNTVOFF register from arch timer is uninitialized. It should be done by the bootloader but it is currently not the case, even for boot CPU because this SoC is booting in secure mode. It leads to an random offset value meaning that each CPU will have a different time, which isn't working very

[PATCH v6 04/11] ARM: dts: sun8i: a83t: Add CCI-400 node

Add CCI-400 node and control-port on CPUs needed by SMP bringup. Signed-off-by: Mylène Josserand Reviewed-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++ 1 file changed, 41 insertions(+) diff

[PATCH v6 03/11] ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi

The R_CPUCFG is a collection of registers needed for SMP bringup on clusters and cluster's reset. For the moment, documentation about this register is found in Allwinner's code only. Signed-off-by: Mylène Josserand --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 + 1

[PATCH v6 02/11] ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi

As we found in sun9i-a80, CPUCFG is a collection of registers that are mapped to the SoC's signals from each individual processor core and associated peripherals. These registers are used for SMP bringup and CPU hotplugging. Signed-off-by: Mylène Josserand

[PATCH v6 01/11] ARM: sunxi: smp: Move assembly code into a file

Move the assembly code for cluster cache enabling and resuming into an assembly file instead of having it directly in C code. Remove the CFLAGS because we are using the ARM directive "arch" instead. Signed-off-by: Mylène Josserand --- arch/arm/mach-sunxi/Makefile

[PATCH v6 00/11] Sunxi: Add SMP support on A83T

Hello everyone, This is a V6 of my series that adds SMP support for Allwinner sun8i-a83t. Based on sunxi's tree, sunxi/for-next branch. Depends on a patch from Doug Berger that allows to include the "cpu-type" header on assembly files: 6c7dd080ba4b ("ARM: Allow this header to be included by

Re: [PATCH] spi: sh-msiof: Add spi_master_suspend/spi_master_resume

On Fri, Apr 13, 2018 at 7:28 PM, Wolfram Sang wrote: >> + struct platform_device *pdev = to_platform_device(dev); >> + struct sh_msiof_spi_priv *p = platform_get_drvdata(pdev); > > struct sh_msiof_spi_priv *p = dev_get_drvdata(dev); With Wolfram's comment taken into

Re: [PATCH v2 2/2] dt-bindings: pinctrl: sh-pfc: Document r8a77470 PFC support

On Wed, Apr 4, 2018 at 5:22 PM, Biju Das wrote: > Document PFC support for the R8A77470 SoC. > > Signed-off-by: Biju Das > Reviewed-by: Fabrizio Castro > --- > V1->V2: > * Incorporated sergie's review comment.

Re: [PATCH v13 2/2] rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver

Hi Jacopo, On 2018-04-16 01:16:35 +0200, Niklas Söderlund wrote: [snip] > > > + > > > + /* Set frequency range if we have it */ > > > + if (priv->info->csi0clkfreqrange) > > > + rcar_csi2_write(priv, CSI0CLKFCPR_REG, > > > +

Re: [PATCH v3] dmaengine: rcar-dmac: Document R-Car D3 bindings

Hi Uli, On Tue, Dec 19, 2017 at 10:13 AM, Ulrich Hecht wrote: > R8A77995's SYS-DMAC is R-Car Gen3-compatible. > > Signed-off-by: Ulrich Hecht > Reviewed-by: Geert Uytterhoeven > Reviewed-by: Simon Horman

Re: [PATCH v2 10/19] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

Hi Jacopo, On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi wrote: > Add documentation for r8a77965 compatible string to rcar-dmac device > tree bindings documentation. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven

Re: [PATCH RESEND] backlight: pwm_bl: don't use GPIOF_* with gpiod_get_direction

On Wed, 11 Apr 2018, Simon Horman wrote: > On Tue, Apr 10, 2018 at 02:32:40PM +0200, Wolfram Sang wrote: > > The documentation was wrong, gpiod_get_direction() returns 0/1 instead > > of the GPIOF_* flags. The docs were fixed with commit 94fc73094abe47 > > ("gpio: correct docs about return value

Re: [PATCH v2 1/2] pinctrl: sh-pfc: Add r8a77470 PFC support

Hi Biju, On Wed, Apr 4, 2018 at 5:22 PM, Biju Das wrote: > Add PFC support for the R8A77470 SoC including pin groups for > some on-chip devices such as SCIF, AVB and MMC. > > Signed-off-by: Biju Das > Reviewed-by: Fabrizio Castro

Re: [PATCH v13 2/2] rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver

Hi Niklas, On Sun, Apr 15, 2018 at 10:47:37PM +0200, Niklas Söderlund wrote: > Hi Sakari, > > Thanks for your feedback. > > On 2018-04-04 23:13:57 +0300, Sakari Ailus wrote: > > [snip] > > > > > + pm_runtime_enable(>dev); > > > > > > Is CONFIG_PM mandatory on Renesas SoCs? If not, you

[RFC 0/3] Renesas RZ/N1D SMP enabler

*Warning -- this requires the base RZ/N1 support patches already posted * This is a tentative patch series for enabling the second CA7 of the RZ/N1D. It's based on a spin_table method, and it reuses the same binding property as that driver. One question is: Do i have to document it separately,

[RFC 3/3] arm: shmobile: Add the RZ/N1D SMP enabler driver.

The Renesas RZ/N1D second CA7 is parked in a ROM pen at boot time, it requires a special enable method to get it started at boot time. Signed-off-by: Michel Pollet --- arch/arm/mach-shmobile/Makefile| 1 + arch/arm/mach-shmobile/smp-r9a06g032.c | 87

Please ignore this one [Was: RE: [PATCH 1/1] arm: rzn1: Add support for the second CPU.]

Please ignore this one... it's rebase junk  Michel > > This enables starting the second CA7 core. Also handles the case the > bootloader has had to change the second CPU parking address to allow > booting in NONSEC/HYP. > > Signed-off-by: Michel Pollet > --- >

Re: [PATCH 3/3] backlight: pwm_bl: don't use GPIOF_* with gpiod_get_direction

On Sun, 14 Jan 2018, Wolfram Sang wrote: > The documentation was wrong, gpiod_get_direction() returns 0/1 instead > of the GPIOF_* flags. The docs were fixed with commit 94fc73094abe47 > ("gpio: correct docs about return value of gpiod_get_direction"). Now, > fix this user (until a better,

[PATCH 1/1] arm: rzn1: Add support for the second CPU.

This enables starting the second CA7 core. Also handles the case the bootloader has had to change the second CPU parking address to allow booting in NONSEC/HYP. Signed-off-by: Michel Pollet --- arch/arm/mach-shmobile/Makefile | 1 +

[RFC 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.

Add a special enable method for second CA8 of the Renesas RZ/N1D (R9A06G032). Signed-off-by: Michel Pollet --- Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt

[RFC 2/3] ARM: dts: Renesas RZ/N1D SMP enable method

Add a special enable method for the second CA7 of the Renesas RZ/N1D (R9A06G032), as well as the default value for the "cpu-release-addr" property. Signed-off-by: Michel Pollet --- arch/arm/boot/dts/r9a06g032.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git

Re: [PATCH v6 01/11] ARM: sunxi: smp: Move assembly code into a file

On Tue, Apr 17, 2018 at 5:50 AM, Mylène Josserand wrote: > Move the assembly code for cluster cache enabling and resuming > into an assembly file instead of having it directly in C code. > > Remove the CFLAGS because we are using the ARM directive "arch" > instead. >

Re: [PATCH v6 00/11] Sunxi: Add SMP support on A83T

Hello Mylène, Please also add this: diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ce53ceaf4cc5..d9c8ecf88ec6 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -51,7 +51,7 @@ config MACH_SUN9I config ARCH_SUNXI_MC_SMP bool

Re: [PATCH v6 03/11] ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi

On Tue, Apr 17, 2018 at 5:50 AM, Mylène Josserand wrote: > The R_CPUCFG is a collection of registers needed for SMP bringup > on clusters and cluster's reset. > For the moment, documentation about this register is found in > Allwinner's code only. > > Signed-off-by: