From: Fabrizio Castro
Add GPIO device nodes to the DT of the r8a774a1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 120 ++
1 file changed, 120 insertions(+)
diff --git
From: Fabrizio Castro
Add r8a774a1 IPMMU nodes.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 73 +++
1 file changed, 73 insertions(+)
diff --git
From: Takeshi Kihara
Add the device node for the external SCIF_CLK, and describe the clock
inputs for the Baud Rate Generator for External Clock (BRG) for SCIF2,
which can increase serial clock accuracy.
The presence of the SCIF_CLK crystal and its clock frequency depend on
the actual board.
From: Wolfram Sang
Add the nodes to enable SATA. Note that MD12 (SW12-7) must be switched
off for that to work.
Signed-off-by: Wolfram Sang
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 14 ++
From: Biju Das
Basic support for the RZ/G2M SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 190 ++
1 file changed, 190 insertions(+)
create mode 100644
From: Fabrizio Castro
Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly
to what was done for the r8a7796 with commit 41dbbf0c5b4e
("arm64: dts: r8a7796: Add FCPF and FCPV instances"),
commit 69490bc9665d ("arm64: dts: renesas: r8a7796: Point
FDP1 via FCPF to IPMMU-VI0"), and commit
From: Biju Das
Add sys-dmac[0-2] device nodes for RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 102 ++
1 file changed, 102 insertions(+)
diff --git
From: Sergei Shtylyov
Define the Condor/V3HSK board dependent parts of the DU and LVDS device
nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
Analog Devices ADV7511W HDMI transmitter...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by:
From: Fabrizio Castro
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 45 +++
1 file changed, 45
From: Sergei Shtylyov
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device
tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
From: Biju Das
Add usb dmac and hsusb device nodes on RZ/G2M SoC dtsi.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 45 +++
1 file changed, 45 insertions(+)
diff --git
From: Kieran Bingham
Ensure that the ADV748x device addresses do not conflict, and group them
together (visually in i2cdetect)
Signed-off-by: Kieran Bingham
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 5 -
1 file changed, 4 insertions(+), 1
From: Geert Uytterhoeven
Replace the hardcoded clock indices by R9A06G032_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Phil Edworthy
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r9a06g032.dtsi | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
From: Magnus Damm
Browsing the DTS for all the R-Car SoCs with similar part numbers
still makes my head hurt, so to improve the user friendliness of
the 32-bit ARM DTS code base include R-Car Gen1 product names for
each DTSI file.
Signed-off-by: Magnus Damm
Signed-off-by: Simon Horman
---
From: Biju Das
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).
This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto .
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 275
From: Sergei Shtylyov
Add the eMMC chip support for the V3M Started Kit board.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 26
From: Geert Uytterhoeven
To preserve alphabetical sort order.
Fixes: 4c529600eef0a6b7 ("arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal
support")
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Niklas Söderlund
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi
From: Biju Das
Add thermal support for R8A774A1 (RZ/G2M) SoC.
Based on the work done for r8a7796 SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 60 +++
1 file changed, 60
From: Geert Uytterhoeven
The comments describing the non-default switch settings to use SATA are
confusing: 'Off' refers to the switch position, not to the MD12 logic
value, while the parentheses suggest otherwise. Rephrase to fix this.
Fixes: bec000784d5bb571 ("arm64: dts: renesas:
From: Geert Uytterhoeven
- Device nodes with unit addresses are sorted by unit address,
- Device nodes without unit addresses and references are sorted
alphabetically.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 276
From: Fabrizio Castro
This patch adds pinctrl device node for R8A774A1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Fabrizio Castro
Add SDHI nodes to the DT of the r8a774a1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 48 +++
1 file changed, 48 insertions(+)
diff --git
From: Eugeniu Rosca
This is based on the existing KF device tree sources:
$ ls -1 arch/arm64/boot/dts/renesas/*-kf.dts
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
Signed-off-by: Eugeniu
From: Magnus Damm
Hook up SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 to IPMMU-DS0 and IPMMU-DS1
following the R-Car Gen3 Rev.1.00 (April 2018) datasheet.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12
From: Yoshihiro Shimoda
This patch adds PWM device nodes and enables PWM3 and PWM5 for
R-Car E3 Ebisu board. These devices are used for backlight control.
Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Biju Das
Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2M SoC dtsi.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 73 +++
1 file changed, 73 insertions(+)
diff
From: Sergei Shtylyov
Describe RWDT in the R8A77980 SoC device tree.
Enable RWDT on the Condor and V3H Starter Kit boards.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
From: Sergei Shtylyov
Describe the CSI2 and VIN (and their interconnections) in the R8A77980
device tree.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 374 ++
1 file changed, 374 insertions(+)
diff
From: Eugeniu Rosca
According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN
interfaces, similar to H3, M3-W and other SoCs from the same family.
Add CAN placeholder nodes to avoid below DTC errors:
Error: arch/arm64/boot/dts/renesas/ulcb-kf.dtsi:19.1-6 Label or path can0 not
found
From: Takeshi Kihara
This patch adds SATA controller node for the R8A77965 SoC.
Signed-off-by: Takeshi Kihara
[wsa: rebased to upstream base]
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Wolfram Sang
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 11
From: Biju Das
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774a1 device tree.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 142
From: Sergei Shtylyov
Describe the performance monitor unit (PMU) for the Cortex-A53 cores in
the R8A77980 SoC's device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
From: Eugeniu Rosca
Allow the bare M3-N-based ULCB board to boot.
Signed-off-by: Eugeniu Rosca
Reviewed-by: Jacopo Mondi
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/Makefile | 1 +
arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts | 33
2
From: Magnus Damm
For R-Car M3-N hook up SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 to
IPMMU-DS0 and IPMMU-DS1 in same way as for R-Car M3-W.
This follows the R-Car Gen3 Rev.1.00 (April 2018) datasheet.
Signed-off-by: Magnus Damm
Signed-off-by: Simon Horman
---
From: Sergei Shtylyov
The IPMMU nodes should follow the GEther node, not the CAN-FD node,
according to the part of the startng IPMMU-DS1 node.
While moving the nodes, also do sort them by label alphanumerically...
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
From: Sergei Shtylyov
Define the generic R8A77970 part of the MMC0 (SDHI2) device node.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi |
From: Sergei Shtylyov
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor
board.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
To preserve alphabetical sort order.
Fixes: 4edac426aff11a37 ("arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI
support")
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 24
From: Geert Uytterhoeven
usb2_phy1 accidentally uses the same clock/reset as usb2_phy0.
Fixes: b5857630a829a8d5 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes")
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
Use the SoC-specific CPG/MSSR include file to allow future use of
R8A77990_CLK_* symbols.
Replace the hardcoded power domain indices by R8A77990_PD_* symbols.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi
From: Biju Das
Add support for the Interrupt Controller for External Devices
(INTC-EX) on RZ/G2M.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 16
1 file changed, 16 insertions(+)
diff
From: Geert Uytterhoeven
To preserve by-address-per-group sort order.
Fixes: 0f6d237cafda2e06 ("arm64: dts: renesas: r8a7795: add ccree to device
tree")
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 18 +-
1 file
From: Hoan Nguyen An
The r8a77965 has a single FDP1 instance.
Signed-off-by: Hoan Nguyen An
Reviewed-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Takeshi Kihara
This patch adds SYS-DMAC{0,1,2} device nodes for the R8A77990 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 102
From: Koji Matsuoka
Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree.
Signed-off-by: Koji Matsuoka
Signed-off-by: Takeshi Kihara
Signed-off-by: Jacopo Mondi
Reviewed-by: Laurent Pinchart
Tested-by: Laurent Pinchart
[simon: sorted nodes by bus address, then IP
From: Fabrizio Castro
Add the device nodes for all RZ/G2M SCIF and HSCIF serial ports,
incl. clocks, power domains and DMAs.
According to the HW user manual, SCIF[015] and HSCIF[012] are
connected to both SYS-DMAC1 and SYS-DMAC2, while SCIF[34] and
HSCIF[34] are connected to SYS-DMAC0.
From: Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven
[simon: updated for a few new cases]
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi| 8 ++---
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 16 +-
arch/arm64/boot/dts/renesas/r8a7795.dtsi |
From: Biju Das
This patch adds definitions for L2 cache for the Cortex-A53 CPU
cores (512 KiB in size, organized as 32 KiB x 16 ways), adds
Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57
+ 4 x Cortex-A53), and finally enables the performance monitor
unit for the Cortex-A53
From: Geert Uytterhoeven
Add the device nodes for all MSIOF SPI controllers, incl. clocks, power
domains, and resets properties.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 52 +++
1 file changed,
From: Geert Uytterhoeven
Should be "renesas,usbhs-r8a77965", not "renesas,usbhs-r8a7796".
Fixes: a06e8af801760a98 ("arm64: dts: renesas: r8a77965: add HS-USB node")
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Simon Horman
---
From: Biju Das
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 10 ++
1 file changed, 10 insertions(+)
From: Dien Pham
This patch adds OPPs table for CA57{0,1} cpu devices
Signed-off-by: Dien Pham
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Kaneko
Tested-by: Simon Horman
[simon: do not give nodes unit names as they have no bus addresses]
Signed-off-by: Simon Horman
---
From: Takeshi Kihara
Add device nodes for I2C ch[0-7] to R-Car E3 R8A77990 device tree.
Signed-off-by: Takeshi Kihara
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
Tested-by: Laurent Pinchart
Signed-off-by: Simon
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM64 based SoC DT updates for v4.20.
I am sending out this pull-request at this time as there are a number
of patches queued up in my arm (32) DT branch and I hope that this
will ease the burden later on in the development cycle. I
From: Sergei Shtylyov
The CAN clock node should precede the "cpus" node in the R8A779{7|8}0
device trees, according to the alphanumeric node sorting rule...
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Biju Das
Add usb3.0 phy, host and function device nodes on RZ/G2M SoC dtsi.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 35 +++
1 file changed,
From: Biju Das
Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC.
Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven
and Simon Horman .
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Signed-off-by: Simon Horman
---
From: Fabrizio Castro
This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1)
device tree.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 70 +++
1 file changed, 70
From: Laurent Pinchart
The internal LVDS encoder now has DT bindings separate from the DU. Port
the r8a7795 and r8a7796 device trees over to the new model.
Signed-off-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
.../boot/dts/renesas/r8a7795-es1-salvator-x.dts| 3 +-
From: Magnus Damm
Browsing the DTS for all the R-Car SoCs with similar part numbers
makes my head hurt, so to improve the user friendliness of the
DTS code base include R-Car product name in each DTSI file.
Product names are derived from
Documentation/devicetree/bindings/arm/shmobile.txt
From: Laurent Pinchart
The DU DT bindings have been updated to drop the reg-names property.
Update the r8a7792 and r8a7794 device trees accordingly.
Signed-off-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792.dtsi | 1 -
arch/arm/boot/dts/r8a7794.dtsi | 1 -
2
From: Geert Uytterhoeven
Update the SATA device nodes on R-Car H1, H2, and M2-W to use a 2 MiB
I/O space, as specified in Rev.1.0 of the R-Car H1 and R-Car Gen2
hardware user manuals.
See also commit e9f0089b2d8a3d45 ("arm64: dts: r8a7795: Correct SATA
device size to 2MiB").
Signed-off-by:
From: Biju Das
Replace the hardcoded power domain indices by R8A77470_PD_* symbols.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a77470.dtsi | 27 ++-
1 file changed, 14
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.20.
I am sending out this pull-request at this time as there are a number
of patches queued up in my arm (32) DT branch and I hope that this
will ease the burden later on in the development cycle. I expect
From: Biju Das
Define the generic R8A77470 part of the PFC device node.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a77470.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Marek Vasut
Add DA9063 PMIC node to the I2C bus.
Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794-silk.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts
From: Biju Das
Adding pinctrl support for scif1 interface.
Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Marek Vasut
Add DA9063 OnKey subnode to DA9063 PMIC node on Stout.
Signed-off-by: Marek Vasut
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7790-stout.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-stout.dts
From: Marek Vasut
Add DA9063 RTC and OnKey subnode to DA9063 PMIC node on Silk.
Signed-off-by: Marek Vasut
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794-silk.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts
From: Biju Das
Describe GPIO blocks in the R8A77470 device tree.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a77470.dtsi | 91 +
1 file changed, 91
From: Biju Das
Specify EtherAVB PHY IRQ in the board specific device tree, now that we
have GPIO support.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 2 ++
1 file changed,
From: Marek Vasut
Add DA9210 DVFS node to the I2C bus and link it to CPU0 for DVFS.
Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7793-gose.dts | 16
1 file changed, 16 insertions(+)
diff --git
Hi Daniel,
On Thu, Sep 13, 2018 at 3:17 PM Daniel Lezcano
wrote:
> On 11/09/2018 20:42, Chris Brandt wrote:
> > On Tuesday, September 11, 2018 1, Rob Herring wrote:
> >> Well before we get to initcalls, the kernel calls the arch specific
> >> time_init() which (on ARM) calls of_clk_init (for all
On 10/09/2018 22:22, Sergei Shtylyov wrote:
> The driver seems to abuse *unsigned long* not only for the (32-bit)
> register values but also for the 'sh_cmt_channel::total_cycles' which
> needs to always be 64-bit -- as a result, the clocksource's mask is
> needlessly clamped down to 32-bits on
From: Niklas Söderlund
Fix warning when running with CONFIG_DMA_API_DEBUG_SG=y by allocating a
device_dma_parameters structure and filling in the max segment size. The
size used is the result of a discussion with Renesas hardware engineers
and unfortunately not found in the datasheet.
On 11/09/2018 20:42, Chris Brandt wrote:
> On Tuesday, September 11, 2018 1, Rob Herring wrote:
>> Well before we get to initcalls, the kernel calls the arch specific
>> time_init() which (on ARM) calls of_clk_init (for all the reasons
>> above) and then timer_probe(). When timer_probe returns, it
On 09/12/2018 12:39 PM, Simon Horman wrote:
>> Describe TMUs in the R8A779{7|8}0 device trees.
>>
>> Based on the original (and large) patches by Vladimir Barinov.
>>
>> Signed-off-by: Vladimir Barinov
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> This patch
On 09/11/2018 09:35 PM, Sergei Shtylyov wrote:
> Describe TMUs in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is
On 08/09/2018 22:54, Sergei Shtylyov wrote:
> When trying to use CMT for clockevents on R-Car gen3 SoCs, I noticed
> that 'max_delta_ns' for the broadcast timer (CMT) was shown as 1000 in
> /proc/timer_list. It turned out that when calculating it, the driver did
> 1 << 32 (causing what I think was
Hello!
On 09/13/2018 04:25 PM, Daniel Lezcano wrote:
>> The driver seems to abuse *unsigned long* not only for the (32-bit)
>> register values but also for the 'sh_cmt_channel::total_cycles' which
>> needs to always be 64-bit -- as a result, the clocksource's mask is
>> needlessly clamped down
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