Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Moved rwdt node before gpio.
---
arch/arm/boot/dts/r8a7744.dtsi | 10 ++
1 file changed,
Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
This work is based on similar work done on the R8A7743 SoC.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 243
Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
Describe the IRQC interrupt controller in the r8a7744 device tree.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
This patch instantiates the thermal sensor module with thermal-zone
support.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git
Add CMT[01] support to SoC DT.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 42 +-
1 file changed, 41 insertions(+), 1
Describe internal PCI bridge devices, USB phy device and
link PCI USB devices to USB phy.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 77 +++---
1 file
Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Fixed subject line SDHI10 to SDHI0
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 16
1 file changed, 16
Add MMC node to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Dropped i2c aliases, removed generic compatible from iic3.
---
arch/arm/boot/dts/r8a7744.dtsi | 127
Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 257 -
1 file changed, 254 insertions(+), 3
Add SDHI nodes to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 39 +--
1 file changed, 37 insertions(+), 2 deletions(-)
diff
Add Ethernet AVB support for R8A7744 SoC.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7744.dtsi
Describe SYS-DMAC0/1 in the R8A7744 device tree.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No change
---
arch/arm/boot/dts/r8a7744.dtsi | 66 ++
1 file changed, 66 insertions(+)
diff --git
Describe GPIO blocks in the R8A7744 device tree.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744.dtsi | 102 +++--
1 file changed, 98 insertions(+), 4 deletions(-)
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Also add cpu1 phandle node to the PMU interrupt-affinity property.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Fixed GIC_CPU_MASK_SIMPLE
Add eMMC support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No Change
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git
Hi Geert,
On Friday, November 30, 2018 1, Geert wrote:
> > So in our RZ/A BSP that I release to customers I would use this dual
> > license. You can see the exact same license in a number of dts files in
> > mainline.
>
> Note that your file includes
>
> #include
> #include
>
> both
Hi Chris,
On Fri, Nov 30, 2018 at 5:10 PM Chris Brandt wrote:
> On Friday, November 30, 2018 1, Geert wrote:
> > > So in our RZ/A BSP that I release to customers I would use this dual
> > > license. You can see the exact same license in a number of dts files in
> > > mainline.
> >
> > Note that
Hi Chris,
On Fri, Nov 30, 2018 at 1:20 PM Chris Brandt wrote:
> On Friday, November 30, 2018, Simon Horman wrote:
> > I am wondering about the motivation for dual-licensing this file.
> > It does not seem to be something Renesas has done before with
> > upstream DT.
> >
> > I am also wondering
From: Geert Uytterhoeven [mailto:ge...@linux-m68k.org]
Sent: Friday, November 30, 2018 11:03 AM
> BTW, I'd be surprised the hardware address decoder would route all
> addresses in the range 0xe803b000..0xe803b02f to the OSTM.
> 0xe803b000..0xe803b03f sounds more logical to me, as it requires less
Hi Simon,
On Fri, Nov 30, 2018 at 1:23 PM Simon Horman wrote:
> On Fri, Nov 30, 2018 at 12:04:57PM +, Chris Brandt wrote:
> > On Friday, November 30, 2018, Simon Horman wrote:
> > > > + ostm0: timer@e803b000 {
> > > > + compatible = "renesas,r7s9210-ostm", "renesas,ostm";
> > > > +
This patch series aims to add support for iWave G20D-Q7 board based on RZ/G1N.
This patch series is tested against renesas-dev
V1-->V2
* r8a7744: Initial SoC device tree: Fixed pfc register size,
GIC_CPU_MASK_SIMPLE in gic/timer nodes
* r8a7744: Add SMP support: Fixed
Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
to avoid compilation error with the common platform code.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Fixed pfc register size, GIC_CPU_MASK_SIMPLE in gic/timer nodes
---
Add support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No change
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 31 +++
1 file changed, 31 insertions(+)
create mode
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1N.
Signed-off-by: Biju Das
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* No change
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r8a7744-iwg20d-q7.dts | 15 +++
On Mon, Nov 26, 2018 at 01:55:01PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.21.
>
> I am sending out this pull-request at this time as there are a number
> of patches queued up in my arm64 DT branch and I hope
On Wed, Nov 28, 2018 at 02:02:12PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.21.
>
> I am sending out this pull-request at this time as there are a number
> of patches queued up in my arm (32) DT branch and I hope
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add MMC node to the DT of the r8a7744 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Describe the IRQC interrupt controller in the r8a7744 device tree.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> This patch instantiates the thermal sensor module with thermal-zone
> support.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add CMT[01] support to SoC DT.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
On Wed, Nov 28, 2018 at 5:47 PM Biju Das wrote:
> Add the six IPMMU instances found in the r8a7744 to DT with a disabled
> status.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
On Wed, Nov 28, 2018 at 5:47 PM Biju Das wrote:
> Add VSP support to SoC DT.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
On Wed, Nov 28, 2018 at 5:47 PM Biju Das wrote:
> Add TPU support to SoC DT.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
On Wed, Nov 28, 2018 at 5:47 PM Biju Das wrote:
> Add the definitions for pwm[0123456] to the SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
Hi Geert,
Thanks for the feedback.
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> Sent: 30 November 2018 08:54
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Simon Horman ; Magnus
> Damm ; Linux-Renesas
Hi Biju,
On Thu, Nov 22, 2018 at 10:22 AM Biju Das wrote:
> Add support for iWave RZ/G1N Qseven System On Module.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
> --- /dev/null
> +++ b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier:
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add eMMC support for iWave RZ/G1N Qseven System On Module.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
I assume the PCB is the same for RZ/G1M and RZ/G1N, so perhaps this
can be factored out in a common .dtsi file, like we did
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Thu, Nov 29, 2018 at 11:56:14AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
> removed the A3IR power domain on R-Car M3-N, as this SoC does not have
> an Image Processing Unit (IMP-X5).
>
> The definition in the DT bindings header
On Thu, Nov 29, 2018 at 11:56:15AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
> removed the CR7 power domain on R-Car V3M, as this SoC does not have an
> ARM Cortex-R7 Realtime Core.
>
> As this definition was never used from DT, it can
On Thu, Nov 29, 2018 at 12:09:30PM +0100, Geert Uytterhoeven wrote:
> Commit 59b89af1d5551c12 ("ARM: shmobile: sh7372: Remove Legacy C
> SoC code") removed the last user of the rmobile_pm_domain.resume()
> callback.
>
> Commit 44d88c754e57a6d9 ("ARM: shmobile: Remove legacy SoC code
> for
On Thu, Nov 29, 2018 at 12:09:31PM +0100, Geert Uytterhoeven wrote:
> The pm-rmobile driver is really a driver for the System Controller
> (SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is
> already located under drivers/soc/renesas/.
>
> Hence move the pm-rmobile driver from
Hi Biju,
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -15,6 +15,18 @@
>
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add SDHI nodes to the DT of the r8a7744 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In
On Tue, Nov 27, 2018 at 1:06 PM Biju Das wrote:
> Add a device node for the PCIe controller on the Renesas
> RZ/G1N (r8a7744) SoC.
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Wed, Nov 28, 2018 at 5:47 PM Biju Das wrote:
> Add VIN[012] support to SoC dt.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add a device node for the xhci controller on the Renesas
> RZ/G1N (r8a7744) SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
Hi Laurent,
Thanks for the feedback.
> Subject: Re: Issue with enabling VSP source on rcar gen2 koelsch board
>
> Hi Biju,
>
> On Thursday, 29 November 2018 10:39:00 EET Biju Das wrote:
> > > Subject: Re: Issue with enabling VSP source on rcar gen2 koelsch
> > > board On Wednesday, 28 November
Hi Geert,
Thanks for the feedback.
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> Sent: 30 November 2018 08:49
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Simon Horman ; Magnus
> Damm ; Linux-Renesas
Hello Geert,
Thanks for the feedback.
> -Original Message-
> From: Geert Uytterhoeven
> Sent: 30 November 2018 09:45
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Simon Horman ; Magnus
> Damm ; Linux-Renesas s...@vger.kernel.org>; open list:OPEN FIRMWARE AND FLATTENED DEVICE
>
On Thu, Nov 29, 2018 at 11:34:34AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Aug 24, 2018)
> removed the IPMMU-IR IOMMU instance on R-Car M3-N, as this SoC does not
> have an Image Processing Unit (IMP-X5) nor the A3IR power domain.
>
> Fixes:
On Thu, Nov 29, 2018 at 11:56:18AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
> renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
> power domain hierarchy for the A3VIP[012] power domains.
>
> As the definition for
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR support
>
> Hi Biju,
>
> On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > Add support for the SPI NOR device used to boot up the system to the
> > iWave RZ/G1N Qseven System On Module DT.
>
Hi Biju,
On Fri, Nov 30, 2018 at 11:34 AM Biju Das wrote:
> > Subject: Re: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR support
> > On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > > Add support for the SPI NOR device used to boot up the system to the
> > > iWave RZ/G1N Qseven System
Hi Biju,
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
> RZ/G1N (r8a7744) SoC.
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
>
> This work is based on similar work done on the R8A7743 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
Hi Biju,
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add du node to r8a7744 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
>
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Describe internal PCI bridge devices, USB phy device and
> link PCI USB devices to USB phy.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add the DT node for the QSPI interface to the SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 11/22] ARM: dts: r8a7744: Add DU support
>
> Hi Biju,
>
> On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > Add du node to r8a7744 SoC DT. Boards that want to enable the DU need
> > to specify the output topology.
> >
> > Signed-off-by:
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Add support for iWave RainboW-G20D-Qseven board based on RZ/G1N.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
Hi Biju,
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Add support for the SPI NOR device used to boot up the system
> to the iWave RZ/G1N Qseven System On Module DT.
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
> +++
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> This patch adds support for the camera daughter board which is
> connected to iWave's RZ/G1N Qseven carrier board.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
On Thu, Nov 29, 2018 at 11:34:35AM +0100, Geert Uytterhoeven wrote:
> While commit 3b7e7848f0e88b36 ("arm64: dts: renesas: r8a7795: Add IPMMU
> device nodes") for R-Car H3 ES2.0 did include power-domains properties,
> they were forgotten in the counterpart for older R-Car H3 ES1.x SoCs.
>
>
On Thu, Nov 29, 2018 at 11:56:16AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
> renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
> A2CN.
>
> As these definitions are not yet used from DT, they can just be renamed.
>
>
On Thu, Nov 29, 2018 at 11:56:19AM +0100, Geert Uytterhoeven wrote:
> The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
> removed the A3IR power domain on R-Car M3-N, as this SoC does not have
> an Image Processing Unit (IMP-X5).
>
> As this definition is no longer used from DT,
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 05/22] ARM: dts: r8a7744-iwg20m: Add eMMC support
>
> On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > Add eMMC support for iWave RZ/G1N Qseven System On Module.
> >
> > Signed-off-by: Biju Das
>
> Reviewed-by: Geert Uytterhoeven
>
>
Hi Biju,
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
> to avoid compilation error with the common platform code.
>
> Signed-off-by: Biju Das
> --- /dev/null
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -0,0 +1,369 @@
> +
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Describe SYS-DMAC0/1 in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Describe GPIO blocks in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Add Ethernet AVB support for R8A7744 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In
Hi Biju,
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
> to avoid compilation error with the common platform code.
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> +
On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Thu, Nov 22, 2018 at 10:23 AM Biju Das wrote:
> Add DT node for the Advanced Power Management Unit (APMU), add the
> second CPU core, and use "renesas,apmu" as "enable-method".
>
> Also add cpu1 phandle node to the PMU interrupt-affinity property.
Please change GIC_CPU_MASK_SIMPLE() from 1 to
Hi Biju,
On Fri, Nov 30, 2018 at 11:43 AM Biju Das wrote:
> > Subject: Re: [PATCH 05/22] ARM: dts: r8a7744-iwg20m: Add eMMC support
> >
> > On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > > Add eMMC support for iWave RZ/G1N Qseven System On Module.
> > >
> > > Signed-off-by: Biju Das
> >
>
On Mon, Nov 26, 2018 at 06:02:46PM +0100, Niklas Söderlund wrote:
> SD / MMC did not operate properly when suspend transition failed.
> Because the SCC was not reset at resume, issue of the command failed.
> Call the host specific reset function and reset the hardware in order to
> add reset of
On Wed, Nov 28, 2018 at 05:18:26PM +0100, Niklas Söderlund wrote:
> Hi,
>
> Recent datasheet updates have made it clear that some quirks are not SoC
> specific but SoC + ES version specific. Currently the quirks are
> selected using compatibility values but whit this new information that
> is not
Hi Niklas,
> That should have been rate :-) To elaborate a bit more:
>
> The patch is different from v1 as a different approach to solve the
> issue have been found. Instead of only ignoring the first row of the
> list of possible settings when selecting which divider to use also
> ignore it
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR support
>
> Hi Biju,
>
> On Fri, Nov 30, 2018 at 11:34 AM Biju Das wrote:
> > > Subject: Re: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR
> > > support On Tue, Nov 27, 2018 at 1:05 PM
On Thu, Nov 29, 2018 at 08:05:58AM -0500, Chris Brandt wrote:
> Basic support for the RZ/A2 (R7S9210) SoC.
>
> Signed-off-by: Chris Brandt
> ---
> arch/arm/boot/dts/r7s9210.dtsi | 211
> +
> 1 file changed, 211 insertions(+)
> create mode 100644
Hi Simon,
On Friday, November 30, 2018, Simon Horman wrote:
> > + - RZ/A2M Eval Board (RTK7921053S0BE)
> > +compatible = "renesas,rza2mevb", "renesas,r7s9210"
> >- RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
> > compatible = "renesas,rzn1d400-db",
Hi Biju,
On Thu, Nov 29, 2018 at 6:03 PM Biju Das wrote:
> Add support for NXP pcf85263 real-time clock. pcf85263 rtc is compatible
> with pcf85363,except that pcf85363 has additional 64 bytes of RAM.
>
> 1 byte of nvmem is supported and exposed in sysfs (# is the instance
> number,starting with
On Thu, Nov 29, 2018 at 01:15:38AM +0100, Niklas Söderlund wrote:
> The driver tries to figure out which state a SD clock is in when the
> clock is register instead of setting a known state. This can be
> problematic for two reasons.
>
> 1. If the clock driver can't figure out the state of the
On Thu, Nov 29, 2018 at 01:39:49AM +0100, Niklas Söderlund wrote:
> On H3 (ES1.x, ES2.0) and M3-W (ES1.0, ES1.1) the clock setting for HS400
> needs a quirk to function properly. The reason for the quirk is that
> there are two settings which produces same divider value for the SDn
> clock. On the
On Thu, Nov 29, 2018 at 08:05:59AM -0500, Chris Brandt wrote:
> Add support for Renesas RZ/A2M evaluation board.
>
> Signed-off-by: Chris Brandt
> ---
> Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
> arch/arm/boot/dts/Makefile | 1 +
>
Hi Simon,
On Friday, November 30, 2018, Simon Horman wrote:
> > + cpg: clock-controller@fcfe0020 {
> > + compatible = "renesas,r7s9210-cpg-mssr";
> > + reg = <0xfcfe0010 0x455>;
>
> There is a discrepancy here between the base address, fcfe0020
> and the start address of
On Fri, Nov 30, 2018 at 12:04:57PM +, Chris Brandt wrote:
> Hi Simon,
>
>
> On Friday, November 30, 2018, Simon Horman wrote:
> > > + cpg: clock-controller@fcfe0020 {
> > > + compatible = "renesas,r7s9210-cpg-mssr";
> > > + reg = <0xfcfe0010 0x455>;
> >
> > There is a
On 30/11/2018 12:05:16+0100, Geert Uytterhoeven wrote:
> Hi Biju,
>
> On Thu, Nov 29, 2018 at 6:03 PM Biju Das wrote:
> > Add support for NXP pcf85263 real-time clock. pcf85263 rtc is compatible
> > with pcf85363,except that pcf85363 has additional 64 bytes of RAM.
> >
> > 1 byte of nvmem is
The JEDEC standard is confusing. The number of max blocks for reading
RPMB is determined by CMD23 which can hold an unsigned int and not only
u16. It is true that the current maximum is 64K of blocks, yet this may
be extended in the future. Let's not apply a limit here which should be
checked by
>
> The JEDEC standard is confusing. The number of max blocks for reading
> RPMB is determined by CMD23 which can hold an unsigned int and not only
> u16. It is true that the current maximum is 64K of blocks, yet this may
> be extended in the future. Let's not apply a limit here which should be
>
Hi Wolfram,
On Fri, Nov 30, 2018 at 12:47 PM Wolfram Sang wrote:
> > That should have been rate :-) To elaborate a bit more:
> >
> > The patch is different from v1 as a different approach to solve the
> > issue have been found. Instead of only ignoring the first row of the
> > list of possible
Hi Alexandre,
On Fri, Nov 30, 2018 at 1:32 PM Alexandre Belloni
wrote:
> On 30/11/2018 12:05:16+0100, Geert Uytterhoeven wrote:
> > On Thu, Nov 29, 2018 at 6:03 PM Biju Das wrote:
> > > Add support for NXP pcf85263 real-time clock. pcf85263 rtc is compatible
> > > with pcf85363,except that
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