[linux-sunxi] Re: [RFC PATCH 2/5] crypto: sunxi-ss: fix min3() call to match types

Hi Arnd, On 12/22/15 22:06, Arnd Bergmann wrote: > On Tuesday 22 December 2015, Andre Przywara wrote: >> The min3() macro expects all arguments to be of the same type (or >> size at least). While two arguments are ints or u32s, one is size_t, >> which does not match on 64-bit architectures. >>

Re: [linux-sunxi] [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi

On 01/02/16 19:05, Karsten Merker wrote: > Hello, > > a few tiny spelling nitpicks in case you should do a V2: Definitely! ;-) > > On Mon, Feb 01, 2016 at 05:39:29PM +, Andre Przywara wrote: > >> The Allwinner A64 SoC is low-cost SoC with 4 ARM Cortex-A53 cores > > s/is low-cost SoC/is a

Re: [linux-sunxi] [PATCH 11/11] arm64: dts: add Pine64 support

On 01/02/16 19:22, Karsten Merker wrote: Hi, > On Mon, Feb 01, 2016 at 05:39:30PM +, Andre Przywara wrote: >> The Pine64 is a cost-efficient development board based on the >> Allwinner A64 SoC. >> There are three models: the basic version with Fast Ethernet and >> 512 MB of DRAM (Pine64) and

[linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

On 01/02/16 18:27, Karsten Merker wrote: Hi Karsten, thank you very much for your feedback! > On Mon, Feb 01, 2016 at 05:39:24PM +, Andre Przywara wrote: >> Based on the Allwinner A64 user manual and on the previous sunxi >> pinctrl drivers this introduces the pin multiplex assignments for

Re: [linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

On 01/02/16 18:45, Karsten Merker wrote: > Hello, > > I by mistake pressed "send" on my previous mail when I intended > to further edit it, so here comes a followup. > I definitely need more coffee ;-). Or less? ;-) vv Thinking of twitchy fingers... > On Mon, Feb 01, 2016 at

[linux-sunxi] Re: [PATCH 00/11] arm64: Introduce Allwinner A64 and Pine64 support

On 02/02/16 07:57, lists.nick.betteri...@gmail.com wrote: > Just a quick question - will there be any support for enabling booting into > virtualisation mode to run xen and the like? This is a firmware issue. The SoC itself provides everything you need and even Allwinner choosing ARM Trusted

[linux-sunxi] Re: [PATCH] clk: sunxi: allow PLL6 clock to be reused

On 25/02/16 18:11, Maxime Ripard wrote: > On Mon, Feb 22, 2016 at 09:38:53AM +, Andre Przywara wrote: diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h index 1e63c5b..3a7da86 100644 --- a/drivers/clk/sunxi/clk-factors.h +++

[linux-sunxi] arch.arm64/defconfig changes for sunxi

Hi Maxime, I see that you merged the sun50i-a64 defconfig patch into -next, which is a good thing since the drivers get some compile testing. Not sure if you wanted to send this patch also as part of a pull request for the next merge window: if you planned so, please don't ;-) Will always gets a

[linux-sunxi] Re: [RFC PATCH] clk: sunxi: Let divs clocks read the base factor clock name from devicetree

On 19/03/16 15:36, Chen-Yu Tsai wrote: Hi Chen-Yu, > Hi, > > On Fri, Mar 18, 2016 at 5:44 PM, Andre Przywara > wrote: >> From: Jens Kuske >> >> Currently, the sunxi clock driver gets the name for the base factor clock >> of divs clocks from the

[linux-sunxi] Re: [RFC PATCH 0/5] Allwinner MMC firmware clocks implementation

On 10/08/16 16:10, Icenowy Zheng wrote: > > > 09.08.2016, 19:57, "Andre Przywara" : >> Hi, >> >> this is a proof-of-concept series to demonstrate the usage of firmware >> driven clocks using the SCPI protocol for Allwinner SoCs. >> This aims to replace the tricky and

[linux-sunxi] Re: [RFC PATCH 4/5] arm64: dts: sunxi: add SCPI driven clocks and nodes for A64 MMC

On 10/08/16 16:01, Icenowy Zheng wrote: Hi, > 09.08.2016, 19:58, "Andre Przywara" : >> The MMC controllers in the Allwinner A64 SoC are somewhat compatible >> with the versions used in other Allwinner SoCs. >> Tell Linux about the three MMC clocks that the firmware

[linux-sunxi] Re: [U-Boot] [PATCH v4 2/3] spl: Remove overwrite of relocated malloc limit

On 27/01/17 16:39, Andrew F. Davis wrote: Hi, > spl_init on some boards is called after stack and heap relocation, on > some platforms spl_relocate_stack_gd is called to handle setting the > limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple > SPL malloc is enabled during

[linux-sunxi] Re: [U-Boot] [PATCH v4 2/3] spl: Remove overwrite of relocated malloc limit

On 02/02/17 00:08, Tom Rini wrote: Hi Tom, thanks for the quick reply! > On Wed, Feb 01, 2017 at 11:48:11PM +0000, André Przywara wrote: >> On 27/01/17 16:39, Andrew F. Davis wrote: >> >> Hi, >> >>> spl_init on some boards is called after stack and he

[linux-sunxi] Re: [PATCH v3 13/13] sunxi: configs: add basic OrangePi PC 2 defconfig

On 02/02/17 12:27, Maxime Ripard wrote: > On Wed, Feb 01, 2017 at 01:36:10AM +, Andre Przywara wrote: >> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC. >> Add a (64-bit only) defconfig defining the required options to build >> the U-Boot proper. >> >> Signed-off-by: Andre

[linux-sunxi] Re: [RFC PATCH 05/11] tools: mksunxiboot: allow larger SPL binaries

On 21/01/17 04:24, Siarhei Siamashka wrote: Hi Siarhei, > On Fri, 20 Jan 2017 01:53:25 + > Andre Przywara wrote: > >> mksunxiboot limits the size of the resulting SPL binaries to pretty >> conservative values to cover all SoCs and all boot media (NAND). >> In

[linux-sunxi] Re: [RFC PATCH 08/11] sunxi: SPL: add FIT config selector for Pine64 boards

On 21/01/17 04:05, Siarhei Siamashka wrote: Hi Siarhei, thanks for your comments! > On Fri, 20 Jan 2017 21:55:53 + > André Przywara <andre.przyw...@arm.com> wrote: > >> On 20/01/17 21:35, Maxime Ripard wrote: >> >> Hi Maxime, >> >> thanks f

[linux-sunxi] Re: [RFC PATCH 03/11] SPL: FIT: factor out spl_load_fit_image()

On 23/01/17 08:53, Lokesh Vutla wrote: Hi Lokesh, thanks a lot for having a thorough look at it! >> On Friday 20 January 2017 07:23 AM, Andre Przywara wrote: >> At the moment we load two images from a FIT image: the actual U-Boot >> image and the DTB. Both times we have very similar code to

[linux-sunxi] Re: [RFC PATCH 08/11] sunxi: SPL: add FIT config selector for Pine64 boards

On 23/01/17 17:29, Maxime Ripard wrote: > On Sat, Jan 21, 2017 at 03:15:27PM +0000, André Przywara wrote: >>>>> On Fri, Jan 20, 2017 at 01:53:28AM +, Andre Przywara wrote: >>>>>> For a board or platform to support FIT loading in the SPL, it has to >>

[linux-sunxi] Re: [RFC PATCH 04/11] SPL: FIT: allow loading multiple images

On 23/01/17 02:49, Kever Yang wrote: > Hi Andre, > > On 01/22/2017 06:58 PM, André Przywara wrote: >> On 22/01/17 07:08, Kever Yang wrote: >>> Hi Andre, >>> >>> Thanks for your patches, this is great help for enable ATF on >>> U-Boot >&

[linux-sunxi] Re: [RFC PATCH 01/11] SPL: FIT: refactor FDT loading

On 27/01/17 21:29, Simon Glass wrote: > Hi Andre, > > On 19 January 2017 at 18:53, Andre Przywara wrote: >> >> Currently the SPL FIT loader uses the spl_fit_select_fdt() function to >> find the offset to the right DTB within the FIT image. >> For this it iterates over all

[linux-sunxi] Re: [RFC PATCH 00/11] extend FIT loading support (plus Pine64/ATF support)

On 27/01/17 21:29, Simon Glass wrote: Hi Simon, > On 19 January 2017 at 18:53, Andre Przywara wrote: >> Currently the FIT format is not used to its full potential in the SPL: >> It only loads the first image from the /images node and appends the >> proper FDT. >> Some

[linux-sunxi] Re: [PATCH v3 05/10] arm: dts: sun8i: split Allwinner H3 .dtsi

On 29/01/17 02:33, Icenowy Zheng wrote: > From: Andre Przywara (Adding DT folks to CC:) see below ... > The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the > Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller > updated. So we should

[linux-sunxi] Re: [PATCH 09/12] sunxi: H5: add COUNTER_FREQUENCY

Hi, On 16/01/17 08:01, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 01:30:01AM +, Andre Przywara wrote: >> For the arch timer to work properly, we need to setup the CNTFRQ >> register, which is only possible in EL3. >> Define the arch timer frequency in sun8i.h as well, so that ARMv8's >>

[linux-sunxi] Re: [PATCH 08/12] sunxi: prepare for sharing MACH_SUN8I_H3 config symbol

On 16/01/17 07:59, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 01:30:00AM +, Andre Przywara wrote: >> The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. >> To allow sharing the clocks, GPIO and driver code easily, create an >> architecture agnostic MACH_SUN8I_H3_H5 Kconfig

Re: [linux-sunxi] Re: [PATCH 02/12] sunxi: simplify ACTLR.SMP bit set #ifdef

Hi, On 16/01/17 07:44, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 08:28:07AM +0000, André Przywara wrote: >> On 13/01/17 08:09, Vishnu Patekar wrote: >> Hi Vishnu, >> >>> Even for the single core cortex-a7, SMP bit should be set before >>> enabling MMU

[linux-sunxi] Re: [RFC PATCH 03/11] SPL: FIT: factor out spl_load_fit_image()

On 22/01/17 07:16, Kever Yang wrote: > Hi Andre, > > On 01/20/2017 09:53 AM, Andre Przywara wrote: >> At the moment we load two images from a FIT image: the actual U-Boot >> image and the DTB. Both times we have very similar code to deal with >> alignment requirement the media we load from

[linux-sunxi] Re: [RFC PATCH 04/11] SPL: FIT: allow loading multiple images

On 22/01/17 07:08, Kever Yang wrote: > Hi Andre, > > Thanks for your patches, this is great help for enable ATF on U-Boot > SPL. > For ATF use case, we would like to identify which one is bl31 for we > need to > get entry point for it while we only need load address for other image. > Any

[linux-sunxi] Re: [RFC PATCH 11/11] SPL: SPI: sunxi: add SPL FIT image support

On 20/01/17 21:37, Maxime Ripard wrote: > Hi, > > On Fri, Jan 20, 2017 at 01:53:31AM +, Andre Przywara wrote: >> The sunxi-specific SPI load routine only knows how to load a legacy >> U-Boot image. >> Teach it how to handle FIT images as well, simply by providing the >> existing SPL FIT

[linux-sunxi] Re: [RFC PATCH 09/11] sunxi: Pine64: defconfig: enable SPL FIT support

On 20/01/17 21:36, Maxime Ripard wrote: > On Fri, Jan 20, 2017 at 01:53:29AM +, Andre Przywara wrote: >> The Pine64 (as all 64-bit Allwinner boards so far) need to load an >> ARM Trusted Firmware image beside the actual U-Boot proper. >> This can now be easily achieved by using the just

[linux-sunxi] Re: [RFC PATCH 08/11] sunxi: SPL: add FIT config selector for Pine64 boards

On 20/01/17 21:35, Maxime Ripard wrote: Hi Maxime, thanks for having a look! > On Fri, Jan 20, 2017 at 01:53:28AM +, Andre Przywara wrote: >> For a board or platform to support FIT loading in the SPL, it has to >> provide a board_fit_config_name_match() routine, which helps to select >> one

[linux-sunxi] Re: [RFC PATCH 00/11] extend FIT loading support (plus Pine64/ATF support)

Hi, On 20/01/17 17:35, Andrew F. Davis wrote: > On 01/20/2017 11:17 AM, Andre Przywara wrote: >> Hi Andrew, >> >> thanks for the comments. >> >> On 20/01/17 17:02, Andrew F. Davis wrote: >>> On 01/19/2017 07:53 PM, Andre Przywara wrote: Currently the FIT format is not used to its full

Re: [linux-sunxi] [RFC PATCH 5/9] ARM: dts: sun8i: add DTSI file for R40 SoC

On 17/02/17 17:37, Icenowy Zheng wrote: > R40 is a new SoC by Allwinner, with peripherals as rich as A20, and quad > core Cortex-A7. > > Add a DTSI file for it. > > Signed-off-by: Icenowy Zheng > --- > arch/arm/boot/dts/sun8i-r40.dtsi | 404 >

[linux-sunxi] Re: [PATCH v3 3/3] sunxi: add support for Lichee Pi Zero

On 14/02/17 07:36, Maxime Ripard wrote: > On Mon, Feb 13, 2017 at 04:12:04PM +0800, Icenowy Zheng wrote: >> >> 2017年2月13日 15:17于 Maxime Ripard 写道： >>> >>> Hi, >>> >>> On Sat, Feb 11, 2017 at 07:11:02PM +0800, Icenowy Zheng wrote: @@ -0,0 +1,13 @@

[linux-sunxi] Re: [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers

On 14/02/17 13:49, Icenowy Zheng wrote: > Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like > DesignWare DRAM controller, which do not have official free DRAM > initialization code, but can use modified dram_sun8i_h3.c. > > Add a invisible option for easier DRAM initialization code

[linux-sunxi] Re: [PATCH v4 26/26] sunxi: A64: add 32-bit SPL support

On 16/01/17 08:55, Maxime Ripard wrote: > On Fri, Jan 13, 2017 at 09:42:28AM +, Andre Przywara wrote: >>> Re wanting to build SPL either as 32-bit or 64-bit, could this be a >>> Kconfig option perhaps? >> >> Sounds like a direction worth to investigate. >> In the moment we have two separate

Re: [linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

On 27/02/17 01:20, Siarhei Siamashka wrote: > On Wed, 22 Feb 2017 17:08:47 + > Andre Przywara wrote: > >> If an SoC has the "secure boot" fuse burned, it will enter FEL mode in >> non-secure state, so with the SCR.NS bit set. Since in this mode the >> secure/non-secure state

[linux-sunxi] Re: Some discussion about A64 clocks regulators support

... > > On Mon, Sep 05, 2016 at 01:25:36AM +0100, André Przywara wrote: >> From thinking more about this I think we can have both approaches >> implemented: >> - An embedded design for people who either want full control or who >> don't care too much about the potential d

[linux-sunxi] Re: Some discussion about A64 clocks regulators support

On 26/08/16 22:18, maxime.ripard wrote: > On Thu, Aug 25, 2016 at 12:55:44AM +0100, André Przywara wrote: >> On 24/08/16 20:28, maxime.ripard wrote: >> >> Hi, >> >>> On Sun, Aug 14, 2016 at 06:16:16PM +0800, Icenowy Zheng wrote: >>>> Hi, >>

[linux-sunxi] Re: [PATCH v2 3/4] arm64: dts: add Allwinner A64 SoC .dtsi

On 09/09/16 21:10, Maxime Ripard wrote: Hi Maxime, > From: Andre Przywara > > The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of > the

Re: [linux-sunxi] AMBA Bus

On 26/10/16 08:39, Mark L. wrote: Hi Mark, > I have a doubt I would like to clear. > When you buy a Allwinner H3, one doesn't have to mess with the AMBA > specification, right? > We just use the H3 interface we got (clock, secure memory) and that is it? > > Isn't this specification for

Re: [linux-sunxi] Re: [PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2

On 25/10/16 15:14, Jean-Francois Moine wrote: > On Mon, 24 Oct 2016 16:04:19 +0200 > Maxime Ripard wrote: > >> Hi, > > Hi Maxime, > >> On Fri, Oct 21, 2016 at 09:26:18AM +0200, Jean-Francois Moine wrote: >>> Allwinner's recent SoCs, as A64, A83T and H3,

[linux-sunxi] Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On 30/10/16 08:48, Jagan Teki wrote: > On Fri, Oct 28, 2016 at 11:21 PM, Jagan Teki <ja...@openedev.com> wrote: >> On Thu, Oct 27, 2016 at 2:20 AM, André Przywara <andre.przyw...@arm.com> >> wrote: >>> On 26/10/16 19:51, Jagan Teki wrote: >>> Hi, &g

[linux-sunxi] Re: [U-Boot, 1/2] drivers: USB: OHCI: allow compilation for 64-bit targets

On 29/10/16 18:42, Marek Vasut wrote: > On 10/29/2016 02:50 PM, Hans de Goede wrote: >> Hi, >> >> On 21-10-16 03:24, Andre Przywara wrote: >>> OHCI has a known limitation of allowing only 32-bit DMA buffer >>> addresses, so we have a lot of u32 variables around, which are assigned >>> to pointers

[linux-sunxi] Re: [U-Boot] [PATCH 1/2] drivers: USB: OHCI: allow compilation for 64-bit targets

On 22/10/16 18:10, Jagan Teki wrote: Hi, > On Fri, Oct 21, 2016 at 6:54 AM, Andre Przywara > wrote: >> OHCI has a known limitation of allowing only 32-bit DMA buffer >> addresses, so we have a lot of u32 variables around, which are assigned >> to pointers and vice

[linux-sunxi] Re: [PATCH v5 2/4] arm64: dts: add Allwinner A64 SoC .dtsi

On 20/10/16 19:00, Maxime Ripard wrote: Hi Maxime, > From: Andre Przywara > > The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of > the

[linux-sunxi] Re: [U-Boot] [PATCH 1/2] drivers: USB: OHCI: allow compilation for 64-bit targets

On 24/10/16 09:20, Jagan Teki wrote: > On Sun, Oct 23, 2016 at 3:22 AM, André Przywara <andre.przyw...@arm.com> > wrote: >> On 22/10/16 18:10, Jagan Teki wrote: >> >> Hi, >> >>> On Fri, Oct 21, 2016 at 6:54 AM, Andre Przywara <andre.przyw...@arm.c

[linux-sunxi] Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On 21/10/16 11:28, Hans de Goede wrote: > Hi, > > On 21-10-16 12:06, Andre Przywara wrote: >> Hi, >> >> On 21/10/16 10:31, Jagan Teki wrote: >>> On Fri, Oct 21, 2016 at 5:41 AM, Andre Przywara >>> wrote: The sun8i-emac driver works fine with the A64 Ethernet IP, but

[linux-sunxi] Re: [PATCH v4 4/9] clk: sunxi-ng: Add minimums for all the relevant structures and clocks

Salut, On 11/10/16 15:28, Maxime Ripard wrote: > Modify the current clocks we have to be able to specify the minimum for > each clocks we support, just like we support the max. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/sunxi-ng/ccu_mult.c | 7

[linux-sunxi] Re: [PATCH v6 4/4] arm64: dts: add Pine64 support

On 02/11/16 21:50, Maxime Ripard wrote: > From: Andre Przywara > > The Pine64 is a cost-efficient development board based on the > Allwinner A64 SoC. > There are three models: the basic version with Fast Ethernet and > 512 MB of DRAM (Pine64) and two Pine64+ versions,

[linux-sunxi] Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On 26/10/16 19:51, Jagan Teki wrote: Hi, > On Fri, Oct 21, 2016 at 5:41 AM, Andre Przywara > wrote: >> The sun8i-emac driver works fine with the A64 Ethernet IP, but we are >> missing an alias entry to trigger the driver instantiation by U-Boot. >> Add the line to point

[linux-sunxi] sunxi-ng clocks: leaving certain clocks alone?

Hi, I was observing that the new sunxi-ng clock code apparently explicitly turns off _all_ clocks that are not used or needed. I find this rather unfortunate, as I wanted to use the THS temperature sensor from ARM Trusted Firmware to implement emergency shutdown or DVFS throttling. That works

Re: [linux-sunxi] working A64 DDR eMMC support

On 14/01/17 16:20, jonsm...@gmail.com wrote: > The Allwinner kernel referenced in this thread has source for working > DDR eMMC mode on the A64. > > http://forum.banana-pi.org/t/bpi-m64-android-6-0-1-source-code/2748 > > DDR eMMC support is needed to get the newer eMMC chip used on the BPI > M64

[linux-sunxi] Re: [PATCH 02/12] sunxi: simplify ACTLR.SMP bit set #ifdef

On 13/01/17 04:41, Icenowy Zheng wrote: Hi, > 13.01.2017, 09:34, "Andre Przywara" : >> Instead of enumerating all SoC families that need that bit set, let's >> just express this more clearly: The SMP bits needs to be set on >> SMP capable ARMv7 CPUs. It's much easier to

Re: [linux-sunxi] Re: [PATCH 02/12] sunxi: simplify ACTLR.SMP bit set #ifdef

On 13/01/17 08:09, Vishnu Patekar wrote: Hi Vishnu, > Even for the single core cortex-a7, SMP bit should be set before > enabling MMU and cache. > > Reference: Cortex A7 r0p5 TRM. section 4.3.31. Ah, good point, thanks for the heads up. I was misled by the SMP name when answering Icenowy. So

[linux-sunxi] Re: A64 Ethernet interfaces

On 14/01/17 14:42, jonsm...@gmail.com wrote: Hi Jon, (dropping the U-Boot ML, since this is not all related to to OpiZero or to U-Boot. Next time please send a separate email (opening a new thread). And I recommend just the linux-sunxi list for those kind of questions or join the #linux-sunxi

[linux-sunxi] Re: A64 Ethernet interfaces

On 14/01/17 16:15, jonsm...@gmail.com wrote: > On Sat, Jan 14, 2017 at 10:42 AM, André Przywara <andre.przyw...@arm.com> > wrote: >> On 14/01/17 14:42, jonsm...@gmail.com wrote: >> >> Hi Jon, >> >> (dropping the U-Boot ML, since this is not all relate

Re: [linux-sunxi] working A64 DDR eMMC support

On 14/01/17 20:03, jonsm...@gmail.com wrote: > On Sat, Jan 14, 2017 at 2:53 PM, André Przywara <andre.przyw...@arm.com> > wrote: >> On 14/01/17 16:20, jonsm...@gmail.com wrote: >>> The Allwinner kernel referenced in this thread has source for working >>> DD

[linux-sunxi] Re: [PATCH 2/5] drivers: mmc: sunxi: limit A64 MMC2 to 8K DMA buffer

On 05/01/17 17:57, Maxime Ripard wrote: > Hi Rob, > > On Wed, Jan 04, 2017 at 08:07:50AM -0600, Rob Herring wrote: >> On Mon, Jan 02, 2017 at 11:03:43PM +, Andre Przywara wrote: >>> From: Maxime Ripard >>> >>> Unlike the A64 user manual reports, the third

Re: [linux-sunxi] Allwinner H3 without Uboot

On 03/01/17 10:34, Mark L. wrote: Hi Mark, > I plan not to use U-boot but to take the boot process on charge (after the > BROM stage). > It means I will write the SPL and the other stuffs to load my custom kernel > and simplified OS. > > Now, according to that page

[linux-sunxi] Re: [PATCH 3/5] arm64: dts: sun50i: add MMC nodes

On 03/01/17 02:52, Chen-Yu Tsai wrote: Hi, > On Tue, Jan 3, 2017 at 7:03 AM, Andre Przywara wrote: > > A commit message explaining the mmc controllers would be nice. OK. >> Signed-off-by: Andre Przywara >> --- >>

Re: [U-Boot] [linux-sunxi] [PATCH v4 00/26] sunxi: Allwinner A64: SPL support

On 04/01/17 11:25, Chen-Yu Tsai wrote: > On Wed, Jan 4, 2017 at 6:28 PM, Jagan Teki wrote: >> On Tue, Jan 3, 2017 at 2:52 PM, jonsm...@gmail.com >> wrote: >>> On Tue, Jan 3, 2017 at 5:41 AM, Jagan Teki wrote: On Tue, Jan 3,

Re: [U-Boot] [linux-sunxi] [PATCH v4 00/26] sunxi: Allwinner A64: SPL support

On 04/01/17 19:00, jonsm...@gmail.com wrote: > On Wed, Jan 4, 2017 at 12:29 PM, André Przywara <andre.przyw...@arm.com> > wrote: >> On 04/01/17 16:40, jonsm...@gmail.com wrote: >>> On Wed, Jan 4, 2017 at 8:36 AM, André Przywara <andre.przyw...@arm.com> >&

[linux-sunxi] Re: [PATCH 3/5] arm64: dts: sun50i: add MMC nodes

On 03/01/17 13:28, Chen-Yu Tsai wrote: > On Tue, Jan 3, 2017 at 6:48 PM, André Przywara <andre.przyw...@arm.com> wrote: >> On 03/01/17 02:52, Chen-Yu Tsai wrote: Hi Chen-Yu, >>> On Tue, Jan 3, 2017 at 7:03 AM, Andre Przywara <andre.przyw...@arm.com> >&

Re: [U-Boot] [linux-sunxi] [PATCH v4 00/26] sunxi: Allwinner A64: SPL support

On 04/01/17 16:40, jonsm...@gmail.com wrote: > On Wed, Jan 4, 2017 at 8:36 AM, André Przywara <andre.przyw...@arm.com> wrote: >> >> On 04/01/17 11:25, Chen-Yu Tsai wrote: >>> On Wed, Jan 4, 2017 at 6:28 PM, Jagan Teki <ja...@openedev.com> wrote: >&g

[linux-sunxi] Re: [PATCH 1/5] drivers: mmc: sunxi: fix A64 calibration routine

On 05/01/17 17:47, Maxime Ripard wrote: Hi, > On Mon, Jan 02, 2017 at 11:03:42PM +, Andre Przywara wrote: >> The calibration facility in the A64 MMC block seems to have been >> misunderstood: the result value is not the value to program into the >> delay bits, but is the number of delay

Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC

On 05/01/17 22:42, Maxime Ripard wrote: > On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote: >> On Mon, Dec 26, 2016 at 3:33 PM, André Przywara <andre.przyw...@arm.com> >> wrote: >> >>> So while this patch technically looks correct, I was wonde

Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC

Hi, On 23/12/16 12:50, Icenowy Zheng wrote: > Based on the Allwinner H5 datasheet and the pinctrl driver of the > backward-compatible H3 this introduces the pin multiplex assignments for > the H5 SoC. > > H5 introduced some more pin functions (e.g. three more groups of TS > pins, and one more

[linux-sunxi] Re: [PATCH 05/17] SPL: FIT: allow loading multiple images

On 08/03/17 21:00, Simon Glass wrote: > Hi Andre, > > On 28 February 2017 at 19:25, Andre Przywara wrote: >> So far we were not using the FIT image format to its full potential: >> The SPL FIT loader was just loading the first image from the /images >> node plus one of

[linux-sunxi] Re: [PATCH 16/17] sunxi: Store the device tree name in the SPL header

On 08/03/17 21:01, Simon Glass wrote: Hi Simon, many thanks for the review, finally found some time to look at this. I have finished the needed rework (including documentation) and will post something after some testing and some sleep ;-) > On 28 February 2017 at 19:25, Andre Przywara

[linux-sunxi] Re: [PATCH 1/6] sunxi: makes an invisible option for H3-like DRAM controllers

On 13/03/17 17:50, Icenowy Zheng wrote: Hi Icenowy, as mentioned before, I like this patch. In general, can you rebase this series on top of sunxi/master? There are some rather easy conflicts due to the H5 support being merged in. One minor thing below... > Allwinner SoCs after H3 (e.g. A64,

[linux-sunxi] Re: [PATCH 2/6] sunxi: Rename bus-width related macros in H3 DRAM code

On 13/03/17 17:50, Icenowy Zheng wrote: > The DesignWare DRAM controller used by H3 and newer SoCs use a bit to > identify whether the DRAM is half-width. > > As H3 itself come with 32-bit DRAM, the two modes of the bit used to be > named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with

[linux-sunxi] Re: [PATCH 4/8] sunxi: add bank detection code to H3 DRAM initialization code

On 15/03/17 00:26, André Przywara wrote: > On 11/03/17 16:19, Icenowy Zheng wrote: >> Some DDR2 DRAM have only four banks, not eight. >> >> Add code to detect this situation. >> >> Signed-off-by: Icenowy Zheng <icen...@aosc.xyz> > Reviewed-by: And

[linux-sunxi] Re: [PATCH 5/8] sunxi: Add selective DRAM type and timing

On 11/03/17 16:19, Icenowy Zheng wrote: > DRAM chip varies, and one code cannot satisfy all DRAMs. > > Add options to select a timing set. > > Currently only DDR3-1333 (the original set) is added into it. Yes, separating the timings sounds like a good idea. Eventually we should move these

[linux-sunxi] Re: [PATCH 3/6] sunxi: add option for 16-bit DW DRAM controller

On 13/03/17 17:50, Icenowy Zheng wrote: Hi Icenowy, > Some Allwinner SoCs features a DesignWare-like controller with only 16 > bit bus width. > > Add support for them. > > Signed-off-by: Icenowy Zheng > --- > arch/arm/mach-sunxi/dram_sunxi_dw.c | 34

[linux-sunxi] Re: [PATCH 6/6] sunxi: enable dual rank detection in DesignWare-like DRAM code

On 13/03/17 17:50, Icenowy Zheng wrote: > The DesignWare-like DRAM code used to set the controller defaultly to > single rank mode, which makes it not able to detect the second rank. > > Set the default value to dual rank, thus the rank detection code can > work and finally the rank setting will

[linux-sunxi] Re: [PATCH 4/8] sunxi: add bank detection code to H3 DRAM initialization code

On 11/03/17 16:19, Icenowy Zheng wrote: > Some DDR2 DRAM have only four banks, not eight. > > Add code to detect this situation. > > Signed-off-by: Icenowy Zheng Reviewed-by: Andre Przywara Thanks, Andre. > --- > arch/arm/mach-sunxi/dram_sunxi_dw.c

[linux-sunxi] Re: [PATCH v4 04/18] dt-bindings: syscon: Add DT bindings documentation for Allwinner syscon

On 12/04/17 12:13, Corentin Labbe wrote: > This patch adds documentation for Device-Tree bindings for the > syscon present in allwinner devices. > > Signed-off-by: Corentin Labbe > --- > .../devicetree/bindings/misc/allwinner,syscon.txt | 19 > +++

Re: [U-Boot] [linux-sunxi] Re: [PATCH 14/17] sunxi: Pine64: defconfig: enable SPL FIT support

On 05/03/17 04:06, Jonathan Gray wrote: > On Fri, Mar 03, 2017 at 09:55:25AM +, Andre Przywara wrote: >> Hi, >> >> On 03/03/17 09:22, Maxime Ripard wrote: >>> On Thu, Mar 02, 2017 at 12:03:20AM +0800, Icenowy Zheng wrote: 2017???3???1??? 23:51??? Maxime Ripard

[linux-sunxi] Re: [PATCH 1/8] mailbox: introduce ARM SMC based mailbox

On 02/07/17 06:55, Jassi Brar wrote: Hi Jassi, thank you very much for having a look! > On Fri, Jun 30, 2017 at 3:26 PM, Andre Przywara > wrote: >> This mailbox driver implements a mailbox which signals transmitted data >> via an ARM smc (secure monitor call)

Re: [linux-sunxi] [PATCH 2/5] arm: allwinner: a64: drop the dummy vcc3v3 regulator in Pine64 DT

On 21/07/17 21:39, Maxime Ripard wrote: Hi Maxime, sorry for causing some frustration on your side. I am trying to answer to some of your comments. Just be aware that I am leaving for holidays in a few hours (and trying to stay away as much from computers as possible), so don't expect any

Re: [linux-sunxi] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC

On 02/07/17 15:17, Maxime Ripard wrote: Hi, > On Wed, Jun 07, 2017 at 03:06:55PM +0100, Marc Zyngier wrote: >>> If that is so fundamentally broken that this is the only benefit, I >>> guess we might as well use some old-style SMP ops. >> >> Broken, for sure. Which is why I'm asking about the

[linux-sunxi] Re: [PATCH] pinctrl: use non-devm kmalloc versions for free functions

On 12/05/17 18:14, Tony Lindgren wrote: > * Tony Lindgren [170512 08:39]: >> * Linus Walleij [170512 02:28]: >>> On Thu, May 11, 2017 at 4:20 PM, Andre Przywara >>> wrote: Linus, can you shed some light if this array

[linux-sunxi] Re: [PATCH 11/12] sunxi: add LPDDR3 timing from stock boot0

On 26/04/17 15:50, Icenowy Zheng wrote: > From: Icenowy Zheng > > As we added LPDDR3 support in the former patch, we need a set of timing > info to really enable it. > > Add the timing info used by stock boot0. When I checked the disassembly/decompile for the Pine64 libdram,

[linux-sunxi] Re: [PATCH 05/12] sunxi: Add selective DRAM type and timing

On 26/04/17 15:50, Icenowy Zheng wrote: > From: Icenowy Zheng > > DRAM chip varies, and one code cannot satisfy all DRAMs. > > Add options to select a timing set. > > Currently only DDR3-1333 (the original set) is added into it. Confirmed that this just moves the code, no

[linux-sunxi] Re: [PATCH v6 05/21] net-next: stmmac: Add dwmac-sun8i

On 31/05/17 08:18, Corentin Labbe wrote: > The dwmac-sun8i is a heavy hacked version of stmmac hardware by > allwinner. > In fact the only common part is the descriptor management and the first > register function. Hi, I know I am a bit late with this, but while adapting the U-Boot driver to the

Re: [linux-sunxi] [PATCH 1/3] arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support

On 25/05/17 20:26, Jagan Teki wrote: > From: Jagan Teki > > Orangepi Win/WinPlus is an open-source single-board computer > using the Allwinner A64 SOC. > > A64 Orangepi Win/WinPlus has > - A64 Quad-core Cortex-A53 64bit > - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM > - Debug

[linux-sunxi] Re: [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

Hi, On 26/04/17 15:50, Icenowy Zheng wrote: > The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM > chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card > detect pin of the MicroSD slot is broken, however, it doesn't matter as > the design of SoPine didn't allow

Re: [linux-sunxi] [PATCH v2] sun50i: a64: Add initial NanoPi A64 support

On 08/06/17 18:43, Jagan Teki wrote: Hi Jagan, > From: Jagan Teki > > NanoPi A64 is a new board of high performance with low cost > designed by FriendlyElec., using the Allwinner A64 SOC. > > Nanopi A64 features > - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz

[linux-sunxi] Re: [U-Boot] [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

Hi, On 02/06/17 19:32, Jagan Teki wrote: > On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng wrote: >> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM >> chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card >> detect pin of the MicroSD slot is

[linux-sunxi] Re: [U-Boot] [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

On 03/06/17 00:59, André Przywara wrote: > Hi, > > On 02/06/17 19:32, Jagan Teki wrote: >> On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng <icen...@aosc.io> wrote: >>> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM >>> chip, an AXP

[linux-sunxi] Re: [U-Boot] [PATCH 00/12] Big work on sunxi DW DRAM controllers and some new DDR type support

On 02/06/17 19:34, Jagan Teki wrote: > On Wed, Apr 26, 2017 at 8:19 PM, Icenowy Zheng wrote: >> This patchset contains several works on the sunxi DesignWare DRAM >> controllers. >> >> The 1st patch made an option for H3-like DRAM controllers >> (DesignWare ones), which can ease

[linux-sunxi] Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

On 06/07/17 10:23, Alexander Graf wrote: Hi, > On 07/06/2017 11:14 AM, Andre Przywara wrote: >> The UEFI spec allows an EFI system partition (ESP, with the bootloader or >> kernel EFI apps on it) to reside on a disk using a "legacy" MBR >> partitioning scheme. >> But in contrast to actual legacy

Re: [linux-sunxi] sunxi-tools v1.5 release

Hi, On 17/09/17 15:33, icen...@aosc.io wrote: > 在 2017-09-17 19:24，Siarhei Siamashka 写道： >> Hello All, >> >> The last version of sunxi-tools v1.4.2 has been released almost a year >> ago. So it's a high time to tag a new one soon. >> >> I propose to set a deadline for pull requests one week from

[linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

Salut, On 04/09/17 08:04, Maxime Ripard wrote: > On Fri, Sep 01, 2017 at 11:35:40PM +0100, André Przywara wrote: >> On 01/09/17 07:04, Maxime Ripard wrote: >>> On Fri, Sep 01, 2017 at 01:31:35AM +0100, Andre Przywara wrote: >>>> Hi, >>>> >>>>

[linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

On 01/09/17 07:04, Maxime Ripard wrote: > On Fri, Sep 01, 2017 at 01:31:35AM +0100, Andre Przywara wrote: >> Hi, >> >> On 31/08/17 00:36, Stefan Brüns wrote: >>> The A64 SoC has the same dma engine as the H3 (sun8i), with a >>> reduced amount of physical channels. Add the proper config data >>>

[linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

Hi, On 01/09/17 02:19, Stefan Bruens wrote: > On Freitag, 1. September 2017 02:31:35 CEST Andre Przywara wrote: >> Hi, >> >> On 31/08/17 00:36, Stefan Brüns wrote: >>> The A64 SoC has the same dma engine as the H3 (sun8i), with a >>> reduced amount of physical channels. Add the proper config data

[linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

On 02/09/17 03:02, Stefan Bruens wrote: > On Samstag, 2. September 2017 00:32:50 CEST André Przywara wrote: >> Hi, >> >> On 01/09/17 02:19, Stefan Bruens wrote: >>> On Freitag, 1. September 2017 02:31:35 CEST Andre Przywara wrote: >>>> Hi, >&

[linux-sunxi] Re: [PATCH 01/10] dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3

On 03/09/17 23:40, Stefan Brüns wrote: > The H83T uses a compatible string different from the A23, but requires A83T > the same clock autogating register setting. > > The H3 also requires setting the clock autogating register, but has > the register at a different offset. > > Some

[linux-sunxi] Re: [PATCH 08/10] dmaengine: sun6i: Add support for Allwinner A64 and compatibles

Hi, On 03/09/17 23:40, Stefan Brüns wrote: > The A64 SoC has the same dma engine as the H3 (sun8i), with a > reduced amount of physical channels. To allow future reuse of the > compatible, leave the channel count etc. in the config data blank > and retrieve it from the devicetree. > >

[linux-sunxi] Re: [PATCH 07/10] dmaengine: sun6i: Retrieve channel count/max request from devicetree

Hi, On 03/09/17 23:40, Stefan Brüns wrote: > To avoid introduction of a new compatible for each small SoC/DMA controller > variation, move the definition of the channel count to the devicetree. > > The number of vchans is no longer explicit, but limited by the highest > port/DMA request number.

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