[linux-sunxi] [PATCH v2 1/4] dt-bindings: Add bindings for USB3 phy on Allwinner H6

2019-10-24 Thread Ondrej Jirman
The new Allwinner H6 SoC contains a USB3 PHY that is wired to the
external USB3 pins of the SoC.

Add a device tree binding for the PHY.

Signed-off-by: Ondrej Jirman 
Acked-by: Maxime Ripard 
---
 .../phy/allwinner,sun50i-h6-usb3-phy.yaml | 47 +++
 1 file changed, 47 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml

diff --git 
a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml 
b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
new file mode 100644
index ..e5922b427342
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Ondrej Jirman 
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Allwinner H6 USB3 PHY
+
+maintainers:
+  - Ondrej Jirman 
+
+properties:
+  compatible:
+enum:
+  - allwinner,sun50i-h6-usb3-phy
+
+  reg:
+maxItems: 1
+
+  clocks:
+maxItems: 1
+
+  resets:
+maxItems: 1
+
+  "#phy-cells":
+const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+  - "#phy-cells"
+
+examples:
+  - |
+#include 
+#include 
+phy@521 {
+  compatible = "allwinner,sun50i-h6-usb3-phy";
+  reg = <0x521 0x1>;
+  clocks = <&ccu CLK_USB_PHY1>;
+  resets = <&ccu RST_USB_PHY1>;
+  #phy-cells = <0>;
+};
-- 
2.23.0

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[linux-sunxi] [PATCH v2 0/4] Add USB 3 support for H6 and Orange Pi 3

2019-10-24 Thread Ondrej Jirman
This series implements USB 3 support for Xunlong Orange Pi 3 board.

This is a re-hash of the Icenowy's earlier USB3 work[1] without code
that caused controversy previously. Orange Pi 3 board doesn't need vbus
supply to be dynamically enabled, so that code is not needed to support
USB3 on this board.

Most of patches are already reviewed. I've converted dt-bindings to yaml
format, and added the Orange Pi 3 board modifications.

Hopefully with this series we can get USB3 support into mainline for
Orange Pi 3, and build on it later to support more boards, where
supporting them is more complicated.

Please take a look.

thank you and regards,
  Ondrej Jirman

[1] https://lore.kernel.org/patchwork/patch/1058919/

Changes in v2:
- Added Maxime's Acked-By's
- Fixed title of DT bindings file

Changes since Icenowy v5 series:
- use earlier patches that did not include VBUS regulator/connector
  code
- converted dt bindings to yaml
- added patch to enable usb3 on Orange Pi 3

Icenowy Zheng (2):
  phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC
  arm64: dts: allwinner: h6: add USB3 device nodes

Ondrej Jirman (2):
  dt-bindings: Add bindings for USB3 phy on Allwinner H6
  arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support

 .../phy/allwinner,sun50i-h6-usb3-phy.yaml |  47 +
 .../dts/allwinner/sun50i-h6-orangepi-3.dts|   8 +
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |  32 +++
 drivers/phy/allwinner/Kconfig |  12 ++
 drivers/phy/allwinner/Makefile|   1 +
 drivers/phy/allwinner/phy-sun50i-usb3.c   | 195 ++
 6 files changed, 295 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
 create mode 100644 drivers/phy/allwinner/phy-sun50i-usb3.c

-- 
2.23.0

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[linux-sunxi] [PATCH v2 2/4] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

2019-10-24 Thread Ondrej Jirman
From: Icenowy Zheng 

Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also
controlled).

Add a driver for it.

The register operations in this driver is mainly extracted from the BSP
USB3 driver.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
Acked-by: Maxime Ripard 
---
 drivers/phy/allwinner/Kconfig   |  12 ++
 drivers/phy/allwinner/Makefile  |   1 +
 drivers/phy/allwinner/phy-sun50i-usb3.c | 195 
 3 files changed, 208 insertions(+)
 create mode 100644 drivers/phy/allwinner/phy-sun50i-usb3.c

diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig
index 215425296c77..fcae35ddd430 100644
--- a/drivers/phy/allwinner/Kconfig
+++ b/drivers/phy/allwinner/Kconfig
@@ -45,3 +45,15 @@ config PHY_SUN9I_USB
  sun9i SoCs.
 
  This driver controls each individual USB 2 host PHY.
+
+config PHY_SUN50I_USB3
+   tristate "Allwinner sun50i SoC USB3 PHY driver"
+   depends on ARCH_SUNXI && HAS_IOMEM && OF
+   depends on RESET_CONTROLLER
+   select USB_COMMON
+   select GENERIC_PHY
+   help
+ Enable this to support the USB3.0-capable transceiver that is
+ part of some Allwinner sun50i SoCs.
+
+ This driver controls each individual USB 2+3 host PHY combo.
diff --git a/drivers/phy/allwinner/Makefile b/drivers/phy/allwinner/Makefile
index 799a65c0b58d..bd74901a1255 100644
--- a/drivers/phy/allwinner/Makefile
+++ b/drivers/phy/allwinner/Makefile
@@ -2,3 +2,4 @@
 obj-$(CONFIG_PHY_SUN4I_USB)+= phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SUN6I_MIPI_DPHY)  += phy-sun6i-mipi-dphy.o
 obj-$(CONFIG_PHY_SUN9I_USB)+= phy-sun9i-usb.o
+obj-$(CONFIG_PHY_SUN50I_USB3)  += phy-sun50i-usb3.o
diff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c 
b/drivers/phy/allwinner/phy-sun50i-usb3.c
new file mode 100644
index ..8e170a4d0a11
--- /dev/null
+++ b/drivers/phy/allwinner/phy-sun50i-usb3.c
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Allwinner sun50i(H6) USB 3.0 phy driver
+ *
+ * Copyright (C) 2017 Icenowy Zheng 
+ *
+ * Based on phy-sun9i-usb.c, which is:
+ *
+ * Copyright (C) 2014-2015 Chen-Yu Tsai 
+ *
+ * Based on code from Allwinner BSP, which is:
+ *
+ * Copyright (c) 2010-2015 Allwinner Technology Co., Ltd.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Interface Status and Control Registers */
+#define SUNXI_ISCR 0x00
+#define SUNXI_PIPE_CLOCK_CONTROL   0x14
+#define SUNXI_PHY_TUNE_LOW 0x18
+#define SUNXI_PHY_TUNE_HIGH0x1c
+#define SUNXI_PHY_EXTERNAL_CONTROL 0x20
+
+/* USB2.0 Interface Status and Control Register */
+#define SUNXI_ISCR_FORCE_VBUS  (3 << 12)
+
+/* PIPE Clock Control Register */
+#define SUNXI_PCC_PIPE_CLK_OPEN(1 << 6)
+
+/* PHY External Control Register */
+#define SUNXI_PEC_EXTERN_VBUS  (3 << 1)
+#define SUNXI_PEC_SSC_EN   (1 << 24)
+#define SUNXI_PEC_REF_SSP_EN   (1 << 26)
+
+/* PHY Tune High Register */
+#define SUNXI_TX_DEEMPH_3P5DB(n)   ((n) << 19)
+#define SUNXI_TX_DEEMPH_3P5DB_MASK GENMASK(24, 19)
+#define SUNXI_TX_DEEMPH_6DB(n) ((n) << 13)
+#define SUNXI_TX_DEEMPH_6GB_MASK   GENMASK(18, 13)
+#define SUNXI_TX_SWING_FULL(n) ((n) << 6)
+#define SUNXI_TX_SWING_FULL_MASK   GENMASK(12, 6)
+#define SUNXI_LOS_BIAS(n)  ((n) << 3)
+#define SUNXI_LOS_BIAS_MASKGENMASK(5, 3)
+#define SUNXI_TXVBOOSTLVL(n)   ((n) << 0)
+#define SUNXI_TXVBOOSTLVL_MASK GENMASK(0, 2)
+
+struct sun50i_usb3_phy {
+   struct phy *phy;
+   void __iomem *regs;
+   struct reset_control *reset;
+   struct clk *clk;
+};
+
+static void sun50i_usb3_phy_open(struct sun50i_usb3_phy *phy)
+{
+   u32 val;
+
+   val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
+   val |= SUNXI_PEC_EXTERN_VBUS;
+   val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN;
+   writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
+
+   val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
+   val |= SUNXI_PCC_PIPE_CLK_OPEN;
+   writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
+
+   val = readl(phy->regs + SUNXI_ISCR);
+   val |= SUNXI_ISCR_FORCE_VBUS;
+   writel(val, phy->regs + SUNXI_ISCR);
+
+   /*
+* All the magic numbers written to the PHY_TUNE_{LOW_HIGH}
+* registers are directly taken from the BSP USB3 driver from
+* Allwiner.
+*/
+   writel(0x0047fc87, phy->regs + SUNXI_PHY_TUNE_LOW);
+
+   val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
+   val &= ~(SUNXI_TXVBOOSTLVL_MASK | SUNXI_LOS_BIAS_MASK |
+SUNXI_TX_SWING_FULL_MASK | SUNXI_TX_DEEMPH_6GB_MASK |
+SUNXI_TX_DEEMPH_3P5DB_MASK);

[linux-sunxi] [PATCH v2 3/4] arm64: dts: allwinner: h6: add USB3 device nodes

2019-10-24 Thread Ondrej Jirman
From: Icenowy Zheng 

Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and
a custom PHY.

Add device tree nodes for them.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 0d5ea19336a1..80233db478e6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -537,6 +537,38 @@
status = "disabled";
};
 
+   dwc3: dwc3@520 {
+   compatible = "snps,dwc3";
+   reg = <0x0520 0x1>;
+   interrupts = ;
+   clocks = <&ccu CLK_BUS_XHCI>,
+<&ccu CLK_BUS_XHCI>,
+<&rtc 0>;
+   clock-names = "ref", "bus_early", "suspend";
+   resets = <&ccu RST_BUS_XHCI>;
+   /*
+* The datasheet of the chip doesn't declare the
+* peripheral function, and there's no boards known
+* to have a USB Type-B port routed to the port.
+* In addition, no one has tested the peripheral
+* function yet.
+* So set the dr_mode to "host" in the DTSI file.
+*/
+   dr_mode = "host";
+   phys = <&usb3phy>;
+   phy-names = "usb3-phy";
+   status = "disabled";
+   };
+
+   usb3phy: phy@521 {
+   compatible = "allwinner,sun50i-h6-usb3-phy";
+   reg = <0x521 0x1>;
+   clocks = <&ccu CLK_USB_PHY1>;
+   resets = <&ccu RST_USB_PHY1>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
ehci3: usb@5311000 {
compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
reg = <0x05311000 0x100>;
-- 
2.23.0

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[linux-sunxi] [PATCH v2 4/4] arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support

2019-10-24 Thread Ondrej Jirman
Enable Allwinner's USB 3.0 phy and the host controller. Orange Pi 3
board has GL3510 USB 3.0 4-port hub connected to the SoC's USB 3.0
port. All four ports are exposed via USB3-A connectors. VBUS is
always on, since it's powered directly from DCIN (VCC-5V) and
not switchable.

Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index eb379cd402ac..259af5b0f1a7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -94,6 +94,10 @@
status = "okay";
 };
 
+&dwc3 {
+   status = "okay";
+};
+
 &ehci0 {
status = "okay";
 };
@@ -285,3 +289,7 @@
usb3_vbus-supply = <®_vcc5v>;
status = "okay";
 };
+
+&usb3phy {
+   status = "okay";
+};
-- 
2.23.0

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[linux-sunxi] [PATCH] drm: sun4i: Add support for suspending the display driver

2019-10-28 Thread Ondrej Jirman
Shut down the display engine during suspend.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/sun4i/sun4i_drv.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index a5757b11b730..c519d7cfcf43 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -346,6 +346,27 @@ static int sun4i_drv_add_endpoints(struct device *dev,
return count;
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int sun4i_drv_drm_sys_suspend(struct device *dev)
+{
+struct drm_device *drm = dev_get_drvdata(dev);
+
+return drm_mode_config_helper_suspend(drm);
+}
+
+static int sun4i_drv_drm_sys_resume(struct device *dev)
+{
+struct drm_device *drm = dev_get_drvdata(dev);
+
+return drm_mode_config_helper_resume(drm);
+}
+#endif
+
+static const struct dev_pm_ops sun4i_drv_drm_pm_ops = {
+SET_SYSTEM_SLEEP_PM_OPS(sun4i_drv_drm_sys_suspend,
+sun4i_drv_drm_sys_resume)
+};
+
 static int sun4i_drv_probe(struct platform_device *pdev)
 {
struct component_match *match = NULL;
@@ -418,6 +439,7 @@ static struct platform_driver sun4i_drv_platform_driver = {
.driver = {
.name   = "sun4i-drm",
.of_match_table = sun4i_drv_of_table,
+   .pm = &sun4i_drv_drm_pm_ops,
},
 };
 module_platform_driver(sun4i_drv_platform_driver);
-- 
2.23.0

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[linux-sunxi] [PATCH] ARM: sunxi: Fix CPU powerdown on A83T

2019-10-28 Thread Ondrej Jirman
PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this
patch, instead of gating the CPU0, the whole cluster was power gated,
when shutting down first CPU in the cluster.

Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T")
Signed-off-by: Ondrej Jirman 
Cc: sta...@vger.kernel.org
---
 arch/arm/mach-sunxi/mc_smp.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c
index 239084cf8192..26cbce135338 100644
--- a/arch/arm/mach-sunxi/mc_smp.c
+++ b/arch/arm/mach-sunxi/mc_smp.c
@@ -481,14 +481,18 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu)
 static int sunxi_cpu_powerdown(unsigned int cpu, unsigned int cluster)
 {
u32 reg;
+   int gating_bit = cpu;
 
pr_debug("%s: cluster %u cpu %u\n", __func__, cluster, cpu);
if (cpu >= SUNXI_CPUS_PER_CLUSTER || cluster >= SUNXI_NR_CLUSTERS)
return -EINVAL;
 
+   if (is_a83t && cpu == 0)
+   gating_bit = 4;
+
/* gate processor power */
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
-   reg |= PRCM_PWROFF_GATING_REG_CORE(cpu);
+   reg |= PRCM_PWROFF_GATING_REG_CORE(gating_bit);
writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
udelay(20);
 
-- 
2.23.0

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[linux-sunxi] [PATCH] ARM: dts: sun8i-a83t-tbs-a711: Fix WiFi resume from suspend

2019-10-28 Thread Ondrej Jirman
Without enabling keep-power-in-suspend, we can't wake the device
up using WOL packet, and the log is flooded with these messages
on resume:

sunxi-mmc 1c1.mmc: send stop command failed
sunxi-mmc 1c1.mmc: data error, sending stop command
sunxi-mmc 1c1.mmc: send stop command failed
sunxi-mmc 1c1.mmc: data error, sending stop command

So to make the WiFi really a wakeup-source, we need to keep it powered
during suspend.

Fixes: 0e23372080def7 ("arm: dts: sun8i: Add the TBS A711 tablet devicetree")
Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 43b21599898e..5b8c9c24350b 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -311,6 +311,7 @@
vqmmc-supply = <®_dldo1>;
non-removable;
wakeup-source;
+   keep-power-in-suspend;
status = "okay";
 
brcmf: wifi@1 {
-- 
2.23.0

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[linux-sunxi] [PATCH] input: sun4i-lradc-keys: Add wakup support

2019-10-28 Thread Ondrej Jirman
Allow the driver to wakeup the system on key press.

Signed-off-by: Ondrej Jirman 
---
 drivers/input/keyboard/sun4i-lradc-keys.c | 22 ++
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/input/keyboard/sun4i-lradc-keys.c 
b/drivers/input/keyboard/sun4i-lradc-keys.c
index 4a796bed48ac..bba679d7b54b 100644
--- a/drivers/input/keyboard/sun4i-lradc-keys.c
+++ b/drivers/input/keyboard/sun4i-lradc-keys.c
@@ -22,6 +22,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -226,8 +228,7 @@ static int sun4i_lradc_probe(struct platform_device *pdev)
 {
struct sun4i_lradc_data *lradc;
struct device *dev = &pdev->dev;
-   int i;
-   int error;
+   int i, error, irq;
 
lradc = devm_kzalloc(dev, sizeof(struct sun4i_lradc_data), GFP_KERNEL);
if (!lradc)
@@ -272,8 +273,13 @@ static int sun4i_lradc_probe(struct platform_device *pdev)
if (IS_ERR(lradc->base))
return PTR_ERR(lradc->base);
 
-   error = devm_request_irq(dev, platform_get_irq(pdev, 0),
-sun4i_lradc_irq, 0,
+   irq = platform_get_irq(pdev, 0);
+   if (irq < 0) {
+   dev_err(&pdev->dev, "Failed to get IRQ\n");
+   return irq;
+   }
+
+   error = devm_request_irq(dev, irq, sun4i_lradc_irq, 0,
 "sun4i-a10-lradc-keys", lradc);
if (error)
return error;
@@ -282,6 +288,14 @@ static int sun4i_lradc_probe(struct platform_device *pdev)
if (error)
return error;
 
+   device_init_wakeup(dev, true);
+
+   error = dev_pm_set_wake_irq(dev, irq);
+   if (error) {
+   dev_err(dev, "Could not set wake IRQ\n");
+   return error;
+   }
+
return 0;
 }
 
-- 
2.23.0

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[linux-sunxi] [PATCH 0/3] Add touchscreen support for TBS A711 Tablet

2019-10-28 Thread Ondrej Jirman
This is a resurrection of https://lkml.org/lkml/2018/7/25/143

Compared to v4 of Mylène's series I've dropped all attempts to
power off the chip during suspend. This patch just enables the
regulator during probe and disables it on driver rmmod.

I've tested the driver with suspend/resume and touching the
panel resumes my soc.

Please take a look.

thank you and regards,
  Ondrej Jirman


Changes since v4 of Mylène's series:
- slight whitespace improvements
- drop all modifications of suspend/resume hooks
- drop useless header include
- split the dt-bindings into a separate patch

Mylène Josserand (2):
  input: edt-ft5x06: Add support for regulator
  arm: dts: sun8i: a83t: a711: Add touchscreen node

Ondrej Jirman (1):
  dt-bindings: input: edt-ft5x06: Add regulator support

 .../bindings/input/touchscreen/edt-ft5x06.txt |  1 +
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 16 ++
 drivers/input/touchscreen/edt-ft5x06.c| 30 +++
 3 files changed, 47 insertions(+)

-- 
2.23.0

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[linux-sunxi] [PATCH 3/3] arm: dts: sun8i: a83t: a711: Add touchscreen node

2019-10-28 Thread Ondrej Jirman
From: Mylène Josserand 

Enable a FocalTech EDT-FT5x06 Polytouch touchscreen.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Mylène Josserand 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 568b90ece342..19f520252dc5 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -164,6 +164,22 @@
status = "okay";
 };
 
+&i2c0 {
+   clock-frequency = <40>;
+   status = "okay";
+
+   touchscreen@38 {
+   compatible = "edt,edt-ft5x06";
+   reg = <0x38>;
+   interrupt-parent = <&r_pio>;
+   interrupts = <0 7 IRQ_TYPE_EDGE_FALLING>; /* PL7 */
+   reset-gpios = <&pio 3 5 GPIO_ACTIVE_LOW>; /* PD5 */
+   vcc-supply = <®_ldo_io0>;
+   touchscreen-size-x = <1024>;
+   touchscreen-size-y = <600>;
+   };
+};
+
 &i2c1 {
clock-frequency = <40>;
status = "okay";
-- 
2.23.0

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[linux-sunxi] [PATCH 2/3] dt-bindings: input: edt-ft5x06: Add regulator support

2019-10-28 Thread Ondrej Jirman
Touch controller may have an optional regulator.

Reviewed-by: Rob Herring 
Signed-off-by: Ondrej Jirman 
---
 .../devicetree/bindings/input/touchscreen/edt-ft5x06.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt 
b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
index 870b8c5cce9b..0f6950073d6f 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
@@ -30,6 +30,7 @@ Required properties:
 Optional properties:
  - reset-gpios: GPIO specification for the RESET input
  - wake-gpios:  GPIO specification for the WAKE input
+ - vcc-supply:  Regulator that supplies the touchscreen
 
  - pinctrl-names: should be "default"
  - pinctrl-0:   a phandle pointing to the pin settings for the
-- 
2.23.0

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[linux-sunxi] [PATCH 1/3] input: edt-ft5x06: Add support for regulator

2019-10-28 Thread Ondrej Jirman
From: Mylène Josserand 

Add the support for enabling optional regulator that may be used as VCC
source.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Mylène Josserand 
---
 drivers/input/touchscreen/edt-ft5x06.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/input/touchscreen/edt-ft5x06.c 
b/drivers/input/touchscreen/edt-ft5x06.c
index 5525f1fb1526..d61731c0037d 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define WORK_REGISTER_THRESHOLD0x00
 #define WORK_REGISTER_REPORT_RATE  0x08
@@ -88,6 +89,7 @@ struct edt_ft5x06_ts_data {
struct touchscreen_properties prop;
u16 num_x;
u16 num_y;
+   struct regulator *vcc;
 
struct gpio_desc *reset_gpio;
struct gpio_desc *wake_gpio;
@@ -1036,6 +1038,13 @@ edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata)
}
 }
 
+static void edt_ft5x06_disable_regulator(void *arg)
+{
+   struct edt_ft5x06_ts_data *data = arg;
+
+   regulator_disable(data->vcc);
+}
+
 static int edt_ft5x06_ts_probe(struct i2c_client *client,
 const struct i2c_device_id *id)
 {
@@ -1064,6 +1073,27 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
 
tsdata->max_support_points = chip_data->max_support_points;
 
+   tsdata->vcc = devm_regulator_get(&client->dev, "vcc");
+   if (IS_ERR(tsdata->vcc)) {
+   error = PTR_ERR(tsdata->vcc);
+   if (error != -EPROBE_DEFER)
+   dev_err(&client->dev,
+   "failed to request regulator: %d\n", error);
+   return error;
+   }
+
+   error = regulator_enable(tsdata->vcc);
+   if (error < 0) {
+   dev_err(&client->dev, "failed to enable vcc: %d\n", error);
+   return error;
+   }
+
+   error = devm_add_action_or_reset(&client->dev,
+edt_ft5x06_disable_regulator,
+tsdata);
+   if (error)
+   return error;
+
tsdata->reset_gpio = devm_gpiod_get_optional(&client->dev,
 "reset", GPIOD_OUT_HIGH);
if (IS_ERR(tsdata->reset_gpio)) {
-- 
2.23.0

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[linux-sunxi] [PATCH v2] drm: sun4i: Add support for suspending the display driver

2019-10-29 Thread Ondrej Jirman
Shut down the display engine during suspend.

Signed-off-by: Ondrej Jirman 
---
Changes in v2:
- spaces -> tabs

 drivers/gpu/drm/sun4i/sun4i_drv.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index a5757b11b730..c519d7cfcf43 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -346,6 +346,27 @@ static int sun4i_drv_add_endpoints(struct device *dev,
return count;
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int sun4i_drv_drm_sys_suspend(struct device *dev)
+{
+   struct drm_device *drm = dev_get_drvdata(dev);
+
+   return drm_mode_config_helper_suspend(drm);
+}
+
+static int sun4i_drv_drm_sys_resume(struct device *dev)
+{
+   struct drm_device *drm = dev_get_drvdata(dev);
+
+   return drm_mode_config_helper_resume(drm);
+}
+#endif
+
+static const struct dev_pm_ops sun4i_drv_drm_pm_ops = {
+   SET_SYSTEM_SLEEP_PM_OPS(sun4i_drv_drm_sys_suspend,
+   sun4i_drv_drm_sys_resume)
+};
+
 static int sun4i_drv_probe(struct platform_device *pdev)
 {
struct component_match *match = NULL;
@@ -418,6 +439,7 @@ static struct platform_driver sun4i_drv_platform_driver = {
.driver = {
.name   = "sun4i-drm",
.of_match_table = sun4i_drv_of_table,
+   .pm = &sun4i_drv_drm_pm_ops,
},
 };
 module_platform_driver(sun4i_drv_platform_driver);
-- 
2.23.0

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[linux-sunxi] [PATCH v3 2/4] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

2019-10-29 Thread Ondrej Jirman
From: Icenowy Zheng 

Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also
controlled).

Add a driver for it.

The register operations in this driver is mainly extracted from the BSP
USB3 driver.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
Acked-by: Maxime Ripard 
---
 drivers/phy/allwinner/Kconfig   |  11 ++
 drivers/phy/allwinner/Makefile  |   1 +
 drivers/phy/allwinner/phy-sun50i-usb3.c | 190 
 3 files changed, 202 insertions(+)
 create mode 100644 drivers/phy/allwinner/phy-sun50i-usb3.c

diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig
index 215425296c77..3dab79e9d52b 100644
--- a/drivers/phy/allwinner/Kconfig
+++ b/drivers/phy/allwinner/Kconfig
@@ -45,3 +45,14 @@ config PHY_SUN9I_USB
  sun9i SoCs.
 
  This driver controls each individual USB 2 host PHY.
+
+config PHY_SUN50I_USB3
+   tristate "Allwinner H6 SoC USB3 PHY driver"
+   depends on ARCH_SUNXI && HAS_IOMEM && OF
+   depends on RESET_CONTROLLER
+   select GENERIC_PHY
+   help
+ Enable this to support the USB3.0-capable transceiver that is
+ part of Allwinner H6 SoC.
+
+ This driver controls each individual USB 2+3 host PHY combo.
diff --git a/drivers/phy/allwinner/Makefile b/drivers/phy/allwinner/Makefile
index 799a65c0b58d..bd74901a1255 100644
--- a/drivers/phy/allwinner/Makefile
+++ b/drivers/phy/allwinner/Makefile
@@ -2,3 +2,4 @@
 obj-$(CONFIG_PHY_SUN4I_USB)+= phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SUN6I_MIPI_DPHY)  += phy-sun6i-mipi-dphy.o
 obj-$(CONFIG_PHY_SUN9I_USB)+= phy-sun9i-usb.o
+obj-$(CONFIG_PHY_SUN50I_USB3)  += phy-sun50i-usb3.o
diff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c 
b/drivers/phy/allwinner/phy-sun50i-usb3.c
new file mode 100644
index ..1169f3e83a6f
--- /dev/null
+++ b/drivers/phy/allwinner/phy-sun50i-usb3.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Allwinner sun50i(H6) USB 3.0 phy driver
+ *
+ * Copyright (C) 2017 Icenowy Zheng 
+ *
+ * Based on phy-sun9i-usb.c, which is:
+ *
+ * Copyright (C) 2014-2015 Chen-Yu Tsai 
+ *
+ * Based on code from Allwinner BSP, which is:
+ *
+ * Copyright (c) 2010-2015 Allwinner Technology Co., Ltd.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Interface Status and Control Registers */
+#define SUNXI_ISCR 0x00
+#define SUNXI_PIPE_CLOCK_CONTROL   0x14
+#define SUNXI_PHY_TUNE_LOW 0x18
+#define SUNXI_PHY_TUNE_HIGH0x1c
+#define SUNXI_PHY_EXTERNAL_CONTROL 0x20
+
+/* USB2.0 Interface Status and Control Register */
+#define SUNXI_ISCR_FORCE_VBUS  (3 << 12)
+
+/* PIPE Clock Control Register */
+#define SUNXI_PCC_PIPE_CLK_OPEN(1 << 6)
+
+/* PHY External Control Register */
+#define SUNXI_PEC_EXTERN_VBUS  (3 << 1)
+#define SUNXI_PEC_SSC_EN   (1 << 24)
+#define SUNXI_PEC_REF_SSP_EN   (1 << 26)
+
+/* PHY Tune High Register */
+#define SUNXI_TX_DEEMPH_3P5DB(n)   ((n) << 19)
+#define SUNXI_TX_DEEMPH_3P5DB_MASK GENMASK(24, 19)
+#define SUNXI_TX_DEEMPH_6DB(n) ((n) << 13)
+#define SUNXI_TX_DEEMPH_6GB_MASK   GENMASK(18, 13)
+#define SUNXI_TX_SWING_FULL(n) ((n) << 6)
+#define SUNXI_TX_SWING_FULL_MASK   GENMASK(12, 6)
+#define SUNXI_LOS_BIAS(n)  ((n) << 3)
+#define SUNXI_LOS_BIAS_MASKGENMASK(5, 3)
+#define SUNXI_TXVBOOSTLVL(n)   ((n) << 0)
+#define SUNXI_TXVBOOSTLVL_MASK GENMASK(0, 2)
+
+struct sun50i_usb3_phy {
+   struct phy *phy;
+   void __iomem *regs;
+   struct reset_control *reset;
+   struct clk *clk;
+};
+
+static void sun50i_usb3_phy_open(struct sun50i_usb3_phy *phy)
+{
+   u32 val;
+
+   val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
+   val |= SUNXI_PEC_EXTERN_VBUS;
+   val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN;
+   writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
+
+   val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
+   val |= SUNXI_PCC_PIPE_CLK_OPEN;
+   writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
+
+   val = readl(phy->regs + SUNXI_ISCR);
+   val |= SUNXI_ISCR_FORCE_VBUS;
+   writel(val, phy->regs + SUNXI_ISCR);
+
+   /*
+* All the magic numbers written to the PHY_TUNE_{LOW_HIGH}
+* registers are directly taken from the BSP USB3 driver from
+* Allwiner.
+*/
+   writel(0x0047fc87, phy->regs + SUNXI_PHY_TUNE_LOW);
+
+   val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
+   val &= ~(SUNXI_TXVBOOSTLVL_MASK | SUNXI_LOS_BIAS_MASK |
+SUNXI_TX_SWING_FULL_MASK | SUNXI_TX_DEEMPH_6GB_MASK |
+SUNXI_TX_DEEMPH_3P5DB_MASK);
+   val |= SUNXI_TXVBOOSTLVL(0x7);
+  

[linux-sunxi] [PATCH v3 1/4] dt-bindings: Add bindings for USB3 phy on Allwinner H6

2019-10-29 Thread Ondrej Jirman
The new Allwinner H6 SoC contains a USB3 PHY that is wired to the
external USB3 pins of the SoC.

Add a device tree binding for the PHY.

Signed-off-by: Ondrej Jirman 
Acked-by: Maxime Ripard 
Reviewed-by: Rob Herring 
---
 .../phy/allwinner,sun50i-h6-usb3-phy.yaml | 47 +++
 1 file changed, 47 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml

diff --git 
a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml 
b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
new file mode 100644
index ..e5922b427342
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Ondrej Jirman 
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Allwinner H6 USB3 PHY
+
+maintainers:
+  - Ondrej Jirman 
+
+properties:
+  compatible:
+enum:
+  - allwinner,sun50i-h6-usb3-phy
+
+  reg:
+maxItems: 1
+
+  clocks:
+maxItems: 1
+
+  resets:
+maxItems: 1
+
+  "#phy-cells":
+const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+  - "#phy-cells"
+
+examples:
+  - |
+#include 
+#include 
+phy@521 {
+  compatible = "allwinner,sun50i-h6-usb3-phy";
+  reg = <0x521 0x1>;
+  clocks = <&ccu CLK_USB_PHY1>;
+  resets = <&ccu RST_USB_PHY1>;
+  #phy-cells = <0>;
+};
-- 
2.23.0

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[linux-sunxi] [PATCH v3 4/4] arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support

2019-10-29 Thread Ondrej Jirman
Enable Allwinner's USB 3.0 phy and the host controller. Orange Pi 3
board has GL3510 USB 3.0 4-port hub connected to the SoC's USB 3.0
port. All four ports are exposed via USB3-A connectors. VBUS is
always on, since it's powered directly from DCIN (VCC-5V) and
not switchable.

Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 2557cc6c8d50..32800204c22a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -95,6 +95,10 @@
status = "okay";
 };
 
+&dwc3 {
+   status = "okay";
+};
+
 &ehci0 {
status = "okay";
 };
@@ -304,3 +308,7 @@
usb3_vbus-supply = <®_vcc5v>;
status = "okay";
 };
+
+&usb3phy {
+   status = "okay";
+};
-- 
2.23.0

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[linux-sunxi] [PATCH v3 0/4] Add USB 3 support for H6 and Orange Pi 3

2019-10-29 Thread Ondrej Jirman
This series implements USB 3 support for Xunlong Orange Pi 3 board.

This is a re-hash of the Icenowy's earlier USB3 work[1] without code
that caused controversy previously. Orange Pi 3 board doesn't need vbus
supply to be dynamically enabled, so that code is not needed to support
USB3 on this board.

Most of patches are already reviewed. I've converted dt-bindings to yaml
format, and added the Orange Pi 3 board modifications.

Hopefully with this series we can get USB3 support into mainline for
Orange Pi 3, and build on it later to support more boards, where
supporting them is more complicated.

Please take a look.

thank you and regards,
  Ondrej Jirman

[1] https://lore.kernel.org/patchwork/patch/1058919/

Changes in v3:
- Added DT reviewed-by tag
- more sun50i / H6 name clarifications (Kconfig, ...)
- dropped USB_COMMON and linux/usb/of.h

Changes in v2:
- Added Maxime's Acked-By's
- Fixed title of DT bindings file

Changes since Icenowy v5 series:
- use earlier patches that did not include VBUS regulator/connector
  code
- converted dt bindings to yaml
- added patch to enable usb3 on Orange Pi 3

Icenowy Zheng (2):
  phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC
  arm64: dts: allwinner: h6: add USB3 device nodes

Ondrej Jirman (2):
  dt-bindings: Add bindings for USB3 phy on Allwinner H6
  arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support

 .../phy/allwinner,sun50i-h6-usb3-phy.yaml |  47 +
 .../dts/allwinner/sun50i-h6-orangepi-3.dts|   8 +
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |  32 +++
 drivers/phy/allwinner/Kconfig |  11 +
 drivers/phy/allwinner/Makefile|   1 +
 drivers/phy/allwinner/phy-sun50i-usb3.c   | 190 ++
 6 files changed, 289 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml
 create mode 100644 drivers/phy/allwinner/phy-sun50i-usb3.c

-- 
2.23.0

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[linux-sunxi] [PATCH v3 3/4] arm64: dts: allwinner: h6: add USB3 device nodes

2019-10-29 Thread Ondrej Jirman
From: Icenowy Zheng 

Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and
a custom PHY.

Add device tree nodes for them.

Signed-off-by: Ondrej Jirman 
Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 5d7ab540b950..9dbe63bf5a77 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -547,6 +547,38 @@
status = "disabled";
};
 
+   dwc3: dwc3@520 {
+   compatible = "snps,dwc3";
+   reg = <0x0520 0x1>;
+   interrupts = ;
+   clocks = <&ccu CLK_BUS_XHCI>,
+<&ccu CLK_BUS_XHCI>,
+<&rtc 0>;
+   clock-names = "ref", "bus_early", "suspend";
+   resets = <&ccu RST_BUS_XHCI>;
+   /*
+* The datasheet of the chip doesn't declare the
+* peripheral function, and there's no boards known
+* to have a USB Type-B port routed to the port.
+* In addition, no one has tested the peripheral
+* function yet.
+* So set the dr_mode to "host" in the DTSI file.
+*/
+   dr_mode = "host";
+   phys = <&usb3phy>;
+   phy-names = "usb3-phy";
+   status = "disabled";
+   };
+
+   usb3phy: phy@521 {
+   compatible = "allwinner,sun50i-h6-usb3-phy";
+   reg = <0x521 0x1>;
+   clocks = <&ccu CLK_USB_PHY1>;
+   resets = <&ccu RST_USB_PHY1>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
ehci3: usb@5311000 {
compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
reg = <0x05311000 0x100>;
-- 
2.23.0

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[linux-sunxi] [PATCH] cpufreq: sun50i: Fix CPU speed bin detection

2019-10-31 Thread Ondrej Jirman
I have failures to boot on Orange Pi 3, because this driver determined
that my SoC is from the normal bin, but my SoC only works reliably with
the OPP values for the slowest bin.

Looking at BSP code, I found that efuse values have following meanings
on H6:

- 0b000 invalid (interpreted in vendor's BSP as normal bin)
- 0b001 slowest bin
- 0b011 normal bin
- 0b111 fastest bin

Let's play it safe and interpret 0 as the slowest bin, but fix detection
of other bins to match vendor code.

Fixes: f328584f7bff ("cpufreq: Add sun50i nvmem based CPU scaling driver")
Signed-off-by: Ondrej Jirman 
---

See 
https://megous.com/git/linux/tree/drivers/soc/sunxi/sunxi-sid.c?h=h6-4.9-bsp#n484
and 
https://megous.com/git/linux/tree/drivers/cpufreq/sunxi-cpufreq.c?h=h6-4.9-bsp#n428
(1 is substracted from soc_bin number here!)

 drivers/cpufreq/sun50i-cpufreq-nvmem.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c 
b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
index df35ef3ef567..41dad03e245c 100644
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
@@ -71,9 +71,12 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
switch (efuse_value) {
case 0b0001:
-   *versions = 1;
+   *versions = 0;
break;
case 0b0011:
+   *versions = 1;
+   break;
+   case 0b0111:
*versions = 2;
break;
default:
-- 
2.23.0

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[linux-sunxi] [PATCH v2] cpufreq: sun50i: Fix CPU speed bin detection

2019-11-01 Thread Ondrej Jirman
I have observed failures to boot on Orange Pi 3, because this driver
determined that my SoC is from the normal bin, but my SoC only works
reliably with the OPP values for the slowest bin.

By querying H6 owners, it was found that e-fuse values found in the wild
are in the range of 1-3, value of 7 was not reported, yet. From this and
from unused defines in BSP code, it can be assumed that meaning of efuse
values on H6 actually is:

- 1 = slowest bin
- 2 = normal bin
- 3 = fastest bin

Vendor code actually treats 0 and 2 as invalid efuse values, but later
treats all invalid values as a normal bin. This looks like a mistake in
bin detection code, that was plastered over by a hack in cpufreq code,
so let's not repeat it here. It probably only works because there are no
SoCs in the wild with efuse value of 0, and fast bin SoCs are made to
use normal bin OPP tables, which is also safe.

Let's play it safe and interpret 0 as the slowest bin, but fix detection
of other bins to match this research. More research will be done before
actual OPP tables are merged.

Fixes: f328584f7bff ("cpufreq: Add sun50i nvmem based CPU scaling driver")
Signed-off-by: Ondrej Jirman 
---

 See also https://lkml.org/lkml/2019/11/1/496

 drivers/cpufreq/sun50i-cpufreq-nvmem.c | 25 ++---
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c 
b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
index eca32e443716..9907a165135b 100644
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
@@ -25,7 +25,7 @@
 static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
 
 /**
- * sun50i_cpufreq_get_efuse() - Parse and return efuse value present on SoC
+ * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
  * @versions: Set to the value parsed from efuse
  *
  * Returns 0 if success.
@@ -69,21 +69,16 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
return PTR_ERR(speedbin);
 
efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
-   switch (efuse_value) {
-   case 0b0001:
-   *versions = 1;
-   break;
-   case 0b0011:
-   *versions = 2;
-   break;
-   default:
-   /*
-* For other situations, we treat it as bin0.
-* This vf table can be run for any good cpu.
-*/
+
+   /*
+* We treat unexpected efuse values as if the SoC was from
+* the slowest bin. Expected efuse values are 1-3, slowest
+* to fastest.
+*/
+   if (efuse_value >= 1 && efuse_value <= 3)
+   *versions = efuse_value - 1;
+   else
*versions = 0;
-   break;
-   }
 
kfree(speedbin);
return 0;
-- 
2.23.0

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[linux-sunxi] [PATCH] media: sun6i-csi: Fix incorrect HSYNC/VSYNC/PCLK polarity configuration

2019-11-27 Thread Ondrej Jirman
This was discovered by writing a new camera driver and wondering, why
hsync/vsync polarity setting behaves in reverse to what would be
expected. Verified by looking at the actual signals and the SoC
user manual.

Fixes: 5cc7522d8965 ("media: sun6i: Add support for Allwinner CSI V3s")
Signed-off-by: Ondrej Jirman 
---
 drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c 
b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
index f17e5550602d..98bbcca59a90 100644
--- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
@@ -417,12 +417,12 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev 
*sdev)
if (flags & V4L2_MBUS_FIELD_EVEN_LOW)
cfg |= CSI_IF_CFG_FIELD_POSITIVE;
 
-   if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
+   if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
cfg |= CSI_IF_CFG_VREF_POL_POSITIVE;
-   if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
+   if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
cfg |= CSI_IF_CFG_HREF_POL_POSITIVE;
 
-   if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
+   if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
cfg |= CSI_IF_CFG_CLK_POL_FALLING_EDGE;
break;
case V4L2_MBUS_BT656:
-- 
2.24.0

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[linux-sunxi] [PATCH] bus: sunxi-rsb: Return correct data when mixing 16-bit and 8-bit reads

2020-02-18 Thread Ondrej Jirman
When doing a 16-bit read that returns data in the MSB byte, the
RSB_DATA register will keep the MSB byte unchanged when doing
the following 8-bit read. sunxi_rsb_read() will then return
a result that contains high byte from 16-bit read mixed with
the 8-bit result.

The consequence is that after this happens the PMIC's regmap will
look like this: (0x33 is the high byte from the 16-bit read)

% cat /sys/kernel/debug/regmap/sunxi-rsb-3a3/registers
00: 33
01: 33
02: 33
03: 33
04: 33
05: 33
06: 33
07: 33
08: 33
09: 33
0a: 33
0b: 33
0c: 33
0d: 33
0e: 33
[snip]

Fix this by masking the result of the read with the correct mask
based on the size of the read. There are no 16-bit users in the
mainline kernel, so this doesn't need to get into the stable tree.

Signed-off-by: Ondrej Jirman 
---
 drivers/bus/sunxi-rsb.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c
index b8043b58568ac..8ab6a3865f569 100644
--- a/drivers/bus/sunxi-rsb.c
+++ b/drivers/bus/sunxi-rsb.c
@@ -316,6 +316,7 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, 
u8 addr,
 {
u32 cmd;
int ret;
+   u32 mask;
 
if (!buf)
return -EINVAL;
@@ -323,12 +324,15 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 
rtaddr, u8 addr,
switch (len) {
case 1:
cmd = RSB_CMD_RD8;
+   mask = 0xffu;
break;
case 2:
cmd = RSB_CMD_RD16;
+   mask = 0xu;
break;
case 4:
cmd = RSB_CMD_RD32;
+   mask = 0xu;
break;
default:
dev_err(rsb->dev, "Invalid access width: %zd\n", len);
@@ -345,7 +349,7 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, 
u8 addr,
if (ret)
goto unlock;
 
-   *buf = readl(rsb->regs + RSB_DATA);
+   *buf = readl(rsb->regs + RSB_DATA) & mask;
 
 unlock:
mutex_unlock(&rsb->lock);
-- 
2.25.1

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[linux-sunxi] [PATCH v2] bus: sunxi-rsb: Return correct data when mixing 16-bit and 8-bit reads

2020-02-21 Thread Ondrej Jirman
When doing a 16-bit read that returns data in the MSB byte, the
RSB_DATA register will keep the MSB byte unchanged when doing
the following 8-bit read. sunxi_rsb_read() will then return
a result that contains high byte from 16-bit read mixed with
the 8-bit result.

The consequence is that after this happens the PMIC's regmap will
look like this: (0x33 is the high byte from the 16-bit read)

% cat /sys/kernel/debug/regmap/sunxi-rsb-3a3/registers
00: 33
01: 33
02: 33
03: 33
04: 33
05: 33
06: 33
07: 33
08: 33
09: 33
0a: 33
0b: 33
0c: 33
0d: 33
0e: 33
[snip]

Fix this by masking the result of the read with the correct mask
based on the size of the read. There are no 16-bit users in the
mainline kernel, so this doesn't need to get into the stable tree.

Signed-off-by: Ondrej Jirman 
Acked-by: Chen-Yu Tsai 
---
 drivers/bus/sunxi-rsb.c | 1 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c
index b8043b58568ac..8ab6a3865f569 100644
--- a/drivers/bus/sunxi-rsb.c
+++ b/drivers/bus/sunxi-rsb.c
@@ -345,7 +349,7 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, 
u8 addr,
if (ret)
goto unlock;
 
-   *buf = readl(rsb->regs + RSB_DATA);
+   *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
 
 unlock:
mutex_unlock(&rsb->lock);
-- 
2.25.1

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[linux-sunxi] [PATCH] ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps

2020-02-22 Thread Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 60 +++
 1 file changed, 54 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi 
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383cf..53c2b6a836f27 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -72,7 +72,7 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
};
 
-   cpu@1 {
+   cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -83,7 +83,7 @@ cpu@1 {
#cooling-cells = <2>;
};
 
-   cpu@2 {
+   cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -94,7 +94,7 @@ cpu@2 {
#cooling-cells = <2>;
};
 
-   cpu@3 {
+   cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -116,7 +116,7 @@ cpu100: cpu@100 {
#cooling-cells = <2>;
};
 
-   cpu@101 {
+   cpu101: cpu@101 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -127,7 +127,7 @@ cpu@101 {
#cooling-cells = <2>;
};
 
-   cpu@102 {
+   cpu102: cpu@102 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -138,7 +138,7 @@ cpu@102 {
#cooling-cells = <2>;
};
 
-   cpu@103 {
+   cpu103: cpu@103 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+   trips {
+   cpu0_hot: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu0_very_hot: cpu-very-hot {
+   temperature = <10>;
+   hysteresis = <0>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   cpu-hot-limit {
+   trip = <&cpu0_hot>;
+   cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+   };
+   };
};
 
cpu1_thermal: cpu1-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
+
+   trips {
+   cpu1_hot: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu1_very_hot: cpu-very-hot {
+   temperature = <10>;
+   hysteresis = <0>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   

[linux-sunxi] [PATCH] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps

2020-02-22 Thread Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 7d2e30a00cd2a..dca51548881a8 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -41,6 +41,7 @@
  */
 
 #include "sunxi-h3-h5.dtsi"
+#include 
 
 / {
cpus {
@@ -204,6 +205,30 @@ cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+   trips {
+   cpu_hot_trip: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_very_hot_trip: cpu-very-hot {
+   temperature = <10>;
+   hysteresis = <0>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   cpu-hot-limit {
+   trip = <&cpu_hot_trip>;
+   cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+   };
+   };
};
};
 };
-- 
2.25.1

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[linux-sunxi] [PATCH] arm64: dts: sun50i-h5-orange-pi-pc2: Add CPUX voltage regulator

2020-02-22 Thread Ondrej Jirman
Orange Pi PC2 features sy8106a regulator just like Orange Pi PC.

Signed-off-by: Ondrej Jirman 
---
 .../dts/allwinner/sun50i-h5-orangepi-pc2.dts  | 29 +++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 70b5f09984218..5feedde95b5fc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -85,6 +85,10 @@ reg_usb0_vbus: usb0-vbus {
};
 };
 
+&cpu0 {
+   cpu-supply = <®_vdd_cpux>;
+};
+
 &codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
@@ -180,6 +184,31 @@ flash@0 {
};
 };
 
+&r_i2c {
+   status = "okay";
+
+   reg_vdd_cpux: regulator@65 {
+   compatible = "silergy,sy8106a";
+   reg = <0x65>;
+   regulator-name = "vdd-cpux";
+   silergy,fixed-microvolt = <120>;
+   /*
+* The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+* however both the Armbian DVFS table and the official one
+* have operating points with voltage under 1.1V, and both
+* DVFS table are known to work properly at the lowest
+* operating point.
+*
+* Use 1.0V as the minimum voltage instead.
+*/
+   regulator-min-microvolt = <100>;
+   regulator-max-microvolt = <140>;
+   regulator-ramp-delay = <200>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
 &uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
-- 
2.25.1

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[linux-sunxi] [PATCH 0/4] Assortment of fixes for TBS A711 Tablet

2020-02-22 Thread Ondrej Jirman
This series fixes some issues with camera overvolting, USB-OTG/charging,
and WiFi OOB interrupt being stuck.

Please take a look.

thank you and regards,
  Ondrej Jirman

Ondrej Jirman (4):
  ARM: dts: sun8i-a83t-tbs-a711: OOB WiFi interrupt doesn't work
  ARM: dts: sun8i-a83t-tbs-a711: HM5065 doesn't like such a high voltage
  ARM: dts: sun8i-a83t-tbs-a711: Fix USB OTG mode detection
  ARM: dts: sun8i-a83t-tbs-a711: Drop superfluous dr_mode

 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 11 ---
 1 file changed, 4 insertions(+), 7 deletions(-)

-- 
2.25.1

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[linux-sunxi] [PATCH 1/4] ARM: dts: sun8i-a83t-tbs-a711: OOB WiFi interrupt doesn't work

2020-02-22 Thread Ondrej Jirman
It just causes a constant rate of 5000 interrupts per second for both
GPIO and MMC, even if nothing is happening. Rely on in-band interrupts
instead.

Fixes: 0e23372080def7bb ("arm: dts: sun8i: Add the TBS A711 tablet devicetree")
Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 2fd31a0a0b344..ee5ce3556b2ad 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -214,9 +214,6 @@ &mmc1 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
-   interrupt-parent = <&r_pio>;
-   interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 WL_WAKE_UP */
-   interrupt-names = "host-wake";
};
 };
 
-- 
2.25.1

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[linux-sunxi] [PATCH 3/4] ARM: dts: sun8i-a83t-tbs-a711: Fix USB OTG mode detection

2020-02-22 Thread Ondrej Jirman
USB-ID signal has a pullup on the schematic, but in reality it's not
pulled up, so add a GPIO pullup. And we also need a usb0_vbus_power-supply
for VBUS detection.

This fixes OTG mode detection and charging issues on TBS A711 tablet.
The issues came from ID pin reading 0, causing host mode to be enabled,
when it should not be, leading to DRVVBUS being enabled, which disabled
the charger.

Fixes: f2f221c7810b824e ("ARM: dts: sun8i: a711: Enable USB OTG")
Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index ae1fd2ee3bcce..32fa64a44d8b4 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -495,7 +495,8 @@ &usb_otg {
 };
 
 &usbphy {
-   usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+   usb0_id_det-gpios = <&pio 7 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* 
PH11 */
+   usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <®_drivevbus>;
usb1_vbus-supply = <®_vmain>;
usb2_vbus-supply = <®_vmain>;
-- 
2.25.1

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[linux-sunxi] [PATCH 4/4] ARM: dts: sun8i-a83t-tbs-a711: Drop superfluous dr_mode

2020-02-22 Thread Ondrej Jirman
Property dr_mode = "otg" is the default in sun8i-a83t.dtsi

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 32fa64a44d8b4..267653775203e 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -490,7 +490,6 @@ gnss {
 };
 
 &usb_otg {
-   dr_mode = "otg";
status = "okay";
 };
 
-- 
2.25.1

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[linux-sunxi] [PATCH 2/4] ARM: dts: sun8i-a83t-tbs-a711: HM5065 doesn't like such a high voltage

2020-02-22 Thread Ondrej Jirman
Lowering the voltage solves the quick image degradation over time
(minutes), that was probably caused by overheating.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index ee5ce3556b2ad..ae1fd2ee3bcce 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -371,8 +371,8 @@ ®_dldo2 {
 };
 
 ®_dldo3 {
-   regulator-min-microvolt = <280>;
-   regulator-max-microvolt = <280>;
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
regulator-name = "vdd-csi";
 };
 
-- 
2.25.1

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[linux-sunxi] [PATCH 1/4] dt-bindings: input: gpio-vibrator: Don't require enable-gpios

2020-02-22 Thread Ondrej Jirman
It is possible to turn the motor on/off just by enabling/disabling
the vcc-supply.

Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/input/gpio-vibrator.yaml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml 
b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
index b98bf9363c8ff..f8f4093a0a454 100644
--- a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
+++ b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
@@ -24,7 +24,6 @@ properties:
 
 required:
   - compatible
-  - enable-gpios
 
 examples:
   - |
-- 
2.25.1

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[linux-sunxi] [PATCH 2/4] input: gpio-vibra: Allow to use vcc-supply alone to control the vibrator

2020-02-22 Thread Ondrej Jirman
Make enable-gpio optional to allow using this driver with
boards that have vibrator connected to a power supply without
intermediate gpio based enable circuitry.

Signed-off-by: Ondrej Jirman 
---
 drivers/input/misc/gpio-vibra.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/input/misc/gpio-vibra.c b/drivers/input/misc/gpio-vibra.c
index f79f75595dd73..f11877f04b43c 100644
--- a/drivers/input/misc/gpio-vibra.c
+++ b/drivers/input/misc/gpio-vibra.c
@@ -121,7 +121,8 @@ static int gpio_vibrator_probe(struct platform_device *pdev)
return err;
}
 
-   vibrator->gpio = devm_gpiod_get(&pdev->dev, "enable", GPIOD_OUT_LOW);
+   vibrator->gpio = devm_gpiod_get_optional(&pdev->dev, "enable",
+GPIOD_OUT_LOW);
err = PTR_ERR_OR_ZERO(vibrator->gpio);
if (err) {
if (err != -EPROBE_DEFER)
-- 
2.25.1

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[linux-sunxi] [PATCH 0/4] Add support for vibrator motor for TBS A711 Tablet

2020-02-22 Thread Ondrej Jirman
The tablet has a vibrator. Expose it via input subsystem (EV_FF).

Please take a look.

thank you and regards,
  Ondrej Jirman

Ondrej Jirman (4):
  dt-bindings: input: gpio-vibrator: Don't require enable-gpios
  input: gpio-vibra: Allow to use vcc-supply alone to control the
vibrator
  ARM: dts: sun8i-a83t-tbs-a711: Add support for the vibrator motor
  ARM: dts: sun8i-a83t-tbs-a711: Increase voltage on the vibrator

 .../devicetree/bindings/input/gpio-vibrator.yaml | 1 -
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts| 9 +++--
 drivers/input/misc/gpio-vibra.c  | 3 ++-
 3 files changed, 9 insertions(+), 4 deletions(-)

-- 
2.25.1

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[linux-sunxi] [PATCH 3/4] ARM: dts: sun8i-a83t-tbs-a711: Add support for the vibrator motor

2020-02-22 Thread Ondrej Jirman
The board has a vibrator mottor. Hook it to the input subsystem.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 2fd31a0a0b344..a22920275e99b 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -99,6 +99,11 @@ panel_input: endpoint {
};
};
 
+   vibrator {
+   compatible = "gpio-vibrator";
+   vcc-supply = <®_ldo_io1>;
+   };
+
reg_gps: reg-gps {
compatible = "regulator-fixed";
regulator-name = "gps";
-- 
2.25.1

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[linux-sunxi] [PATCH 4/4] ARM: dts: sun8i-a83t-tbs-a711: Increase voltage on the vibrator

2020-02-22 Thread Ondrej Jirman
Vibrator motor is weak at the current voltage. Increase the voltage.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a22920275e99b..314491cdafca2 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -434,8 +434,8 @@ ®_ldo_io0 {
 };
 
 ®_ldo_io1 {
-   regulator-min-microvolt = <310>;
-   regulator-max-microvolt = <310>;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
regulator-name = "vcc-vb";
status = "okay";
 };
-- 
2.25.1

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[linux-sunxi] [PATCH v2 RESEND] phy: allwinner: Fix GENMASK misuse

2020-02-22 Thread Ondrej Jirman
From: Rikard Falkeborn 

Arguments are supposed to be ordered high then low.

Fixes: a228890f9458 ("phy: allwinner: add phy driver for USB3 PHY on Allwinner 
H6 SoC")
Signed-off-by: Rikard Falkeborn 
Tested-by: Ondrej Jirman 
Signed-off-by: Ondrej Jirman 
---
v1->v2: Add fixes tax. Add Ondrejs Tested-by. No functional change.

This was last sent in Nov last year. I'm resending, because it probably
got forgotten. The only change is adding my SoB, which I understand is
required for the sender of the patch.

 drivers/phy/allwinner/phy-sun50i-usb3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c 
b/drivers/phy/allwinner/phy-sun50i-usb3.c
index 1169f3e83a6f..b1c04f71a31d 100644
--- a/drivers/phy/allwinner/phy-sun50i-usb3.c
+++ b/drivers/phy/allwinner/phy-sun50i-usb3.c
@@ -49,7 +49,7 @@
 #define SUNXI_LOS_BIAS(n)  ((n) << 3)
 #define SUNXI_LOS_BIAS_MASKGENMASK(5, 3)
 #define SUNXI_TXVBOOSTLVL(n)   ((n) << 0)
-#define SUNXI_TXVBOOSTLVL_MASK GENMASK(0, 2)
+#define SUNXI_TXVBOOSTLVL_MASK GENMASK(2, 0)
 
 struct sun50i_usb3_phy {
struct phy *phy;
-- 
2.24.0


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[linux-sunxi] [PATCH] regulator: axp20x: Fix misleading use of negation

2020-02-22 Thread Ondrej Jirman
It works incidentally, because AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN
is non-zero, but the false branch value really should be just 0.

Signed-off-by: Ondrej Jirman 
---
 drivers/regulator/axp20x-regulator.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/regulator/axp20x-regulator.c 
b/drivers/regulator/axp20x-regulator.c
index 16f0c85700360..1e6eb5b1f8d85 100644
--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
@@ -381,8 +381,7 @@ static int axp20x_set_ramp_delay(struct regulator_dev 
*rdev, int ramp)
mask = AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK |
   AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK;
enable = (ramp > 0) ?
-AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN :
-!AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN;
+AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN : 0;
break;
}
 
@@ -393,8 +392,7 @@ static int axp20x_set_ramp_delay(struct regulator_dev 
*rdev, int ramp)
mask = AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK |
   AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK;
enable = (ramp > 0) ?
-AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN :
-!AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN;
+AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN : 0;
break;
}
 
-- 
2.25.1

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[linux-sunxi] [PATCH 0/3] Add support for PocketBook Touch Lux 3 e-book reader

2020-02-22 Thread Ondrej Jirman
This series adds a fairly complete support for this e-book reader.

Missing parts are eink display driver and the touch panel driver.
Support for both is available out-of-tree for now at:
  https://megous.com/git/linux/log/?h=pb-5.6

The rest of the board is supported by the mainline drivers.

Please take a look.

thank you and regards,
  Ondrej Jirman

Ondrej Jirman (3):
  dt-bindings: vendor-prefixes: Add prefix for PocketBook International
SA
  dt-bindings: arm: sunxi: Add PocketBook Touch Lux 3
  ARM: dts: sun5i: Add PocketBook Touch Lux 3 support

 .../devicetree/bindings/arm/sunxi.yaml|   5 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm/boot/dts/Makefile|   1 +
 .../dts/sun5i-a13-pocketbook-touch-lux-3.dts  | 257 ++
 4 files changed, 265 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts

-- 
2.25.1

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[linux-sunxi] [PATCH 1/3] dt-bindings: vendor-prefixes: Add prefix for PocketBook International SA

2020-02-22 Thread Ondrej Jirman
Call it "pocketbook".

Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml 
b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 9e67944bec9c6..434cf7de691d2 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -761,6 +761,8 @@ patternProperties:
 description: Broadcom Corporation (formerly PLX Technology)
   "^pni,.*":
 description: PNI Sensor Corporation
+  "^pocketbook,.*":
+description: PocketBook International SA
   "^polaroid,.*":
 description: Polaroid Corporation
   "^portwell,.*":
-- 
2.25.1

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[linux-sunxi] [PATCH 2/3] dt-bindings: arm: sunxi: Add PocketBook Touch Lux 3

2020-02-22 Thread Ondrej Jirman
Add a new board name.

Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml 
b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 327ce67308237..7c4be977be37f 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -647,6 +647,11 @@ properties:
   - const: pineriver,mini-xplus
   - const: allwinner,sun4i-a10
 
+  - description: PocketBook Touch Lux 3
+items:
+  - const: pocketbook,touch-lux-3
+  - const: allwinner,sun5i-a13
+
   - description: Point of View Protab2-IPS9
 items:
   - const: pov,protab2-ips9
-- 
2.25.1

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[linux-sunxi] [PATCH 3/3] ARM: dts: sun5i: Add PocketBook Touch Lux 3 support

2020-02-22 Thread Ondrej Jirman
What works:

- Serial console
- mmc0, mmc2 (both microSD card slots on the board)
- All buttons (gpio and lradc based)
- Power LED
- PMIC
- RTC
- USB OTG/gadgets mode
- Realtek USB WiFi
- Display backlight
- eInk display SPI NOR flash memory

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/Makefile|   1 +
 .../dts/sun5i-a13-pocketbook-touch-lux-3.dts  | 257 ++
 2 files changed, 258 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d6546d2676b9d..ef732a31e4352 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1056,6 +1056,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a13-licheepi-one.dtb \
sun5i-a13-olinuxino.dtb \
sun5i-a13-olinuxino-micro.dtb \
+   sun5i-a13-pocketbook-touch-lux-3.dtb \
sun5i-a13-q8-tablet.dtb \
sun5i-a13-utoo-p66.dtb \
sun5i-gr8-chip-pro.dtb \
diff --git a/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts 
b/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts
new file mode 100644
index 0..e9ef97c9c893b
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts
@@ -0,0 +1,257 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright 2019 Ondrej Jirman 
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   model = "PocketBook Touch Lux 3";
+   compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13";
+
+   aliases {
+   serial0 = &uart1;
+   i2c0 = &i2c0;
+   i2c1 = &i2c1;
+   i2c2 = &i2c2;
+   };
+
+   backlight {
+   compatible = "pwm-backlight";
+   pwms = <&pwm 0 5 PWM_POLARITY_INVERTED>;
+   enable-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+   brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+   default-brightness-level = <8>;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   power {
+   gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */
+   default-state = "on";
+   };
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   autorepeat;
+   label = "GPIO Keys";
+
+   key-right {
+   label = "Right";
+   linux,code = ;
+   gpios = <&pio 6 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* 
PG9 */
+   };
+
+   key-left {
+   label = "Left";
+   linux,code = ;
+   gpios = <&pio 6 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 
/* PG10 */
+   };
+   };
+
+   reg_1v8: regulator-1v8 {
+   compatible = "regulator-fixed";
+   regulator-name = "vdd-1v8-nor-ctp";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   reg_1v8_nor: regulator-nor {
+   compatible = "regulator-fixed";
+   regulator-name = "vdd-nor";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   gpio = <&pio 2 14 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   vin-supply = <®_1v8>;
+   regulator-always-on;
+   };
+
+   reg_1v8_ctp: regulator-ctp {
+   compatible = "regulator-fixed";
+   regulator-name = "vdd-ctp";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   gpio = <&pio 2 13 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   vin-supply = <®_1v8>;
+   };
+
+   reg_3v3_mmc0: regulator-mmc0 {
+   compatible = "regulator-fixed";
+   regulator-name = "vdd-mmc0";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   gpio = <&pio 4 4 GPIO_ACTIVE_LOW>; /* PE4 */
+   vin-supply = <®_vcc3v3>;
+   };
+};
+
+&cpu0 {
+   cpu-supply = <®_dcdc2>;
+};
+
+&ehci0 {
+   status = "okay";
+};
+
+&i2c0 {
+   sta

[linux-sunxi] [PATCH v2] arm64: dts: sun50i-h5-orange-pi-pc2: Add CPUX voltage regulator

2020-02-23 Thread Ondrej Jirman
Orange Pi PC2 features sy8106a regulator just like Orange Pi PC.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Samuel Holland 
---
 .../dts/allwinner/sun50i-h5-orangepi-pc2.dts  | 20 +++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 70b5f09984218..7b2572dc84857 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -93,6 +93,10 @@ &codec {
status = "okay";
 };
 
+&cpu0 {
+   cpu-supply = <®_vdd_cpux>;
+};
+
 &de {
status = "okay";
 };
@@ -168,6 +172,22 @@ &ohci3 {
status = "okay";
 };
 
+&r_i2c {
+   status = "okay";
+
+   reg_vdd_cpux: regulator@65 {
+   compatible = "silergy,sy8106a";
+   reg = <0x65>;
+   regulator-name = "vdd-cpux";
+   silergy,fixed-microvolt = <110>;
+   regulator-min-microvolt = <100>;
+   regulator-max-microvolt = <140>;
+   regulator-ramp-delay = <200>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
 &spi0  {
status = "okay";
 
-- 
2.25.1

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[linux-sunxi] [PATCH 3/4] ARM: dts: axp813: Add charger LED

2020-02-23 Thread Ondrej Jirman
PMIC supports charging status indication via a LED. Add support
for it.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/axp81x.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi
index 1dfeeceabf4c3..00b092f94433d 100644
--- a/arch/arm/boot/dts/axp81x.dtsi
+++ b/arch/arm/boot/dts/axp81x.dtsi
@@ -175,4 +175,9 @@ reg_drivevbus: drivevbus {
usb_power_supply: usb-power-supply {
compatible = "x-powers,axp813-usb-power-supply";
};
+
+   charger_led: charger-led {
+   compatible = "x-powers,axp813-charger-led";
+   status = "disabled";
+   };
 };
-- 
2.25.1

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[linux-sunxi] [PATCH 1/4] dt-bindings: leds: Add a binding for AXP813 charger led

2020-02-23 Thread Ondrej Jirman
The AXP813 PMIC can control one LED. Add binding to represent the LED.

Signed-off-by: Ondrej Jirman 
---
 .../devicetree/bindings/leds/leds-axp20x.yaml | 24 +++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/leds/leds-axp20x.yaml

diff --git a/Documentation/devicetree/bindings/leds/leds-axp20x.yaml 
b/Documentation/devicetree/bindings/leds/leds-axp20x.yaml
new file mode 100644
index 0..79282d55764bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-axp20x.yaml
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/leds-axp20x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LED driver for AXP813 PMIC from X-Powers.
+
+maintainers:
+  - Ondrej Jirman 
+
+description: |
+  This module is part of the AXP20x MFD device. For more details
+  see Documentation/devicetree/bindings/mfd/axp20x.txt.
+
+  The LED controller is represented as a sub-node of the PMIC node on
+  the device tree.
+
+properties:
+  compatible:
+const: x-powers,axp813-charger-led
+
+required:
+  - compatible
-- 
2.25.1

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[linux-sunxi] [PATCH 0/4] Add support for charger LED for AXP813 and TBS A711 Tablet

2020-02-23 Thread Ondrej Jirman
The tablet has a charger LED exposed on the top. This LED is controlled
by AXP813 PMIC. Add support for enabling the LED and using it either
for charging indication (handled by PMIC automatically) or for other uses
via user control.

Please take a look.

thank you and regards,
  Ondrej Jirman

Ondrej Jirman (4):
  dt-bindings: leds: Add a binding for AXP813 charger led
  leds: axp20x: Support charger LED on AXP20x like PMICs
  ARM: dts: axp813: Add charger LED
  ARM: dts: sun8i-a83t-tbs-a711: Enable charging LED

 .../devicetree/bindings/leds/leds-axp20x.yaml |  24 ++
 arch/arm/boot/dts/axp81x.dtsi |   5 +
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts |   4 +
 drivers/leds/Kconfig  |   7 +
 drivers/leds/Makefile |   1 +
 drivers/leds/leds-axp20x.c| 240 ++
 drivers/mfd/axp20x.c  |   3 +
 7 files changed, 284 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/leds/leds-axp20x.yaml
 create mode 100644 drivers/leds/leds-axp20x.c

-- 
2.25.1

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[linux-sunxi] [PATCH 4/4] ARM: dts: sun8i-a83t-tbs-a711: Enable charging LED

2020-02-23 Thread Ondrej Jirman
The tablet has a LED connected to the PMIC. The LED is visible in the
top right corner of the tablet. Enable it.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 2fd31a0a0b344..40911b5d3f323 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -300,6 +300,10 @@ &battery_power_supply {
status = "okay";
 };
 
+&charger_led {
+   status = "okay";
+};
+
 ®_aldo1 {
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
-- 
2.25.1

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[linux-sunxi] [PATCH 2/4] leds: axp20x: Support charger LED on AXP20x like PMICs

2020-02-23 Thread Ondrej Jirman
There is single LED that can be turned on and off by the user, or set to
be controlled by the charger in 2 different modes.

The driver initializes the LED to be controlled by the charger, but
allows to switch it to user control, and change the mode of charging
indication via a sysfs.

The driver was developed on AXP813, but should work on other PMICs like
that without changes.

Signed-off-by: Ondrej Jirman 
---
 drivers/leds/Kconfig   |   7 ++
 drivers/leds/Makefile  |   1 +
 drivers/leds/leds-axp20x.c | 240 +
 drivers/mfd/axp20x.c   |   3 +
 4 files changed, 251 insertions(+)
 create mode 100644 drivers/leds/leds-axp20x.c

diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index d82f1dea37111..80a3f31f6f4c3 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -846,6 +846,13 @@ config LEDS_TPS6105X
  It is a single boost converter primarily for white LEDs and
  audio amplifiers.
 
+config LEDS_AXP20X
+   tristate "Charger LED support for AXP20X-like PMICs (AXP813, ...)"
+   depends on LEDS_CLASS && MFD_AXP20X
+   help
+ This option enables support for on-chip LED driver on
+ AXP20X-like PMICs.
+
 comment "LED Triggers"
 source "drivers/leds/trigger/Kconfig"
 
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index d7e1107753fb1..80ea1bc4744b0 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_LEDS_TI_LMU_COMMON)  += leds-ti-lmu-common.o
 obj-$(CONFIG_LEDS_LM3697)  += leds-lm3697.o
 obj-$(CONFIG_LEDS_LM36274) += leds-lm36274.o
 obj-$(CONFIG_LEDS_TPS6105X)+= leds-tps6105x.o
+obj-$(CONFIG_LEDS_AXP20X)  += leds-axp20x.o
 
 # LED SPI Drivers
 obj-$(CONFIG_LEDS_CR0014114)   += leds-cr0014114.o
diff --git a/drivers/leds/leds-axp20x.c b/drivers/leds/leds-axp20x.c
new file mode 100644
index 0..e6c9853b84d52
--- /dev/null
+++ b/drivers/leds/leds-axp20x.c
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * LED Driver for X-Powers AXP813 PMIC and similar.
+ *
+ * Copyright(c) 2020 Ondrej Jirman 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define AXP20X_CHGLED_CTRL_MASKBIT(3)
+#define AXP20X_CHGLED_CTRL_CHARGER BIT(3)
+#define AXP20X_CHGLED_CTRL_USER0
+
+#define AXP20X_CHRG_CTRL2_MODE BIT(4)
+
+#define AXP20X_CHGLED_USER_STATE_MASK  GENMASK(5, 4)
+#define AXP20X_CHGLED_USER_STATE_OFF   (0 << 4)
+#define AXP20X_CHGLED_USER_STATE_BLINK_SLOW(1 << 4)
+#define AXP20X_CHGLED_USER_STATE_BLINK_FAST(2 << 4)
+#define AXP20X_CHGLED_USER_STATE_ON(3 << 4)
+
+struct axp20x_led {
+   struct led_classdev cdev;
+   struct regmap *regmap;
+};
+
+static int axp20x_led_set(struct led_classdev *led_cdev,
+  enum led_brightness value)
+{
+   struct axp20x_led *led =
+   container_of(led_cdev, struct axp20x_led, cdev);
+   unsigned int val;
+
+   val = value == LED_OFF ? AXP20X_CHGLED_USER_STATE_OFF :
+   AXP20X_CHGLED_USER_STATE_ON;
+
+   return regmap_update_bits(led->regmap, AXP20X_OFF_CTRL,
+ AXP20X_CHGLED_USER_STATE_MASK, val);
+
+}
+
+static ssize_t charger_control_show(struct device *dev,
+   struct device_attribute *attr, char *buf)
+{
+   struct led_classdev *led_cdev = dev_get_drvdata(dev);
+   struct axp20x_led *led =
+   container_of(led_cdev, struct axp20x_led, cdev);
+   unsigned int val;
+   int ret;
+
+   ret = regmap_read(led->regmap, AXP20X_OFF_CTRL, &val);
+   if (ret)
+   return ret;
+
+   return scnprintf(buf, PAGE_SIZE, "%u\n",
+val & AXP20X_CHGLED_CTRL_MASK ? 1 : 0);
+}
+
+static ssize_t charger_control_store(struct device *dev,
+struct device_attribute *attr,
+const char *buf, size_t len)
+{
+   struct led_classdev *led_cdev = dev_get_drvdata(dev);
+   struct axp20x_led *led =
+   container_of(led_cdev, struct axp20x_led, cdev);
+   bool status;
+   int ret;
+
+   ret = kstrtobool(buf, &status);
+   if (ret)
+   return ret;
+
+   ret = regmap_update_bits(led->regmap, AXP20X_OFF_CTRL,
+AXP20X_CHGLED_CTRL_MASK,
+status ? AXP20X_CHGLED_CTRL_CHARGER :
+AXP20X_CHGLED_CTRL_USER);
+   if (ret)
+   return ret;
+
+   return len;
+}
+
+static ssize_t charger_mode_show(struct device *dev,
+struct device_attribute *attr, char *buf)
+{
+   struct led_classdev *l

[linux-sunxi] [PATCH 1/3] arm64: dts: sun50i-a64: Add i2c2 pins

2020-02-23 Thread Ondrej Jirman
PinePhone needs I2C2 pins description. Add it.

Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 862b47dc9dc90..0fdf5f400d743 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -671,6 +671,11 @@ i2c1_pins: i2c1-pins {
function = "i2c1";
};
 
+   i2c2_pins: i2c2-pins {
+   pins = "PE14", "PE15";
+   function = "i2c2";
+   };
+
/omit-if-no-ref/
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
-- 
2.25.1

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[linux-sunxi] [PATCH 2/3] dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 bindings

2020-02-23 Thread Ondrej Jirman
Document board compatible names for Pine64 PinePhone:

- 1.0 - Developer variant
- 1.1 - Braveheart variant

Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml 
b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 327ce67308237..e24e0fac58f04 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -636,6 +636,16 @@ properties:
   - const: pine64,pinebook
   - const: allwinner,sun50i-a64
 
+  - description: Pine64 PinePhone Developer Batch (1.0)
+items:
+  - const: pine64,pinephone-1.0
+  - const: allwinner,sun50i-a64
+
+  - description: Pine64 PinePhone Braveheart (1.1)
+items:
+  - const: pine64,pinephone-1.1
+  - const: allwinner,sun50i-a64
+
   - description: Pine64 SoPine Baseboard
 items:
   - const: pine64,sopine-baseboard
-- 
2.25.1

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[linux-sunxi] [PATCH 3/3] arm64: dts: allwinner: Add initial support for Pine64 PinePhone

2020-02-23 Thread Ondrej Jirman
At them moment PinePhone comes in two slightly incompatible variants:

- 1.0: Early Developer Batch
- 1.1: Braveheart Batch

There will be at least one more incompatible variant in the very near
future, so let's start by sharing the dtsi among multiple variants,
right away, even though the HW description doesn't yet include the
different bits.

This is a basic DT that includes only features that are already
supported by mainline drivers.

Co-developed-by: Samuel Holland 
Signed-off-by: Samuel Holland 
Co-developed-by: Martijn Braam 
Signed-off-by: Martijn Braam 
Co-developed-by: Luca Weiss 
Signed-off-by: Luca Weiss 
Signed-off-by: Bhushan Shah 
Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/Makefile|   2 +
 .../allwinner/sun50i-a64-pinephone-1.0.dts|  11 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  11 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 385 ++
 4 files changed, 409 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/Makefile 
b/arch/arm64/boot/dts/allwinner/Makefile
index cf4f78617c3f3..79ca263672c38 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.0.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.1.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
new file mode 100644
index 0..0c42272106afa
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman 
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+   model = "Pine64 PinePhone Developer Batch (1.0)";
+   compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
new file mode 100644
index 0..06a775c41664b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman 
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+   model = "Pine64 PinePhone Braveheart (1.1)";
+   compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
new file mode 100644
index 0..d0cf21d82c9e9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -0,0 +1,385 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Icenowy Zheng 
+// Copyright (C) 2020 Ondrej Jirman 
+
+#include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
+
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   aliases {
+   serial0 = &uart0;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   blue {
+   function = LED_FUNCTION_INDICATOR;
+   function-enumerator = <1>;
+   color = ;
+   gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+   };
+
+   green {
+   function = LED_FUNCTION_INDICATOR;
+   function-enumerator = <2>;
+   color = ;
+   gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
+   };
+
+   red {
+   function = LED_FUNCTION_INDICATOR;
+   function-enumerator = <3>;
+   color = ;
+   gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
+   };
+   };
+
+   speaker_amp: audio-amplifier {
+   compatible = "simple-audio-amplifier";
+   enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* 

[linux-sunxi] [PATCH 0/3] Add support for Pine64 PinePhone Linux Smartphone

2020-02-23 Thread Ondrej Jirman
This series adds an initial support for Pine64
PinePhone.

Please take a look.

thank you and regards,
  Ondrej Jirman

Ondrej Jirman (3):
  arm64: dts: sun50i-a64: Add i2c2 pins
  dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 bindings
  arm64: dts: allwinner: Add initial support for Pine64 PinePhone

 .../devicetree/bindings/arm/sunxi.yaml|  10 +
 arch/arm64/boot/dts/allwinner/Makefile|   2 +
 .../allwinner/sun50i-a64-pinephone-1.0.dts|  11 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  11 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 385 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |   5 +
 6 files changed, 424 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi

-- 
2.25.1

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[linux-sunxi] [PATCH v2] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps

2020-02-24 Thread Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.

For trip points, I used a slightly lowered values from the BSP
code. The critical temperature of 110°C from BSP code seemed
like a lot, so I rounded it off to 100°C.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 25 +
 1 file changed, 25 insertions(+)

v2:
- added more detail to the commit description

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 20217e2ca4d3a..e83aa6866e7ea 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -41,6 +41,7 @@
  */
 
 #include "sunxi-h3-h5.dtsi"
+#include 
 
 / {
cpu0_opp_table: opp_table0 {
@@ -227,6 +228,30 @@ cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+   trips {
+   cpu_hot_trip: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_very_hot_trip: cpu-very-hot {
+   temperature = <10>;
+   hysteresis = <0>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   cpu-hot-limit {
+   trip = <&cpu_hot_trip>;
+   cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+   };
+   };
};
};
 };
-- 
2.25.1

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[linux-sunxi] [PATCH v2] ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps

2020-02-24 Thread Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.

For the trip points, I used values from the BSP code directly.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 60 +++
 1 file changed, 54 insertions(+), 6 deletions(-)

v2:
- added more detail to the commit description

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi 
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383cf..53c2b6a836f27 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -72,7 +72,7 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
};
 
-   cpu@1 {
+   cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -83,7 +83,7 @@ cpu@1 {
#cooling-cells = <2>;
};
 
-   cpu@2 {
+   cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -94,7 +94,7 @@ cpu@2 {
#cooling-cells = <2>;
};
 
-   cpu@3 {
+   cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -116,7 +116,7 @@ cpu100: cpu@100 {
#cooling-cells = <2>;
};
 
-   cpu@101 {
+   cpu101: cpu@101 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -127,7 +127,7 @@ cpu@101 {
#cooling-cells = <2>;
};
 
-   cpu@102 {
+   cpu102: cpu@102 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -138,7 +138,7 @@ cpu@102 {
#cooling-cells = <2>;
};
 
-   cpu@103 {
+   cpu103: cpu@103 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+   trips {
+   cpu0_hot: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu0_very_hot: cpu-very-hot {
+   temperature = <10>;
+   hysteresis = <0>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   cpu-hot-limit {
+   trip = <&cpu0_hot>;
+   cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+<&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+   };
+   };
};
 
cpu1_thermal: cpu1-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
+
+   trips {
+   cpu1_hot: cpu-hot {
+   temperature = <8>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu1_very_hot: cpu-very-hot {
+   

[linux-sunxi] [PATCH v2 1/3] arm64: dts: sun50i-a64: Add i2c2 pins

2020-02-26 Thread Ondrej Jirman
PinePhone needs I2C2 pins description. Add it, and make it default
for i2c2, since it's the only possiblilty.

Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 72b1b34879c6d..990de71ca048a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -671,6 +671,11 @@ i2c1_pins: i2c1-pins {
function = "i2c1";
};
 
+   i2c2_pins: i2c2-pins {
+   pins = "PE14", "PE15";
+   function = "i2c2";
+   };
+
/omit-if-no-ref/
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
@@ -958,12 +963,13 @@ i2c2: i2c@1c2b400 {
interrupts = ;
clocks = <&ccu CLK_BUS_I2C2>;
resets = <&ccu RST_BUS_I2C2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&i2c2_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
 
-
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
-- 
2.25.1

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[linux-sunxi] [PATCH v2 0/3] Add support for Pine64 PinePhone Linux Smartphone

2020-02-26 Thread Ondrej Jirman
This series adds an initial support for Pine64 PinePhone.

Please take a look.

thank you and regards,
  Ondrej Jirman


Changes in v2:
- make i2c2_pins default pinctrl config for i2c2 node
- add description of the differences between 1.0 and 1.1 to the
  commit message
- added copyright header for Martijn Braam
- drop pinctrl config from i2c1 and i2c2 nodes, since it's
  now the default
- extend comments on i2c2 and uart3 nodes to be more clear
- rebased on top of linux-next and resolved conflicts
- dropped the function-enumerator from leds

Changes not made:
- I didn't drop pinctrl configs on mmc0, mmc2 and uart3
  - these are actually not default in dtsi, as was suggested
- gpio-leds kept with the new function/color binding, but I dropped
  the function-enumerator

It seems intention for the future (since about 06-2019[0]) is for LEDs to not
have a devicename in their class name, because that's determinable
from the sysfs in other ways, and to use the function and color
properties instead of label in DT.

[0] 
https://lore.kernel.org/lkml/20190609190803.14815-5-jacek.anaszew...@gmail.com/T/

function-enumerator is supposed to be used if function/color don't
make the LED name unique for the board. [1] So I dropped function-enumerator
from my series, as it just added a numeric suffix to the LED name
for no reason.

[1] https://lore.kernel.org/patchwork/patch/1063388/

This follow the recent new board binding additions to the kernel (in 5.6):

https://elixir.bootlin.com/linux/v5.6-rc3/source/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi#L96

Ondrej Jirman (3):
  arm64: dts: sun50i-a64: Add i2c2 pins
  dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 bindings
  arm64: dts: allwinner: Add initial support for Pine64 PinePhone

 .../devicetree/bindings/arm/sunxi.yaml|  10 +
 arch/arm64/boot/dts/allwinner/Makefile|   2 +
 .../allwinner/sun50i-a64-pinephone-1.0.dts|  11 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  11 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 379 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |   8 +-
 6 files changed, 420 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi

-- 
2.25.1

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[linux-sunxi] [PATCH v2 3/3] arm64: dts: allwinner: Add initial support for Pine64 PinePhone

2020-02-26 Thread Ondrej Jirman
At the moment PinePhone comes in two slightly incompatible variants:

- 1.0: Early Developer Batch
- 1.1: Braveheart Batch

There will be at least one more incompatible variant in the very near
future, so let's start by sharing the dtsi among multiple variants,
right away, even though the HW description doesn't yet include the
different bits.

The differences between 1.0 and 1.1 are: change in pins that control
the flash LED, differences in modem power status signal routing, and
maybe some other subtler things, that have not been determined yet.

This is a basic DT that includes only features that are already
supported by mainline drivers.

Co-developed-by: Samuel Holland 
Signed-off-by: Samuel Holland 
Co-developed-by: Martijn Braam 
Signed-off-by: Martijn Braam 
Co-developed-by: Luca Weiss 
Signed-off-by: Luca Weiss 
Signed-off-by: Bhushan Shah 
Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/Makefile|   2 +
 .../allwinner/sun50i-a64-pinephone-1.0.dts|  11 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  11 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 379 ++
 4 files changed, 403 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/Makefile 
b/arch/arm64/boot/dts/allwinner/Makefile
index 6dad63881cd3a..e4d3cd0ac5bb7 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.0.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.1.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
new file mode 100644
index 0..0c42272106afa
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman 
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+   model = "Pine64 PinePhone Developer Batch (1.0)";
+   compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
new file mode 100644
index 0..06a775c41664b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman 
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+   model = "Pine64 PinePhone Braveheart (1.1)";
+   compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
new file mode 100644
index 0..cefda145c3c9d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Icenowy Zheng 
+// Copyright (C) 2020 Martijn Braam 
+// Copyright (C) 2020 Ondrej Jirman 
+
+#include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
+
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   aliases {
+   serial0 = &uart0;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   blue {
+   function = LED_FUNCTION_INDICATOR;
+   color = ;
+   gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+   };
+
+   green {
+   function = LED_FUNCTION_INDICATOR;
+   color = ;
+   gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
+   };
+
+   red {
+   function = LED_FUNCTION_INDICATOR;
+   color = ;
+   gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
+   };
+   };
+
+   speaker_amp: audio-amplifier {
+   compatible = "simple-audio-amplifier";
+

[linux-sunxi] [PATCH v2 2/3] dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 bindings

2020-02-26 Thread Ondrej Jirman
Document board compatible names for Pine64 PinePhone:

- 1.0 - Developer variant
- 1.1 - Braveheart variant

Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml 
b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 5b22b77e4bb73..abf2d97fb7ae3 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -642,6 +642,16 @@ properties:
   - const: pine64,pinebook
   - const: allwinner,sun50i-a64
 
+  - description: Pine64 PinePhone Developer Batch (1.0)
+items:
+  - const: pine64,pinephone-1.0
+  - const: allwinner,sun50i-a64
+
+  - description: Pine64 PinePhone Braveheart (1.1)
+items:
+  - const: pine64,pinephone-1.1
+  - const: allwinner,sun50i-a64
+
   - description: Pine64 PineTab
 items:
   - const: pine64,pinetab
-- 
2.25.1

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[linux-sunxi] [PATCH] arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells

2020-04-20 Thread Ondrej Jirman
The binding specifies #address-cells and #size-cells should be present.
Without them present, dtc issues a warning because default for
#address-cells seems to be <2>:

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi:1108.4-52:
  Warning (dma_ranges_format):
/soc/dram-controller@1c62000:dma-ranges:
"dma-ranges" property has invalid length (12 bytes)
(parent #address-cells == 1, child #address-cells == 2,
#size-cells == 1)

mbus #address-cells should be 1.

Signed-off-by: Ondrej Jirman 
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index cca4261089aa..61698094f450 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -1105,6 +1105,8 @@ mbus: dram-controller@1c62000 {
compatible = "allwinner,sun50i-a64-mbus";
reg = <0x01c62000 0x1000>;
clocks = <&ccu 112>;
+   #address-cells = <1>;
+   #size-cells = <1>;
dma-ranges = <0x 0x4000 0xc000>;
#interconnect-cells = <1>;
};
-- 
2.26.1

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[linux-sunxi] [PATCH v2 1/4] dt-bindings: input: gpio-vibrator: Don't require enable-gpios

2020-05-12 Thread Ondrej Jirman
It is possible to turn the motor on/off just by enabling/disabling
the vcc-supply.

Signed-off-by: Ondrej Jirman 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/input/gpio-vibrator.yaml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml 
b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
index 2384465eaa19..c700b640bd53 100644
--- a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
+++ b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml
@@ -24,7 +24,6 @@ properties:
 
 required:
   - compatible
-  - enable-gpios
 
 additionalProperties: false
 
-- 
2.26.2

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[linux-sunxi] [PATCH v2 3/4] ARM: dts: sun8i-a83t-tbs-a711: Add support for the vibrator motor

2020-05-12 Thread Ondrej Jirman
The board has a vibrator mottor. Hook it to the input subsystem.

According to the PMIC specification, LDO needs to be enabled (value 0b11)
to achieve the specified max driving current of 150mA. We can't drive
the motor with just GPIO mode.

In GPIO mode the chip is probably just using the regular CMOS logic
output circuitry (typically limited to around 20-35mA, but not specified
in this datasheet).

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index bfc9bb277a49..a278a1e33930 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -99,6 +99,11 @@ panel_input: endpoint {
};
};
 
+   vibrator {
+   compatible = "gpio-vibrator";
+   vcc-supply = <®_ldo_io1>;
+   };
+
reg_gps: reg-gps {
compatible = "regulator-fixed";
regulator-name = "gps";
-- 
2.26.2

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[linux-sunxi] [PATCH v2 0/4] Add support for vibrator motor for TBS A711 Tablet

2020-05-12 Thread Ondrej Jirman
The tablet has a vibrator motor. This patch series exposes it via
input subsystem (EV_FF).

I'd like to ask input maintainers to take the patches 1 and 2.
Patches 3 and 4 should go via the sunxi tree.

The change to the vibrator driver is meant to enable toggling the
vibrator motor just via a power supply itself. There's not additional
gpio driven switch on this tablet between the power supply for the
motor and the motor.

Please take a look.

Changes in v2:
- Added DT ack tag
- Add more information to the commit log (re use of LDO for the power)


thank you and regards,
  Ondrej Jirman

Ondrej Jirman (4):
  dt-bindings: input: gpio-vibrator: Don't require enable-gpios
  input: gpio-vibra: Allow to use vcc-supply alone to control the
vibrator
  ARM: dts: sun8i-a83t-tbs-a711: Add support for the vibrator motor
  ARM: dts: sun8i-a83t-tbs-a711: Increase voltage on the vibrator

 .../devicetree/bindings/input/gpio-vibrator.yaml | 1 -
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts| 9 +++--
 drivers/input/misc/gpio-vibra.c  | 3 ++-
 3 files changed, 9 insertions(+), 4 deletions(-)

-- 
2.26.2

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[linux-sunxi] [PATCH v2 4/4] ARM: dts: sun8i-a83t-tbs-a711: Increase voltage on the vibrator

2020-05-12 Thread Ondrej Jirman
Vibrator motor is weak at the current voltage. Increase the voltage.

Signed-off-by: Ondrej Jirman 
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts 
b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a278a1e33930..1e086e979348 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -434,8 +434,8 @@ ®_ldo_io0 {
 };
 
 ®_ldo_io1 {
-   regulator-min-microvolt = <310>;
-   regulator-max-microvolt = <310>;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
regulator-name = "vcc-vb";
status = "okay";
 };
-- 
2.26.2

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[linux-sunxi] [PATCH v2 2/4] input: gpio-vibra: Allow to use vcc-supply alone to control the vibrator

2020-05-12 Thread Ondrej Jirman
Make enable-gpio optional to allow using this driver with
boards that have vibrator connected to a power supply without
intermediate gpio based enable circuitry.

Signed-off-by: Ondrej Jirman 
---
 drivers/input/misc/gpio-vibra.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/input/misc/gpio-vibra.c b/drivers/input/misc/gpio-vibra.c
index f79f75595dd7..f11877f04b43 100644
--- a/drivers/input/misc/gpio-vibra.c
+++ b/drivers/input/misc/gpio-vibra.c
@@ -121,7 +121,8 @@ static int gpio_vibrator_probe(struct platform_device *pdev)
return err;
}
 
-   vibrator->gpio = devm_gpiod_get(&pdev->dev, "enable", GPIOD_OUT_LOW);
+   vibrator->gpio = devm_gpiod_get_optional(&pdev->dev, "enable",
+GPIOD_OUT_LOW);
err = PTR_ERR_OR_ZERO(vibrator->gpio);
if (err) {
if (err != -EPROBE_DEFER)
-- 
2.26.2

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[linux-sunxi] [PATCH v3 2/5] dt-bindings: panel: Add binding for Xingbangda XBD599 panel

2020-05-13 Thread Ondrej Jirman
From: Icenowy Zheng 

Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on
Sitronix ST7703 LCD controller.

Add its device tree binding.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 .../display/panel/sitronix,st7703.yaml| 63 +++
 1 file changed, 63 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml 
b/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
new file mode 100644
index ..6e1606db4ab4
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/sitronix,st7703.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sitronix ST7703 MIPI DSI panel
+
+maintainers:
+  - Icenowy Zheng 
+  - Ondrej Jirman 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+- xingbangda,xbd599
+  - const: sitronix,st7703
+
+  reg:
+description: DSI virtual channel used by that screen
+maxItems: 1
+
+  vcc-supply:
+description: regulator that supplies the VCC voltage
+
+  iovcc-supply:
+description: regulator that supplies the IOVCC voltage
+
+  reset-gpios: true
+
+  backlight: true
+
+required:
+  - compatible
+  - reg
+  - vcc-supply
+  - iovcc-supply
+  - reset-gpios
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "xingbangda,xbd599", "sitronix,st7703";
+reg = <0>;
+reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
+iovcc-supply = <®_dldo2>;
+vcc-supply = <®_ldo_io0>;
+backlight = <&backlight>;
+};
+};
+
-- 
2.26.2

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[linux-sunxi] [PATCH v3 3/5] drm: panel: Add Xingbangda XBD599 panel (ST7703 controller)

2020-05-13 Thread Ondrej Jirman
From: Icenowy Zheng 

Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.

It is based on Sitronix ST7703 LCD controller.

Add support for it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 386 ++
 3 files changed, 397 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 39055c1f0e2f..b7bc157b0612 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -395,6 +395,16 @@ config DRM_PANEL_SITRONIX_ST7701
  ST7701 controller for 480X864 LCD panels with MIPI/RGB/SPI
  system interfaces.
 
+config DRM_PANEL_SITRONIX_ST7703
+   tristate "Sitronix ST7703 panel driver"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for the Sitronix
+ ST7703 controller for 720X1440 LCD panels with MIPI/RGB/SPI
+ system interfaces.
+
 config DRM_PANEL_SITRONIX_ST7789V
tristate "Sitronix ST7789V panel"
depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index de74f282c433..47f4789a8685 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += 
panel-sharp-lq101r1sx01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS043T1LE01) += panel-sharp-ls043t1le01.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
+obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
new file mode 100644
index ..092dd73c86d0
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -0,0 +1,386 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DRM driver for Sitronix ST7703 MIPI DSI panel
+ *
+ * Copyright (C) 2020 Ondrej Jirman 
+ * Copyright (C) 2019-2020 Icenowy Zheng 
+ *
+ * Based on panel-rocktech-jh057n00900.c, which is:
+ *   Copyright (C) Purism SPC 2019
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/* Manufacturer specific Commands send via DSI */
+#define ST7703_CMD_ALL_PIXEL_OFF 0x22
+#define ST7703_CMD_ALL_PIXEL_ON 0x23
+#define ST7703_CMD_SETDISP  0xB2
+#define ST7703_CMD_SETRGBIF 0xB3
+#define ST7703_CMD_SETCYC   0xB4
+#define ST7703_CMD_SETBGP   0xB5
+#define ST7703_CMD_SETVCOM  0xB6
+#define ST7703_CMD_SETOTP   0xB7
+#define ST7703_CMD_SETPOWER_EXT 0xB8
+#define ST7703_CMD_SETEXTC  0xB9
+#define ST7703_CMD_SETMIPI  0xBA
+#define ST7703_CMD_SETVDC   0xBC
+#define ST7703_CMD_SETSCR   0xC0
+#define ST7703_CMD_SETPOWER 0xC1
+#define ST7703_CMD_UNK_C6   0xC6
+#define ST7703_CMD_SETPANEL 0xCC
+#define ST7703_CMD_SETGAMMA 0xE0
+#define ST7703_CMD_SETEQ0xE3
+#define ST7703_CMD_SETGIP1  0xE9
+#define ST7703_CMD_SETGIP2  0xEA
+
+struct st7703_panel_desc {
+   const struct drm_display_mode *mode;
+   unsigned int lanes;
+   unsigned long flags;
+   enum mipi_dsi_pixel_format format;
+   const char *const *supply_names;
+   unsigned int num_supplies;
+};
+
+struct st7703 {
+   struct device *dev;
+   struct drm_panel panel;
+   struct gpio_desc *reset_gpio;
+   struct regulator_bulk_data *supplies;
+   const struct st7703_panel_desc *desc;
+   bool prepared;
+};
+
+static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
+{
+   return container_of(panel, struct st7703, panel);
+}
+
+#define dsi_dcs_write_seq(dsi, cmd, seq...) do {   \
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d));   \
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+static int st7703_init_sequence(struct st7703 *ctx)
+{
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+   struct device *dev = ctx->dev;
+   int ret;
+
+   /*
+* Init sequence was supplied by the panel vendor.

[linux-sunxi] [PATCH v3 4/5] arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

2020-05-13 Thread Ondrej Jirman
From: Icenowy Zheng 

PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.

Backlight levels curve was optimized by Martijn Braam using a
lux meter.

Add its device nodes.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Martijn Braam 
Signed-off-by: Ondrej Jirman 
---
 .../allwinner/sun50i-a64-pinephone-1.1.dts| 19 ++
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 35 +++
 2 files changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
index 06a775c41664..3e99a87e9ce5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
@@ -9,3 +9,22 @@ / {
model = "Pine64 PinePhone Braveheart (1.1)";
compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
 };
+
+&backlight {
+   power-supply = <®_ldo_io0>;
+   /*
+* PWM backlight circuit on this PinePhone revision was changed since
+* 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
+* being off is around 20%. Duty cycle for the lowest brightness level
+* also varries quite a bit between individual boards, so the lowest
+* value here was chosen as a safe default.
+*/
+   brightness-levels = <
+   774  793  814  842
+   882  935  1003 1088
+   1192 1316 1462 1633
+   1830 2054 2309 2596
+   2916 3271 3664 4096>;
+   num-interpolated-steps = <50>;
+   default-brightness-level = <400>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index cefda145c3c9..e60b57f8ac14 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -16,6 +16,13 @@ aliases {
serial0 = &uart0;
};
 
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = <&r_pwm 0 5 PWM_POLARITY_INVERTED>;
+   enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+   /* Backlight configuration differs per PinePhone revision. */
+   };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -84,6 +91,30 @@ &dai {
status = "okay";
 };
 
+&de {
+   status = "okay";
+};
+
+&dphy {
+   status = "okay";
+};
+
+&dsi {
+   vcc-dsi-supply = <®_dldo1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   panel@0 {
+   compatible = "xingbangda,xbd599", "sitronix,st7703";
+   reg = <0>;
+   reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */
+   iovcc-supply = <®_dldo2>;
+   vcc-supply = <®_ldo_io0>;
+   backlight = <&backlight>;
+   };
+};
+
 &ehci0 {
status = "okay";
 };
@@ -188,6 +219,10 @@ &r_pio {
 */
 };
 
+&r_pwm {
+   status = "okay";
+};
+
 &r_rsb {
status = "okay";
 
-- 
2.26.2

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[linux-sunxi] [PATCH v3 5/5] arm64: dts: sun50i-a64-pinephone: Add touchscreen support

2020-05-13 Thread Ondrej Jirman
Pinephone has a Goodix GT917S capacitive touchscreen controller on
I2C0 bus. Add support for it.

Signed-off-by: Ondrej Jirman 
---
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index e60b57f8ac14..6b2ff431cddb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -123,6 +123,25 @@ &ehci1 {
status = "okay";
 };
 
+&i2c0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&i2c0_pins>;
+   status = "okay";
+
+   touchscreen@5d {
+   compatible = "goodix,gt917s", "goodix,gt911";
+   reg = <0x5d>;
+   interrupt-parent = <&pio>;
+   interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
+   irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+   reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+   AVDD28-supply = <®_ldo_io0>;
+   VDDIO-supply = <®_ldo_io0>;
+   touchscreen-size-x = <720>;
+   touchscreen-size-y = <1440>;
+   };
+};
+
 &i2c1 {
status = "okay";
 
-- 
2.26.2

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[linux-sunxi] [PATCH v3 0/5] Add support for PinePhone LCD panel

2020-05-13 Thread Ondrej Jirman
This patchset adds support for the LCD panel of PinePhone.

The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.

I've tested this on PinePhone 1.0 and 1.2.

Please take a look.

thank you and regards,
  Ondrej Jirman


Changes in v3:
- Panel driver renamed to the name of the LCD controller
- Re-organize the driver slightly to more easily support more panels
  based on the same controller.
- Add patch to enable the touchscreen to complete the LCD support
  on PinePhone.
- Dropped the "DSI fix" patch (the driver seems to work for me without it)
- Improved brightness levels handling:
  - PinePhone 1.0 uses default levels generated by the driver
  - On PinePhone 1.1 duty cycles < 20% lead to black screen, so
default levels can't be used. Martijn Braam came up with a
list of duty cycle values that lead to perception of linear
brigtness level <-> light intensity on PinePhone 1.1
- There was some feedback on v2 about this being similar to st7701.
  It's only similar in name. Most of the "user commands" are different,
  so I opted to keep this in a new driver instead of creating st770x.
  
  Anyone who likes to check the differences, here are datasheets:

  - https://megous.com/dl/tmp/ST7703_DS_v01_20160128.pdf
  - https://megous.com/dl/tmp/ST7701.pdf

Changes in v2:
- DT Example fix.
- DT Format fix.
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.


-- For phone owners: --

There's an open question on how to set the backlight brightness values
on post 1.0 revision phone, since lower duty cycles (< 10-20%) lead
to backlight being black. It would be nice if more people can test
the various backlight levels on 1.1 and 1.2 revision with this change
in dts:

   brightness-levels = <0 1000>;
   num-interpolated-steps = <1000>;

and report at what brightness level the backlight turns on. So far it
seems this has a wide range. Lowest useable duty cycle for me is ~7%
on 1.2 and for Martijn ~20% on 1.1.

Icenowy Zheng (4):
  dt-bindings: vendor-prefixes: Add Xingbangda
  dt-bindings: panel: Add binding for Xingbangda XBD599 panel
  drm: panel: Add Xingbangda XBD599 panel (ST7703 controller)
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

Ondrej Jirman (1):
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support

 .../display/panel/sitronix,st7703.yaml|  63 +++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  19 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   |  54 +++
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 386 ++
 7 files changed, 535 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

-- 
2.26.2

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[linux-sunxi] [PATCH v3 1/5] dt-bindings: vendor-prefixes: Add Xingbangda

2020-05-13 Thread Ondrej Jirman
From: Icenowy Zheng 

Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels for the PinePhone.

Add the vendor prefix of it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml 
b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 442579a4c837..7504440dba36 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1139,6 +1139,8 @@ patternProperties:
 description: Xiaomi Technology Co., Ltd.
   "^xillybus,.*":
 description: Xillybus Ltd.
+  "^xingbangda,.*":
+description: Shenzhen Xingbangda Display Technology Co., Ltd
   "^xinpeng,.*":
 description: Shenzhen Xinpeng Technology Co., Ltd
   "^xlnx,.*":
-- 
2.26.2

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[linux-sunxi] [PATCH v4 2/5] dt-bindings: panel: Add binding for Xingbangda XBD599 panel

2020-06-16 Thread Ondrej Jirman
From: Icenowy Zheng 

Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on
Sitronix ST7703 LCD controller.

Add its device tree binding.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
---
 .../display/panel/sitronix,st7703.yaml| 63 +++
 1 file changed, 63 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml 
b/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
new file mode 100644
index ..6e1606db4ab4
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/sitronix,st7703.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sitronix ST7703 MIPI DSI panel
+
+maintainers:
+  - Icenowy Zheng 
+  - Ondrej Jirman 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+- xingbangda,xbd599
+  - const: sitronix,st7703
+
+  reg:
+description: DSI virtual channel used by that screen
+maxItems: 1
+
+  vcc-supply:
+description: regulator that supplies the VCC voltage
+
+  iovcc-supply:
+description: regulator that supplies the IOVCC voltage
+
+  reset-gpios: true
+
+  backlight: true
+
+required:
+  - compatible
+  - reg
+  - vcc-supply
+  - iovcc-supply
+  - reset-gpios
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "xingbangda,xbd599", "sitronix,st7703";
+reg = <0>;
+reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
+iovcc-supply = <®_dldo2>;
+vcc-supply = <®_ldo_io0>;
+backlight = <&backlight>;
+};
+};
+
-- 
2.27.0

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[linux-sunxi] [PATCH v4 0/5] Add support for PinePhone LCD panel

2020-06-16 Thread Ondrej Jirman
This patchset adds support for the LCD panel of PinePhone.

The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.

I've tested this on PinePhone 1.0 and 1.2.

Please take a look.

thank you and regards,
  Ondrej Jirman

Changes in v4:
- use ->type from the mode instead of hardcoding (Samuel)
- move init_sequence to ->prepare (Samuel)
- move anti-flicker delay to ->enable, explain it (Samuel)
- add enter_sleep after display_off (Samuel)
- drop ->disable (move code to ->unprepare)
- add ID bytes dumping (Linus)
  (I can't test it since allwinner DSI driver has a broken
   dcs_read function, and I didn't manage to fix it.)
- document magic bytes (Linus)
- assert reset during powerup
- cleanup powerup timings according to the datasheet

Changes in v3:
- Panel driver renamed to the name of the LCD controller
- Re-organize the driver slightly to more easily support more panels
  based on the same controller.
- Add patch to enable the touchscreen to complete the LCD support
  on PinePhone.
- Dropped the "DSI fix" patch (the driver seems to work for me without it)
- Improved brightness levels handling:
  - PinePhone 1.0 uses default levels generated by the driver
  - On PinePhone 1.1 duty cycles < 20% lead to black screen, so
default levels can't be used. Martijn Braam came up with a
list of duty cycle values that lead to perception of linear
brigtness level <-> light intensity on PinePhone 1.1
- There was some feedback on v2 about this being similar to st7701.
  It's only similar in name. Most of the "user commands" are different,
  so I opted to keep this in a new driver instead of creating st770x.
  
  Anyone who likes to check the differences, here are datasheets:

  - https://megous.com/dl/tmp/ST7703_DS_v01_20160128.pdf
  - https://megous.com/dl/tmp/ST7701.pdf

Changes in v2:
- DT Example fix.
- DT Format fix.
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.


-- For phone owners: --

There's an open question on how to set the backlight brightness values
on post 1.0 revision phone, since lower duty cycles (< 10-20%) lead
to backlight being black. It would be nice if more people can test
the various backlight levels on 1.1 and 1.2 revision with this change
in dts:

   brightness-levels = <0 1000>;
   num-interpolated-steps = <1000>;

and report at what brightness level the backlight turns on. So far it
seems this has a wide range. Lowest useable duty cycle for me is ~7%
on 1.2 and for Martijn ~20% on 1.1.

Icenowy Zheng (4):
  dt-bindings: vendor-prefixes: Add Xingbangda
  dt-bindings: panel: Add binding for Xingbangda XBD599 panel
  drm: panel: Add Xingbangda XBD599 panel (ST7703 controller)
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

Ondrej Jirman (1):
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support

 .../display/panel/sitronix,st7703.yaml|  63 +++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  19 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   |  54 ++
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 535 ++
 7 files changed, 684 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/sitronix,st7703.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

-- 
2.27.0

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[linux-sunxi] [PATCH v4 4/5] arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

2020-06-16 Thread Ondrej Jirman
From: Icenowy Zheng 

PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.

Backlight levels curve was optimized by Martijn Braam using a
lux meter.

Add its device nodes.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Martijn Braam 
Signed-off-by: Ondrej Jirman 
---
 .../allwinner/sun50i-a64-pinephone-1.1.dts| 19 ++
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 35 +++
 2 files changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
index 06a775c41664..3e99a87e9ce5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
@@ -9,3 +9,22 @@ / {
model = "Pine64 PinePhone Braveheart (1.1)";
compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
 };
+
+&backlight {
+   power-supply = <®_ldo_io0>;
+   /*
+* PWM backlight circuit on this PinePhone revision was changed since
+* 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
+* being off is around 20%. Duty cycle for the lowest brightness level
+* also varries quite a bit between individual boards, so the lowest
+* value here was chosen as a safe default.
+*/
+   brightness-levels = <
+   774  793  814  842
+   882  935  1003 1088
+   1192 1316 1462 1633
+   1830 2054 2309 2596
+   2916 3271 3664 4096>;
+   num-interpolated-steps = <50>;
+   default-brightness-level = <400>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index cefda145c3c9..e60b57f8ac14 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -16,6 +16,13 @@ aliases {
serial0 = &uart0;
};
 
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = <&r_pwm 0 5 PWM_POLARITY_INVERTED>;
+   enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+   /* Backlight configuration differs per PinePhone revision. */
+   };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -84,6 +91,30 @@ &dai {
status = "okay";
 };
 
+&de {
+   status = "okay";
+};
+
+&dphy {
+   status = "okay";
+};
+
+&dsi {
+   vcc-dsi-supply = <®_dldo1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   panel@0 {
+   compatible = "xingbangda,xbd599", "sitronix,st7703";
+   reg = <0>;
+   reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */
+   iovcc-supply = <®_dldo2>;
+   vcc-supply = <®_ldo_io0>;
+   backlight = <&backlight>;
+   };
+};
+
 &ehci0 {
status = "okay";
 };
@@ -188,6 +219,10 @@ &r_pio {
 */
 };
 
+&r_pwm {
+   status = "okay";
+};
+
 &r_rsb {
status = "okay";
 
-- 
2.27.0

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[linux-sunxi] [PATCH v4 1/5] dt-bindings: vendor-prefixes: Add Xingbangda

2020-06-16 Thread Ondrej Jirman
From: Icenowy Zheng 

Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels for the PinePhone.

Add the vendor prefix of it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml 
b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 9aeab66be85f..740b116b179f 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1157,6 +1157,8 @@ patternProperties:
 description: Xiaomi Technology Co., Ltd.
   "^xillybus,.*":
 description: Xillybus Ltd.
+  "^xingbangda,.*":
+description: Shenzhen Xingbangda Display Technology Co., Ltd
   "^xinpeng,.*":
 description: Shenzhen Xinpeng Technology Co., Ltd
   "^xlnx,.*":
-- 
2.27.0

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[linux-sunxi] [PATCH v4 5/5] arm64: dts: sun50i-a64-pinephone: Add touchscreen support

2020-06-16 Thread Ondrej Jirman
Pinephone has a Goodix GT917S capacitive touchscreen controller on
I2C0 bus. Add support for it.

Signed-off-by: Ondrej Jirman 
---
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index e60b57f8ac14..6b2ff431cddb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -123,6 +123,25 @@ &ehci1 {
status = "okay";
 };
 
+&i2c0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&i2c0_pins>;
+   status = "okay";
+
+   touchscreen@5d {
+   compatible = "goodix,gt917s", "goodix,gt911";
+   reg = <0x5d>;
+   interrupt-parent = <&pio>;
+   interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
+   irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+   reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+   AVDD28-supply = <®_ldo_io0>;
+   VDDIO-supply = <®_ldo_io0>;
+   touchscreen-size-x = <720>;
+   touchscreen-size-y = <1440>;
+   };
+};
+
 &i2c1 {
status = "okay";
 
-- 
2.27.0

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[linux-sunxi] [PATCH v4 3/5] drm: panel: Add Xingbangda XBD599 panel (ST7703 controller)

2020-06-16 Thread Ondrej Jirman
From: Icenowy Zheng 

Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.

It is based on Sitronix ST7703 LCD controller.

Add support for it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 535 ++
 3 files changed, 546 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 39055c1f0e2f..b7bc157b0612 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -395,6 +395,16 @@ config DRM_PANEL_SITRONIX_ST7701
  ST7701 controller for 480X864 LCD panels with MIPI/RGB/SPI
  system interfaces.
 
+config DRM_PANEL_SITRONIX_ST7703
+   tristate "Sitronix ST7703 panel driver"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for the Sitronix
+ ST7703 controller for 720X1440 LCD panels with MIPI/RGB/SPI
+ system interfaces.
+
 config DRM_PANEL_SITRONIX_ST7789V
tristate "Sitronix ST7789V panel"
depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index de74f282c433..47f4789a8685 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += 
panel-sharp-lq101r1sx01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS043T1LE01) += panel-sharp-ls043t1le01.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
+obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
new file mode 100644
index ..dbd46b6c0b46
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -0,0 +1,535 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DRM driver for Sitronix ST7703 MIPI DSI panel
+ *
+ * Copyright (C) 2020 Ondrej Jirman 
+ * Copyright (C) 2019-2020 Icenowy Zheng 
+ *
+ * Based on panel-rocktech-jh057n00900.c, which is:
+ *   Copyright (C) Purism SPC 2019
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/* Manufacturer specific DCS commands */
+#define ST7703_CMD_SETDISP 0xB2
+#define ST7703_CMD_SETRGBIF0xB3
+#define ST7703_CMD_SETCYC  0xB4
+#define ST7703_CMD_SETBGP  0xB5
+#define ST7703_CMD_SETVCOM 0xB6
+#define ST7703_CMD_SETOTP  0xB7
+#define ST7703_CMD_SETPOWER_EXT0xB8
+#define ST7703_CMD_SETEXTC 0xB9
+#define ST7703_CMD_SETMIPI 0xBA
+#define ST7703_CMD_SETVDC  0xBC
+#define ST7703_CMD_UNK_BF  0xBF
+#define ST7703_CMD_SETSCR  0xC0
+#define ST7703_CMD_SETPOWER0xC1
+#define ST7703_CMD_UNK_C6  0xC6
+#define ST7703_CMD_SETPANEL0xCC
+#define ST7703_CMD_RDID1   0xDA
+#define ST7703_CMD_RDID2   0xDB
+#define ST7703_CMD_RDID3   0xDC
+#define ST7703_CMD_SETGAMMA0xE0
+#define ST7703_CMD_SETEQ   0xE3
+#define ST7703_CMD_SETGIP1 0xE9
+#define ST7703_CMD_SETGIP2 0xEA
+
+struct st7703_panel_desc {
+   const struct drm_display_mode *mode;
+   unsigned int lanes;
+   unsigned long flags;
+   enum mipi_dsi_pixel_format format;
+   const char *const *supply_names;
+   unsigned int num_supplies;
+};
+
+struct st7703 {
+   struct device *dev;
+   struct drm_panel panel;
+   struct gpio_desc *reset_gpio;
+   struct regulator_bulk_data *supplies;
+   const struct st7703_panel_desc *desc;
+   bool prepared;
+};
+
+static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
+{
+   return container_of(panel, struct st7703, panel);
+}
+
+#define dsi_dcs_write_seq(dsi, cmd, seq...) do {   \
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d));   \
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+
+static int st7703_init_sequence(struct st7703 *ctx)
+{
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+   struct device *dev = ctx->dev;
+
+   /*
+* Init

[linux-sunxi] [PATCH v5 04/13] drm/panel: rocktech-jh057n00900: Rename the driver to st7703

2020-06-25 Thread Ondrej Jirman
This rename is done so that the driver matches the name of the
display controller and in preparation for adding support for more
panels to the driver.

This is just a basic file rename, with no code changes.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/Kconfig | 26 +--
 drivers/gpu/drm/panel/Makefile|  2 +-
 ...-jh057n00900.c => panel-sitronix-st7703.c} |  0
 3 files changed, 14 insertions(+), 14 deletions(-)
 rename drivers/gpu/drm/panel/{panel-rocktech-jh057n00900.c => 
panel-sitronix-st7703.c} (100%)

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 39055c1f0e2f..de2f2a452be5 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -283,19 +283,6 @@ config DRM_PANEL_RAYDIUM_RM68200
  Say Y here if you want to enable support for Raydium RM68200
  720x1280 DSI video mode panel.
 
-config DRM_PANEL_ROCKTECH_JH057N00900
-   tristate "Rocktech JH057N00900 MIPI touchscreen panel"
-   depends on OF
-   depends on DRM_MIPI_DSI
-   depends on BACKLIGHT_CLASS_DEVICE
-   help
- Say Y here if you want to enable support for Rocktech JH057N00900
- MIPI DSI panel as e.g. used in the Librem 5 devkit. It has a
- resolution of 720x1440 pixels, a built in backlight and touch
- controller.
- Touch input support is provided by the goodix driver and needs to be
- selected separately.
-
 config DRM_PANEL_RONBO_RB070D30
tristate "Ronbo Electronics RB070D30 panel"
depends on OF
@@ -395,6 +382,19 @@ config DRM_PANEL_SITRONIX_ST7701
  ST7701 controller for 480X864 LCD panels with MIPI/RGB/SPI
  system interfaces.
 
+config DRM_PANEL_SITRONIX_ST7703
+   tristate "Sitronix ST7703 based MIPI touchscreen panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for Sitronix ST7703 based
+ panels, souch as Rocktech JH057N00900 MIPI DSI panel as e.g. used in
+ the Librem 5 devkit. It has a resolution of 720x1440 pixels, a built
+ in backlight and touch controller.
+ Touch input support is provided by the goodix driver and needs to be
+ selected separately.
+
 config DRM_PANEL_SITRONIX_ST7789V
tristate "Sitronix ST7789V panel"
depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index de74f282c433..e45ceac6286f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00) += 
panel-panasonic-vvx10f034n00.o
 obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += 
panel-raspberrypi-touchscreen.o
 obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM67191) += panel-raydium-rm67191.o
 obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM68200) += panel-raydium-rm68200.o
-obj-$(CONFIG_DRM_PANEL_ROCKTECH_JH057N00900) += panel-rocktech-jh057n00900.o
 obj-$(CONFIG_DRM_PANEL_RONBO_RB070D30) += panel-ronbo-rb070d30.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D16D0) += panel-samsung-s6d16d0.o
@@ -41,6 +40,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += 
panel-sharp-lq101r1sx01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS043T1LE01) += panel-sharp-ls043t1le01.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
+obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
similarity index 100%
rename from drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
rename to drivers/gpu/drm/panel/panel-sitronix-st7703.c
-- 
2.27.0

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[linux-sunxi] [PATCH v5 13/13] arm64: dts: sun50i-a64-pinephone: Add touchscreen support

2020-06-25 Thread Ondrej Jirman
Pinephone has a Goodix GT917S capacitive touchscreen controller on
I2C0 bus. Add support for it.

Signed-off-by: Ondrej Jirman 
---
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index 85a7aa5efd32..2d5694446d17 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -123,6 +123,25 @@ &ehci1 {
status = "okay";
 };
 
+&i2c0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&i2c0_pins>;
+   status = "okay";
+
+   touchscreen@5d {
+   compatible = "goodix,gt917s", "goodix,gt911";
+   reg = <0x5d>;
+   interrupt-parent = <&pio>;
+   interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
+   irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+   reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+   AVDD28-supply = <®_ldo_io0>;
+   VDDIO-supply = <®_ldo_io0>;
+   touchscreen-size-x = <720>;
+   touchscreen-size-y = <1440>;
+   };
+};
+
 &i2c1 {
status = "okay";
 
-- 
2.27.0

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[linux-sunxi] [PATCH v5 10/13] drm/panel: st7703: Enter sleep after display off

2020-06-25 Thread Ondrej Jirman
The datasheet suggests to issue sleep in after display off
as a part of the panel's shutdown sequence.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 33611419059a..e771281eb547 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -394,8 +394,19 @@ static int st7703_disable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+   int ret;
+
+   ret = mipi_dsi_dcs_set_display_off(dsi);
+   if (ret < 0)
+   DRM_DEV_ERROR(ctx->dev,
+ "Failed to turn off the display: %d\n", ret);
 
-   return mipi_dsi_dcs_set_display_off(dsi);
+   ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+   if (ret < 0)
+   DRM_DEV_ERROR(ctx->dev,
+ "Failed to enter sleep mode: %d\n", ret);
+
+   return 0;
 }
 
 static int st7703_unprepare(struct drm_panel *panel)
-- 
2.27.0

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[linux-sunxi] [PATCH v5 05/13] drm/panel: st7703: Rename functions from jh057n prefix to st7703

2020-06-25 Thread Ondrej Jirman
This is done so that code that's not specific to a particular
jh057n panel is named after the controller. Functions specific
to the panel are kept named after the panel.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 90 ++-
 1 file changed, 46 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 38ff742bc120..511af659f273 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
+ * Driver for panels based on Sitronix ST7703 controller, souch as:
+ *
+ * - Rocktech jh057n00900 5.5" MIPI-DSI panel
  *
  * Copyright (C) Purism SPC 2019
  */
@@ -21,7 +23,7 @@
 #include 
 #include 
 
-#define DRV_NAME "panel-rocktech-jh057n00900"
+#define DRV_NAME "panel-sitronix-st7703"
 
 /* Manufacturer specific Commands send via DSI */
 #define ST7703_CMD_ALL_PIXEL_OFF 0x22
@@ -45,7 +47,7 @@
 #define ST7703_CMD_SETGIP1  0xE9
 #define ST7703_CMD_SETGIP2  0xEA
 
-struct jh057n {
+struct st7703 {
struct device *dev;
struct drm_panel panel;
struct gpio_desc *reset_gpio;
@@ -56,9 +58,9 @@ struct jh057n {
struct dentry *debugfs;
 };
 
-static inline struct jh057n *panel_to_jh057n(struct drm_panel *panel)
+static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
 {
-   return container_of(panel, struct jh057n, panel);
+   return container_of(panel, struct st7703, panel);
 }
 
 #define dsi_generic_write_seq(dsi, seq...) do {
\
@@ -69,7 +71,7 @@ static inline struct jh057n *panel_to_jh057n(struct drm_panel 
*panel)
return ret; \
} while (0)
 
-static int jh057n_init_sequence(struct jh057n *ctx)
+static int jh057n_init_sequence(struct st7703 *ctx)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
struct device *dev = ctx->dev;
@@ -141,9 +143,9 @@ static int jh057n_init_sequence(struct jh057n *ctx)
return 0;
 }
 
-static int jh057n_enable(struct drm_panel *panel)
+static int st7703_enable(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
ret = jh057n_init_sequence(ctx);
@@ -156,17 +158,17 @@ static int jh057n_enable(struct drm_panel *panel)
return 0;
 }
 
-static int jh057n_disable(struct drm_panel *panel)
+static int st7703_disable(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 
return mipi_dsi_dcs_set_display_off(dsi);
 }
 
-static int jh057n_unprepare(struct drm_panel *panel)
+static int st7703_unprepare(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
 
if (!ctx->prepared)
return 0;
@@ -178,9 +180,9 @@ static int jh057n_unprepare(struct drm_panel *panel)
return 0;
 }
 
-static int jh057n_prepare(struct drm_panel *panel)
+static int st7703_prepare(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
if (ctx->prepared)
@@ -230,10 +232,10 @@ static const struct drm_display_mode default_mode = {
.height_mm   = 130,
 };
 
-static int jh057n_get_modes(struct drm_panel *panel,
+static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
struct drm_display_mode *mode;
 
mode = drm_mode_duplicate(connector->dev, &default_mode);
@@ -254,17 +256,17 @@ static int jh057n_get_modes(struct drm_panel *panel,
return 1;
 }
 
-static const struct drm_panel_funcs jh057n_drm_funcs = {
-   .disable   = jh057n_disable,
-   .unprepare = jh057n_unprepare,
-   .prepare   = jh057n_prepare,
-   .enable= jh057n_enable,
-   .get_modes = jh057n_get_modes,
+static const struct drm_panel_funcs st7703_drm_funcs = {
+   .disable   = st7703_disable,
+   .unprepare = st7703_unprepare,
+   .prepare   = st7703_prepare,
+   .enable= st7703_enable,
+   .get_modes = st7703_get_modes,
 };
 
 static int allpixelson_set(void *data, u64 val)
 {
-   struct jh057n *ctx = data;
+   struct st7703 *ctx = data;
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 
DRM_DEV_DEBUG_DRIVER(ctx->dev, "Setting all pixels on\n");
@@ -282,7 +284,7 @@

[linux-sunxi] [PATCH v5 07/13] drm/panel: st7703: Move code specific to jh057n closer together

2020-06-25 Thread Ondrej Jirman
It's better than having it spread around the driver.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 50 +--
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 08cbc316266c..d03aab10cfef 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -153,6 +153,31 @@ static int jh057n_init_sequence(struct st7703 *ctx)
return 0;
 }
 
+static const struct drm_display_mode jh057n00900_mode = {
+   .hdisplay= 720,
+   .hsync_start = 720 + 90,
+   .hsync_end   = 720 + 90 + 20,
+   .htotal  = 720 + 90 + 20 + 20,
+   .vdisplay= 1440,
+   .vsync_start = 1440 + 20,
+   .vsync_end   = 1440 + 20 + 4,
+   .vtotal  = 1440 + 20 + 4 + 12,
+   .vrefresh= 60,
+   .clock   = 75276,
+   .flags   = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+   .width_mm= 65,
+   .height_mm   = 130,
+};
+
+struct st7703_panel_desc jh057n00900_panel_desc = {
+   .mode = &jh057n00900_mode,
+   .lanes = 4,
+   .mode_flags = MIPI_DSI_MODE_VIDEO |
+   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+   .format = MIPI_DSI_FMT_RGB888,
+   .init_sequence = jh057n_init_sequence,
+};
+
 static int st7703_enable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
@@ -226,31 +251,6 @@ static int st7703_prepare(struct drm_panel *panel)
return ret;
 }
 
-static const struct drm_display_mode jh057n00900_mode = {
-   .hdisplay= 720,
-   .hsync_start = 720 + 90,
-   .hsync_end   = 720 + 90 + 20,
-   .htotal  = 720 + 90 + 20 + 20,
-   .vdisplay= 1440,
-   .vsync_start = 1440 + 20,
-   .vsync_end   = 1440 + 20 + 4,
-   .vtotal  = 1440 + 20 + 4 + 12,
-   .vrefresh= 60,
-   .clock   = 75276,
-   .flags   = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
-   .width_mm= 65,
-   .height_mm   = 130,
-};
-
-struct st7703_panel_desc jh057n00900_panel_desc = {
-   .mode = &jh057n00900_mode,
-   .lanes = 4,
-   .mode_flags = MIPI_DSI_MODE_VIDEO |
-   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
-   .format = MIPI_DSI_FMT_RGB888,
-   .init_sequence = jh057n_init_sequence,
-};
-
 static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
-- 
2.27.0

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[linux-sunxi] [PATCH v5 02/13] dt-bindings: panel: Convert rocktech,jh057n00900 to yaml

2020-06-25 Thread Ondrej Jirman
Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.

Signed-off-by: Ondrej Jirman 
---
 .../display/panel/rocktech,jh057n00900.txt| 23 ---
 .../display/panel/rocktech,jh057n00900.yaml   | 66 +++
 2 files changed, 66 insertions(+), 23 deletions(-)
 delete mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
 create mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt 
b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
deleted file mode 100644
index a372c5d84695..
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-Rocktech jh057n00900 5.5" 720x1440 TFT LCD panel
-
-Required properties:
-- compatible: should be "rocktech,jh057n00900"
-- reg: DSI virtual channel of the peripheral
-- reset-gpios: panel reset gpio
-- backlight: phandle of the backlight device attached to the panel
-- vcc-supply: phandle of the regulator that provides the vcc supply voltage.
-- iovcc-supply: phandle of the regulator that provides the iovcc supply
-  voltage.
-
-Example:
-
-   &mipi_dsi {
-   panel@0 {
-   compatible = "rocktech,jh057n00900";
-   reg = <0>;
-   backlight = <&backlight>;
-   reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
-   vcc-supply = <®_2v8_p>;
-   iovcc-supply = <®_1v8_p>;
-   };
-   };
diff --git 
a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml 
b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
new file mode 100644
index ..f97c48550741
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/rocktech,jh057n00900.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
+
+maintainers:
+  - Ondrej Jirman 
+
+description: |
+ Rocktech JH057N00900 is a 720x1440 TFT LCD panel
+ connected using a MIPI-DSI video interface.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+const: rocktech,jh057n00900
+
+  reg:
+maxItems: 1
+description: DSI virtual channel
+
+  vcc-supply:
+description: Panel power supply
+
+  vccio-supply:
+description: I/O voltage supply
+
+  reset-gpios:
+description: GPIO used for the reset pin
+maxItems: 1
+
+  backlight:
+description: Backlight used by the panel
+$ref: "/schemas/types.yaml#/definitions/phandle"
+
+required:
+  - compatible
+  - reg
+  - vcc-supply
+  - vccio-supply
+  - reset-gpios
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+
+dsi {
+  #address-cells = <1>;
+  #size-cells = <0>;
+  panel@0 {
+   compatible = "rocktech,jh057n00900";
+   reg = <0>;
+   vcc-supply = <®_2v8_p>;
+   iovcc-supply = <®_1v8_p>;
+   reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
+   backlight = <&backlight>;
+  };
+};
+...
-- 
2.27.0

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[linux-sunxi] [PATCH v5 00/13] Add support for PinePhone LCD panel

2020-06-25 Thread Ondrej Jirman
This patchset adds support for the LCD panel of PinePhone.

I've tested this on PinePhone 1.0 and 1.2.

Please take a look.

thank you and regards,
  Ondrej Jirman

Changes in v5:
- rewritten on top of rocktech-jh057n00900 driver
- rocktech-jh057n00900 renamed to st7703 (controller name)
- converted rocktech-jh057n00900 bindings to yaml and extended for xbd599

Changes in v4:
- use ->type from the mode instead of hardcoding (Samuel)
- move init_sequence to ->prepare (Samuel)
- move anti-flicker delay to ->enable, explain it (Samuel)
- add enter_sleep after display_off (Samuel)
- drop ->disable (move code to ->unprepare)
- add ID bytes dumping (Linus)
  (I can't test it since allwinner DSI driver has a broken
   dcs_read function, and I didn't manage to fix it.)
- document magic bytes (Linus)
- assert reset during powerup
- cleanup powerup timings according to the datasheet

Changes in v3:
- Panel driver renamed to the name of the LCD controller
- Re-organize the driver slightly to more easily support more panels
  based on the same controller.
- Add patch to enable the touchscreen to complete the LCD support
  on PinePhone.
- Dropped the "DSI fix" patch (the driver seems to work for me without it)
- Improved brightness levels handling:
  - PinePhone 1.0 uses default levels generated by the driver
  - On PinePhone 1.1 duty cycles < 20% lead to black screen, so
default levels can't be used. Martijn Braam came up with a
list of duty cycle values that lead to perception of linear
brigtness level <-> light intensity on PinePhone 1.1
- There was some feedback on v2 about this being similar to st7701.
  It's only similar in name. Most of the "user commands" are different,
  so I opted to keep this in a new driver instead of creating st770x.
  
  Anyone who likes to check the differences, here are datasheets:

  - https://megous.com/dl/tmp/ST7703_DS_v01_20160128.pdf
  - https://megous.com/dl/tmp/ST7701.pdf

Changes in v2:
- DT Example fix.
- DT Format fix.
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.


-- For phone owners: --

There's an open question on how to set the backlight brightness values
on post 1.0 revision phone, since lower duty cycles (< 10-20%) lead
to backlight being black. It would be nice if more people can test
the various backlight levels on 1.1 and 1.2 revision with this change
in dts:

   brightness-levels = <0 1000>;
   num-interpolated-steps = <1000>;

and report at what brightness level the backlight turns on. So far it
seems this has a wide range. Lowest useable duty cycle for me is ~7%
on 1.2 and for Martijn ~20% on 1.1.

Icenowy Zheng (2):
  dt-bindings: vendor-prefixes: Add Xingbangda
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

Ondrej Jirman (11):
  dt-bindings: panel: Convert rocktech,jh057n00900 to yaml
  dt-bindings: panel: Add compatible for Xingbangda XBD599 panel
  drm/panel: rocktech-jh057n00900: Rename the driver to st7703
  drm/panel: st7703: Rename functions from jh057n prefix to st7703
  drm/panel: st7703: Prepare for supporting multiple panels
  drm/panel: st7703: Move code specific to jh057n closer together
  drm/panel: st7703: Move generic part of init sequence to enable
callback
  drm/panel: st7703: Add support for Xingbangda XBD599
  drm/panel: st7703: Enter sleep after display off
  drm/panel: st7703: Assert reset prior to powering down the regulators
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support

 .../display/panel/rocktech,jh057n00900.txt|  23 -
 .../display/panel/rocktech,jh057n00900.yaml   |  70 ++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  19 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   |  54 ++
 drivers/gpu/drm/panel/Kconfig |  26 +-
 drivers/gpu/drm/panel/Makefile|   2 +-
 .../drm/panel/panel-rocktech-jh057n00900.c| 424 
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 655 ++
 9 files changed, 814 insertions(+), 461 deletions(-)
 delete mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
 create mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
 delete mode 100644 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

-- 
2.27.0

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[linux-sunxi] [PATCH v5 12/13] arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

2020-06-25 Thread Ondrej Jirman
From: Icenowy Zheng 

PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.

Backlight levels curve was optimized by Martijn Braam using a
lux meter.

Add its device nodes.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Martijn Braam 
Signed-off-by: Ondrej Jirman 
---
 .../allwinner/sun50i-a64-pinephone-1.1.dts| 19 ++
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   | 35 +++
 2 files changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
index 06a775c41664..3e99a87e9ce5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
@@ -9,3 +9,22 @@ / {
model = "Pine64 PinePhone Braveheart (1.1)";
compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
 };
+
+&backlight {
+   power-supply = <®_ldo_io0>;
+   /*
+* PWM backlight circuit on this PinePhone revision was changed since
+* 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
+* being off is around 20%. Duty cycle for the lowest brightness level
+* also varries quite a bit between individual boards, so the lowest
+* value here was chosen as a safe default.
+*/
+   brightness-levels = <
+   774  793  814  842
+   882  935  1003 1088
+   1192 1316 1462 1633
+   1830 2054 2309 2596
+   2916 3271 3664 4096>;
+   num-interpolated-steps = <50>;
+   default-brightness-level = <400>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index cefda145c3c9..85a7aa5efd32 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -16,6 +16,13 @@ aliases {
serial0 = &uart0;
};
 
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   pwms = <&r_pwm 0 5 PWM_POLARITY_INVERTED>;
+   enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+   /* Backlight configuration differs per PinePhone revision. */
+   };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -84,6 +91,30 @@ &dai {
status = "okay";
 };
 
+&de {
+   status = "okay";
+};
+
+&dphy {
+   status = "okay";
+};
+
+&dsi {
+   vcc-dsi-supply = <®_dldo1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   panel@0 {
+   compatible = "xingbangda,xbd599";
+   reg = <0>;
+   reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */
+   iovcc-supply = <®_dldo2>;
+   vcc-supply = <®_ldo_io0>;
+   backlight = <&backlight>;
+   };
+};
+
 &ehci0 {
status = "okay";
 };
@@ -188,6 +219,10 @@ &r_pio {
 */
 };
 
+&r_pwm {
+   status = "okay";
+};
+
 &r_rsb {
status = "okay";
 
-- 
2.27.0

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[linux-sunxi] [PATCH v5 01/13] dt-bindings: vendor-prefixes: Add Xingbangda

2020-06-25 Thread Ondrej Jirman
From: Icenowy Zheng 

Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels for the PinePhone.

Add the vendor prefix of it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml 
b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 9aeab66be85f..740b116b179f 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1157,6 +1157,8 @@ patternProperties:
 description: Xiaomi Technology Co., Ltd.
   "^xillybus,.*":
 description: Xillybus Ltd.
+  "^xingbangda,.*":
+description: Shenzhen Xingbangda Display Technology Co., Ltd
   "^xinpeng,.*":
 description: Shenzhen Xinpeng Technology Co., Ltd
   "^xlnx,.*":
-- 
2.27.0

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[linux-sunxi] [PATCH v5 09/13] drm/panel: st7703: Add support for Xingbangda XBD599

2020-06-25 Thread Ondrej Jirman
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
PinePhone. Add support for it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 199 +-
 1 file changed, 197 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index cdbf7dfb4dd4..33611419059a 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -39,10 +39,11 @@
 #define ST7703_CMD_SETEXTC  0xB9
 #define ST7703_CMD_SETMIPI  0xBA
 #define ST7703_CMD_SETVDC   0xBC
-#define ST7703_CMD_UNKNOWN0 0xBF
+#define ST7703_CMD_UNKNOWN_BF   0xBF
 #define ST7703_CMD_SETSCR   0xC0
 #define ST7703_CMD_SETPOWER 0xC1
 #define ST7703_CMD_SETPANEL 0xCC
+#define ST7703_CMD_UNKNOWN_C6   0xC6
 #define ST7703_CMD_SETGAMMA 0xE0
 #define ST7703_CMD_SETEQ0xE3
 #define ST7703_CMD_SETGIP1  0xE9
@@ -109,7 +110,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
msleep(20);
 
dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
-   dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00);
+   dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
  0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
  0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
@@ -163,6 +164,199 @@ struct st7703_panel_desc jh057n00900_panel_desc = {
.init_sequence = jh057n_init_sequence,
 };
 
+#define dsi_dcs_write_seq(dsi, cmd, seq...) do {   \
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d));   \
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+
+static int xbd599_init_sequence(struct st7703 *ctx)
+{
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+   /*
+* Init sequence was supplied by the panel vendor.
+*/
+
+   /* Magic sequence to unlock user commands below. */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
+
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
+ 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */
+ 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */
+ 0x05, /* IHSRX = x6 (Low High Speed driving ability) 
*/
+ 0xF9, /* TX_CLK_SEL = fDSICLK/16 */
+ 0x0E, /* HFP_OSC (min. HFP number in DSI mode) */
+ 0x0E, /* HBP_OSC (min. HBP number in DSI mode) */
+ /* The rest is undocumented in ST7703 datasheet */
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
+ 0x4F, 0x11, 0x00, 0x00, 0x37);
+
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
+ 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */
+ 0x22, /* DT = 15ms XDK_ECP = x2 */
+ 0x20, /* PFM_DC_DIV = /1 */
+ 0x03  /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */);
+
+   /* RGB I/F porch timing */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
+ 0x10, /* VBP_RGB_GEN */
+ 0x10, /* VFP_RGB_GEN */
+ 0x05, /* DE_BP_RGB_GEN */
+ 0x05, /* DE_FP_RGB_GEN */
+ /* The rest is undocumented in ST7703 datasheet */
+ 0x03, 0xFF,
+ 0x00, 0x00,
+ 0x00, 0x00);
+
+   /* Source driving settings. */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
+ 0x73, /* N_POPON */
+ 0x73, /* N_NOPON */
+ 0x50, /* I_POPON */
+ 0x50, /* I_NOPON */
+ 0x00, /* SCR[31,24] */
+ 0xC0, /* SCR[23,16] */
+ 0x08, /* SCR[15,8] */
+ 0x70, /* SCR[7,0] */
+ 0x00  /* Undocumented */);
+
+   /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
+
+   /*
+* SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan)
+* REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR)
+*/
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
+
+   /* Zig-Zag Type C colum

[linux-sunxi] [PATCH v5 06/13] drm/panel: st7703: Prepare for supporting multiple panels

2020-06-25 Thread Ondrej Jirman
Parametrize the driver so that it can support more panels based
on st7703 controller.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 43 +--
 1 file changed, 31 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 511af659f273..08cbc316266c 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -56,6 +57,15 @@ struct st7703 {
bool prepared;
 
struct dentry *debugfs;
+   const struct st7703_panel_desc *desc;
+};
+
+struct st7703_panel_desc {
+   const struct drm_display_mode *mode;
+   unsigned int lanes;
+   unsigned long mode_flags;
+   enum mipi_dsi_pixel_format format;
+   int (*init_sequence)(struct st7703 *ctx);
 };
 
 static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
@@ -148,7 +158,7 @@ static int st7703_enable(struct drm_panel *panel)
struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
-   ret = jh057n_init_sequence(ctx);
+   ret = ctx->desc->init_sequence(ctx);
if (ret < 0) {
DRM_DEV_ERROR(ctx->dev, "Panel init sequence failed: %d\n",
  ret);
@@ -216,7 +226,7 @@ static int st7703_prepare(struct drm_panel *panel)
return ret;
 }
 
-static const struct drm_display_mode default_mode = {
+static const struct drm_display_mode jh057n00900_mode = {
.hdisplay= 720,
.hsync_start = 720 + 90,
.hsync_end   = 720 + 90 + 20,
@@ -232,17 +242,26 @@ static const struct drm_display_mode default_mode = {
.height_mm   = 130,
 };
 
+struct st7703_panel_desc jh057n00900_panel_desc = {
+   .mode = &jh057n00900_mode,
+   .lanes = 4,
+   .mode_flags = MIPI_DSI_MODE_VIDEO |
+   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+   .format = MIPI_DSI_FMT_RGB888,
+   .init_sequence = jh057n_init_sequence,
+};
+
 static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
struct st7703 *ctx = panel_to_st7703(panel);
struct drm_display_mode *mode;
 
-   mode = drm_mode_duplicate(connector->dev, &default_mode);
+   mode = drm_mode_duplicate(connector->dev, ctx->desc->mode);
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n",
- default_mode.hdisplay, default_mode.vdisplay,
- default_mode.vrefresh);
+ ctx->desc->mode->hdisplay, 
ctx->desc->mode->vdisplay,
+ ctx->desc->mode->vrefresh);
return -ENOMEM;
}
 
@@ -317,11 +336,11 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
mipi_dsi_set_drvdata(dsi, ctx);
 
ctx->dev = dev;
+   ctx->desc = of_device_get_match_data(dev);
 
-   dsi->lanes = 4;
-   dsi->format = MIPI_DSI_FMT_RGB888;
-   dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
-   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+   dsi->mode_flags = ctx->desc->mode_flags;
+   dsi->format = ctx->desc->format;
+   dsi->lanes = ctx->desc->lanes;
 
ctx->vcc = devm_regulator_get(dev, "vcc");
if (IS_ERR(ctx->vcc)) {
@@ -361,8 +380,8 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
}
 
DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n",
-default_mode.hdisplay, default_mode.vdisplay,
-default_mode.vrefresh,
+ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay,
+ctx->desc->mode->vrefresh,
 mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes);
 
st7703_debugfs_init(ctx);
@@ -405,7 +424,7 @@ static int st7703_remove(struct mipi_dsi_device *dsi)
 }
 
 static const struct of_device_id st7703_of_match[] = {
-   { .compatible = "rocktech,jh057n00900" },
+   { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc 
},
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, st7703_of_match);
-- 
2.27.0

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[linux-sunxi] [PATCH v5 11/13] drm/panel: st7703: Assert reset prior to powering down the regulators

2020-06-25 Thread Ondrej Jirman
The reset pin is inverted, so if we don't assert reset, the actual gpio
will be high and may keep driving the IO port of the panel.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index e771281eb547..92930e127559 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -416,6 +416,7 @@ static int st7703_unprepare(struct drm_panel *panel)
if (!ctx->prepared)
return 0;
 
+   gpiod_set_value_cansleep(ctx->reset_gpio, 1);
regulator_disable(ctx->iovcc);
regulator_disable(ctx->vcc);
ctx->prepared = false;
-- 
2.27.0

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[linux-sunxi] [PATCH v5 08/13] drm/panel: st7703: Move generic part of init sequence to enable callback

2020-06-25 Thread Ondrej Jirman
Calling sleep out and display on is a controller specific part
of the initialization process. Move it out of the panel specific
initialization function to the enable callback.

Signed-off-by: Ondrej Jirman 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 33 ++-
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index d03aab10cfef..cdbf7dfb4dd4 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -84,8 +84,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel 
*panel)
 static int jh057n_init_sequence(struct st7703 *ctx)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-   struct device *dev = ctx->dev;
-   int ret;
 
/*
 * Init sequence was supplied by the panel vendor. Most of the commands
@@ -136,20 +134,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
  0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
  0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10,
  0x11, 0x18);
-   msleep(20);
-
-   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
-   if (ret < 0) {
-   DRM_DEV_ERROR(dev, "Failed to exit sleep mode: %d\n", ret);
-   return ret;
-   }
-   /* Panel is operational 120 msec after reset */
-   msleep(60);
-   ret = mipi_dsi_dcs_set_display_on(dsi);
-   if (ret)
-   return ret;
 
-   DRM_DEV_DEBUG_DRIVER(dev, "Panel init sequence done\n");
return 0;
 }
 
@@ -181,6 +166,7 @@ struct st7703_panel_desc jh057n00900_panel_desc = {
 static int st7703_enable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
int ret;
 
ret = ctx->desc->init_sequence(ctx);
@@ -190,6 +176,23 @@ static int st7703_enable(struct drm_panel *panel)
return ret;
}
 
+   msleep(20);
+
+   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+   if (ret < 0) {
+   DRM_DEV_ERROR(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
+   return ret;
+   }
+
+   /* Panel is operational 120 msec after reset */
+   msleep(60);
+
+   ret = mipi_dsi_dcs_set_display_on(dsi);
+   if (ret)
+   return ret;
+
+   DRM_DEV_DEBUG_DRIVER(ctx->dev, "Panel init sequence done\n");
+
return 0;
 }
 
-- 
2.27.0

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[linux-sunxi] [PATCH v5 03/13] dt-bindings: panel: Add compatible for Xingbangda XBD599 panel

2020-06-25 Thread Ondrej Jirman
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on
Sitronix ST7703 LCD controller just like rocktech,jh057n00900. It is
used in PinePhone.

Add a compatible for it.

Signed-off-by: Ondrej Jirman 
---
 .../bindings/display/panel/rocktech,jh057n00900.yaml| 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml 
b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index f97c48550741..4d43a1b36d7c 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -18,7 +18,11 @@ allOf:
 
 properties:
   compatible:
-const: rocktech,jh057n00900
+enum:
+# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
+  - rocktech,jh057n00900
+# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
+  - xingbangda,xbd599
 
   reg:
 maxItems: 1
-- 
2.27.0

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[linux-sunxi] [PATCH v6 06/13] drm/panel: st7703: Prepare for supporting multiple panels

2020-07-01 Thread Ondrej Jirman
Parametrize the driver so that it can support more panels based
on st7703 controller.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 43 +--
 1 file changed, 31 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 511af659f273..08cbc316266c 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -56,6 +57,15 @@ struct st7703 {
bool prepared;
 
struct dentry *debugfs;
+   const struct st7703_panel_desc *desc;
+};
+
+struct st7703_panel_desc {
+   const struct drm_display_mode *mode;
+   unsigned int lanes;
+   unsigned long mode_flags;
+   enum mipi_dsi_pixel_format format;
+   int (*init_sequence)(struct st7703 *ctx);
 };
 
 static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
@@ -148,7 +158,7 @@ static int st7703_enable(struct drm_panel *panel)
struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
-   ret = jh057n_init_sequence(ctx);
+   ret = ctx->desc->init_sequence(ctx);
if (ret < 0) {
DRM_DEV_ERROR(ctx->dev, "Panel init sequence failed: %d\n",
  ret);
@@ -216,7 +226,7 @@ static int st7703_prepare(struct drm_panel *panel)
return ret;
 }
 
-static const struct drm_display_mode default_mode = {
+static const struct drm_display_mode jh057n00900_mode = {
.hdisplay= 720,
.hsync_start = 720 + 90,
.hsync_end   = 720 + 90 + 20,
@@ -232,17 +242,26 @@ static const struct drm_display_mode default_mode = {
.height_mm   = 130,
 };
 
+struct st7703_panel_desc jh057n00900_panel_desc = {
+   .mode = &jh057n00900_mode,
+   .lanes = 4,
+   .mode_flags = MIPI_DSI_MODE_VIDEO |
+   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+   .format = MIPI_DSI_FMT_RGB888,
+   .init_sequence = jh057n_init_sequence,
+};
+
 static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
struct st7703 *ctx = panel_to_st7703(panel);
struct drm_display_mode *mode;
 
-   mode = drm_mode_duplicate(connector->dev, &default_mode);
+   mode = drm_mode_duplicate(connector->dev, ctx->desc->mode);
if (!mode) {
DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n",
- default_mode.hdisplay, default_mode.vdisplay,
- default_mode.vrefresh);
+ ctx->desc->mode->hdisplay, 
ctx->desc->mode->vdisplay,
+ ctx->desc->mode->vrefresh);
return -ENOMEM;
}
 
@@ -317,11 +336,11 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
mipi_dsi_set_drvdata(dsi, ctx);
 
ctx->dev = dev;
+   ctx->desc = of_device_get_match_data(dev);
 
-   dsi->lanes = 4;
-   dsi->format = MIPI_DSI_FMT_RGB888;
-   dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
-   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+   dsi->mode_flags = ctx->desc->mode_flags;
+   dsi->format = ctx->desc->format;
+   dsi->lanes = ctx->desc->lanes;
 
ctx->vcc = devm_regulator_get(dev, "vcc");
if (IS_ERR(ctx->vcc)) {
@@ -361,8 +380,8 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
}
 
DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n",
-default_mode.hdisplay, default_mode.vdisplay,
-default_mode.vrefresh,
+ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay,
+ctx->desc->mode->vrefresh,
 mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes);
 
st7703_debugfs_init(ctx);
@@ -405,7 +424,7 @@ static int st7703_remove(struct mipi_dsi_device *dsi)
 }
 
 static const struct of_device_id st7703_of_match[] = {
-   { .compatible = "rocktech,jh057n00900" },
+   { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc 
},
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, st7703_of_match);
-- 
2.27.0

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[linux-sunxi] [PATCH v6 00/13] Add support for PinePhone LCD panel

2020-07-01 Thread Ondrej Jirman
This patchset adds support for the LCD panel of PinePhone.

I've tested this on PinePhone 1.0 and 1.2.

Please take a look.

thank you and regards,
  Ondrej Jirman

Changes in v6:
- Fixed spacing in yaml
- Fixed wrong vccio->iovcc supply name in the bindings doc
- I noticed that the original driver uses a delay of 20ms in the init
  function to achieve a combined total of 120ms required from post-reset
  to display_on. I've added a similar delay to xbd599_init, so that
  xbd599 panel also has the right timing. (patch 9)
- v5->v6 diff: https://megous.com/dl/tmp/v5-v6.patch
- Added review/ack tags
- Learned to run dt_binding_check by myself ;)

Changes in v5:
- rewritten on top of rocktech-jh057n00900 driver
- rocktech-jh057n00900 renamed to st7703 (controller name)
- converted rocktech-jh057n00900 bindings to yaml and extended for xbd599

Changes in v4:
- use ->type from the mode instead of hardcoding (Samuel)
- move init_sequence to ->prepare (Samuel)
- move anti-flicker delay to ->enable, explain it (Samuel)
- add enter_sleep after display_off (Samuel)
- drop ->disable (move code to ->unprepare)
- add ID bytes dumping (Linus)
  (I can't test it since allwinner DSI driver has a broken
   dcs_read function, and I didn't manage to fix it.)
- document magic bytes (Linus)
- assert reset during powerup
- cleanup powerup timings according to the datasheet

Changes in v3:
- Panel driver renamed to the name of the LCD controller
- Re-organize the driver slightly to more easily support more panels
  based on the same controller.
- Add patch to enable the touchscreen to complete the LCD support
  on PinePhone.
- Dropped the "DSI fix" patch (the driver seems to work for me without it)
- Improved brightness levels handling:
  - PinePhone 1.0 uses default levels generated by the driver
  - On PinePhone 1.1 duty cycles < 20% lead to black screen, so
default levels can't be used. Martijn Braam came up with a
list of duty cycle values that lead to perception of linear
brigtness level <-> light intensity on PinePhone 1.1
- There was some feedback on v2 about this being similar to st7701.
  It's only similar in name. Most of the "user commands" are different,
  so I opted to keep this in a new driver instead of creating st770x.
  
  Anyone who likes to check the differences, here are datasheets:

  - https://megous.com/dl/tmp/ST7703_DS_v01_20160128.pdf
  - https://megous.com/dl/tmp/ST7701.pdf

Changes in v2:
- DT Example fix.
- DT Format fix.
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.


-- For phone owners: --

There's an open question on how to set the backlight brightness values
on post 1.0 revision phone, since lower duty cycles (< 10-20%) lead
to backlight being black. It would be nice if more people can test
the various backlight levels on 1.1 and 1.2 revision with this change
in dts:

   brightness-levels = <0 1000>;
   num-interpolated-steps = <1000>;

and report at what brightness level the backlight turns on. So far it
seems this has a wide range. Lowest useable duty cycle for me is ~7%
on 1.2 and for Martijn ~20% on 1.1.

Icenowy Zheng (2):
  dt-bindings: vendor-prefixes: Add Xingbangda
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone

Ondrej Jirman (11):
  dt-bindings: panel: Convert rocktech,jh057n00900 to yaml
  dt-bindings: panel: Add compatible for Xingbangda XBD599 panel
  drm/panel: rocktech-jh057n00900: Rename the driver to st7703
  drm/panel: st7703: Rename functions from jh057n prefix to st7703
  drm/panel: st7703: Prepare for supporting multiple panels
  drm/panel: st7703: Move code specific to jh057n closer together
  drm/panel: st7703: Move generic part of init sequence to enable
callback
  drm/panel: st7703: Add support for Xingbangda XBD599
  drm/panel: st7703: Enter sleep after display off
  drm/panel: st7703: Assert reset prior to powering down the regulators
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support

 .../display/panel/rocktech,jh057n00900.txt|  23 -
 .../display/panel/rocktech,jh057n00900.yaml   |  70 ++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 .../allwinner/sun50i-a64-pinephone-1.1.dts|  19 +
 .../dts/allwinner/sun50i-a64-pinephone.dtsi   |  54 ++
 drivers/gpu/drm/panel/Kconfig |  26 +-
 drivers/gpu/drm/panel/Makefile|   2 +-
 .../drm/panel/panel-rocktech-jh057n00900.c| 424 ---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 656 ++
 9 files changed, 815 insertions(+), 461 deletions(-)
 delete mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
 create mode 100644 
Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
 delete mode 100644 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
 create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c

-- 

[linux-sunxi] [PATCH v6 07/13] drm/panel: st7703: Move code specific to jh057n closer together

2020-07-01 Thread Ondrej Jirman
It's better than having it spread around the driver.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 50 +--
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 08cbc316266c..d03aab10cfef 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -153,6 +153,31 @@ static int jh057n_init_sequence(struct st7703 *ctx)
return 0;
 }
 
+static const struct drm_display_mode jh057n00900_mode = {
+   .hdisplay= 720,
+   .hsync_start = 720 + 90,
+   .hsync_end   = 720 + 90 + 20,
+   .htotal  = 720 + 90 + 20 + 20,
+   .vdisplay= 1440,
+   .vsync_start = 1440 + 20,
+   .vsync_end   = 1440 + 20 + 4,
+   .vtotal  = 1440 + 20 + 4 + 12,
+   .vrefresh= 60,
+   .clock   = 75276,
+   .flags   = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+   .width_mm= 65,
+   .height_mm   = 130,
+};
+
+struct st7703_panel_desc jh057n00900_panel_desc = {
+   .mode = &jh057n00900_mode,
+   .lanes = 4,
+   .mode_flags = MIPI_DSI_MODE_VIDEO |
+   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+   .format = MIPI_DSI_FMT_RGB888,
+   .init_sequence = jh057n_init_sequence,
+};
+
 static int st7703_enable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
@@ -226,31 +251,6 @@ static int st7703_prepare(struct drm_panel *panel)
return ret;
 }
 
-static const struct drm_display_mode jh057n00900_mode = {
-   .hdisplay= 720,
-   .hsync_start = 720 + 90,
-   .hsync_end   = 720 + 90 + 20,
-   .htotal  = 720 + 90 + 20 + 20,
-   .vdisplay= 1440,
-   .vsync_start = 1440 + 20,
-   .vsync_end   = 1440 + 20 + 4,
-   .vtotal  = 1440 + 20 + 4 + 12,
-   .vrefresh= 60,
-   .clock   = 75276,
-   .flags   = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
-   .width_mm= 65,
-   .height_mm   = 130,
-};
-
-struct st7703_panel_desc jh057n00900_panel_desc = {
-   .mode = &jh057n00900_mode,
-   .lanes = 4,
-   .mode_flags = MIPI_DSI_MODE_VIDEO |
-   MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
-   .format = MIPI_DSI_FMT_RGB888,
-   .init_sequence = jh057n_init_sequence,
-};
-
 static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
-- 
2.27.0

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[linux-sunxi] [PATCH v6 10/13] drm/panel: st7703: Enter sleep after display off

2020-07-01 Thread Ondrej Jirman
The datasheet suggests to issue sleep in after display off
as a part of the panel's shutdown sequence.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 5cd5503f894f..0c4167994d01 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -395,8 +395,19 @@ static int st7703_disable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+   int ret;
+
+   ret = mipi_dsi_dcs_set_display_off(dsi);
+   if (ret < 0)
+   DRM_DEV_ERROR(ctx->dev,
+ "Failed to turn off the display: %d\n", ret);
 
-   return mipi_dsi_dcs_set_display_off(dsi);
+   ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+   if (ret < 0)
+   DRM_DEV_ERROR(ctx->dev,
+ "Failed to enter sleep mode: %d\n", ret);
+
+   return 0;
 }
 
 static int st7703_unprepare(struct drm_panel *panel)
-- 
2.27.0

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[linux-sunxi] [PATCH v6 05/13] drm/panel: st7703: Rename functions from jh057n prefix to st7703

2020-07-01 Thread Ondrej Jirman
This is done so that code that's not specific to a particular
jh057n panel is named after the controller. Functions specific
to the panel are kept named after the panel.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 90 ++-
 1 file changed, 46 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 38ff742bc120..511af659f273 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
+ * Driver for panels based on Sitronix ST7703 controller, souch as:
+ *
+ * - Rocktech jh057n00900 5.5" MIPI-DSI panel
  *
  * Copyright (C) Purism SPC 2019
  */
@@ -21,7 +23,7 @@
 #include 
 #include 
 
-#define DRV_NAME "panel-rocktech-jh057n00900"
+#define DRV_NAME "panel-sitronix-st7703"
 
 /* Manufacturer specific Commands send via DSI */
 #define ST7703_CMD_ALL_PIXEL_OFF 0x22
@@ -45,7 +47,7 @@
 #define ST7703_CMD_SETGIP1  0xE9
 #define ST7703_CMD_SETGIP2  0xEA
 
-struct jh057n {
+struct st7703 {
struct device *dev;
struct drm_panel panel;
struct gpio_desc *reset_gpio;
@@ -56,9 +58,9 @@ struct jh057n {
struct dentry *debugfs;
 };
 
-static inline struct jh057n *panel_to_jh057n(struct drm_panel *panel)
+static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
 {
-   return container_of(panel, struct jh057n, panel);
+   return container_of(panel, struct st7703, panel);
 }
 
 #define dsi_generic_write_seq(dsi, seq...) do {
\
@@ -69,7 +71,7 @@ static inline struct jh057n *panel_to_jh057n(struct drm_panel 
*panel)
return ret; \
} while (0)
 
-static int jh057n_init_sequence(struct jh057n *ctx)
+static int jh057n_init_sequence(struct st7703 *ctx)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
struct device *dev = ctx->dev;
@@ -141,9 +143,9 @@ static int jh057n_init_sequence(struct jh057n *ctx)
return 0;
 }
 
-static int jh057n_enable(struct drm_panel *panel)
+static int st7703_enable(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
ret = jh057n_init_sequence(ctx);
@@ -156,17 +158,17 @@ static int jh057n_enable(struct drm_panel *panel)
return 0;
 }
 
-static int jh057n_disable(struct drm_panel *panel)
+static int st7703_disable(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 
return mipi_dsi_dcs_set_display_off(dsi);
 }
 
-static int jh057n_unprepare(struct drm_panel *panel)
+static int st7703_unprepare(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
 
if (!ctx->prepared)
return 0;
@@ -178,9 +180,9 @@ static int jh057n_unprepare(struct drm_panel *panel)
return 0;
 }
 
-static int jh057n_prepare(struct drm_panel *panel)
+static int st7703_prepare(struct drm_panel *panel)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
int ret;
 
if (ctx->prepared)
@@ -230,10 +232,10 @@ static const struct drm_display_mode default_mode = {
.height_mm   = 130,
 };
 
-static int jh057n_get_modes(struct drm_panel *panel,
+static int st7703_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
 {
-   struct jh057n *ctx = panel_to_jh057n(panel);
+   struct st7703 *ctx = panel_to_st7703(panel);
struct drm_display_mode *mode;
 
mode = drm_mode_duplicate(connector->dev, &default_mode);
@@ -254,17 +256,17 @@ static int jh057n_get_modes(struct drm_panel *panel,
return 1;
 }
 
-static const struct drm_panel_funcs jh057n_drm_funcs = {
-   .disable   = jh057n_disable,
-   .unprepare = jh057n_unprepare,
-   .prepare   = jh057n_prepare,
-   .enable= jh057n_enable,
-   .get_modes = jh057n_get_modes,
+static const struct drm_panel_funcs st7703_drm_funcs = {
+   .disable   = st7703_disable,
+   .unprepare = st7703_unprepare,
+   .prepare   = st7703_prepare,
+   .enable= st7703_enable,
+   .get_modes = st7703_get_modes,
 };
 
 static int allpixelson_set(void *data, u64 val)
 {
-   struct jh057n *ctx = data;
+   struct st7703 *ctx = data;
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
 
DRM_DEV_DEBUG_DRIVER(ctx->dev, "Setting all pixels on\n&q

[linux-sunxi] [PATCH v6 04/13] drm/panel: rocktech-jh057n00900: Rename the driver to st7703

2020-07-01 Thread Ondrej Jirman
This rename is done so that the driver matches the name of the
display controller and in preparation for adding support for more
panels to the driver.

This is just a basic file rename, with no code changes.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/Kconfig | 26 +--
 drivers/gpu/drm/panel/Makefile|  2 +-
 ...-jh057n00900.c => panel-sitronix-st7703.c} |  0
 3 files changed, 14 insertions(+), 14 deletions(-)
 rename drivers/gpu/drm/panel/{panel-rocktech-jh057n00900.c => 
panel-sitronix-st7703.c} (100%)

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 39055c1f0e2f..de2f2a452be5 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -283,19 +283,6 @@ config DRM_PANEL_RAYDIUM_RM68200
  Say Y here if you want to enable support for Raydium RM68200
  720x1280 DSI video mode panel.
 
-config DRM_PANEL_ROCKTECH_JH057N00900
-   tristate "Rocktech JH057N00900 MIPI touchscreen panel"
-   depends on OF
-   depends on DRM_MIPI_DSI
-   depends on BACKLIGHT_CLASS_DEVICE
-   help
- Say Y here if you want to enable support for Rocktech JH057N00900
- MIPI DSI panel as e.g. used in the Librem 5 devkit. It has a
- resolution of 720x1440 pixels, a built in backlight and touch
- controller.
- Touch input support is provided by the goodix driver and needs to be
- selected separately.
-
 config DRM_PANEL_RONBO_RB070D30
tristate "Ronbo Electronics RB070D30 panel"
depends on OF
@@ -395,6 +382,19 @@ config DRM_PANEL_SITRONIX_ST7701
  ST7701 controller for 480X864 LCD panels with MIPI/RGB/SPI
  system interfaces.
 
+config DRM_PANEL_SITRONIX_ST7703
+   tristate "Sitronix ST7703 based MIPI touchscreen panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for Sitronix ST7703 based
+ panels, souch as Rocktech JH057N00900 MIPI DSI panel as e.g. used in
+ the Librem 5 devkit. It has a resolution of 720x1440 pixels, a built
+ in backlight and touch controller.
+ Touch input support is provided by the goodix driver and needs to be
+ selected separately.
+
 config DRM_PANEL_SITRONIX_ST7789V
tristate "Sitronix ST7789V panel"
depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index de74f282c433..e45ceac6286f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00) += 
panel-panasonic-vvx10f034n00.o
 obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += 
panel-raspberrypi-touchscreen.o
 obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM67191) += panel-raydium-rm67191.o
 obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM68200) += panel-raydium-rm68200.o
-obj-$(CONFIG_DRM_PANEL_ROCKTECH_JH057N00900) += panel-rocktech-jh057n00900.o
 obj-$(CONFIG_DRM_PANEL_RONBO_RB070D30) += panel-ronbo-rb070d30.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D16D0) += panel-samsung-s6d16d0.o
@@ -41,6 +40,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += 
panel-sharp-lq101r1sx01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LS043T1LE01) += panel-sharp-ls043t1le01.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
+obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
 obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o
 obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
similarity index 100%
rename from drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
rename to drivers/gpu/drm/panel/panel-sitronix-st7703.c
-- 
2.27.0

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[linux-sunxi] [PATCH v6 09/13] drm/panel: st7703: Add support for Xingbangda XBD599

2020-07-01 Thread Ondrej Jirman
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
PinePhone. Add support for it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 200 +-
 1 file changed, 198 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index cdbf7dfb4dd4..5cd5503f894f 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -39,10 +39,11 @@
 #define ST7703_CMD_SETEXTC  0xB9
 #define ST7703_CMD_SETMIPI  0xBA
 #define ST7703_CMD_SETVDC   0xBC
-#define ST7703_CMD_UNKNOWN0 0xBF
+#define ST7703_CMD_UNKNOWN_BF   0xBF
 #define ST7703_CMD_SETSCR   0xC0
 #define ST7703_CMD_SETPOWER 0xC1
 #define ST7703_CMD_SETPANEL 0xCC
+#define ST7703_CMD_UNKNOWN_C6   0xC6
 #define ST7703_CMD_SETGAMMA 0xE0
 #define ST7703_CMD_SETEQ0xE3
 #define ST7703_CMD_SETGIP1  0xE9
@@ -109,7 +110,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
msleep(20);
 
dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
-   dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00);
+   dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
  0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
  0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
@@ -163,6 +164,200 @@ struct st7703_panel_desc jh057n00900_panel_desc = {
.init_sequence = jh057n_init_sequence,
 };
 
+#define dsi_dcs_write_seq(dsi, cmd, seq...) do {   \
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d));   \
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+
+static int xbd599_init_sequence(struct st7703 *ctx)
+{
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+   /*
+* Init sequence was supplied by the panel vendor.
+*/
+
+   /* Magic sequence to unlock user commands below. */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
+
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
+ 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */
+ 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */
+ 0x05, /* IHSRX = x6 (Low High Speed driving ability) 
*/
+ 0xF9, /* TX_CLK_SEL = fDSICLK/16 */
+ 0x0E, /* HFP_OSC (min. HFP number in DSI mode) */
+ 0x0E, /* HBP_OSC (min. HBP number in DSI mode) */
+ /* The rest is undocumented in ST7703 datasheet */
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
+ 0x4F, 0x11, 0x00, 0x00, 0x37);
+
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
+ 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */
+ 0x22, /* DT = 15ms XDK_ECP = x2 */
+ 0x20, /* PFM_DC_DIV = /1 */
+ 0x03  /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */);
+
+   /* RGB I/F porch timing */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
+ 0x10, /* VBP_RGB_GEN */
+ 0x10, /* VFP_RGB_GEN */
+ 0x05, /* DE_BP_RGB_GEN */
+ 0x05, /* DE_FP_RGB_GEN */
+ /* The rest is undocumented in ST7703 datasheet */
+ 0x03, 0xFF,
+ 0x00, 0x00,
+ 0x00, 0x00);
+
+   /* Source driving settings. */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
+ 0x73, /* N_POPON */
+ 0x73, /* N_NOPON */
+ 0x50, /* I_POPON */
+ 0x50, /* I_NOPON */
+ 0x00, /* SCR[31,24] */
+ 0xC0, /* SCR[23,16] */
+ 0x08, /* SCR[15,8] */
+ 0x70, /* SCR[7,0] */
+ 0x00  /* Undocumented */);
+
+   /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
+
+   /*
+* SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan)
+* REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR)
+*/
+   dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
+
+   /* Zig-Zag Ty

[linux-sunxi] [PATCH v6 08/13] drm/panel: st7703: Move generic part of init sequence to enable callback

2020-07-01 Thread Ondrej Jirman
Calling sleep out and display on is a controller specific part
of the initialization process. Move it out of the panel specific
initialization function to the enable callback.

Signed-off-by: Ondrej Jirman 
Reviewed-by: Linus Walleij 
---
 drivers/gpu/drm/panel/panel-sitronix-st7703.c | 33 ++-
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c 
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index d03aab10cfef..cdbf7dfb4dd4 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -84,8 +84,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel 
*panel)
 static int jh057n_init_sequence(struct st7703 *ctx)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-   struct device *dev = ctx->dev;
-   int ret;
 
/*
 * Init sequence was supplied by the panel vendor. Most of the commands
@@ -136,20 +134,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
  0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
  0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10,
  0x11, 0x18);
-   msleep(20);
-
-   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
-   if (ret < 0) {
-   DRM_DEV_ERROR(dev, "Failed to exit sleep mode: %d\n", ret);
-   return ret;
-   }
-   /* Panel is operational 120 msec after reset */
-   msleep(60);
-   ret = mipi_dsi_dcs_set_display_on(dsi);
-   if (ret)
-   return ret;
 
-   DRM_DEV_DEBUG_DRIVER(dev, "Panel init sequence done\n");
return 0;
 }
 
@@ -181,6 +166,7 @@ struct st7703_panel_desc jh057n00900_panel_desc = {
 static int st7703_enable(struct drm_panel *panel)
 {
struct st7703 *ctx = panel_to_st7703(panel);
+   struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
int ret;
 
ret = ctx->desc->init_sequence(ctx);
@@ -190,6 +176,23 @@ static int st7703_enable(struct drm_panel *panel)
return ret;
}
 
+   msleep(20);
+
+   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+   if (ret < 0) {
+   DRM_DEV_ERROR(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
+   return ret;
+   }
+
+   /* Panel is operational 120 msec after reset */
+   msleep(60);
+
+   ret = mipi_dsi_dcs_set_display_on(dsi);
+   if (ret)
+   return ret;
+
+   DRM_DEV_DEBUG_DRIVER(ctx->dev, "Panel init sequence done\n");
+
return 0;
 }
 
-- 
2.27.0

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[linux-sunxi] [PATCH v6 03/13] dt-bindings: panel: Add compatible for Xingbangda XBD599 panel

2020-07-01 Thread Ondrej Jirman
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on
Sitronix ST7703 LCD controller just like rocktech,jh057n00900. It is
used in PinePhone.

Add a compatible for it.

Signed-off-by: Ondrej Jirman 
---
 .../bindings/display/panel/rocktech,jh057n00900.yaml| 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml 
b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index 928ba42e7f8d..a6985cd947fb 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -18,7 +18,11 @@ allOf:
 
 properties:
   compatible:
-const: rocktech,jh057n00900
+enum:
+# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
+  - rocktech,jh057n00900
+# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
+  - xingbangda,xbd599
 
   reg:
 maxItems: 1
-- 
2.27.0

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