Hi,
On Fri, Jan 16, 2015 at 01:33:40PM +0100, Lars Doelle wrote:
Hi Maxime,
working on the dts for an A20 device, I'm currently at the nand.
I assume you are aware of the current state of the NAND, right?
Not exactly, so I better be explicit. I assume, that the linux-sunxi
/dev/nand
Hi Maxime,
working on the dts for an A20 device, I'm currently at the nand.
I assume you are aware of the current state of the NAND, right?
Not exactly, so I better be explicit. I assume, that the linux-sunxi
/dev/nand driver does not do any wear-level mapping on the first
blocks.
Thus I'd
Hello,
On 16 January 2015 at 13:33, Lars Doelle lars.doe...@on-line.de wrote:
Hi Maxime,
working on the dts for an A20 device, I'm currently at the nand.
I assume you are aware of the current state of the NAND, right?
Not exactly, so I better be explicit. I assume, that the linux-sunxi
On Thu, Jan 15, 2015 at 01:38:03PM +0100, Lars Doelle wrote:
Hi everyone,
working on the dts for an A20 device, I'm currently at the nand.
I assume you are aware of the current state of the NAND, right?
Looking at Documentation/devicetree/bindings/mtd/sunxi-nand.txt,
there are two parts
Hi everyone,
working on the dts for an A20 device, I'm currently at the nand.
Looking at Documentation/devicetree/bindings/mtd/sunxi-nand.txt,
there are two parts in the example, that do not really make sense
to me:
1) interrupts
Does anyone know what interrupt is refered to in the
