Re: [Mesa-dev] [PATCH] radv: add scratch support for spilling.

I'm not sure if using a scratch buffer per command buffer is correct. AFAIU each ring has a separate counter for the scratch offsets, and if a command buffer is used in multiple compute rings at the same time, these separate counters could conflict. I'd think we need a preamble IB per queue that

Re: [Mesa-dev] [PATCH 9/9] i965: Drop _mesa_meta_pbo_TexSubImage() even for gen < 6

I tested dropping meta here separately in the context of this bug: https://bugs.freedesktop.org/show_bug.cgi?id=99209 No regressions seen there. Tested-by: Tapani Pälli On 12/20/2016 04:45 PM, Topi Pohjolainen wrote: Signed-off-by: Topi Pohjolainen

[Mesa-dev] [PATCH] configure.ac: Remove redundant libglvnd stanza

There were two "libglvnd configuration" section in the squashed commit that added libglvnd support, while only one in the original libglvnd branch. A following commit moves one of them downwards. Now remove the upper "older" one and move GL_LIB name decision downwards after the new libglvnd

[Mesa-dev] [Bug 98002] Mud rendering bug in Portal 2

https://bugs.freedesktop.org/show_bug.cgi?id=98002 --- Comment #15 from Clément Guérin --- Today's Portal 2 update fixed the bug. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the

Re: [Mesa-dev] [PATCH] gallium/radeon: add a new HUD query for the number of mapped buffers

On 24/01/17 07:38 PM, Nicolai Hähnle wrote: > On 24.01.2017 11:34, Samuel Pitoiset wrote: >> On 01/24/2017 11:31 AM, Nicolai Hähnle wrote: >>> On 24.01.2017 11:25, Samuel Pitoiset wrote: On 01/24/2017 07:39 AM, Michel Dänzer wrote: > On 24/01/17 05:44 AM, Samuel Pitoiset wrote: >>

Re: [Mesa-dev] [PATCH] gallium/radeon: add a new HUD query for the number of mapped buffers

On 25/01/17 12:05 AM, Marek Olšák wrote: > On Tue, Jan 24, 2017 at 2:17 PM, Christian König > wrote: >> Am 24.01.2017 um 11:44 schrieb Samuel Pitoiset: >>> On 01/24/2017 11:38 AM, Nicolai Hähnle wrote: On 24.01.2017 11:34, Samuel Pitoiset wrote: > On 01/24/2017

Re: [Mesa-dev] [PATCH] gallium/radeon: add a new HUD query for the number of mapped buffers

On 24/01/17 07:18 PM, Nicolai Hähnle wrote: > On 24.01.2017 07:39, Michel Dänzer wrote: >> On 24/01/17 05:44 AM, Samuel Pitoiset wrote: >>> Useful when debugging applications which map too much VRAM. >> >> Is the number of mapped buffers really useful, as opposed to the total >> size of buffer

Re: [Mesa-dev] [PATCH 06/37] util: add a disk_cache_remove() function

On Tue, 2017-01-24 at 17:38 -0800, Eric Anholt wrote: > Timothy Arceri writes: > > > On Tue, 2017-01-24 at 15:54 -0800, Eric Anholt wrote: > > > Timothy Arceri writes: > > > > > > > From: Timothy Arceri > > > >

[Mesa-dev] [PATCH] radv: add scratch support for spilling.

From: Dave Airlie Currently LLVM 5.0 has support for spilling to a place pointed to by the user sgprs instead of using relocations. This is enabled by using the amdgcn-mesa-mesa3d triple. For compute gfx shaders we spill to a buffer pointed to by 64-bit address stored in

[Mesa-dev] [Bug 99527] Provide option for llvmpipe JIT code to run cleanly under valgrind

https://bugs.freedesktop.org/show_bug.cgi?id=99527 --- Comment #1 from Roland Scheidegger --- I agree it would be really nice if we wouldn't get valgrind errors. If you figure out how to fix it, patches welcome... I tried to look into it at some point but couldn't really

Re: [Mesa-dev] [PATCH 8/8] nir/spirv/glsl450: Implement IEEE-compliant handling of atan2(±∞, ±∞).

This appears to do the same thing as the GLSL change. This patch is Reviewed-by: Ian Romanick On 01/24/2017 03:26 PM, Francisco Jerez wrote: > --- > src/compiler/spirv/vtn_glsl450.c | 22 +- > 1 file changed, 21 insertions(+), 1 deletion(-) > >

Re: [Mesa-dev] [PATCH 7/8] glsl: Implement IEEE-compliant handling of atan2(±∞, ±∞).

This patch is Reviewed-by: Ian Romanick On 01/24/2017 03:26 PM, Francisco Jerez wrote: > --- > src/compiler/glsl/builtin_functions.cpp | 22 +- > 1 file changed, 21 insertions(+), 1 deletion(-) > > diff --git

Re: [Mesa-dev] [PATCH 5/8] glsl: Rewrite atan2 implementation to fix accuracy and handling of zero/infinity.

It's a real bummer that we have two implementations of this function that are basically written in assembly... I'm not sure what else you'd call generating IR by hand. The code review and maintenance costs are of the same magnitude for sure. We could move this to GLSL and let the standalone

Re: [Mesa-dev] [PATCH 06/37] util: add a disk_cache_remove() function

Timothy Arceri writes: > On Tue, 2017-01-24 at 15:54 -0800, Eric Anholt wrote: >> Timothy Arceri writes: >> >> > From: Timothy Arceri >> > >> > This will be used to remove cache items created with old versions

[Mesa-dev] [Bug 99527] Provide option for llvmpipe JIT code to run cleanly under valgrind

https://bugs.freedesktop.org/show_bug.cgi?id=99527 Bug ID: 99527 Summary: Provide option for llvmpipe JIT code to run cleanly under valgrind Product: Mesa Version: 13.0 Hardware: x86-64 (AMD64) OS: Linux

[Mesa-dev] [PATCH 1/4] mesa: Trivial clean-ups in uniform_query.cpp

From: Ian Romanick This is C++, so we can mix code and declarations. Doing so allows constification. Signed-off-by: Ian Romanick --- src/mesa/main/uniform_query.cpp | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff

[Mesa-dev] [PATCH 3/4] mesa: Arrange _mesa_uniform parameters to match the call sites

From: Ian Romanick By putting the parameters first that match the parameters to the call site, 4 (of 14) instructions are saved at _mesa_Uniform4fv on x64. On IA32, the details of the instructions change, but it is the same count and mix of instructions. Before:

[Mesa-dev] [PATCH 0/4] Micro optimizations for glUniform and glUniformMatrix

These are some patches that I wrote ages ago... the initial versions pre-date Mesa's ARB_gpu_shader_fp64 support. This was part of a larger effort that got bogged down and eventually abandonded. The problem with the larger series was trying to measure the performance impact. Random changes in

[Mesa-dev] [PATCH 4/4] mesa: Arrange validate_uniform_parameters parameters to match call sites

From: Ian Romanick Saves a measly 20 bytes on IA32 and nothing on x64. Depending on exactly when this is applied, a lot of variation is possible due to function alignment. textdata bss dec hex filename 6670131 228340 22552 6921023 699b3f

[Mesa-dev] [PATCH 2/4] mesa: Arrange _mesa_uniform_matrix parameters to match the call sites

From: Ian Romanick By putting the parameters first that match the parameters to the call site, 4 (of 16) instructions are saved at _mesa_UniformMatrix4fv on x64. On IA32, the details of the instructions change, but it is the same count and mix of instructions. Before:

Re: [Mesa-dev] [PATCH 08/37] glsl: add initial implementation of shader cache

On Tue, 2017-01-24 at 16:33 -0800, Eric Anholt wrote: > Timothy Arceri writes: > > > From: Timothy Arceri > > > > This uses disk_cache.c to write out a serialization of various > > state that's required in order to successfully load and use

[Mesa-dev] [PATCH] vulkan/wsi: Lower the maximum image sizes

--- src/vulkan/wsi/wsi_common_wayland.c | 3 ++- src/vulkan/wsi/wsi_common_x11.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/vulkan/wsi/wsi_common_wayland.c b/src/vulkan/wsi/wsi_common_wayland.c index c9c476e..bdb80a7 100644 ---

Re: [Mesa-dev] [PATCH 4/8] i965/fs: Fix nir_op_fsign of absolute value.

On 01/24/2017 03:26 PM, Francisco Jerez wrote: > This does point at the front-end emitting silly code that could have > been optimized out, but the current fsign implementation would emit > bogus IR if abs was set for the argument (because it would apply the > abs modifier on an unsigned integer

[Mesa-dev] [Bug 97879] [amdgpu] Rocket League: long hangs (several seconds) when loading assets (models/textures/shaders?)

https://bugs.freedesktop.org/show_bug.cgi?id=97879 --- Comment #54 from Michel Dänzer --- (In reply to Marek Olšák from comment #52) > 2) Make a screenshot of the sysprof window and send it to the game developer. Please save the profile in sysprof and send the saved data

Re: [Mesa-dev] [PATCH 2/8] glsl: Fix constant evaluation of the rcp op.

On 01/24/2017 03:26 PM, Francisco Jerez wrote: > Will avoid a regression in a future commit that introduces some > additional rcp operations. When I converted GLSL IR to ir_expression_operation.py, I was careful to keep all the expressions the same. rcp and div had these weird guards. GLSL

Re: [Mesa-dev] [PATCH] i965: Fix fast depth clears for surfaces with a dimension of 16384.

On Tue, Jan 24, 2017 at 03:32:28PM -0800, Kenneth Graunke wrote: > I hadn't bothered to set this bit because I figured it would just > paper over us getting the rectangle wrong. But it turns out that > there is a legitimate reason to use it, so let's do so. > > The alternative would be to chop

Re: [Mesa-dev] [PATCH] i965: Fix fast depth clears for surfaces with a dimension of 16384.

On Tue, Jan 24, 2017 at 3:32 PM, Kenneth Graunke wrote: > I hadn't bothered to set this bit because I figured it would just > paper over us getting the rectangle wrong. But it turns out that > there is a legitimate reason to use it, so let's do so. > > The alternative

Re: [Mesa-dev] [PATCH 3/8] glsl/ir_builder: Add rcp builder.

This patch is Reviewed-by: Ian Romanick Next time someone asks for a newbie task, we should have ir_builder be generated from ir_expression_operation.py. On 01/24/2017 03:26 PM, Francisco Jerez wrote: > --- > src/compiler/glsl/ir_builder.cpp | 6 ++ >

Re: [Mesa-dev] [PATCH] [swr] Update fs texture & sampler state logic

Reviewed-by: Bruce Cherniak > On Jan 24, 2017, at 5:27 PM, George Kyriazis > wrote: > > In swr_update_derived() update texture and sampler state on a new fragment > shader. GALLIUM_HUD can update fs using a previously bound texture and >

[Mesa-dev] [PATCH 2/2] vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetPresentModes

--- src/vulkan/wsi/wsi_common_wayland.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/vulkan/wsi/wsi_common_wayland.c b/src/vulkan/wsi/wsi_common_wayland.c index d745413..04cea97 100644 --- a/src/vulkan/wsi/wsi_common_wayland.c +++

[Mesa-dev] [PATCH 1/2] vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetFormats

--- src/vulkan/wsi/wsi_common_wayland.c | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/vulkan/wsi/wsi_common_wayland.c b/src/vulkan/wsi/wsi_common_wayland.c index 687ac9c..d745413 100644 --- a/src/vulkan/wsi/wsi_common_wayland.c +++

Re: [Mesa-dev] [PATCH 1/8] mesa/program: Translate csel operation from GLSL IR.

I'd swear that I wrote a nearly identical patch almost 2 years ago. The work that depended on it fizzled, so I never sent it out. The one difference is I had the following comment: /* We assume that Boolean true and false are 1.0 and 0.0. OPCODE_CMP * selects src1 if src0 is < 0,

Re: [Mesa-dev] [PATCH 08/37] glsl: add initial implementation of shader cache

Timothy Arceri writes: > From: Timothy Arceri > > This uses disk_cache.c to write out a serialization of various > state that's required in order to successfully load and use a > binary written out by a drivers backend, this state is referred

Re: [Mesa-dev] [PATCH 06/37] util: add a disk_cache_remove() function

On Tue, 2017-01-24 at 15:54 -0800, Eric Anholt wrote: > Timothy Arceri writes: > > > From: Timothy Arceri > > > > This will be used to remove cache items created with old versions > > of Mesa or other invalid cache items from the cache. > >

[Mesa-dev] [PATCH] mesa: Fix copy-and-paste bug in _mesa_(Program|)Uniform[1234](i|ui)64vARB functions

From: Ian Romanick All of the functions were passing 1 to _mesa_uniform instead of passing count. Fixes 16 unsed parameter warnings like: main/uniforms.c: In function ‘_mesa_Uniform1i64vARB’: main/uniforms.c:1692:47: warning: unused parameter ‘count’

Re: [Mesa-dev] [PATCH] i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.

Matt Turner writes: > On Tue, Jan 24, 2017 at 2:18 PM, Kenneth Graunke > wrote: >> SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message, >> using a source of g127 for the single register. With a UD type, this >> supposedly could read

Re: [Mesa-dev] [PATCH 02/37] glsl: Switch to disable-by-default for the GLSL shader cache

Timothy Arceri writes: > From: Carl Worth > > The shader cache is expected to be developed incrementally over a > fairly long series of commits. For that period of instability, we > require users to opt into the shader cache by setting: > >

Re: [Mesa-dev] [PATCH 06/37] util: add a disk_cache_remove() function

Timothy Arceri writes: > From: Timothy Arceri > > This will be used to remove cache items created with old versions > of Mesa or other invalid cache items from the cache. I'm not convinced that removing the item from cache when we get a hit

Re: [Mesa-dev] [PATCH] i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.

On Tue, Jan 24, 2017 at 2:18 PM, Kenneth Graunke wrote: > SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message, > using a source of g127 for the single register. With a UD type, this > supposedly could read g128, which doesn't exist, causing the simulator

[Mesa-dev] [PATCH 7/7] i965/blorp: Remove a pile of blorp_blit restrictions

Previously, blorp could only blit into something that was renderable. Thanks to recent additions to blorp, it can now blit into basically anything so long as it isn't compressed. --- src/mesa/drivers/dri/i965/brw_blorp.c | 64 +-- 1 file changed, 32 insertions(+),

[Mesa-dev] [PATCH 4/7] intel/blorp: Silently convert RGBX destination formats to RGBA

--- src/intel/blorp/blorp_blit.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index b964224..4d8942e 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -1883,6 +1883,10 @@ try_blorp_blit(struct

[Mesa-dev] [PATCH 6/7] anv: Allow blitting to/from any supported format

Now that blorp handles all the cases, why not? --- src/intel/vulkan/anv_formats.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c index f4183f0..2a924d5 100644 --- a/src/intel/vulkan/anv_formats.c +++

[Mesa-dev] [PATCH 2/7] intel/blorp: Handle more exotic destination formats

This commit adds support for using both R24_UNORM_X8_TYPELESS and R9G9B9E5_SHAREDEXP as destination formats even though the hardware does not support rendering to them. This is done by using a different format and emitting shader code to fake it the rest of the way. ---

[Mesa-dev] [PATCH 5/7] intel/blorp: Support the RGB workaround on more formats

Previously we only supported UINT formats because that's what blorp_copy required. If we want to use it in blorp_blit, however, we need to support everything. --- src/intel/blorp/blorp_blit.c | 73 1 file changed, 53 insertions(+), 20 deletions(-)

[Mesa-dev] [PATCH 1/7] blorp: Handle the RGB workaround more like other workarounds

The previous version was sort-of strapped on in that it just adjusted the blit rectangle and trusted in the fact that we would use texelFetch and round to the nearest integer to ensure that the component positions matched. This new version, while slightly more complicated, is more accurate

[Mesa-dev] [PATCH 3/7] intel/isl: Add some helpers for working with RGBX formats

--- src/intel/isl/isl.h| 11 +++ src/intel/isl/isl_format.c | 32 2 files changed, 43 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 07368f9..9d5b372 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1138,8

[Mesa-dev] [PATCH 5/8] glsl: Rewrite atan2 implementation to fix accuracy and handling of zero/infinity.

This addresses several issues of the current atan2 implementation: - Negative zero (and negative denorms which end up getting flushed to zero) isn't handled correctly by the current implementation. The reason is that it does 'y >= 0' and 'x < 0' comparisons to decide on which side of

[Mesa-dev] [PATCH 0/7] intel/blorp: Be able to blit to ANYTHING!!!

This somewhat tongue-in-cheek series adds support to BLORP for blitting to a lot more different destination formats. We now even support the crazy R9G9B9E5_SHAREDEXP format by emitting shader code to do the conversion. The result of this is that we can now use blorp for almost all blit operations

[Mesa-dev] [PATCH 4/8] i965/fs: Fix nir_op_fsign of absolute value.

This does point at the front-end emitting silly code that could have been optimized out, but the current fsign implementation would emit bogus IR if abs was set for the argument (because it would apply the abs modifier on an unsigned integer type), and we shouldn't rely on the upper layer's

[Mesa-dev] [PATCH 2/8] glsl: Fix constant evaluation of the rcp op.

Will avoid a regression in a future commit that introduces some additional rcp operations. --- src/compiler/glsl/ir_expression_operation.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/ir_expression_operation.py

[Mesa-dev] [PATCH 3/8] glsl/ir_builder: Add rcp builder.

--- src/compiler/glsl/ir_builder.cpp | 6 ++ src/compiler/glsl/ir_builder.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/compiler/glsl/ir_builder.cpp b/src/compiler/glsl/ir_builder.cpp index 0cee856..8d61533 100644 --- a/src/compiler/glsl/ir_builder.cpp +++

[Mesa-dev] [PATCH 6/8] nir/spirv/glsl450: Rewrite atan2 implementation to fix accuracy and handling of zero/infinity.

See "glsl: Rewrite atan2 implementation to fix accuracy and handling of zero/infinity." for the rationale, but note that the instruction count benefit discussed there is somewhat less important for the SPIRV implementation, because the current code already emitted no control flow instructions --

[Mesa-dev] [PATCH] [swr] Update fs texture & sampler state logic

In swr_update_derived() update texture and sampler state on a new fragment shader. GALLIUM_HUD can update fs using a previously bound texture and sampler. --- src/gallium/drivers/swr/swr_state.cpp | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH] i965: Fix fast depth clears for surfaces with a dimension of 16384.

I hadn't bothered to set this bit because I figured it would just paper over us getting the rectangle wrong. But it turns out that there is a legitimate reason to use it, so let's do so. The alternative would be to chop up 16k clears to multiple 8k clears, which is pointlessly painful.

[Mesa-dev] [PATCH 7/8] glsl: Implement IEEE-compliant handling of atan2(±∞, ±∞).

--- src/compiler/glsl/builtin_functions.cpp | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp index fd59381..9d6ab80 100644 --- a/src/compiler/glsl/builtin_functions.cpp +++

[Mesa-dev] [PATCH 8/8] nir/spirv/glsl450: Implement IEEE-compliant handling of atan2(±∞, ±∞).

--- src/compiler/spirv/vtn_glsl450.c | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c index 508f218..7af2dad 100644 --- a/src/compiler/spirv/vtn_glsl450.c +++

[Mesa-dev] [PATCH 1/8] mesa/program: Translate csel operation from GLSL IR.

This will be used internally by the GLSL front-end in order to implement some built-in functions. Plumb it through MESA IR for back-ends that rely on this translation pass. --- src/mesa/program/ir_to_mesa.cpp | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH 01/31] radv: program a default point size.

Reviewed-by: Bas Nieuwenhuizen On Fri, Jan 20, 2017 at 4:02 AM, Dave Airlie wrote: > From: Dave Airlie > > Along the lines of what > 3b804819 anv: Default PointSize to 1.0 if not written by the shader > does for anv, program a

Re: [Mesa-dev] [PATCH 23/31] radv/ac: handle case of swizzle with single components in get_alu_src.

How are you hitting this? The enclosing if is (need_swizzle || num_components != src_components) and if src_components = num_components = 1, then need_swizzle should be false? On Fri, Jan 20, 2017 at 4:03 AM, Dave Airlie wrote: > From: Dave Airlie > > This

Re: [Mesa-dev] [PATCH] radeonsi Add disk shader cache

On 24/01/2017 22:59, Timothy Arceri wrote: On Tue, 2017-01-24 at 18:10 +0100, kdj0c wrote: On 24/01/2017 17:40, Nicolai Hähnle wrote: On 24.01.2017 17:08, kdj0c wrote: use the util/disk_cache.c interface to cache some? radeonsi shaders on disk missing features : - add #if

Re: [Mesa-dev] [PATCH] anv: implement pipeline statistics queries

On Tue, Jan 24, 2017 at 2:37 PM, Ilia Mirkin wrote: > On Tue, Jan 24, 2017 at 5:27 PM, Robert Bragg wrote: >>> +/* >>> + * GPR0 = GPR0 >> 2; >>> + * >>> + * Note that the upper 30 bits of GPR are lost! >>> + */ >>> +static void

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Mark Janes changed: What|Removed |Added Depends on||96907 Referenced

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Mark Janes changed: What|Removed |Added Depends on||98892 Referenced

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Mark Janes changed: What|Removed |Added Depends on||99099 Referenced

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Mark Janes changed: What|Removed |Added Depends on||99266 Referenced

Re: [Mesa-dev] [PATCH] anv: implement pipeline statistics queries

On Tue, Jan 24, 2017 at 5:27 PM, Robert Bragg wrote: >> +/* >> + * GPR0 = GPR0 >> 2; >> + * >> + * Note that the upper 30 bits of GPR are lost! >> + */ >> +static void >> +shr_gpr0_by_2_bits(struct anv_batch *batch) >> +{ >> +

Re: [Mesa-dev] [PATCH] anv: implement pipeline statistics queries

Sorry for the delay responding here; some comments below... On Tue, Jan 24, 2017 at 11:48 AM, Ilia Mirkin wrote: > 2-month ping. [ok, it hasn't been 2 months on the dot, but ... close.] > > On Tue, Jan 10, 2017 at 5:49 PM, Ilia Mirkin wrote: >> ping.

[Mesa-dev] [PATCH] i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.

SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message, using a source of g127 for the single register. With a UD type, this supposedly could read g128, which doesn't exist, causing the simulator to get cranky. Use a UW type to avoid this. Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH] radeonsi Add disk shader cache

On Tue, 2017-01-24 at 18:10 +0100, kdj0c wrote: > On 24/01/2017 17:40, Nicolai Hähnle wrote: > > On 24.01.2017 17:08, kdj0c wrote: > > > use the util/disk_cache.c interface to cache some? radeonsi > > > shaders on disk > > > > > > missing features : > > > > > > - add #if ENABLE_SHADER_CACHE

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

On 24/01/2017 20:11, Matteo Bruni wrote: 2017-01-24 19:15 GMT+01:00 Ilia Mirkin : On Tue, Jan 24, 2017 at 1:11 PM, Matteo Bruni wrote: 2017-01-24 3:18 GMT+01:00 Ilia Mirkin : This matches the behavior of most other

Re: [Mesa-dev] [PATCH V3] glsl: lower constant arrays to uniform arrays before optimisation loop

On Tue, 2017-01-24 at 09:57 -0800, Eric Anholt wrote: > Timothy Arceri writes: > > > From: Timothy Arceri > > > > Previously the constant array would not get copy propagated until > > the backend > > did its GLSL IR opt loop. I plan on

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Mark Janes changed: What|Removed |Added Depends on||99509 Referenced

Re: [Mesa-dev] [PATCH] glsl: fix compile errors with mingw due to missing PRIx64 definitions

On 01/23/2017 11:21 AM, srol...@vmware.com wrote: > From: Roland Scheidegger > > define __STDC_FORMAT_MACROS and include (same as > ir_builder_print_visitor.cpp already does). > > Otherwise, some mingw build errors out (since > 8e7e1ae0365ddc7edb0d4d98250ab46728e6c14a and >

[Mesa-dev] [PATCH 5/5] utils/sha1: make _mesa_sha1_final a simple define around SHA1Final

From: Emil Velikov Swap the argument order as applicable. Signed-off-by: Emil Velikov --- Similar patch for _mesa_sha1_update will require a bunch of casting due to the data type, which imho makes things uglier. ---

[Mesa-dev] [PATCH 4/5] util/sha1: inline the final _mesa_sha1 wrappers inside the header

From: Emil Velikov Signed-off-by: Emil Velikov --- src/util/Makefile.sources | 1 - src/util/mesa-sha1.c | 57 --- src/util/mesa-sha1.h | 33 ++- 3 files

[Mesa-dev] [PATCH 3/5] util/sha1: drop _mesa_sha1_{update, format} return type

From: Emil Velikov Unused/unchecked by any of the callers. Signed-off-by: Emil Velikov --- src/util/mesa-sha1.c | 7 ++- src/util/mesa-sha1.h | 4 ++-- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH 2/5] util/sha1: rework _mesa_sha1_{init,final}

From: Emil Velikov Rather than having an extra memory allocation [that we currently do not and act accordingly] just make the API take an pointer to a stack allocated instance. This and follow-up steps will effectively make the _mesa_sha1_foo simple define/inlines

[Mesa-dev] [PATCH 1/5] util/sha1: add non-typedef name for the SHA1_CTX struct

From: Emil Velikov Using typedef(s) is not always the answer and makes it harder for people to do clever (or one might call nasty) things with the code. Add a struct name which we will use with follow-up commit. Signed-off-by: Emil Velikov

Re: [Mesa-dev] [PATCH] anv: implement pipeline statistics queries

2-month ping. [ok, it hasn't been 2 months on the dot, but ... close.] On Tue, Jan 10, 2017 at 5:49 PM, Ilia Mirkin wrote: > ping. > > On Thu, Dec 22, 2016 at 11:14 AM, Ilia Mirkin wrote: >> Ping? Any further comments/feedback/reviews? >> >> >> On Dec

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

On Tue, Jan 24, 2017 at 2:11 PM, Matteo Bruni wrote: > That doesn't help Wine or any "native" OpenGL application which > happens to depend on the old behavior. Oh, and another note on that - I *do* think it helps those applications. Because now they will no longer

Re: [Mesa-dev] [PATCH 2/2] r600g: add support for optionally using non-IEEE mul ops

I think of the first patch as a fix to the driver, and the second patch as a new feature. On Tue, Jan 24, 2017 at 2:27 PM, Nicolai Hähnle wrote: > No piglit regressions on Redwood with these two patches. Matteo's point > about switching the order of the patches around seems

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

On Tue, Jan 24, 2017 at 2:11 PM, Matteo Bruni wrote: > 2017-01-24 19:15 GMT+01:00 Ilia Mirkin : >> On Tue, Jan 24, 2017 at 1:11 PM, Matteo Bruni >> wrote: >>> 2017-01-24 3:18 GMT+01:00 Ilia Mirkin :

Re: [Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

On Tue, Jan 24, 2017 at 11:25 AM, Emil Velikov wrote: > On 24 January 2017 at 18:02, Jason Ekstrand wrote: > > On Tue, Jan 24, 2017 at 9:03 AM, Matt Turner wrote: > >> > >> On Tue, Jan 24, 2017 at 8:41 AM, Emil Velikov

Re: [Mesa-dev] [PATCH 2/2] r600g: add support for optionally using non-IEEE mul ops

No piglit regressions on Redwood with these two patches. Matteo's point about switching the order of the patches around seems reasonable. Cheers, Nicolai On 24.01.2017 10:20, Nicolai Hähnle wrote: The series looks reasonable to me, so Reviewed-by: Nicolai Hähnle

Re: [Mesa-dev] [PATCH 3/7] gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layout

This patch breaks piglit ./bin/ext_image_dma_buf_import-refcount -auto -fbo at least on Redwood. VI seems to be fine. Nicolai On 20.01.2017 20:07, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 4 +++- 1 file changed, 3

Re: [Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

On 24 January 2017 at 18:02, Jason Ekstrand wrote: > On Tue, Jan 24, 2017 at 9:03 AM, Matt Turner wrote: >> >> On Tue, Jan 24, 2017 at 8:41 AM, Emil Velikov >> wrote: >> > On 24 January 2017 at 00:54, Matt Turner

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

2017-01-24 19:15 GMT+01:00 Ilia Mirkin : > On Tue, Jan 24, 2017 at 1:11 PM, Matteo Bruni > wrote: >> 2017-01-24 3:18 GMT+01:00 Ilia Mirkin : >>> This matches the behavior of most other drivers, including nouveau. >> >> Doesn't

Re: [Mesa-dev] [PATCH 1/2] anv: bail out if using loader interface prior to v3

On Tue, Jan 24, 2017 at 8:17 AM, Emil Velikov wrote: > On 24 January 2017 at 15:41, Chad Versace > wrote: > > On Tue 24 Jan 2017, Emil Velikov wrote: > >> From: Emil Velikov > >> > >> Strictly speaking we could add

Re: [Mesa-dev] [PATCH 1/6] anv: Set viewport extents correctly when height is negative

On 24/01/17 17:40, Jason Ekstrand wrote: On Tue, Jan 24, 2017 at 12:49 AM, Iago Toral > wrote: On Mon, 2017-01-23 at 14:12 -0800, Jason Ekstrand wrote: > As per VK_KHR_maintenance1, setting a negative height in the viewport > can be

Re: [Mesa-dev] [PATCH] spirv: handle gl_SampleMask

Reviewed-by: Jason Ekstrand On Tue, Jan 24, 2017 at 4:48 AM, Iago Toral Quiroga wrote: > SPIR-V maps both gl_SampleMask and gl_SampleMaskIn to the same > builtin (SampleMask). The only way to tell which one we are dealing with > is to check if it is an

[Mesa-dev] [Bug 97879] [amdgpu] Rocket League: long hangs (several seconds) when loading assets (models/textures/shaders?)

https://bugs.freedesktop.org/show_bug.cgi?id=97879 --- Comment #53 from Timothee Besset --- Hello! I have started working on this. I haven't found the root cause yet but I will update here when I have something. (For context, I did the initial port work for Psyonix. I just

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

On Tue, Jan 24, 2017 at 1:11 PM, Matteo Bruni wrote: > 2017-01-24 3:18 GMT+01:00 Ilia Mirkin : >> This matches the behavior of most other drivers, including nouveau. > > Doesn't this break all the applications depending on d3d9 NaN behavior >

Re: [Mesa-dev] [PATCH] glsl: fix compile errors with mingw due to missing PRIx64 definitions

Am 24.01.2017 um 14:23 schrieb Jose Fonseca: > On 23/01/17 19:21, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> define __STDC_FORMAT_MACROS and include (same as >> ir_builder_print_visitor.cpp already does). >> >> Otherwise, some mingw build errors out (since >>

Re: [Mesa-dev] [PATCH] spirv: handle gl_SampleMask

On Tue, Jan 24, 2017 at 4:48 AM, Iago Toral Quiroga wrote: > SPIR-V maps both gl_SampleMask and gl_SampleMaskIn to the same > builtin (SampleMask). The only way to tell which one we are dealing with > is to check if it is an input or an output. > > Fixes: >

Re: [Mesa-dev] [PATCH 1/2] r600g: use ieee variants of multiplication instructions

2017-01-24 3:18 GMT+01:00 Ilia Mirkin : > This matches the behavior of most other drivers, including nouveau. Doesn't this break all the applications depending on d3d9 NaN behavior (including, but not limited to, d3d9 games in Wine) on r600g? If I got this right, flipping

[Mesa-dev] [PATCH mesa 1/2] egl: update headers from registry

Khronos introduced a new macro (suggested by Google) to avoid using C-style casts in C++ code, as those generate warnings. Khronos Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16113 Signed-off-by: Eric Engestrom --- include/EGL/egl.h | 24 +++---

[Mesa-dev] [PATCH mesa 2/2] egl: EGL_PLATFORM_SURFACELESS_MESA is now upstream

EGL_PLATFORM_SURFACELESS_MESA is in eglext.h as of last commit. Signed-off-by: Eric Engestrom --- include/EGL/eglmesaext.h | 5 - 1 file changed, 5 deletions(-) diff --git a/include/EGL/eglmesaext.h b/include/EGL/eglmesaext.h index 405d0e9ee4..3a1b88e3d1 100644

Re: [Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

On Tue, Jan 24, 2017 at 9:03 AM, Matt Turner wrote: > On Tue, Jan 24, 2017 at 8:41 AM, Emil Velikov > wrote: > > On 24 January 2017 at 00:54, Matt Turner wrote: > >> These files belong to the vulkan loader. > > Fully agreed,

[Mesa-dev] [Bug 97879] [amdgpu] Rocket League: long hangs (several seconds) when loading assets (models/textures/shaders?)

https://bugs.freedesktop.org/show_bug.cgi?id=97879 --- Comment #52 from Marek Olšák --- We don't need a debug build. We just need: 1) One person to run the debug build and use sysprof to capture where the CPU is spending time during the freeze. 2) Make a screenshot of the

Re: [Mesa-dev] [PATCH V3] glsl: lower constant arrays to uniform arrays before optimisation loop

Timothy Arceri writes: > From: Timothy Arceri > > Previously the constant array would not get copy propagated until the backend > did its GLSL IR opt loop. I plan on removing that from i965 shortly which > caused huge regressions in Deus-ex

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