main/egldisplay.c: In function '_eglParseX11DisplayAttribList':
main/egldisplay.c:491:38: warning: cast to pointer from integer of different
size [-Wint-to-pointer-cast]
display->Options.Platform = (void *)value;
The fix: cast to uinptr_t before void*.
On Thu, May 4, 2017, at 05:42 AM, Emil Velikov wrote:
> Hi Chad,
>
> On 4 May 2017 at 00:47, Chad Versace <chadvers...@chromium.org> wrote:
> > From: Chad Versace <c...@kiwitree.net>
> >
> > This ensures that future calls to eglSwapBuffe
l/android: Cancel any outstanding ANativeBuffer in
> surface destructor")
> ---
> src/egl/drivers/dri2/platform_android.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
And pushed.
__
On Thu 04 May 2017, Emil Velikov wrote:
> Hi Chad,
>
> On 4 May 2017 at 00:47, Chad Versace <chadvers...@chromium.org> wrote:
> > From: Chad Versace <c...@kiwitree.net>
> >
> > This ensures that future calls to eglSwapBuffers and eglMakeCurrent emit
&
From: Chad Versace <c...@kiwitree.net>
Add a new bool, _EGLSurface::Lost, and check it in eglMakeCurrent and
eglSwapBuffers. The EGL 1.5 spec says that those functions emit errors
when the native surface is no longer valid.
This patch just updates core EGL. No driver sets _EGLSurface::Lo
From: Chad Versace <c...@kiwitree.net>
This ensures that future calls to eglSwapBuffers and eglMakeCurrent emit
an error.
This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.
Cc: Tomasz Fi
From: Chad Versace <c...@kiwitree.net>
That is, call ANativeWindow::cancelBuffer in droid_destroy_surface().
This should prevent application deadlock when the app destroys the
EGLSurface after EGL has acquired a buffer from SurfaceFlinger
(ANativeWindow::dequeueBuffer) but before E
On Wed 03 May 2017, Jason Ekstrand wrote:
> On Tue, May 2, 2017 at 5:15 PM, Chad Versace <[1]chadvers...@chromium.org>
> wrote:
>
> On Fri 14 Apr 2017, Jason Ekstrand wrote:
> > This implementation allocates a 4k BO for each semaphore that can be
> > exp
I'm stopping here for today and will resume tomorrow.
On Fri 14 Apr 2017, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_batch_chain.c | 96
> --
> src/intel/vulkan/anv_device.c | 25 ++
> src/intel/vulkan/anv_gem.c | 36
+ if (execbuf->flags & I915_EXEC_FENCE_OUT)
> + return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2_WR,
> execbuf);
> + else
> + return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
> }
Reviewed-by: Chad Versace <chadvers...@chromium.org&
Patches 10-15 are
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Fri 14 Apr 2017, Jason Ekstrand wrote:
> This implementation allocates a 4k BO for each semaphore that can be
> exported using OPAQUE_FD and uses the kernel's already-existing
> synchronization mechanism on BOs.
> ---
> src/intel/vulkan/anv_batch_chain.c | 53 ++--
>
On Sat 29 Apr 2017, Xu, Randy wrote:
> > -Original Message-
> > From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
> > Sent: Saturday, April 29, 2017 8:36 PM
> > To: Chad Versace <chadvers...@chromium.org>; Emil Velikov
> > <emil.l.veli...@gmail.com
transfer fd ownership to
the driver, and therefore no dup is needed. But that's a slightly more
invasive change that's not as easily backported to stable.
Reviewed-by: Chad Versace <chadvers...@chromium.org>
Cc: mesa-sta...@lists.freedesktop.org
Emil, how about one of us appends your extended
Drop it from x11_anv_wsi_image_create and x11_anv_wsi_image_free. The
functions are used by Wayland WSI too.
---
src/intel/vulkan/anv_wsi.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi.c
set(struct anv_cache_bo, bo) == 0. It should really be
rewritten to avoid the dereference after lookup failures.
> +}
Fix those three issues, and this patch will be
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Fri 14 Apr 2017, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_allocator.c | 3 +++
> src/intel/vulkan/anv_device.c| 5 +
> src/intel/vulkan/anv_private.h | 1 +
> src/intel/vulkan/anv_wsi.c | 1 +
> 4 files changed, 10 insertions(+)
Patch 3 is
Reviewe
.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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t;bo, _buffer->surface_relocs,
> - _buffer->pool->alloc);
> + >alloc);
Yep. vkQueueSubmit allows the submitted command buffers to come from
different pools.
The fix looks good.
Reviewed-by: Chad Versace <chadvers...@chromium.org>
[...]
__
vulkan/anv_queue.c| 13 +
> 3 files changed, 18 insertions(+)
That's simple enough.
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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could just be a dummy for use
Typo s/semaphores0/semaphores/
Other than the type,
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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size doesn't match the prime fd size as
>reported by lseek().
>
> v3 (Jason Ekstrand):
> - Get rid of the alloc parameter to all of the calls and just use
>device->alloc instead.
> - Allocate the correct amount of memory for the anv_cached_bo structure.
>
&g
On Tue 04 Apr 2017, Kenneth Graunke wrote:
> This series imports libdrm_intel into the i965 driver, hacks and
> slashes it down to size, and greatly simplifies our relocation
> handling.
You did it! IT'S FINALLY HAPPENING!!! Thanks for taking the leap.
>
isl_gen8.c | 64
>
> 1 file changed, 49 insertions(+), 15 deletions(-)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Mon 03 Apr 2017, Jason Ekstrand wrote:
> On Mon, Apr 3, 2017 at 3:45 PM, Chad Versace <chadvers...@chromium.org> wrote:
> > On Mon 03 Apr 2017, Jason Ekstrand wrote:
> > > On Mon, Apr 3, 2017 at 12:31 PM, Chad Versace <chadvers...@chromium.org>
> > >
On Mon 03 Apr 2017, Jason Ekstrand wrote:
> On Mon, Apr 3, 2017 at 5:19 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > > This cache allows us to easily ensure that we have a unique anv_bo for
>
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> DEALINGS
> +# IN THE SOFTWARE.
Oops. This patch adds an extra Makefile.sources.
Other than the dup'd file, patch 10 is
Reviewed-by: Chad Versace <
KHX. Reduces diff in
> future dma_buf patches.
>
> Co-authored-with: Chad Versace <chadvers...@chromium.org>
> ---
> src/intel/vulkan/anv_device.c | 71
> -
> src/intel/vulkan/anv_entrypoints_gen.py | 1 +
&g
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match
anv_wsi.c | 6 +++---
> 5 files changed, 29 insertions(+), 24 deletions(-)
Patch 8 is
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match
On Fri 31 Mar 2017, Chad Versace wrote:
> On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > This cache allows us to easily ensure that we have a unique anv_bo for
> > each gem handle. We'll need this in order to support multiple-import of
> > memory objects and semaphores.
> &
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match
On Thu 30 Mar 2017, Jason Ekstrand wrote:
> On Thu, Mar 30, 2017 at 11:27 AM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > On Mon 13 Mar 2017, Jason Ekstrand wrote:
> > > There's really nothing for us to do here. So long as the user doesn't
> > &
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> There's really nothing for us to do here. So long as the user doesn't
> set any crazy environment variables such as INTEL_VK_HIZ=false, all of
> the compression formats etc. should "just work" at least for opaque
> handle types.
I think the commit
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> From: Chad Versace <chadvers...@chromium.org>
>
> This is a complete but trivial implementation. It's trivial becasue We
> support no external memory capabilities yet. Most of the real work in
> this commit is in reworking
Already upstream.
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> ---
> src/util/vk_util.h | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/src/util/vk_util.h b/src/util/vk_util.h
> index e0b5d0b..0b9cb47 100644
> --- a/src/util/vk_util.h
> +++ b/src/util/vk_util.h
> @@
ivate.h| 2 +-
> 3 files changed, 6 insertions(+), 5 deletions(-)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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It should be a SHA-1 */
> - return false;
> + if (build_id_len < 20) {
> + return vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
> + "build-id too short. It needs to be a SHA");
In above line, s/SHA/SHA-1/, to distinguish from SHA-2 and SHA-3
Wi
On Tue 28 Mar 2017, Emil Velikov wrote:
> Hi Chad,
>
> On 25 March 2017 at 02:28, Chad Versace <chadvers...@chromium.org> wrote:
> > genX_bits.h contains the sizes of bitfields in genxml instructions,
> > structures, and registers. It also defines some functio
On Sat 25 Mar 2017, Dylan Baker wrote:
> Oh, for what it's worth (since I wrote part of this), with the one .keys()
> thing
> changed:
> Reviewed-by: Dylan Baker
Thanks
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On Sat 25 Mar 2017, Dylan Baker wrote:
> Quoting Chad Versace (2017-03-24 19:28:23)
> > genX_bits.h contains the sizes of bitfields in genxml instructions,
> > structures, and registers. It also defines some functions to query those
> > sizes.
> >
> > isl_su
On Sat 25 Mar 2017, Jason Ekstrand wrote:
>
>
> On March 24, 2017 7:29:05 PM Chad Versace <chadvers...@chromium.org> wrote:
>
> > Validate that isl_surf::row_pitch fits in the below bitfields,
> > if applicable based on isl_surf::usage.
> >
> &
All callers of isl_surf_init() that set 'min_row_pitch' wanted to
request an *exact* row pitch, as evidenced by nearby asserts, but isl
lacked API for doing so. Now that isl has an API for that, update the
code to use it.
v2: Assert that isl_surf_init() succeeds because the callers assume
it.
__attribute__((pure))
CONTAINER_Field_bits(const struct gen_device_info *devinfo);
v2 (Chad Versace):
- Parse the XML instead of scraping the generated gen*_pack.h headers.
v3 (Dylan Baker):
- Port to Mako.
v4 (Jason Ekstrand):
- Make the _bits functions take a gen_device_info.
v5
Validate that isl_surf::row_pitch fits in the below bitfields,
if applicable based on isl_surf::usage.
RENDER_SURFACE_STATE::SurfacePitch
RENDER_SURFACE_STATE::AuxiliarySurfacePitch
3DSTATE_DEPTH_BUFFER::SurfacePitch
3DSTATE_HIER_DEPTH_BUFFER::SurfacePitch
v2:
-Add a Makefile
Reviewed-by: Nanley Chery
Reviewed-by: Anuj Phogat
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 13 +++--
src/intel/isl/isl.h | 3 ---
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git
The caller does so by setting the new field
isl_surf_init_info::row_pitch.
v2: Validate the requested row_pitch.
Reviewed-by: Jason Ekstrand (v2)
---
src/intel/isl/isl.c | 14 +-
src/intel/isl/isl.h | 6 ++
2 files changed, 19 insertions(+), 1 deletion(-)
/android-ia/manifest.
- Fixes and cleanups to generator script. See patch's version log.
Chad Versace (5):
genxml: New generated header genX_bits.h (v5)
isl: Validate the calculated row pitch (v4)
isl: Let isl_surf_init's caller set the exact row pitch (v2)
intel: Fix requests for exact
Patches 6 and 7 are
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Fri 24 Mar 2017, Jason Ekstrand wrote:
> ---
> src/intel/genxml/gen6.xml | 8 ++--
> 1 file changed, 2 insertions(+), 6 deletions(-)
Thanks. I discovered these in writing my patches, but forgot to fix
them.
Reviewed-by: Chad Versace <chadvers...@
On Fri 24 Mar 2017, Jason Ekstrand wrote:
> We've never used it, it only exists on gen8, and the name of the struct
> contains piles of bad characters.
> ---
> src/intel/genxml/gen8.xml | 6 --
> 1 file changed, 6 deletions(-)
> -
wtf.
Reviewed-by: Chad Versace <cha
Patches 1 and 2 are pushed, with Emil's r-b.
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tions(-)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Tue 21 Mar 2017, Matt Turner wrote:
> On Tue, Mar 21, 2017 at 10:16 AM, Emil Velikov
> wrote:
> > On 21 March 2017 at 15:57, Matt Turner wrote:
> >> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov
> >> wrote:
> >>> On
On Tue 21 Mar 2017, Matt Turner wrote:
> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov
> wrote:
> > On 20 March 2017 at 18:30, Matt Turner wrote:
> >> On Mon, Mar 20, 2017 at 6:55 AM, Emil Velikov
> >> wrote:
> >>>
On Thu 23 Mar 2017, Jason Ekstrand wrote:
> On Wed, Mar 22, 2017 at 6:04 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > Validate that isl_surf::row_pitch fits in the below bitfields,
> > if applicable based on isl_surf::usage.
> >
> >
On Fri 24 Mar 2017, Emil Velikov wrote:
> Hi Chad,
>
> On 23 March 2017 at 01:04, Chad Versace <chadvers...@chromium.org> wrote:
> > Validate that isl_surf::row_pitch fits in the below bitfields,
> > if applicable based on isl_surf::usage.
> >
> >
genX_bits.h contains the sizes of bitfields in genxml instructions,
structures, and registers. It also defines some functions to query those
sizes.
isl_surf_init() will use the new header to validate that requested
pitches fit in their destination bitfields.
What's currently in genX_bits.h:
-
The caller does so by setting the new field
isl_surf_init_info::row_pitch.
v2: Validate the requested row_pitch.
Reviewed-by: Jason Ekstrand (v2)
---
src/intel/isl/isl.c | 14 +-
src/intel/isl/isl.h | 6 ++
2 files changed, 19 insertions(+), 1 deletion(-)
It does the obvious.
bdw => 80
hsw => 75
ivb => 70
...
g4x => 45
---
src/intel/common/gen_device_info.c | 11 +++
src/intel/common/gen_device_info.h | 3 +++
2 files changed, 14 insertions(+)
diff --git a/src/intel/common/gen_device_info.c
All callers of isl_surf_init() that set 'min_row_pitch' wanted to
request an *exact* row pitch, as evidenced by nearby asserts, but isl
lacked API for doing so. Now that isl has an API for that, update the
code to use it.
v2: Assert that isl_surf_init() succeeds because the callers assume
it.
Validate that isl_surf::row_pitch fits in the below bitfields,
if applicable based on isl_surf::usage.
RENDER_SURFACE_STATE::SurfacePitch
RENDER_SURFACE_STATE::AuxiliarySurfacePitch
3DSTATE_DEPTH_BUFFER::SurfacePitch
3DSTATE_HIER_DEPTH_BUFFER::SurfacePitch
v2: Add a Makefile
Reviewed-by: Nanley Chery
Reviewed-by: Anuj Phogat
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 13 +++--
src/intel/isl/isl.h | 3 ---
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git
The gen*_xml.h files depend on gen_zipped_file.py, not the gen*_pack.h
files.
---
src/intel/Makefile.genxml.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/Makefile.genxml.am b/src/intel/Makefile.genxml.am
index eab6ccd208d..01a02b63b44 100644
---
isl will use this for validating the depth buffer pitch.
---
src/intel/genxml/gen5.xml | 56 +++
1 file changed, 56 insertions(+)
diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 39fec3723f6..97c13699673 100644
---
to
view the Jenkins results, because they're behind the Intel firewall.
Chad Versace (9):
genxml: Define GENXML_XML_FILES in Makefile.sources
genxml: Fix gen_zipped_file.py dependency
genxml: New generated header genX_bits.h (v2)
genxml: Add 3DSTATE_DEPTH_BUFFER to gen5.xml
intel/common
The future header genX_bits.h will depend on GENXML_XML_FILES.
---
src/intel/Makefile.genxml.am | 9 +
src/intel/Makefile.sources | 10 ++
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/intel/Makefile.genxml.am b/src/intel/Makefile.genxml.am
index
On Wed 22 Mar 2017, Jason Ekstrand wrote:
> On Wed, Mar 22, 2017 at 2:02 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > On Wed 22 Mar 2017, Jason Ekstrand wrote:
> > > Wow... This is an impressive quantity of infastructure just to get the
&
.
> There's a few small requests below, but don't bother if they're too
> time consuming.
>
> On 21 March 2017 at 23:02, Chad Versace <chadvers...@chromium.org> wrote:
>
> > +genxml/genX_bits.h: genxml/gen_bits_header.py
> > +genxml/genX_bits.h: $(GENXML_
That's why we have the genxml, after all.
> On Tue, Mar 21, 2017 at 4:02 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
> > +REGEX = re.compile('^#define (?PGEN(?P[0-
> > 9]+)_(?P\w*Surface(Q?)Pitch)_bits).*$')
> >
>
> Can we please not use XML to gen
I believe 72c89522c23e54ef19d0a8a7fd85f791727a05d6 already does this.
On Tue 21 Mar 2017, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/.gitignore | 2 ++
> 1 file changed, 2 insertions(+)
> create mode 100644 src/mesa/drivers/dri/i965/.gitignore
>
> diff --git
On Tue 21 Mar 2017, Jason Ekstrand wrote:
> Found by inspection.
>
> Cc: "17.0 13.0" <mesa-sta...@lists.freedesktop.org>
> ---
> src/intel/vulkan/anv_image.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
Reviewed-by: Chad
Reviewed-by: Nanley Chery
Reviewed-by: Anuj Phogat
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 13 +++--
src/intel/isl/isl.h | 3 ---
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git
It does the obvious.
bdw => 80
hsw => 75
ivb => 70
...
g4x => 45
---
src/intel/common/gen_device_info.c | 11 +++
src/intel/common/gen_device_info.h | 3 +++
2 files changed, 14 insertions(+)
diff --git a/src/intel/common/gen_device_info.c
isl will use this for validating the depth buffer pitch.
---
src/intel/genxml/gen5.xml | 56 +++
1 file changed, 56 insertions(+)
diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 39fec3723f6..97c13699673 100644
---
Validate that isl_surf::row_pitch fits in the below bitfields,
if applicable based on isl_surf::usage.
RENDER_SURFACE_STATE::SurfacePitch
RENDER_SURFACE_STATE::AuxiliarySurfacePitch
3DSTATE_DEPTH_BUFFER::SurfacePitch
3DSTATE_HIER_DEPTH_BUFFER::SurfacePitch
---
src/intel/isl/isl.c
genX_bits.h contains the sizes of bitfields in genxml instructions,
structures, and registers. It also defines some functions to query those
sizes.
Currently, the bitfields in genX_bits.h are those whose name matches
/.*Surface(Q?)Pitch/.
isl_surf_init() will use the new header to validate that
For each structure or instruction member in gen*_pack.h whose name
matches /.*Surface(Q?)Pitch$", add a macro that defines the member's
bitfield size.
isl will use these macros to validate requested pitches.
Example: Changes to RENDER_SURFACE_STATE in gen9_pack.h:
#define
from genX_bits.h.
Testing:
I'm locally running dEQP-VK on Skylake. One failure in
dEQP-VK.memory.*, dEQP-VK.api.*.
I also pushed this to my 'jenkins' branch. But I no longer know to
view the Jenkins results, because they're behind the Intel firewall.
Chad Versace (8):
genxml: Add pitch
The caller does so by setting the new field
isl_surf_init_info::row_pitch.
v2: Validate the requested row_pitch.
Reviewed-by: Jason Ekstrand (v2)
---
src/intel/isl/isl.c | 14 +-
src/intel/isl/isl.h | 6 ++
2 files changed, 19 insertions(+), 1 deletion(-)
All callers of isl_surf_init() that set 'min_row_pitch' wanted to
request an *exact* row pitch, as evidenced by nearby asserts, but isl
lacked API for doing so. Now that isl has an API for that, update the
code to use it.
v2: Assert that isl_surf_init() succeeds because the callers assume
it.
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> They should probably assert that isl_surf_init succeeds instead.
Good point. I'll fix that.
>
> On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > All callers of isl_surf_init() that
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> Fun story: This will implicitly handle the (invalid) case of trying to
> create a MCS for a 16xMSAA surface that's more than 8k wide. :-) We may
> want to keep the check in init_mcs for clarity and because it's in the docs
> but the extra validation is
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> On Wed, Mar 15, 2017 at 3:34 PM, Nanley Chery <nanleych...@gmail.com> wrote:
>
> > On Mon, Mar 13, 2017 at 03:28:01PM -0700, Chad Versace wrote:
> > > Validate that it fits in RENDER_SURFACE_STATE::SurfacePitch or, i
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> > ---
> > src/intel/isl/isl.h | 9 +
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/src/intel/isl/isl.
Validate that it fits in RENDER_SURFACE_STATE::SurfacePitch or, if it's
an aux surface, AuxiliarySurfacePitch.
---
src/intel/isl/isl.c | 35 +--
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index
isl has a giant comment that explains the hardware's padding
requirements. (Hint: Cache lines and page faults). But the comment is in
the wrong place, in isl_calc_linear_row_pitch(), which is unrelated to
padding.
The important parts of that comment were copied to
isl_apply_surface_padding() long
---
src/intel/isl/isl.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 9d92906ca71..b79793b0c93 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -473,6 +473,9 @@ typedef uint32_t isl_tiling_flags_t;
/** The Skylake BSpec
The caller does so by setting the new field
isl_surf_init_info::row_pitch.
v2:
- Validate the requested row_pitch.
---
src/intel/isl/isl.c | 14 +-
src/intel/isl/isl.h | 6 ++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/src/intel/isl/isl.c
All callers of isl_surf_init() that set 'min_row_pitch' wanted to
request an *exact* row pitch, as evidenced by nearby asserts, but isl
lacked API for doing so. Now that isl has an API for that, update the
code to use it.
Reviewed-by: Nanley Chery
Reviewed-by: Anuj
Reviewed-by: Nanley Chery
Reviewed-by: Anuj Phogat
---
src/intel/isl/isl.c | 13 +++--
src/intel/isl/isl.h | 3 ---
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index
The calculations of row_pitch, the row pitch's alignment, surface size,
and base_alignment were mixed together. This patch moves the calculation
of row_pitch and its alignment to occur before the calculation of
surface_size and base_alignment.
This simplifies a follow-on patch that adds a new
v2:
- Validate the requested row pitch. This required more extensive
refactors in patch 2.
Testing:
I'm locally running dEQP-VK.
I also pushed this to my 'jenkins' branch. But I no longer know to
view the Jenkins results, because they're behind the Intel firewall.
Chad Versace (7
On Mon 13 Mar 2017, Chad Versace wrote:
> On Mon 13 Mar 2017, Jason Ekstrand wrote:
> > On Mon, Mar 13, 2017 at 2:32 PM, Jason Ekstrand <ja...@jlekstrand.net>
> > wrote:
> >
> > > On Mon, Mar 13, 2017 at 2:23 PM, Chad Versace <chadvers...@chromium.org>
&g
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> On Mon, Mar 13, 2017 at 2:32 PM, Jason Ekstrand <ja...@jlekstrand.net>
> wrote:
>
> > On Mon, Mar 13, 2017 at 2:23 PM, Chad Versace <chadvers...@chromium.org>
> > wrote:
> >
> >> No intended change in beh
.
This patch series lives at:
git://git.kiwitree.net/~chadv/mesa
refs/tags/chadv/review/anv-outarray-v02
gitweb:
http://git.kiwitree.net/cgit/~chadv/mesa/log/?h=chadv/review/anv-outarray-v02
v2:
- Rename anv_outarray -> vk_outarray and move it to
util/vk_util.h. For Jason.
Chad Vers
No intended change in behavior. Just a refactor.
---
src/intel/vulkan/anv_device.c | 32 ++--
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index f04e11e..35c5a4645ff 100644
---
This is a wrapper for a Vulkan output array. A Vulkan output array is
one that follows the convention of the parameters to
vkGetPhysicalDeviceQueueFamilyProperties().
---
src/util/vk_util.h | 140 +
1 file changed, 140 insertions(+)
diff --git
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