Re: [Mesa-dev] [PATCH 2/4] mesa: drop APPLE_vertex_array_object support

On 16 May 2017 at 14:26, Emil Velikov wrote: > On 16 May 2017 at 02:07, Timothy Arceri wrote: >> On 16/05/17 10:47, Kenneth Graunke wrote: >>> >>> On Monday, May 15, 2017 4:06:31 PM PDT Timothy Arceri wrote: On 16/05/17 08:13, Ian

[Mesa-dev] [Bug 100259] [EGL] [GBM] undefined reference to `gbm_bo_create_with_modifiers'

https://bugs.freedesktop.org/show_bug.cgi?id=100259 --- Comment #18 from Laurent carlier --- @Emil , with slibtool :) -> CCLD tools/aubinator CCLD tools/aubinator_error_decode CCLD isl/libisl.la ar: `u' modifier ignored since `D' is the default (see `U')

Re: [Mesa-dev] [PATCH 0/2] Allow redeclaration of GLSL builtins; fixes Dying Light and Dead Island Definitive Edition

On 05/15/2017 06:52 PM, John Brooks wrote: On 2017-05-15 06:04 PM, Ian Romanick wrote: On 05/12/2017 06:39 AM, John Brooks wrote: Since release, Dying Light and Dead Island Definitive Edition have been broken on Mesa, producing at best only a black screen after loading. I found that the root

[Mesa-dev] [PATCH] mesa/st: fix yuv EGLImage's

Don't reject YUV formats that the driver doesn't handle natively, since mesa/st already knows how to lower this in shader. Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling") Cc: 17.1 ---

Re: [Mesa-dev] [PATCH 3/3] etnaviv: Check extended format availability on GPU

Hi Wladimir, On Tue, 2017-05-16 at 10:42 +0200, Wladimir J. van der Laan wrote: > Current information shows that both extended texture/render formats > and texture swizzling were introduced with the HALTI0 feature bit, > available on GC2000/GC3000. With this patch applied, trying to import

Re: [Mesa-dev] [PATCH] mesa/st: fix yuv EGLImage's

On 16.05.2017 16:33, Rob Clark wrote: Don't reject YUV formats that the driver doesn't handle natively, since mesa/st already knows how to lower this in shader. Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling") Cc: 17.1

Re: [Mesa-dev] [PATCH 3/3] etnaviv: Check extended format availability on GPU

Hello Philipp, On Tue, May 16, 2017 at 04:33:34PM +0200, Philipp Zabel wrote: > Hi Wladimir, > > On Tue, 2017-05-16 at 10:42 +0200, Wladimir J. van der Laan wrote: > > Current information shows that both extended texture/render formats > > and texture swizzling were introduced with the HALTI0

Re: [Mesa-dev] [PATCH] mesa/st: fix yuv EGLImage's

On Tue, May 16, 2017 at 10:33 AM, Rob Clark wrote: > Don't reject YUV formats that the driver doesn't handle natively, since > mesa/st already knows how to lower this in shader. I probably should have mentioned that 'kmscube -M nv12-1img' is a good way to test this BR, -R

Re: [Mesa-dev] [PATCH 3/6] vulkan/wsi: Ad get_capabilities2 and get_formats2d interface pointers

s/Ad/Add Series is, Reviewed-by: Samuel Iglesias Gonsálvez Sam On Mon, 2017-05-15 at 08:07 -0700, Jason Ekstrand wrote: > --- >  src/vulkan/wsi/wsi_common.h | 8 >  1 file changed, 8 insertions(+) > > diff --git a/src/vulkan/wsi/wsi_common.h >

Re: [Mesa-dev] [PATCH 02/11] i965: Pass pointer and end of assembly to brw_validate_instructions

Hi Matt, This commit seems to have broken make check for me. In src/intel/compiler/test_eu_validate.cpp, line 121, I'm getting: ~/src/mesa/src/intel/compiler/test_eu_validate.cpp:121:41: error: use of undeclared identifier 'devinfo' bool ret = brw_validate_instructions(devinfo,

Re: [Mesa-dev] [PATCH 2/7] mesa: add compressed_tex_sub_image() helper

On 16.05.2017 04:19, Timothy Arceri wrote: On 16/05/17 00:12, Nicolai Hähnle wrote: On 12.05.2017 06:12, Timothy Arceri wrote: This reduces duplication between the dsa and non-dsa function and will also be used in the following commit to add KHR_no_error support. ---

Re: [Mesa-dev] [PATCH] android: fix libz dynamic library dependencies

2017-03-05 5:11 GMT+08:00 Mauro Rossi : > Fixes a series of libz related building errors: > > target SharedLib: gallium_dri_32 > (out/target/prod...SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so) > external/elfutils/libelf/elf_compress.c:117: error:

[Mesa-dev] [PATCH] Android: correct libz dependency

Commit 6facb0c0 ("android: fix libz dynamic library dependencies") unconditionally adds libz as a dependency to all shared libraries. That is unnecessary. Commit 85a9b1b5 introduced libz as a dependency to libmesa_util. So only the shared libraries that use libmesa_util need libz. Fix Android

Re: [Mesa-dev] [PATCH 1/3] etnaviv: Add support for extended texture formats

On Tue, May 16, 2017 at 09:31:38PM +0200, Christian Gmeiner wrote: > Hi Wladimir. > > I started working on this topic last week and thought some time on how > to add those ext texture formats in a clean and nice way. I come up > with this patches: > >

Re: [Mesa-dev] [RFC] Deprecating old DRI loaders/drivers

On 17/05/17 14:04, Jason Ekstrand wrote: On May 16, 2017 18:30:00 Timothy Arceri wrote: On 17/05/17 02:38, Ian Romanick wrote: What *actual* problem are you trying to solve? Honestly, it seems like you're just trying to find stuff to do. We have a mechanism to make

Re: [Mesa-dev] [RFC] Deprecating old DRI loaders/drivers

On May 16, 2017 18:30:00 Timothy Arceri wrote: On 17/05/17 02:38, Ian Romanick wrote: What *actual* problem are you trying to solve? Honestly, it seems like you're just trying to find stuff to do. We have a mechanism to make this work, and it's not that hard.

Re: [Mesa-dev] [PATCH 3/4] glsl: Merge if-simplification and conditional discard optimization

On 05/16/2017 05:35 AM, Thomas Helland wrote: > 2017-05-16 3:31 GMT+02:00 Matt Turner : >> On Mon, Apr 24, 2017 at 4:50 PM, Matt Turner wrote: >>> On Thu, Apr 6, 2017 at 12:49 PM, Thomas Helland >>> wrote: The conditional

Re: [Mesa-dev] [PATCH] intel/isl/gen6: Fix combined depth stencil alignment

+chad On Mon, May 15, 2017 at 1:52 PM, Jason Ekstrand wrote: > All combined depth stencil buffers (even those with just stencil) > require a 4x4 alignment on Sandy Bridge. The only depth/stencil buffer > type that requires 4x2 is separate stencil. > --- >

Re: [Mesa-dev] [PATCH] intel/isl/gen6: Fix combined depth stencil alignment

On Mon 15 May 2017, Jason Ekstrand wrote: > All combined depth stencil buffers (even those with just stencil) > require a 4x4 alignment on Sandy Bridge. The only depth/stencil buffer > type that requires 4x2 is separate stencil. > --- > src/intel/isl/isl_gen6.c | 14 +++--- > 1 file

Re: [Mesa-dev] [RFC] Deprecating old DRI loaders/drivers

On 16 May 2017 at 17:38, Ian Romanick wrote: > What *actual* problem are you trying to solve? Honestly, it seems like > you're just trying to find stuff to do. We have a mechanism to make > this work, and it's not that hard. Introducing a deprecation period and >

[Mesa-dev] [PATCH v3 2/2] i965/formats: Update the three-channel DXT1 mappings

The procedure for decompressing an opaque DXT1 OpenGL format is dependant on the comparison of two colors stored in the first 32 bits of the compressed block. Here's the specified OpenGL behavior for reference: The RGB color for a texel at location (x,y) in the block is given by: RGB0,

[Mesa-dev] [PATCH v3 1/2] anv/formats: Update the three-channel BC1 mappings

The procedure for decompressing an opaque BC1 Vulkan format is dependant on the comparison of two colors stored in the first 32 bits of the compressed block. Here's the specified OpenGL (and Vulkan) behavior for reference: The RGB color for a texel at location (x,y) in the block is given by:

Re: [Mesa-dev] [PATCH 2/7] egl/x11: check for dri2_dpy->flush before using the flush extension

On Mon 15 May 2017, Emil Velikov wrote: > From: Emil Velikov > > Analogous to previous commit. > > Signed-off-by: Emil Velikov > --- > If people prefer I can split the whitespace/indent changes in > this/previous path from the rest.

[Mesa-dev] [PATCH V2 14/24] i965/cnl: Handle gen10 in switch cases across the driver

V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec() gen10_init_atoms() (Jason) Remove Vulkan changes. Do them later in a separate patch. Cc: Jason Ekstrand Signed-off-by: Anuj Phogat --- src/intel/common/gen_l3_config.c

Re: [Mesa-dev] [PATCH V3 21/24] i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3

On Tuesday, May 16, 2017 9:51:03 AM PDT Anuj Phogat wrote: > v1: By Ben Widawsky > v2: v1 had an assert only for VS. Add the restriction for GS, HS and > DS as well and make sure the allocated sizes are not multiple of 3. > v3: Move the entry_size checks in to

[Mesa-dev] [PATCH V3 21/24] i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3

v1: By Ben Widawsky v2: v1 had an assert only for VS. Add the restriction for GS, HS and DS as well and make sure the allocated sizes are not multiple of 3. v3: Move the entry_size checks in to compiler code (Ken) Signed-off-by: Anuj Phogat

Re: [Mesa-dev] [PATCH] egl: Partially revert 23c86c74, fix eglMakeCurrent

On Tue 16 May 2017, Tapani Pälli wrote: > > > On 05/16/2017 02:04 AM, Chad Versace wrote: > > Fixes regressions in Android CtsVerifier.apk on Intel Chrome OS devices > > due to incorrect error handling in eglMakeCurrent. See below on how to > > confirm the regression is fixed. > > > > This

Re: [Mesa-dev] [PATCH 1/7] egl/drm: check for dri2_dpy->flush before using the flush extension

On Mon 15 May 2017, Emil Velikov wrote: > From: Emil Velikov > > The current __DRI_DRI2 imples __DRI2_FLUSH. At the same time, one can > use __DRI_IMAGE_DRIVER alongside the latter, so the current check is > confusing at best. > > Check for what we use. Patch 1 is

Re: [Mesa-dev] [PATCH] glxglvnddispatch: Add missing dispatch for GetDriverConfig

Hi Hans Please poke if patches fall through the cracks. On 20 March 2017 at 11:05, Hans de Goede wrote: > Together with some fixes to xdriinfo this fixes xdriinfo not working > with glvnd. > > Since apps (xdriinfo) expect GetDriverConfig to work without going to > need

Re: [Mesa-dev] [PATCH 7/8] android: support creating texture from gralloc buffer

Hi Rob, On Mon, May 8, 2017 at 11:29 PM, Rob Herring wrote: > On Sat, May 6, 2017 at 7:37 AM, Tomasz Figa wrote: >> On Sat, May 6, 2017 at 2:14 AM, Rob Herring wrote: >>> On Mon, May 1, 2017 at 9:55 AM, Tomasz Figa

Re: [Mesa-dev] [PATCH 05/14] mesa/main/ff_frag: Don't bother with VARYING_BIT_FOGC.

On 05/15/2017 11:38 AM, Gustaw Smolarczyk wrote: > 2017-05-15 20:28 GMT+02:00 Ian Romanick : >> With this patch I applied, I still see this bit used in several >> places, including the i915 driver. Did you test that? >> >> rc/compiler/shader_enums.h:#define VARYING_BIT_FOGC

[Mesa-dev] [PATCH V2 15/24] i965/cnl: Start using CNL MOCS defines

CNL MOCS defines are duplicates of SKL MOCS defines. V2: Rebased. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.c| 6 +++--- src/mesa/drivers/dri/i965/brw_state.h| 8 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |

Re: [Mesa-dev] [PATCH] anv: fix multiview for clear commands

On Tue, May 16, 2017 at 4:03 AM, Iago Toral Quiroga wrote: > According to the spec for VkRenderPassMultiviewCreateInfoKHX: > > "Multiview causes all drawing and clear commands in the subpass to > behave as if they were broadcast to each view, where each view is > represented

Re: [Mesa-dev] [PATCH 05/14] mesa/main/ff_frag: Don't bother with VARYING_BIT_FOGC.

2017-05-16 18:48 GMT+02:00 Ian Romanick : > On 05/15/2017 11:38 AM, Gustaw Smolarczyk wrote: >> 2017-05-15 20:28 GMT+02:00 Ian Romanick : >>> With this patch I applied, I still see this bit used in several >>> places, including the i915 driver. Did you

Re: [Mesa-dev] [RFC] Deprecating old DRI loaders/drivers

What *actual* problem are you trying to solve? Honestly, it seems like you're just trying to find stuff to do. We have a mechanism to make this work, and it's not that hard. Introducing a deprecation period and everything that involves will make it more work, not less. On 05/16/2017 06:05 AM,

Re: [Mesa-dev] [PATCH 3/5] etnaviv: apply feature overrides in one central location

2017-05-10 18:01 GMT+02:00 Lucas Stach : > This way we can just test the feature bits and don't need to spread > the debug overrides to all locations touching a feature. > > Signed-off-by: Lucas Stach Reviewed-by: Christian Gmeiner

Re: [Mesa-dev] [PATCH 20/24] i965/cnl: Don't resolve single sampled color rb in case of sRGB formats

On Fri, May 12, 2017 at 4:38 PM, Anuj Phogat wrote: > As sRGB now supports lossless compression, don't we also need to stop > resolving single sampled color render buffers for sRGB formats in Gen 10. > s/don't we/we. Fixed locally. > Signed-off-by: Anuj Phogat

[Mesa-dev] [PATCH 04/43] i965/miptree: Take first_level into account when converting to ISL

ISL doesn't have a concept of a partial miptree. Instead, we need to subtract off first_level. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 00/43] BLORP for everyone!

When Sandy Bridge came out, surface state management suddenly became significantly more complicated because of HiZ, MSAA, and separate stencil. In order to deal with all of these complications, Paul Berry write BLORP which is a blit framework that's capable of handling all of the exotic cases we

[Mesa-dev] [PATCH 02/43] i965: Use blorp_copy for doing r8 stencil updates on HSW

The blorp_copy entrypoint is designed for doing memcpy like operations which is what we need to do here while blorp_blit is for handling format conversion and scaling. Using blorp_copy is much simpler and prevents us from getting formats wrong. While we're here, we get rid of the layers_per_blit

[Mesa-dev] [PATCH 01/43] i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops

We've discovered in the Vulkan driver that simply doing the end-of-pipe sync afterwards is insufficient. The specific requirement stated in the PRM is that you have to do one every time you transition between the tree modes of "clear", "render", and "resolve". This is GL, so we could track it

[Mesa-dev] [PATCH 10/43] intel/genxml: Make a bunch of things offsets on gen4-5

Most things on gen4-5 are addresses because we don't have dynamic state base address and we don't have instruction state base on gen4. However, whoever converted things to addresses got a little over-excited and converted too much. --- src/intel/genxml/gen4.xml | 10 +-

[Mesa-dev] [PATCH 05/43] i965/blorp: Properly handle mt->first_level

The guts of blorp and ISL don't understand i965's partial miptrees. Instead, we need to subtract off first_level before we hand anything off to blorp. --- src/mesa/drivers/dri/i965/brw_blorp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c

[Mesa-dev] [PATCH 19/43] intel/decoder: Handle the BLT ring in gen_group_get_length

--- src/intel/common/gen_decoder.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c index 6bb9a7a..1a99099 100644 --- a/src/intel/common/gen_decoder.c +++ b/src/intel/common/gen_decoder.c @@ -703,6 +703,10 @@

[Mesa-dev] [PATCH 09/43] intel/isl: Add gen4_filter_tiling

--- src/intel/isl/isl.c | 3 +-- src/intel/isl/isl_gen4.c | 51 src/intel/isl/isl_gen4.h | 5 + 3 files changed, 57 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index c728a85..321850e 100644 ---

[Mesa-dev] [PATCH 13/43] intel/genxml: Rename the CC_VIEWPORT pointer on gen4-5

It isn't a pointer to "color calc state", that's the packet it's in. It's a pointer to the CC viewport state. --- src/intel/genxml/gen4.xml | 2 +- src/intel/genxml/gen45.xml | 2 +- src/intel/genxml/gen5.xml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 16/43] intel/genxml: Use the right subtype for VF_STATISTICS on gen4

--- src/intel/genxml/gen4.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/genxml/gen4.xml b/src/intel/genxml/gen4.xml index c7af454..58e0751 100644 --- a/src/intel/genxml/gen4.xml +++ b/src/intel/genxml/gen4.xml @@ -1019,7 +1019,7 @@ - +

[Mesa-dev] [PATCH 21/43] i965/sf: make brw_sf_prog_key::interp_mode an array

Having it be a pointer means that we end up caching clip programs based on a pointer to wm_prog_data rather than the actual interpolation modes. We've been caching one clip program per FS ever since 91d61fbf7cb61a44a where Timothy rewrote brw_setup_vue_interpolation(). ---

[Mesa-dev] [PATCH 12/43] intel/genxml: Sampler state is a pointer on gen4-5

--- src/intel/genxml/gen4.xml | 6 +++--- src/intel/genxml/gen45.xml| 6 +++--- src/intel/genxml/gen5.xml | 6 +++--- src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git

[Mesa-dev] [PATCH 07/43] intel/isl: Add support for gen4 cube maps to get_image_offset_sa

Gen4 cube maps are a 2-D surface with ISL_DIM_LAYOUT_GEN4_3D which is a bit weird but accurate none the less. --- src/intel/isl/isl.c | 23 ++- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index f70e188..c728a85

[Mesa-dev] [PATCH 06/43] intel/isl: Don't request space for stencil/hiz packets unless needed

On Iron Lake, the packets exist but we never emit them so there's no need for us to ask the driver to make batch space for them. --- src/intel/isl/isl.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index

[Mesa-dev] [PATCH 17/43] intel/genxml: Rename 3DSTATE_AA_LINE_PARAMS on gen5

All of the other gens use "PARAMETERS". --- src/intel/genxml/gen5.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml index f420453..a2baa12 100644 --- a/src/intel/genxml/gen5.xml +++ b/src/intel/genxml/gen5.xml @@ -949,7

[Mesa-dev] [PATCH 08/43] intel/isl: Add support for setting component write disables

--- src/intel/isl/isl.h | 20 src/intel/isl/isl_surface_state.c | 6 ++ 2 files changed, 26 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 7778551..f89ba50 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -576,6

[Mesa-dev] [PATCH 03/43] intel/blorp: Move the gen7 stencil format workaround to blorp_blit

It's not needed for blorp_copy because it already overrides formats. It's also not needed for blorp_clear because it clears stencil as stencil. --- src/intel/blorp/blorp.c | 5 - src/intel/blorp/blorp_blit.c | 9 + 2 files changed, 9 insertions(+), 5 deletions(-) diff --git

[Mesa-dev] [PATCH 11/43] intel/gensml: Suffix KSP0 fields on Iron Lake

Iron Lake introduced the multiple KSP thing and so you have KSP0-3. However, the genxml didn't have an index on the first "Kernel Start Pointer" or "GRF Register Count". Add one to match gen6+. --- src/intel/genxml/gen5.xml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 20/43] intel/compiler: Make brw_disasm take const assembly

--- src/intel/compiler/brw_disasm.c | 20 ++-- src/intel/compiler/brw_eu.c | 4 ++-- src/intel/compiler/brw_eu.h | 6 +++--- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index

[Mesa-dev] [PATCH 28/43] intel/blorp: Don't use ffma directly

It isn't supported prior to gen6 and, on gen6+, NIR will fuse the fmul and fadd into an ffma automatically for us anyway. --- src/intel/blorp/blorp_blit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index

[Mesa-dev] [PATCH 18/43] intel/decoder: Handle gen4 VF_STATISTICS and PIPELINE_SELECT

These need special handling because they have no "DWord Length" parameter and they have an unusual bias of 1. --- src/intel/common/gen_decoder.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c index

[Mesa-dev] [PATCH 39/43] i965: Use blorp for color blits on gen4-5

--- src/mesa/drivers/dri/i965/brw_blorp.c | 17 ++--- src/mesa/drivers/dri/i965/intel_fbo.c | 66 +-- 2 files changed, 30 insertions(+), 53 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index

[Mesa-dev] [PATCH 23/43] i965: Move SF compilation to the compiler

--- src/intel/Makefile.sources | 1 + .../compiler/brw_compile_sf.c} | 185 - src/intel/compiler/brw_compiler.h | 50 ++ src/intel/compiler/brw_eu_defines.h| 2 +

[Mesa-dev] [PATCH 14/43] intel/genxml: Add SAMPLER_STATE to gen 4.5

Somehow this got missed. --- src/intel/genxml/gen45.xml | 61 ++ 1 file changed, 61 insertions(+) diff --git a/src/intel/genxml/gen45.xml b/src/intel/genxml/gen45.xml index bde6080..0365a36 100644 --- a/src/intel/genxml/gen45.xml +++

[Mesa-dev] [PATCH 22/43] i965/clip: Make brw_clip_prog_key::interp_mode an array

Having it be a pointer means that we end up caching clip programs based on a pointer to wm_prog_data rather than the actual interpolation modes. We've been caching one clip program per FS ever since 91d61fbf7cb61a44a where Timothy rewrote brw_setup_vue_interpolation(). ---

[Mesa-dev] [PATCH 38/43] intel/blorp: Assert that no one tries to blit combined depth stencil

--- src/intel/blorp/blorp_blit.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index fe24f1f..42e7703 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -2042,6 +2042,12 @@ blorp_blit(struct

[Mesa-dev] [PATCH 33/43] intel/blorp: Make convert_to_single_slice available outside blorp_blit

--- src/intel/blorp/blorp_blit.c | 16 src/intel/blorp/blorp_priv.h | 3 +++ 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 75fc3f5..8408ebc 100644 --- a/src/intel/blorp/blorp_blit.c +++

[Mesa-dev] [PATCH 29/43] intel/blorp: Re-arrange blorp_genX_exec.h

--- src/intel/blorp/blorp_genX_exec.h | 458 +++--- 1 file changed, 229 insertions(+), 229 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 5ce60d8..6e61640 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++

[Mesa-dev] [PATCH 15/43] intel/genxml: Iron Lake doesn't support non-normalized sampler coordinates

--- src/intel/genxml/gen5.xml | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml index a0b61ae..f420453 100644 --- a/src/intel/genxml/gen5.xml +++ b/src/intel/genxml/gen5.xml @@ -584,7 +584,6 @@ - --

[Mesa-dev] [PATCH 41/43] i965: Round copy size to the nearest block in intel_miptree_copy

The width and height of the copy don't have to be aligned to the block size if they specify the right or bottom edges of the image. (See also the comment and asserts right above). We need to round them up when we do the division in order to get it 100% right. Cc: "17.0 17.1"

[Mesa-dev] [PATCH 27/43] intel/blorp: Delete isl_to_gen_ds_surfype

It's no longer used. --- src/intel/blorp/blorp_genX_exec.h | 19 --- 1 file changed, 19 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 0bb4b9a..5ce60d8 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++

[Mesa-dev] [PATCH 26/43] intel/blorp: Pull the pipeline bits of blorp_exec into a helper

--- src/intel/blorp/blorp_genX_exec.h | 56 ++- 1 file changed, 31 insertions(+), 25 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 9e61f69..0bb4b9a 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++

[Mesa-dev] [PATCH 32/43] intel/blorp: Use designated initializers to set up VERTEX_ELEMENTS

We also add a slot variable and use it as an iterator. This will make it much easier to conditionally put something between the header and the vertex position. --- src/intel/blorp/blorp_genX_exec.h | 75 ++- 1 file changed, 43 insertions(+), 32 deletions(-)

[Mesa-dev] [PATCH 34/43] intel/blorp: Add support for gen4-5 SF programs

As part of enabling support for SF programs, we plumb the SF URB size through to emit_urb_config. For now, it's always zero but, on gen4, it may be something larger. --- src/intel/blorp/blorp.c | 62 + src/intel/blorp/blorp_blit.c|

[Mesa-dev] [PATCH 37/43] i965: Add blorp support for gen4-5

Due to complications with things such as URB setup on gen4-5, it's easier to keep gen4 support in blorp completely internal to i965. This makes things a bit awkward because that means there's a file in i965 that includes blorp_priv.h but it's either that or have a file in blorp that includes

[Mesa-dev] [PATCH 40/43] i965: Use BLORP for color clears on gen4-5

We don't support replicated data clears yet. Those take a bit more work and enabling replicated data clears in its own commit is probably better for bisectibility anyway. --- src/intel/blorp/blorp_clear.c | 4 src/mesa/drivers/dri/i965/brw_clear.c | 3 +-- 2 files changed, 5

[Mesa-dev] [PATCH 24/43] i965: Move clip program compilation to the compiler

--- src/intel/Makefile.sources | 7 ++ .../drivers/dri/i965 => intel/compiler}/brw_clip.h | 38 +--- .../dri/i965 => intel/compiler}/brw_clip_line.c| 6 -- .../dri/i965 => intel/compiler}/brw_clip_point.c | 4 - .../dri/i965 =>

[Mesa-dev] [PATCH 43/43] i965/blorp: Support copyteximage on gen4-5

--- src/mesa/drivers/dri/i965/brw_blorp.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 8a7fea4..7ffe8b8 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++

[Mesa-dev] [PATCH 31/43] intel/blorp: Rename emit_viewport_state to emit_cc_viewport

The real point of this packet is that it sets up CC_VIEWPORT so that name is a bit better. --- src/intel/blorp/blorp_genX_exec.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 3c46340..31cb049

[Mesa-dev] [PATCH 35/43] i965/gen4: Expose the guts of URB recalculation as a helper

--- src/mesa/drivers/dri/i965/brw_context.h | 2 ++ src/mesa/drivers/dri/i965/brw_urb.c | 15 ++- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 22a84e6..ccedecc 100644 ---

[Mesa-dev] [PATCH 30/43] intel/blorp: Make the common genX_blorp_exec code gen4-safe

--- src/intel/blorp/blorp_genX_exec.h | 44 --- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 6e61640..3c46340 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++

[Mesa-dev] [PATCH 25/43] intel/blorp/blit: Add support for normalized coordinates

Gen5 and earlier can't do non-normalized coordinates so we need to compensate in the shader. Fortunately, it's pretty easy plumb through. --- src/intel/blorp/blorp_blit.c | 27 ++- src/intel/blorp/blorp_priv.h | 6 ++ 2 files changed, 28 insertions(+), 5 deletions(-)

[Mesa-dev] [PATCH 36/43] intel/blorp: Set additional brw_wm_prog_key fields on gen4-5

--- src/intel/blorp/blorp.c | 9 - src/intel/blorp/blorp_priv.h | 2 +- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 1f29b93..7f1566f 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -153,7

[Mesa-dev] [PATCH 42/43] i965: Use blorp for CopyImageSubData on gen4-5

We keep the blit path because it's probably faster when it works. However, now that we can use blorp, we can delete that nasty CPU fall-back path. --- src/mesa/drivers/dri/i965/intel_copy_image.c | 140 --- 1 file changed, 17 insertions(+), 123 deletions(-) diff --git

Re: [Mesa-dev] [PATCH V2 15/24] i965/cnl: Start using CNL MOCS defines

On Tue, May 16, 2017 at 10:34 AM, Anuj Phogat wrote: > CNL MOCS defines are duplicates of SKL MOCS defines. > I can actually drop this patch and continue using SKL MOCS defines for gen10+. I also noticed that vulkan needs separate MOCS defines for each gen. Any preferences

[Mesa-dev] [PATCH 3/3] etnaviv: Check extended format availability on GPU

Current information shows that both extended texture/render formats and texture swizzling were introduced with the HALTI0 feature bit, available on GC2000/GC3000. --- src/gallium/drivers/etnaviv/etnaviv_format.c | 12 src/gallium/drivers/etnaviv/etnaviv_format.h | 3 +++

[Mesa-dev] [PATCH 1/3] etnaviv: Add support for extended texture formats

This adds support for extended texture formats through TEXTURE_FORMAT_EXT. Two of these extended formats are added: - R8_SNORM - R8G8_UNORM --- src/gallium/drivers/etnaviv/etnaviv_format.c | 49 ++- src/gallium/drivers/etnaviv/etnaviv_format.h | 3 ++

[Mesa-dev] [PATCH 2/3] etnaviv: Add support for swizzled texture formats

--- src/gallium/drivers/etnaviv/etnaviv_format.c | 50 +-- src/gallium/drivers/etnaviv/etnaviv_format.h | 3 ++ src/gallium/drivers/etnaviv/etnaviv_texture.c | 15 +--- 3 files changed, 54 insertions(+), 14 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 0/4] radeonsi: move TGSI memory/texture opcode handling out of si_shader.c

On 16.05.2017 01:14, Marek Olšák wrote: Do you have a branch somewhere so that I can see the last patch? Here you go: https://cgit.freedesktop.org/~nh/mesa/log/?h=si_shader_mem Cheers, Nicolai Thanks, Marek On Mon, May 15, 2017 at 11:43 PM, Nicolai Hähnle wrote: Hi

Re: [Mesa-dev] [PATCH 0/9] glsl: cleanup and fix handling of unnamed struct types

On 16.05.2017 02:56, Ian Romanick wrote: On 05/15/2017 02:27 AM, Nicolai Hähnle wrote: Hi all, This series aims to simplify how we handle unnamed struct types and fix some bugs on the way. Some of the patches should be uncontroversial, and all of them align with my understanding of the GLSL

Re: [Mesa-dev] [PATCH 3/4] glsl: Merge if-simplification and conditional discard optimization

2017-05-16 3:31 GMT+02:00 Matt Turner : > On Mon, Apr 24, 2017 at 4:50 PM, Matt Turner wrote: >> On Thu, Apr 6, 2017 at 12:49 PM, Thomas Helland >> wrote: >>> The conditional discard pass follows the same pattern, so merge the

Re: [Mesa-dev] [PATCH] egl/wayland: Ensure we get a back buffer

Hi Pekka, On 16 May 2017 at 11:32, Pekka Paalanen wrote: > On Tue, 16 May 2017 11:02:22 +0100 > Daniel Stone wrote: >> This removed a guarantee that we would've processed all events inside >> get_back_bo(), and introduced a failure whereby the server

[Mesa-dev] [PATCH] anv: fix multiview for clear commands

According to the spec for VkRenderPassMultiviewCreateInfoKHX: "Multiview causes all drawing and clear commands in the subpass to behave as if they were broadcast to each view, where each view is represented by one layer of the framebuffer attachments." This patch implements the broadcast for

[Mesa-dev] [PATCH] egl/wayland: Ensure we get a back buffer

Commit 9ca6711faa03 changed the Wayland winsys to only block for the frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo would perform a single non-blocking Wayland event dispatch, to try to find any release events which we had pulled off the wire but not actually processed.

Re: [Mesa-dev] [PATCH 0/4] radeonsi: move TGSI memory/texture opcode handling out of si_shader.c

For the series: Reviewed-by: Marek Olšák Marek On May 16, 2017 8:17 AM, "Nicolai Hähnle" wrote: > On 16.05.2017 01:14, Marek Olšák wrote: > >> Do you have a branch somewhere so that I can see the last patch? >> > > Here you go:

Re: [Mesa-dev] [PATCH] egl/wayland: Ensure we get a back buffer

On Tue, 16 May 2017 11:02:22 +0100 Daniel Stone wrote: > Commit 9ca6711faa03 changed the Wayland winsys to only block for the > frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo > would perform a single non-blocking Wayland event dispatch, to try to >

[Mesa-dev] [PATCH v2 4/6] vulkan/wsi/wayland: Use proxy wrappers for swapchain

Though most swapchain operations used a queue, they were racy in that the object was created with the queue only set later, meaning that its event could potentially be dispatched from the default queue in between these two steps. Use proxy wrappers to avoid this race, also assigning wl_buffers

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks non-Vsync fullscreen frame updates

https://bugs.freedesktop.org/show_bug.cgi?id=98833 --- Comment #17 from Daniel Stone --- I've been looking at this over the past couple of days, but haven't quite been able to figure it out. Hopefully I can crack it today. -- You are receiving this mail because: You are

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks non-Vsync fullscreen frame updates

https://bugs.freedesktop.org/show_bug.cgi?id=98833 --- Comment #18 from Daniel Stone --- Right, here we are: https://lists.freedesktop.org/archives/mesa-dev/2017-May/155791.html -- You are receiving this mail because: You are the QA Contact for the

[Mesa-dev] [PATCH v2 6/6] egl/wayland: Use per-surface event queues

During display initialisation, we need a separate event queue to handle the registry events, which is correctly handled. But we also need separate per-surface event queues to handle swapchain-related events, such as surface frame events and buffer release events. This avoids two surfaces from the

[Mesa-dev] [PATCH v2 5/6] egl/wayland: Don't open-code roundtrip

wl_display_roundtrip_queue() exists and can replace roundtrip(). The API was introduced with wayland 1.6, while we currently require 1.11. Signed-off-by: Daniel Stone Reviewed-by: Emil Velikov Cc: mesa-sta...@lists.freedesktop.org ---

[Mesa-dev] [PATCH v2 3/6] vulkan/wsi/wayland: Use per-display event queue

Calling random callbacks on the display's event queue is hostile, as we may call into client code when it least expects it. Create our own event queue, one per wsi_wl_display, and use that for the registry. Signed-off-by: Daniel Stone Cc: mesa-sta...@lists.freedesktop.org

[Mesa-dev] [PATCH v2 2/6] vulkan/wsi/wayland: Remove roundtrip when creating image

There's no need to call wl_display_roundtrip() after trying to create a buffer through wl_drm; if it succeeds then everything is fine, and if it fails, then we get a fatal protocol error so can't recover anyway. Additionally, doing a roundtrip on the default / main application queue, is

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