On 20/09/2010 15:15, Xiaofan Chen wrote:
On Mon, Sep 20, 2010 at 6:48 PM, Spencer Oliver wrote:
This code was added for cases where high speed support is not detected by
configure and BUILD_FT2232_HIGHSPEED is not defined.
If this is failing it looks more like a autoconf issue - what is the
On 18/09/2010 17:50, Peter Stuge wrote:
Xiaofan Chen wrote:
Win32 build with MinGW.org 32bit compiler is okay.
I got build error with MinGW-w64.
..
../../../../git/openocd/src/jtag/drivers/ft2232.c:138:22: error: redeclaration
of enumerator 'TYPE_2232H'
/home/mcuee/mingw-w64/bin/../lib/gcc/x
On 03/09/2010 20:29, John Hartman (NoICE) wrote:
The STM32 parts have Flash beginning at 0x800, and OpenOCD's
stm32x.c places the Flash there regardless of the address used in the
"flash" command in the cfg file.
The chips have two pins that can be jumpered to specify what appears at
address
On 30/08/2010 21:23, gla...@hotmail.de wrote:
Hi guy's
I was thinking about to get the segger jlink or the ulink2. But since I
only found the cfg File for JLink I was wondering wheter uLink2 is
supported or not.
thx
Not directly, but this may help
http://lists.berlios.de/pipermail/openocd-dev
From: Spencer Oliver
This speeds up programming for targets with more working area,
Signed-off-by: Spencer Oliver
---
src/flash/nor/stellaris.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 03800fd
From: Spencer Oliver
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.
Move any luminary specific reset handling to the stellaris cfg file
From: Spencer Oliver
- Update all Luminary config's to use a common target/stellaris.cfg.
- Add Luminary ek-lm3s6965 config.
- Increase working area for boards with more ram.
Signed-off-by: Spencer Oliver
---
tcl/board/ek-lm3s1968.cfg |3 ++-
tcl/board/ek-lm3s3748.cfg |3 +++
[PATCH 1/3] cfg: update Luminary config files
[PATCH 2/3] flash: increase stellaris flash loader buffer
[PATCH 3/3] cortex m3: add cortex_m3 reset_config cmd
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On 23/08/2010 22:21, Peter Stuge wrote:
Spencer Oliver wrote:
ST sent me the api, it is based on mass storage device.
They are happy for openocd to support it.
Any chance of a copy of the API?
The actual api was sent under nda, so i cannot send it on. It
contains a lot more info about the
On 23/08/2010 20:23, Andrew Rogers wrote:
ST sent me the api, it is based on mass storage device.
They are happy for openocd to support it.
I think the firmware of the ST-link can be updated as there is update
software available. I reckon that there will be hooks to allow writing
to the RAM on
From: Spencer Oliver
The cmd fast was removed in commit c0d14dc7f19d785702eee5f69de5b1a63902554b
Signed-off-by: Spencer Oliver
---
doc/openocd.texi | 19 ---
1 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 08578fa
From: Spencer Oliver
For the above targets the exit_point is
optional when used with run_algorithm, so remove it.
This makes updating the algorithm less error prone.
Signed-off-by: Spencer Oliver
---
src/flash/nor/lpc2000.c |2 +-
src/flash/nor/pic32mx.c |2 +-
src/flash/nor
From: Spencer Oliver
As the mips32 uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm codebase.
Signed-off-by: Spencer Oliver
---
src/target/mips32.c |2 +-
1 files changed, 1 insertions(+), 1 deletions
From: Spencer Oliver
As the armv7m uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm4_5 codebase.
Signed-off-by: Spencer Oliver
---
src/target/armv7m.c |2 +-
1 files changed, 1 insertions(+), 1 deletions
From: Spencer Oliver
Update the arm_checksum_memory and arm_blank_check_memory
algorithms to use a breakpoint instruction on v5 arch.
Signed-off-by: Spencer Oliver
---
src/target/armv4_5.c | 22 --
1 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/src
[PATCH 1/4] armv4_5: add algorithms instruction breakpoint support
[PATCH 2/4] armv7m: exit_point optional for armv7m_run_algorithm
[PATCH 3/4] mips32: exit_point optional for mips32_run_algorithm
[PATCH 4/4] flash: remove algorithm exit_point address for supported targets
_
>From 4611f87f0aeba42d21fc6c197e904a0c97731bf7 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 19 Jul 2010 12:22:18 +0100
Subject: [PATCH 4/4] flash: add nuc910 nand driver
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this dri
>From d249057adfeb3f652df86ad321577744910b6e21 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Fri, 16 Jul 2010 16:56:41 +0100
Subject: [PATCH 1/4] docs: missing parameter from nand check_bad_blocks
Signed-off-by: Spencer Oliver
---
doc/openocd.texi |2 +-
1 files changed
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>From 8f5e84bf8dabfddc6b853c522fdc29be90c93746 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Fri, 16 Jul 2010 16:59:35 +0100
Subject: [PATCH 2/4] cfg: update rsc-w910 script
- Only enable the FMI (NAND) and DMA clocks.
- Select NAND interface on the MFSEL.
Signed-off-by: Spencer Oli
I have committed the attached config for the Avalue RSC-W910 sbc.
http://www.avalue.com.tw/products/RSC-W910.cfm
Cheers
Spen
>From 1619facb5ebce060c2cb35035e7801a8898a6296 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 13 Jul 2010 14:17:00 +0100
Subject: [PATCH] cfg: add Avalue
On 12/07/2010 11:59, David Brownell wrote:
Is there any schematics available for
this adapter?
Yes, lm3s3748-ek. See the user's guide. This
is one that uses a small CPLD external to the
ft2232 chip. So the schematics include just a
bit of tracing through CPLD logic...
The newer version
On 11/07/2010 09:30, Michael Schwingen wrote:
On 11.07.2010 02:54, David Brownell wrote:
Not "just" -- see the schematics, you'll notice
a bunch of wiring needed to support SWD as an
option in addition to JTAG.Some SWD signals are
bidirectional, so a pure JTAG adapter is
not going to handle SWD
On 02/07/2010 22:00, David Brownell wrote:
I committed the "transport" framework patch; you've
seen it on the list before, the main difference ince
the last post was adding user's guide docs.
(This has been ready for some time, and I got tired of just carrying it
privately. It's groundwork, an
On 08/07/2010 15:53, Robert Lee wrote:
Hello Earthlings,
>From a user perspective, part of the magic that the GDB clients and
OpenOCD GDB server provides is the register info for the CPU core (such
as a ARM926ej-s) automagically. So it doesn't matter what debug UI I run
(Eclipse, ddd, etc.) whe
On 07/07/2010 19:20, Andreas Schmidt wrote:
But I get only download speeds of 1kB/sec. Why is this so slow? How can
I speed up the download?
My start-script from Eclipse (Zylin Embedded CDT) looks like this:
init-commands:
target remote localhost:
monitor reset_halt
monitor gdb_breakpoint_o
I think this cmd was removed a while back, seems to be in the texi still
however.
Cheers
Spen
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ory map for multiple targets (bug #24)
The gdb server incorrectly reports the memory map if we have
multiple targets with multiple flash banks.
Signed-off-by: Spencer Oliver
---
src/server/gdb_server.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/ser
On 17/06/2010 09:16, Marc Pignat wrote:
---
src/jtag/drivers/ft2232.c | 19 ++-
1 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/jtag/drivers/ft2232.c b/src/jtag/drivers/ft2232.c
index bc8463e..9d40b1c 100644
--- a/src/jtag/drivers/ft2232.c
+++ b/src/jtag/
On 01/07/2010 08:34, Øyvind Harboe wrote:
merged both patches.
Thanks!
Just got back from various travels.
I have committed a build fix for this patchset.
patch2 also breaks when using the ftdi driver, not looked into why yet.
Cheers
Spen
___
Ope
On 10/06/2010 08:55, Andrea Sorio wrote:
Hi Spen
I set jtag_khz to 500!
Same problem, same messages
Doesn't work.
Does it work ok when using the onboard ek-lm3s8962 ?
Cheers
Spen
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On 10/06/2010 08:04, Andrea Sorio wrote:
Hi
I'm working on a custom board with LM3S1607 micro.
I'm using ek-lm3s8962 board as jtag interface.
When openocd starts, prints the following report
openocd.exe -f board/ek-lm3s1968.cfg
Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU G
On 04/06/2010 10:35, Xiaochen Zhou wrote:
It seems some issues in openocd-0.4.0 with MIPS 4KEc core, I did some
experiments below:
For info the MIPS has been mainly tested on a m4k (aka PIC32).
This also means that testing has been on a little endian system, so bugs
could be present.
Iss
On 04/06/2010 15:47, Michelle Konzack wrote:
Hello Experts,
for some minutes I ordered @Microchip samples for the PIC32MX795F512L
and an "Evaluation Board2 because I am searchig for a microcontroller
for an "Autonomus Energy-Supply System" (solar/wind energy with LiPoly
storage).
Now Il
On 02/06/2010 17:35, Martin Zenzes wrote:
Hi,
when I do
./configure LDFLAGS=-L/opt/libftdi-1.0 LIBS=-lftdi-1.0
--enable-maintainer-mode
Have you tried quoting the parameters, eg.
./configure LDFLAGS="-L/opt/libftdi-1.0" LIBS="-lftdi-1.0"
--enable-maintainer-mode
may also be worth attachin
On 02/06/2010 09:24, Xiaochen Zhou wrote:
Hi all,
I want to port eCos to an epon onu chip which has a MIPS 4KEc core and
using openocd v0.4.0 + wiggler for debugging. Gdb seems ok(ctrl_c and
continue commands ok) but breakpoint.
Just a guess but unless you have a valid flash memory map then g
On 01/06/2010 21:49, Øyvind Harboe wrote:
Shouldn't
command_print(CMD_CTX, "stm32x mass erase failed");
be a LOG_ERROR()?
(I didn't look at the code...)
A LOG_ERROR is emitted in stm32x_mass_erase that is called by this cmd
handler.
Cheers
Spen
__
On 01/06/2010 13:22, gcembed wrote:
Here is the modified patch
Gaëtan
On 06/01/2010 02:01 PM, freddie_cho...@op.pl wrote:
"gcembed" napisał(a):
> Hello,
> I have added a new command for stm32x : mass_erase_unlock
> This function combine "stm32x unlock 0" + reset to apply unlock +
> "stm32x mass
On 24/05/2010 14:54, Michael Schwingen wrote:
Spencer Oliver wrote:
This adds a virtual flash bank driver that allows virtual banks to
be defined that refer to an existing flash bank.
For example the real address for bank0 on the pic32 is 0x1fc0
but the user program will either be in kseg0
On 26/05/2010 05:45, Antonio Borneo wrote:
Almost all the implementations is ./src/flash/nor/ suffer from memory
leak when the command "flash probe #" is issued again.
The buffer for sectors[..] is reallocated every time (this is
correct) but previous pointer is overwritten without freeing forme
is here for people who prefer that method of viewing patches.
http://repo.or.cz/w/openocd/ntfreak.git/shortlog/refs/heads/vbank
Cheers
Spen
>From 25b5e6691425e263fd5ab1c4e4f13f20524f7d06 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 24 May 2010 12:30:29 +0100
Subject: [PATCH 1/2]
aware of all the read only flash
addresses.
comments ?
Cheers
Spen
>From 1e2374f0e9ba340ed741e4988a2f33aafdf52cc9 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 24 May 2010 11:41:50 +0100
Subject: [PATCH 1/2] flash: add virtual flash bank driver
This adds a virtual flash bank dri
>From 630b131204964e9b208b045966e29d4e63db5925 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 24 May 2010 11:43:09 +0100
Subject: [PATCH 2/2] cfg: add pic32 virtual banks
make use of the new virtual bank flash driver.
Signed-off-by: Spencer Oliver
---
tcl/target/pic32mx.cfg |
On 22/05/2010 08:52, Freddie Chopin wrote:
On 2010-05-21 21:24, Spencer Oliver wrote:
For info - the target variant arm7tdmi-s_r4 means nothing - so i would
remove it.
Here is another one then.
Cheers!
Cheers, all pushed to git
Spen
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On 21/05/2010 17:06, Freddie Chopin wrote:
Hi!
I attach a few patches that update / fix / cleanup the LPC2xxx config
files. Reasons for change are in the patches.
Cheers!
For info - the target variant arm7tdmi-s_r4 means nothing - so i would
remove it.
Cheers
Spen
___
On 13/05/2010 04:20, Jon Povey wrote:
Change download rate messages about kibibytes from "kb/s" to "KiB/s" units.
See: http://en.wikipedia.org/wiki/Data_rate_units
Signed-off-by: Jon Povey
---
This was discussed a bit on the list but no clear resolution.
According to wikipedia KiB/s is correct,
>From 06ff0648dcf2a5ffba7cacfdabc7b1f2177c7de9 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Wed, 12 May 2010 23:04:57 +0100
Subject: [PATCH 3/3] scripts: update flash bank names
As the flash bank name is now unique update the scripts to suit.
Signed-off-by: Spencer Oliver
---
>From acac799f22b41e186bbf4ac2fec7828b702d9221 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Wed, 12 May 2010 22:40:19 +0100
Subject: [PATCH 1/3] flash: add flash bank name support
flash cmds can now be passed either the bank name or the bank number.
For example.
flash info stm32.fl
>From 57d2e47a1e3ce9b5735e88248c98239794b27bff Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Wed, 12 May 2010 22:42:26 +0100
Subject: [PATCH 2/3] flash: require unique flash bank name
Make sure the flash bank name is unique
Signed-off-by: Spencer Oliver
---
src/flash/nor/tcl.c |
On 11/05/2010 18:22, Øyvind Harboe wrote:
So should we just apply this patch you think?
Do not have any tempest silicon to test, but it sounds as if they forgot
to fix this old bug.
Tobias,
Can you confirm that the srst pin is actually getting asserted/released?
Another test is to hold the
On 11/05/2010 07:47, Michael Schwingen wrote:
Spencer Oliver wrote:
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd.
Looks good to me.
I have had similar problems in
Hi,
Just a query regarding the behaviour of puts and echo and stdout.
When using the telnet/gdb interfaces all is as expected.
If i use the following the string is output to stdout as expected.
echo "Hello World"
in this case the linefeed is appended before the string is output.
However if i us
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd.
Objections ?
Cheers
Spen
>From 2cff3cc5c0d50adfa53db7daeb3c1661e94890a5 Mon Sep 17 00:00:00 2001
From: Spencer Oli
On 23/03/2010 10:12, simon qian wrote:
ST doesn't open the protocol of ST-Link, so it's impossible to support
it in OpenOCD.
I have 2 ST-Link sent by vendor of ST, but now, they are Versaloon.
ST sent me the api, it is based on mass storage device.
They are happy for openocd to support it.
Th
>From ae1c64706a6fa421b60884e23561f39016950f54 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 18 Mar 2010 09:35:45 +
Subject: [PATCH 2/3] PIC32MX: add unlock cmd
'unlock' performs a full unlock/erase of the device, removing any
code protection.
Signed-off-by: S
>From d37ed9094a62ec144b9d9fdc214d8c7723caadec Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 18 Mar 2010 09:18:53 +
Subject: [PATCH 3/3] DOCS: update flash bank examples
- include the $_FLASHNAME in all flash bank examples.
Signed-off-by: Spencer Oliver
---
doc/openocd.t
>From b48a94f05da3a887f1978da01db77b79513d4aa9 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Wed, 17 Mar 2010 17:24:22 +
Subject: [PATCH 1/3] MIPS: remove unused arg from mips_ejtag_set_instr
This arg was never used and was just taken from the arm jtag code.
Signed-off-by: Spen
unless it is already implemented and i missed it.
Spen
>From 00b218375ab15651476b5b563304c85b48829994 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 16 Mar 2010 20:26:00 +
Subject: [PATCH] SCRIPT: add add_script_search_dir cmd
Add a add_script_search_dir cmd so that adding sea
>From 8d588b27cbd9ee4f6995c3a0491a9384502dff9a Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 16 Mar 2010 12:54:08 +
Subject: [PATCH 2/2] PIC32: add software reset support
The PIC32MX does not support the ejtag software reset - it is
optional in the ejtag spec.
We perform
>From 57a369aa541610fb82b407f6ec7efd1ff661e04e Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 16 Mar 2010 12:48:53 +
Subject: [PATCH 1/2] MIPS: remove ejtag_srst variant
The mips_m4k_assert_reset has now been restructured
so the variant ejtag_srst is not required anymore.
>From 01d3e072decd91a5fee4fc5140065f4049284b6b Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 8 Mar 2010 20:31:50 +
Subject: [PATCH 3/4] STR7: flash loader cleanup
- make algorithm array static const.
- increase algorithm buffer size to 32k.
Signed-off-by: Spencer Oli
>From 299dd704fae782ba73ac4b23062afa735a39c38c Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 8 Mar 2010 20:32:11 +
Subject: [PATCH 4/4] STM32: flash loader cleanup
- make algorithm array static const.
Signed-off-by: Spencer Oliver
---
src/flash/nor/stm32x.c |
>From 3ef4cc07ce5900c699767bb112bfed4ffdafef9f Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 8 Mar 2010 20:30:53 +
Subject: [PATCH 1/4] ADUC702x: flash loader cleanup
- make algorithm array static const.
Signed-off-by: Spencer Oliver
---
src/flash/nor/aduc702x.c |2 +-
>From 0976cccd5d5e43555c6410a5b62ab8441bc61cf9 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Mon, 8 Mar 2010 20:31:25 +
Subject: [PATCH 2/4] STR9: flash loader cleanup
- make algorithm array static const.
- increase algorithm buffer size to 32k.
Signed-off-by: Spencer Oli
:00 2001
From: Spencer Oliver
Date: Mon, 8 Mar 2010 21:45:44 +
Subject: [PATCH] PIC32: add flash algorithm support
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
- without fastl
On 01/03/2010 04:13, David Brownell wrote:
A test build (cygwin, as it happened) after your latest commits gives me:
gcc -std=gnu99 -DHAVE_CONFIG_H -I. -I../.. -I../../src -I../../src -g -O2 -Wall
-Wstrict-prototypes -Wformat-security -Wextra -Wno-unused-parameter
-Wbad-function-cast -Wcast-a
On 26/02/2010 18:04, David Brownell wrote:
On Friday 26 February 2010, Spencer Oliver wrote:
On 26/02/2010 02:36, David Brownell wrote:
On Thursday 25 February 2010, Spencer Oliver wrote:
+ .chain = arm_command_handlers,
NAK on this one since those command handlers don't
On 26/02/2010 02:36, David Brownell wrote:
On Thursday 25 February 2010, Spencer Oliver wrote:
+ .chain = arm_command_handlers,
NAK on this one since those command handlers don't know
how to cope wih v7-m cores yet, and plus there's the
command duplication for disas
On 26/02/2010 02:48, David Brownell wrote:
On Thursday 25 February 2010, Spencer Oliver wrote:
these are the various updates that have been sitting in my local repo
I don't think I have any issue with #1 (this) or
with #2 (the MIPS algorithm stuff) ... though, didn't
you have
>From 4d65221bd7c5c72c27c742fe557af5305eaa101e Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 25 Feb 2010 23:47:23 +
Subject: [PATCH 7/7] armv7m: armv7m_arch_state shows semihosting status
Signed-off-by: Spencer Oliver
---
src/target/armv7m.c |5 +++--
1 files changed
>From 14007d98e1c69db0ab6585acdbc07929321b6d36 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 25 Feb 2010 23:46:31 +
Subject: [PATCH 6/7] semihosting: add armv7m semihosting support
do_semihosting and arm_semihosting now check the core type and
use the generic arm struct
>From 4e2b41bb8b9f18ea1e8be0c1352f57c814c6c594 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 25 Feb 2010 23:27:02 +
Subject: [PATCH 3/7] armv7m: add missing command chain
Signed-off-by: Spencer Oliver
---
src/target/armv7m.c |3 +++
1 files changed, 3 insertions(+)
>From 557efaa816fdd2148833359dc379c1b79488cc48 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 25 Feb 2010 23:38:32 +
Subject: [PATCH 5/7] docs: rename arm7_9 semihosting to arm semihosting
Signed-off-by: Spencer Oliver
---
doc/openocd.texi | 24
>From 31dba3ab553fb1528bb3036a64930006d9ddec61 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 25 Feb 2010 23:37:31 +
Subject: [PATCH 4/7] semihosting: move semihosting cmd to arm cmd group
Move arm7_9 semihosting to the arm cmd group - now arm semihosting.
Add setup_semihost
>From 8a354cce7a259e620ffa907969ca0bb950eb6d88 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Wed, 13 Jan 2010 10:12:34 +
Subject: [PATCH 2/7] MIPS: add mips algorithm support
- add mips support for target algorithms.
- added handlers for target_checksum_memory
these are the various updates that have been sitting in my local repo
Cheers
Spen
>From 67cc68c33a33d39c249ed81283d8355486739752 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 2 Feb 2010 13:22:07 +
Subject: [PATCH 1/7] ARMv7M: use software breakpoints for algorit
On 21/02/2010 08:49, simon qian wrote:
> Hi,
> As I know, ST-Link supports JTAG for STM32 and SWIM for STM8, but it
> doesn't support SWD.
> If you want to reflash STM32 of ST-Link to be supported by OpenOCD, you
> can try Versaloon driver, but you will lost ST-Link's functionality.
>
The ST-LINK
On 19/02/2010 00:25, Xiaofan Chen wrote:
> On Fri, Feb 19, 2010 at 5:22 AM, CeDeROM wrote:
>> Thank you Igor I will try to do this also for a J-Link interface, but
>> I dont have one (is it expensive, maybe Ill get one?).
>
> J-Link is not too expensive, especially the OEM ones from IAR or
> other
On 18/02/2010 00:15, Michel Catudal wrote:
> Le 17/02/2010 15:59, CeDeROM a écrit :
Partially - the Primer1 use RLink in JTAG mode, Primer2 use RLink in
SWD mode. I am planning to work on SWD support soon (probably
start/mid march) - I have even downloaded some documentation few days
ditto for str9xpec driver.
Spen
>From a6588c70ce0508a6b4050e4c9e67e660acdfa302 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 11 Feb 2010 20:56:32 +
Subject: [PATCH 2/2] STR9xpec: issue warning when unlocking device
Issue warning to user when unlocking or writing the option by
fixes bug #16
Spen
>From 9642befdbe52b42081be34fa9c8da36adc2034ce Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 11 Feb 2010 20:55:31 +
Subject: [PATCH 1/2] STM32x: issue warning when unlocking device (bug #16)
Issue warning to user when unlocking or writing the option bytes.
On 10/02/2010 09:35, Eric Louveau PSI wrote:
> Hi,
>
> OOCD version : openocd-0.4.0-rc1
> Systems : LINUX and CENTOS
>
> It seems that I'm unable to provide additional environment variables to
> the configure script in order to link with additional libraries.
> Previously, with ocd_2.0, I was abble
>>
>> That's fine, you may have to power cycle before the settings take effect.
>
> I see! Now it works fine! Thanks for help.
>
>> If you have SRST connected that should also work, reseting using the
>> VC_CORERESET will not work.
>
> Should I write the powercycle (or SRST) trick somewhere in the
On 10/02/2010 09:07, Edgar Grimberg wrote:
>
> Now, how do I turn the readout protection off? I've tried:
>
>> stm32x unlock 0
> Device Security Bit Set
> stm32x unlocked
>> stm32x options_read 0
> Option Byte: 0x3fe
> Readout Protection On
> Software Watchdog
> Stop: No reset generated
> Stand
On 09/02/2010 15:35, Edgar Grimberg wrote:
> There's the test run. At address 0x0800, according to flash info
> 0, there should be the flash. The RAM is at 0x2000. You can see
> that it fails to read the flash, but it manages to read the RAM just
> fine:
>
> $ sudo src/openocd -f
> /home/ed
This must have got messed up with cfg changes a while back.
Cheers
Spen
>From f899c2aa9767ba7bf731e6c6c1af2c437af97dac Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 9 Feb 2010 14:49:47 +
Subject: [PATCH] str730.cfg: fix incorrect mem regions
- update str73x mem regions
David Brownell wrote:
> On Thursday 04 February 2010, Spencer Oliver wrote:
>> https://sourceforge.net/apps/trac/openocd/ticket/3
>
> Spen ... I hope you realize the kind of precedent you're setting here.
>
> That ticket has barely been open for two hours before
> y
https://sourceforge.net/apps/trac/openocd/ticket/3
and
http://www.mail-archive.com/openocd-development@lists.berlios.de/msg11152.html
Cheers
Spen
>From 709f08f17ad5128b86966365510dbe8f67736304 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Thu, 4 Feb 2010 10:33:33 +
Subject: [PA
Øyvind Harboe wrote:
> It's missing a LOG_ERROR() in this case
>
If we add a LOG_ERROR we get bombarded with:
Error: 161 31 core.c:1628 jtag_power_dropout(): JTAG Not Initialised
Error: 163 141 core.c:1628 jtag_power_dropout(): JTAG Not Initialised
Error: 164 250 core.c:1628 jtag_power_dropou
Michel Catudal wrote:
> Le 02/02/2010 05:35, Igor Skochinsky a écrit :
>> Hi Spencer,
>>
>> On Tue, Feb 2, 2010 at 11:18, Spencer Oliver
>> wrote:
>>
>>> I have been given all the info for the ST-LINK from ST.
>>> http://www.st.com/ston
Øyvind Harboe wrote:
> It's missing a LOG_ERROR() in this case
>
will do
Spen
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Øyvind Harboe wrote:
> On Tue, Feb 2, 2010 at 6:59 PM, David Brownell wrote:
>> On Tuesday 02 February 2010, Fredrik Hederstierna wrote:
>>> This is the patch that fix the timeout issue:
>> I think we'll hold this until the 0.5 merge window opens,
>> to make sure it gets enough testing.
>
> I'm l
>From ad9d10708d154f3a50b1b5c3465025a646ae54a5 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 2 Feb 2010 21:15:03 +
Subject: [PATCH] JTAG: fix bug when no interface connected
- fix coredump when OpenOCD is started without a jtag interface connected,
Signed-off-by: Spencer Oli
David Brownell wrote:
> On Tuesday 02 February 2010, Spencer Oliver wrote:
>>> By the way ... if STR7 can't actually read the protect status from
>>> the hardware, why does that flash driver have a str7x_protect_check()
>>> method which pretends to do exactly t
Nicolas Pitre wrote:
> From: Spencer Oliver
>
>> @@ -480,6 +460,39 @@ int arm_semihosting(struct target *target, int
>> *retval)
>> return 0;
>> }
>>
>> -*retval = do_semihosting(target);
>> +lr = b
David Brownell wrote:
> On Tuesday 02 February 2010, Edgar Grimberg wrote:
>>> What might make more sense is to have the 0.5 series dump that
>>> status only after "protect_check" ... like it only dumps erase
>>> status after "erase_check".
>> Or we can clone the functionality of at91sam7 flash dri
>From ad4fa0bd982d954da81dd4311dc7ed1e53f0e4e7 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 26 Jan 2010 15:08:38 +
Subject: [PATCH 3/3] ARM semihosting: document ARMv7M semihosting
Signed-off-by: Spencer Oliver
---
doc/openocd.texi | 11 +++
1 files changed,
>From a9e610a28430bdc276bd14cb108c1d4ba20b2e05 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 2 Feb 2010 13:07:28 +
Subject: [PATCH 2/3] ARM semihosting: add ARMv7M semihosting support
Add ARMv7M support to current arm semihosting implementation.
armv7m_arch_state will now s
semihosting patch has been split up a little bit.
updated to latest git master.
Cheers
Spen
>From e94f8ef0802d7abf2798d9967dc14caf00bda4c5 Mon Sep 17 00:00:00 2001
From: Spencer Oliver
Date: Tue, 2 Feb 2010 13:01:50 +
Subject: [PATCH 1/3] ARM semihosting: split do_semihosting
Remove
Edgar Grimberg wrote:
> The default state of the flash after a reset init is unlocked.
> The information in the flash driver reflects this.
>
> The information about the lock status cannot be read from the
> flash chip, so the user is informed that flash info might not
> contain accurate informati
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