On 13.5.2011. 20:02, Luca Olivetti wrote:
Oh, I thought you wanted to dump the flash, not restore it, sorry, I've
no suggestion for that.
(Actually, if it's based on the danube, it should have a mode in which
you can send the code via serial, and this mode doesn't depend on the
flash, however
Al 13/05/11 21:13, En/na Andrej Vlašić ha escrit:
I'm not sure that's the correct thing to do: in the ar71xx architecture
(using ath9k), they're writing some register that modify the pci id, maybe
in your file there's also some fixup data?
Thanx for the info about wlan, I found out that in
2011/5/9 John Crispin j...@phrozen.org
Another question about usb power.
Is it possible that on my board USB clock gating is different than one
set
in current dwc_otg_ifx.c.
There it says:
// set clock gating
writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
On
On 8.5.2011. 0:41, Luca Olivetti wrote:
Al 07/05/11 23:23, En/na Andrej Vlašić ha escrit:
Also this board doesn't have wlan eeprom, instead it is read by a wlan
driver from a file inside fw. If someone has some answers on how to modify
current ath5k driver, would like to know.
The code in
Al 10/05/11 23:36, En/na Andrej Vlašić ha escrit:
Mac address could be read from nvram (both primary and secondary
bootloader are modified u-boot), but the eeprom_data is the problem.
I dunno how to locate it inside my binary, is there any special hex
value which represents that?
It should
Al 11/05/11 00:29, En/na Luca Olivetti ha escrit:
Al 10/05/11 23:36, En/na Andrej Vlašić ha escrit:
Mac address could be read from nvram (both primary and secondary
bootloader are modified u-boot), but the eeprom_data is the problem.
I dunno how to locate it inside my binary, is there any
Al 11/05/11 00:38, En/na Luca Olivetti ha escrit:
Al 11/05/11 00:29, En/na Luca Olivetti ha escrit:
Al 10/05/11 23:36, En/na Andrej Vlašić ha escrit:
Mac address could be read from nvram (both primary and secondary
bootloader are modified u-boot), but the eeprom_data is the problem.
I dunno
Al 11/05/11 00:48, En/na Luca Olivetti ha escrit:
That seems to be the case: the file starts with
0x13 0x00 0x8c 0x16 - 168c:0013
which is a correct pci id for the ar5212
And for the ar2414 (the one the sx763 is using), see here:
http://linuxwireless.org/en/users/Drivers/ath5k/devices
Al 09/05/2011 0:31, En/na Luca Olivetti ha escrit:
It turns out that the ebu, in the gpio_led structure, uses gpio starting
from 32, so defining fake leds using gpios 32-40 I could map all missing
leds.
Since they're active low, I used lq_register_gpio_ebu(0xff), so they all
turn off as soon as
On 09/05/11 16:59, Luca Olivetti wrote:
Al 09/05/2011 0:31, En/na Luca Olivetti ha escrit:
It turns out that the ebu, in the gpio_led structure, uses gpio starting
from 32, so defining fake leds using gpios 32-40 I could map all
missing
leds.
Since they're active low, I used
2011/5/8 Andrej Vlašić andrej.vlas...@gmail.com
I tried 29 again now, and no power, also tried some others, nothing.
If someone want's to see here is how power is set in original fw:
http://pastebin.com/00vJxdYa http://pastebin.com/00vJxdYa
Another question about usb power.
Is it possible
Another question about usb power.
Is it possible that on my board USB clock gating is different than one set
in current dwc_otg_ifx.c.
There it says:
// set clock gating
writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
On mine board it says:
// set clock
On 09/05/11 20:01, John Crispin wrote:
Another question about usb power.
Is it possible that on my board USB clock gating is different than one set
in current dwc_otg_ifx.c.
There it says:
// set clock gating
writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
On mine board
Al 09/05/11 17:14, En/na John Crispin ha escrit:
The next question is, how can I control (some of) the leds from an
userspace program?
Opening the /sys/class/leds/led name/trigger file and alternatively
writing none or default-on?
Or the same but with the brightness file?
Writing a trigger
Note that those 3 leds are controlled by the ebu driver, and I assigned them
to the gpio_led structure, i.e.:
static struct gpio_led
arv7518pw_leds_gpio[] __initdata = {
{ .name = soc:green:power, .gpio = 2, .active_low = 1, },
{ .name = soc:green:adsl, .gpio = 4,
I'm curious about this box, it looks very interesting as a replacement
for my current ADSL modem/router which is one of the last non-Free
computer I use daily. Is the ADSL modem working well under OpenWRT?
And what about the FXO/FXS ports?
Stefan
2011/5/9 John Crispin j...@phrozen.org
try adding printk(foo %d\n, pin); between the // GPIOs and the if
( and see what the bootlog says
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On Sat, May 07, 2011 at 11:23:36PM +0200, Andrej Vlašić wrote:
I'm trying to set up openwrt on this router, it is based on Lantiq Xway
Danube Soc ( PSB50702 E), and manufactured by Sagem(previously by Siemens).
Wiki page is here http://wiki.openwrt.org/toh/gigaset/sx76x
I already managed to
Al 10/05/11 00:51, En/na Luka Perkov ha escrit:
The board has standard EJTAG pinout. With urjtag I can dump only part of
flash:
If the board uses the brn bootloader, maybe you can use my quick'n'dirty
tool to dump the flash:
http://code.google.com/p/brndumper/
Bye
--
Luca
Hi,
I also looked up at those arcadyan board configs, and some of them have
_EBU addess and _USB pin defined.
I know that on this router usb power is on gpio 29( gpl source says that )
So you'll have to define it for your board in the call to xway_register_dwc
On 08/05/11 10:48, Luca Olivetti wrote:
Al 08/05/11 10:33, En/na John Crispin ha escrit:
if it was 29 on ifxmips/ it will be 29 on lantiq/. only the stp and ebu
gpios were mapped to new offsets. the first 32 gpios stayed the same.
Not related to the original question, but where I could
On Sun, May 08, 2011 at 10:33:30AM +0200, John Crispin wrote:
I also looked up at those arcadyan board configs, and some of them have
_EBU addess and _USB pin defined.
I know that on this router usb power is on gpio 29( gpl source says that )
So you'll have to define it for
on this pic - http://wiki.openwrt.org/_media/toh/gigaset/dsc00453.jpg
on the very top, right of where it says PORTA SX76x there is a small
chip. can you tell us what is printed on it ?
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On Sun, May 08, 2011 at 12:37:51PM +0200, John Crispin wrote:
on this pic - http://wiki.openwrt.org/_media/toh/gigaset/dsc00453.jpg
on the very top, right of where it says PORTA SX76x there is a small
chip. can you tell us what is printed on it ?
HC595AG
(inside of circle - ON) PAQ832
Luka
On 08/05/11 15:03, Luka Perkov wrote:
On Sun, May 08, 2011 at 12:37:51PM +0200, John Crispin wrote:
on this pic - http://wiki.openwrt.org/_media/toh/gigaset/dsc00453.jpg
on the very top, right of where it says PORTA SX76x there is a small
chip. can you tell us what is printed on it ?
Al 08/05/11 11:13, En/na John Crispin ha escrit:
EBU - external bus unit
similar to STP but parallel. the xway has 4 x 16 bit ioport ranges that
can be mapped to a special memory location. data written to that
location is that physically written to the D0-15 lines on the memory
bus. in
On 08/05/11 18:29, Luca Olivetti wrote:
Al 08/05/11 11:13, En/na John Crispin ha escrit:
EBU - external bus unit
similar to STP but parallel. the xway has 4 x 16 bit ioport ranges that
can be mapped to a special memory location. data written to that
location is that physically written to
On 08/05/11 20:16, Andrej Vlašić wrote:
Also this board doesn't have wlan eeprom, instead it is read by a wlan
driver from a file inside fw. If someone has some answers on how to modify
current ath5k driver, would like to know.
in a file inside the FS or in a sector on the flash ?
Inside
Al 08/05/11 18:45, En/na John Crispin ha escrit:
Thank you for the detailed explanation.
I have an LVC373A (octal latch), so it's probably EBU, isn't it?
How do I try it?
Bye
try this lq_register_gpio_ebu(XYZ);
as the latch comes up in a undefined state, the values are random. to
Al 07/05/11 23:23, En/na Andrej Vlašić ha escrit:
I also looked up at those arcadyan board configs, and some of them have
_EBU addess and _USB pin defined.
I know that on this router usb power is on gpio 29( gpl source says that )
So you'll have to define it for your board in
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