[PEDA] Finding Setting Test Points
Hi, I'm currently having a lot of trouble setting test points on my current PCB. I've set up rules to allow a single test point per net, bottom layer only for SMD and thru-hole pads. The test point grid is set to 1mil. On selecting Find Set Test Points from the Tools menu, a number of testpoints are set which adhere to the rules. I've noticed that on double clicking on these testpoints to view their properties and then closing the dialogue box using OK, the testpoint then appears as a Testpoint Style violation. Closing the dialogue box using Cancel does not cause a violation. Has anyone else experienced this problem? The reason for my wanting to view the properties of the set testpoints is that only 30 testpoints have been found out of 227. By viewing the properties I was hoping to determine the difference between vias set as testpoints and those not. As far as I can see there is no reason for the failure to set more testpoints. Am I wasting my time using feature? Cheers Dave CONFIDENTIALITY : This e-mail and any attachments are confidential and may be privileged. If you are not a named recipient, please notify the sender immediately and do not disclose the contents to another person, use it for any purpose or store or copy the information in any medium. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To join or leave this list visit: * http://www.techservinc.com/protelusers/subscrib.html * - or email - * mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Finding Setting Test Points
We have been setting up testpoints in a very similar manner, 1 per net (multiple allowed), bottom side. On some boards the pads and vias are all on a 1 mil grid, on others, a 12.5 mil grid. But to reliably capture all eligible testpoints, I have had to set the rule to a .1 mil grid - otherwise , vias which clearly meet the rule are still overlooked, and I have to set too many by hand. But I've never seen the other problem you describe, do they still show up as violations if you run DRC? Mike Crist Newport Corp. San Luis Obispo, CA -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: Monday, April 02, 2001 3:32 AM To: [EMAIL PROTECTED] Subject: [PEDA] Finding Setting Test Points Hi, I'm currently having a lot of trouble setting test points on my current PCB. I've set up rules to allow a single test point per net, bottom layer only for SMD and thru-hole pads. The test point grid is set to 1mil. On selecting Find Set Test Points from the Tools menu, a number of testpoints are set which adhere to the rules. I've noticed that on double clicking on these testpoints to view their properties and then closing the dialogue box using OK, the testpoint then appears as a Testpoint Style violation. Closing the dialogue box using Cancel does not cause a violation. Has anyone else experienced this problem? The reason for my wanting to view the properties of the set testpoints is that only 30 testpoints have been found out of 227. By viewing the properties I was hoping to determine the difference between vias set as testpoints and those not. As far as I can see there is no reason for the failure to set more testpoints. Am I wasting my time using feature? Cheers Dave CONFIDENTIALITY : This e-mail and any attachments are confidential and may be privileged. If you are not a named recipient, please notify the sender immediately and do not disclose the contents to another person, use it for any purpose or store or copy the information in any medium. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To join or leave this list visit: * http://www.techservinc.com/protelusers/subscrib.html * - or email - * mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Finding Setting Test Points
Ted, Thanks for the pointer. It turns out that when I created my PCB using the wizard, it placed the mechanical outline off the snap grid. As the design is a new version of an existing product, there were certain components which needed to be placed accurately. This meant redefining the origin to the bottom right of the PCB to place the critical components. I used the auto-router (for the last time) to track the board, which also placed most of the vias off grid. So it was by shear luck that I was able to set any testpoints at all. In future I'll make sure that at least two perpendicular edges of the board are snapped to grid! Cheers Dave CONFIDENTIALITY : This e-mail and any attachments are confidential and may be privileged. If you are not a named recipient, please notify the sender immediately and do not disclose the contents to another person, use it for any purpose or store or copy the information in any medium. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To join or leave this list visit: * http://www.techservinc.com/protelusers/subscrib.html * - or email - * mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Finding Setting Test Points
Mike, The violation (testpoint style) does not reappear after running the DRC. I've not experienced this problem with any other violations, so it appears to only effect testpoints. Is this a problem other users have come across, or is it just me? Cheers Dave CONFIDENTIALITY : This e-mail and any attachments are confidential and may be privileged. If you are not a named recipient, please notify the sender immediately and do not disclose the contents to another person, use it for any purpose or store or copy the information in any medium. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To join or leave this list visit: * http://www.techservinc.com/protelusers/subscrib.html * - or email - * mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Finding Setting Test Points
On 08:34 AM 2/04/2001 -0500, Ted Tontis said: Dave, The sights that are going to be your test points have to fall on the test point grid. If they do not you get a test point violation. You have to move the pad or via to the 1 mill grid, this will correct the problem you are seeing. Ted -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: Monday, April 02, 2001 5:33 AM To: [EMAIL PROTECTED] Subject: [PEDA] Finding Setting Test Points I have said before that this is a flaw in the testpoint finder. The only testpoint requirement I am given anymore is a 100 mil separation ( 75 mil in special cases for very tight layouts/fine pitch connectors etc). I do not want a grid for my testpoint but rather wish to be able to define the minimum separation. I can set up rules that check for separation and coverage but currently I cannot have the finder choose locations that meet my separation rule. In fact we no longer use the testpoint finder - all our testpoints are shown on the sch and each comes into the PCB as a single pad component (single layer pad 1mm round with a 5 mil wide arc radius 47.5 mil on a mech layer). Almost all vias are tented on our boards - the testpoint component is used to open up the bottom mask of just those vias used as testpoints. The testpoint components (flipped to the bottom side) are then placed on existing vias or bottom side tracks as desired. The mech layer arcs makes it easy to see any clearance violations as you place them instead of waiting for the DRC to tell you. We rarely use SM pads (of components) as testpoints - only on small volume boards that will be tested by flying probe testers and when the layout prevents full test access with 100 mil spaced testpoints. This method may look like more work but the schematic shows each testpoint, testpoints have designators and so labelling on the PCB is slightly easier, the density of testpoints across a board is a little easier to see (the mech layer arcs) and extraction of testpoint locations is a little easier for our contract manufacturers. Ian Wilson * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To join or leave this list visit: * http://www.techservinc.com/protelusers/subscrib.html * - or email - * mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
