L PROTECTED]]
> Sent: Monday, April 15, 2002 7:29 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Timestep Too Small
>
>
> This is a classic Spice error!
>
> I often run into this if I don't have a DC path to a node, to allow
> initial conditions to stablise. My first a
helps.
John Haddy
-Original Message-
From: Tim Hutcheson [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, 16 April 2002 2:14 AM
To: Protel EDA Forum
Subject: [PEDA] Timestep Too Small
The circuit I am simulating simulates fine with a ua741 sim device but when
I attempt to sim with the subckt model
002 04:18:42 +1200
Forwarded by: [EMAIL PROTECTED]
Date sent: Mon, 15 Apr 2002 11:13:58 -0500
From: "Tim Hutcheson" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Subject:[PEDA] Timest
The circuit I am simulating simulates fine with a ua741 sim device but when
I attempt to sim with the subckt model from the TI website for the OPA548, I
get the "timestep too small" error. My recollection is that this is caused
by too high a transient on startup (fails in the GMIN stepping) for t
