To: 'Protel EDA Forum'
Sent: Wednesday, August 11, 2004 11:33 AM
Subject: Re: [PEDA] footprint clearance checking
Brian,
In 2004 or more recent DXP versions, did Altium ever fix the fact
that the clearance check includes all reference designators and other
attributes within
On 01:10 PM 11/08/2004, Dom Bragge said:
I have a connector that could be viewed as a large U when placed on
the board. If I want to place other components within this U shape
(not overlapping the physical connector but within the bounding box)
what choices do I have:
- permanently enjoying the
Design it like all of the components in my publicly available library, where the
silkscreen defines the outer inner edges of where the component surfaces meet the
PCB. Shrink the component-component clearance to 1 mil, or 0 mil. This will allow
you place, for example, some caps resistors
