Re: [Qemu-devel] [PULL v2 00/30] QAPI patches for 2018-03-01

On 2 March 2018 at 01:29, Eric Blake wrote: > The following changes since commit 0dc8ae5e8e693737dfe65ba02d0c6eccb58a9c67: > > Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into > staging (2018-03-01 17:08:16 +) > > are available in the Git

[Qemu-devel] [PATCH v2 0/2] Firmware blob and git submodule for Sam460ex

This is v2 of the firmware image for the ppc sam460ex machine type in case you choose to add it with external git repo first. In case you decide not to add it either as external git nor as a mirrored or copied to QEMU repo then probably some wiki page should be updated to point to a binary image

[Qemu-devel] [PATCH v2 1/2] roms: Added git submodule for u-boot-sam460 (firmware for sam460ex)

Signed-off-by: BALATON Zoltan --- v2: Fixed submodule and added Makefile rules to build binary .gitmodules | 3 +++ roms/Makefile| 7 +++ roms/u-boot-sam460ex | 1 + 3 files changed, 11 insertions(+) create mode 16 roms/u-boot-sam460ex diff --git

Re: [Qemu-devel] [RFC QEMU PATCH v4 00/10] Implement vNVDIMM for Xen HVM guest

On Wed, Feb 28, 2018 at 05:36:59PM +0800, Haozhong Zhang wrote: > On 02/27/18 17:22 +, Anthony PERARD wrote: > > On Thu, Dec 07, 2017 at 06:18:02PM +0800, Haozhong Zhang wrote: > > > This is the QEMU part patches that works with the associated Xen > > > patches to enable vNVDIMM support for

Re: [Qemu-devel] [PULL 00/39] target-arm queue

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180302110640.28004-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/39] target-arm queue === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log

[Qemu-devel] [PULL 2/4] tricore: added CORE_ID

From: David Brenken Signed-off-by: David Brenken Signed-off-by: Florian Artmeier Signed-off-by: Georg Hofstetter Message-Id: <20180301155619.8640-3-david.bren...@efs-auto.org>

[Qemu-devel] [PULL 1/4] target/tricore: added JNE/JEQ/MOV variant

From: David Brenken Signed-off-by: David Brenken Signed-off-by: Florian Artmeier Signed-off-by: Georg Hofstetter Message-Id: <20180301155619.8640-2-david.bren...@efs-auto.org>

[Qemu-devel] [PULL 3/4] tricore: renamed masking of IE

From: David Brenken between 1.3 ISA and 1.6 ISA the IE mask has changed. We reflect this by add an ISA suffix to the existing mask and add the corresponding mask for 1.6. Signed-off-by: David Brenken Signed-off-by: Florian Artmeier

[Qemu-devel] [PULL 0/4] tricore-patches

The following changes since commit 427cbc7e4136a061628cb4315cc8182ea36d772f: Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (2018-03-01 18:46:41 +) are available in the Git repository at: https://github.com/bkoppelmann/qemu-tricore-upstream.git

[Qemu-devel] [PULL 4/4] tricore: renamed masking of PIE

From: David Brenken between 1.3 ISA and 1.6 ISA the IE mask has changed. We reflect this by add an ISA suffix to the existing mask and add the corresponding mask for 1.6. Signed-off-by: David Brenken Signed-off-by: Florian Artmeier

Re: [Qemu-devel] [RFC QEMU PATCH v4 03/10] hostmem-xen: add a host memory backend for Xen

On Wed, Feb 28, 2018 at 03:56:54PM +0800, Haozhong Zhang wrote: > On 02/27/18 16:41 +, Anthony PERARD wrote: > > On Thu, Dec 07, 2017 at 06:18:05PM +0800, Haozhong Zhang wrote: > > > @@ -108,7 +109,10 @@ void pc_dimm_memory_plug(DeviceState *dev, > > > MemoryHotplugState *hpms, > > > } >

Re: [Qemu-devel] [PATCH v3] scripts/checkpatch.pl: add check for `while` and `for`

On Wed, Feb 28, 2018 at 11:31:29AM +0800, Su Hang wrote: > Adding check for `while` and `for` statements, which condition has more than > one line. > > The former checkpatch.pl can check `if` statement, which condition has more > than one line, whether block misses brace round, like this: > ''' >

[Qemu-devel] [PATCH v4] PPC: e500: Fix duplicate kernel load and device tree overlap

This patch fixes an incorrect behavior when the -kernel argument has been specified without -bios. In this case the kernel was loaded twice. At address 32M as a raw image and afterwards by load_elf/load_uimage at the corresponding load address. In this case the region for the device tree and the

[Qemu-devel] [PATCH v3] iotests: Tweak 030 in order to trigger a race condition with parallel jobs

This patch tweaks TestParallelOps in iotest 030 so it allocates data in smaller regions (256KB/512KB instead of 512KB/1MB) and the block-stream job in test_stream_commit() only needs to copy data that is at the very end of the image. This way when the block-stream job is awakened it will finish

Re: [Qemu-devel] [PATCH] vfio-ccw: license text should indicate GPL v2 or later

On 27/02/2018 18:32, Cornelia Huck wrote: The license text currently specifies "any version" of the GPL. It is unlikely that GPL v1 was ever intended; change this to the standard "or any later version" text. Cc: Dong Jia Shi Cc: Xiao Feng Ren

Re: [Qemu-devel] [PULL 00/13] virtio, vhost, pci, pc: features, fixes and cleanups

On 1 March 2018 at 16:45, Michael S. Tsirkin wrote: > The following changes since commit 8cb340c613ee3e626b070e0429c589f8a60ac657: > > Merge remote-tracking branch 'remotes/famz/tags/staging-pull-request' into > staging (2018-03-01 12:32:31 +) > > are available in the git

Re: [Qemu-devel] [PATCH v2 07/15] qio/chardev: update net listener gcontext

On 02/03/2018 05:26, Peter Xu wrote: > Frankly speaking I was a bit confused when I started to read > chardev/qio codes with so many hooks, e.g., when I saw: > > qio_net_listener_set_client_func(s->listener, tcp_chr_accept, > chr, NULL); > > I totally

Re: [Qemu-devel] [PATCH v2 03/15] qio: introduce qio_channel_add_watch_{full|source}

On 02/03/2018 04:54, Peter Xu wrote: > On Thu, Mar 01, 2018 at 06:13:06PM +0100, Paolo Bonzini wrote: >> On 01/03/2018 09:44, Peter Xu wrote: >>> + * qio_channel_add_watch_source: >>> + * @ioc: the channel object >>> + * @condition: the I/O condition to monitor >>> + * @func: callback to invoke

[Qemu-devel] [PULL 37/39] target/arm: Decode aa32 armv8.3 2-reg-index

From: Richard Henderson Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-15-richard.hender...@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell ---

Re: [Qemu-devel] [edk2] [PATCH 6/7] ovmf: link with Tcg2ConfigDxe module

On 03/01/18 17:59, Stefan Berger wrote: > On 02/26/2018 04:58 AM, Laszlo Ersek wrote: >> On 02/23/18 14:23, marcandre.lur...@redhat.com wrote: >>> From: Marc-André Lureau >>> >>> The module allows to tweak and interact with the TPM. Note that many >>> actions are

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3] PPC: e500: Fix duplicate kernel load and device tree overlap

Am 02.03.2018 um 10:11 schrieb Mark Cave-Ayland: On 02/03/18 08:53, David Engraf wrote: Am 02.03.2018 um 02:45 schrieb David Gibson: On Thu, Feb 15, 2018 at 10:36:00AM +0100, David Engraf wrote: This patch fixes an incorrect behavior when the -kernel argument has been specified without

[Qemu-devel] [PULL 38/39] target/arm: Decode t32 simd 3reg and 2reg_scalar extension

From: Richard Henderson Happily, the bits are in the same places compared to a32. Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-16-richard.hender...@linaro.org Reviewed-by: Peter Maydell

Re: [Qemu-devel] [PATCH v10 14/28] hmp: add 'info sev' command

* Brijesh Singh (brijesh.si...@amd.com) wrote: > The command can be used to show the SEV information when memory > encryption is enabled on AMD platform. > > Cc: Eric Blake > Cc: "Daniel P. Berrangé" > Cc: "Dr. David Alan Gilbert" >

[Qemu-devel] [PULL 32/39] target/arm: Enable ARM_FEATURE_V8_RDM

From: Richard Henderson Enable it for the "any" CPU used by *-linux-user. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20180228193125.20577-10-richard.hender...@linaro.org

[Qemu-devel] [PULL 39/39] target/arm: Enable ARM_FEATURE_V8_FCMA

From: Richard Henderson Enable it for the "any" CPU used by *-linux-user. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20180228193125.20577-17-richard.hender...@linaro.org

[Qemu-devel] [PULL 35/39] target/arm: Decode aa64 armv8.3 fcmla

From: Richard Henderson Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-13-richard.hender...@linaro.org Signed-off-by: Peter Maydell [PMM: renamed e1/e2/e3/e4 to use the same naming as the

[Qemu-devel] [PULL 30/39] target/arm: Decode aa32 armv8.1 three same

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-8-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 36/39] target/arm: Decode aa32 armv8.3 3-same

From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20180228193125.20577-14-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 34/39] target/arm: Decode aa64 armv8.3 fcadd

From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-12-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 24/39] target/arm: Add ARM_FEATURE_V8_RDM

From: Richard Henderson Not enabled anywhere yet. Reviewed-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id:

[Qemu-devel] [PULL 31/39] target/arm: Decode aa32 armv8.1 two reg and a scalar

From: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-9-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 33/39] target/arm: Add ARM_FEATURE_V8_FCMA

From: Richard Henderson Not enabled anywhere yet. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-11-richard.hender...@linaro.org Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 28/39] target/arm: Decode aa64 armv8.1 three same extra

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-6-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 22/39] hw/arm/iotkit: Model Arm IOT Kit

Model the Arm IoT Kit documented in http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html The Arm IoT Kit is a subsystem which includes a CPU and some devices, and is intended be extended by adding extra devices to form a complete system. It is used in the MPS2

[Qemu-devel] [PULL 16/39] hw/core/split-irq: Device that splits IRQ lines

In some board or SoC models it is necessary to split a qemu_irq line so that one input can feed multiple outputs. We currently have qemu_irq_split() for this, but that has several deficiencies: * it can only handle splitting a line into two * it unavoidably leaks memory, so it can't be used

[Qemu-devel] [PULL 23/39] mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image

Define a new board model for the MPS2 with an AN505 FPGA image containing a Cortex-M33. Since the FPGA images for TrustZone cores (AN505, and the similar AN519 for Cortex-M23) have a significantly different layout of devices to the non-TrustZone images, we use a new source file rather than

[Qemu-devel] [PULL 17/39] hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505

The MPS2 AN505 FPGA image includes a "FPGA control block" which is a small set of registers handling LEDs, buttons and some counters. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id:

[Qemu-devel] [PULL 19/39] hw/misc/iotkit-secctl: Arm IoT Kit security controller initial skeleton

The Arm IoT Kit includes a "security controller" which is largely a collection of registers for controlling the PPCs and other bits of glue in the system. This commit provides the initial skeleton of the device, implementing just the ID registers, and a couple of read-only read-as-zero registers.

[Qemu-devel] [PULL 27/39] target/arm: Decode aa64 armv8.1 scalar three same extra

From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-5-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 26/39] target/arm: Refactor disas_simd_indexed size checks

From: Richard Henderson The integer size check was already outside of the opcode switch; move the floating-point size check outside as well. Unify the size vs index adjustment between fp and integer paths. Signed-off-by: Richard Henderson

[Qemu-devel] [PULL 13/39] hw/misc/unimp: Move struct to header file

Move the definition of the struct for the unimplemented-device from unimp.c to unimp.h, so that users can embed the struct in their own device structs if they prefer. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard

[Qemu-devel] [PULL 21/39] hw/misc/iotkit-secctl: Add remaining simple registers

Add remaining easy registers to iotkit-secctl: * NSCCFG just routes its two bits out to external GPIO lines * BRGINSTAT/BRGINTCLR/BRGINTEN can be dummies, because QEMU's bus fabric can never report errors Signed-off-by: Peter Maydell Message-id:

[Qemu-devel] [PULL 29/39] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element

From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20180228193125.20577-7-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 18/39] hw/misc/tz-ppc: Model TrustZone peripheral protection controller

Add a model of the TrustZone peripheral protection controller (PPC), which is used to gate transactions to non-TZ-aware peripherals so that secure software can configure them to not be accessible to non-secure software. Signed-off-by: Peter Maydell Reviewed-by: Richard

[Qemu-devel] [PULL 11/39] armv7m: Forward init-svtor property to CPU object

Create an "init-svtor" property on the armv7m container object which we can forward to the CPU object. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20180220180325.29818-8-peter.mayd...@linaro.org ---

[Qemu-devel] [PULL 08/39] target/arm: Define an IDAU interface

In v8M, the Implementation Defined Attribution Unit (IDAU) is a small piece of hardware typically implemented in the SoC which provides board or SoC specific security attribution information for each address that the CPU performs MPU/SAU checks on. For QEMU, we model this with a QOM interface

[Qemu-devel] [PULL 14/39] include/hw/or-irq.h: Add missing include guard

The or-irq.h header file is missing the customary guard against multiple inclusion, which means compilation fails if it gets included twice. Fix the omission. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard

[Qemu-devel] [PULL 25/39] target/arm: Refactor disas_simd_indexed decode

From: Richard Henderson Include the U bit in the switches rather than testing separately. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id:

[Qemu-devel] [PULL 10/39] target/arm: Define init-svtor property for the reset secure VTOR value

The Cortex-M33 allows the system to specify the reset value of the secure Vector Table Offset Register (VTOR) by asserting config signals. In particular, guest images for the MPS2 AN505 board rely on the MPS2's initial VTOR being correct for that board. Implement a QEMU property so board and SoC

[Qemu-devel] [PULL 05/39] loader: Add new load_ramdisk_as()

Add a function load_ramdisk_as() which behaves like the existing load_ramdisk() but allows the caller to specify the AddressSpace to use. This matches the pattern we have already for various other loader functions. Signed-off-by: Peter Maydell Reviewed-by: Philippe

[Qemu-devel] [PULL 09/39] armv7m: Forward idau property to CPU object

Create an "idau" property on the armv7m container object which we can forward to the CPU object. Annoyingly, we can't use object_property_add_alias() because the CPU object we want to forward to doesn't exist until the armv7m container is realized. Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 15/39] qdev: Add new qdev_init_gpio_in_named_with_opaque()

The function qdev_init_gpio_in_named() passes the DeviceState pointer as the opaque data pointor for the irq handler function. Usually this is what you want, but in some cases it would be helpful to use some other data pointer. Add a new function qdev_init_gpio_in_named_with_opaque() which

[Qemu-devel] [PULL 20/39] hw/misc/iotkit-secctl: Add handling for PPCs

The IoTKit Security Controller includes various registers that expose to software the controls for the Peripheral Protection Controllers in the system. Implement these. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson

[Qemu-devel] [PULL 12/39] target/arm: Add Cortex-M33

Add a Cortex-M33 definition. The M33 is an M profile CPU which implements the ARM v8M architecture, including the M profile Security Extension. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id:

[Qemu-devel] [PULL 02/39] xlnx-zynqmp-rtc: Add basic time support

From: Alistair Francis Allow the guest to determine the time set from the QEMU command line. This includes adding a trace event to debug the new time. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé

[Qemu-devel] [PULL 06/39] hw/arm/boot: Honour CPU's address space for image loads

Instead of loading kernels, device trees, and the like to the system address space, use the CPU's address space. This is important if we're trying to load the file to memory or via an alias memory region that is provided by an SoC object and thus not mapped into the system address space.

[Qemu-devel] [PULL 04/39] decodetree: Propagate return value from translate subroutines

From: Richard Henderson Allow the translate subroutines to return false for invalid insns. At present we can of course invoke an invalid insn exception from within the translate subroutine, but in the short term this consolidates code. In the long term it would

[Qemu-devel] [PULL 03/39] xlnx-zynqmp: Connect the RTC device

From: Alistair Francis Signed-off-by: Alistair Francis Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 07/39] hw/arm/armv7m: Honour CPU's address space for image loads

Instead of loading guest images to the system address space, use the CPU's address space. This is important if we're trying to load the file to memory or via an alias memory region that is provided by an SoC object and thus not mapped into the system address space. Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 00/39] target-arm queue

-01 18:46:41 +) are available in the Git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180302 for you to fetch changes up to e66a67bf28e1b4fce2e3d72a2610dbd48d9d3078: target/arm: Enable ARM_FEATURE_V8_FCMA (2018-03-02 11:03:45 +

[Qemu-devel] [PULL 01/39] xlnx-zynqmp-rtc: Initial commit

From: Alistair Francis Initial commit of the ZynqMP RTC device. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- hw/timer/Makefile.objs

Re: [Qemu-devel] [PATCH v2 08/15] chardev: allow telnet gsource to switch gcontext

On Thu, Mar 01, 2018 at 06:16:53PM +0100, Paolo Bonzini wrote: > On 01/03/2018 16:46, Daniel P. Berrangé wrote: > > On Thu, Mar 01, 2018 at 04:44:31PM +0800, Peter Xu wrote: > >> It was originally created by qio_channel_add_watch() so it's always > >> assigning the task to main context. Now we

Re: [Qemu-devel] [PATCH v3] vmgenid: allow VM Generation ID modification via QMP/HMP

On Fri, Mar 02, 2018 at 10:37:20AM +0200, Or Idgar wrote: > From: Or Idgar > > This patch allow changing the Virtual Machine Generation > ID through QMP/HMP while the vm guest is running. > the spec (http://go.microsoft.com/fwlink/?LinkId=260709) > mentions that "when the

Re: [Qemu-devel] [edk2] [PATCH 4/7] ovmf: link with Tcg2Pei module

On 03/01/18 16:08, Marc-André Lureau wrote: > Hi > > On Mon, Feb 26, 2018 at 10:38 AM, Laszlo Ersek wrote: >> On 02/23/18 14:23, marcandre.lur...@redhat.com wrote: >>> From: Marc-André Lureau >>> >>> This module will initialize TPM device, measure

Re: [Qemu-devel] [PATCH] use g_path_get_basename instead of basename

On 01/03/2018 17:20, Alex Williamson wrote: >> basename(3) and dirname(3) modify their argument and may return >> pointers to statically allocated memory which may be overwritten by >> subsequent calls. >> g_path_get_basename and g_path_get_dirname have no such issues, and >> therefore more

Re: [Qemu-devel] [PATCH v2 05/15] qio: refactor net listener source operations

On Fri, Mar 02, 2018 at 11:58:52AM +0800, Peter Xu wrote: > On Thu, Mar 01, 2018 at 10:47:17AM +, Daniel P. Berrangé wrote: > > On Thu, Mar 01, 2018 at 04:44:28PM +0800, Peter Xu wrote: > > > Three functions are abstracted from the old code: > > > > > > - qio_net_listener_source_add(): create

Re: [Qemu-devel] [edk2] [PATCH 2/7] ovmf: link with Tcg2ConfigPei module

On 03/01/18 15:59, Marc-André Lureau wrote: > Hi > > On Fri, Feb 23, 2018 at 6:31 PM, Laszlo Ersek wrote: >> (6) Now, I realize Tcg2Pei *apparently* depends on >> gEfiPeiReadOnlyVariable2PpiGuid (i.e., read-only variable access in the >> PEI phase) as well. That's a bug in

Re: [Qemu-devel] [PATCH v2 2/4] tricore: added CORE_ID

On 03/01/2018 04:56 PM, David Brenken wrote: > From: David Brenken > > Signed-off-by: David Brenken > Signed-off-by: Florian Artmeier > Signed-off-by: Georg Hofstetter > --- >

Re: [Qemu-devel] [PATCH v2 3/4] tricore: renamed masking of IE

On 03/01/2018 04:56 PM, David Brenken wrote: > From: David Brenken > > Signed-off-by: David Brenken > Signed-off-by: Florian Artmeier > Signed-off-by: Georg Hofstetter > --- >

Re: [Qemu-devel] [PATCH v2 1/4] tricore: added some missing cpu instructions

On 03/01/2018 04:56 PM, David Brenken wrote: > From: David Brenken > > Signed-off-by: David Brenken > Signed-off-by: Florian Artmeier > Signed-off-by: Georg Hofstetter > --- >

Re: [Qemu-devel] [PATCH v2] checkpatch: add a warning for basename/dirname

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1519987399-19160-1-git-send-email-jus...@mail.ru Subject: [Qemu-devel] [PATCH v2] checkpatch: add a warning for basename/dirname === TEST SCRIPT BEGIN === #!/bin/bash

[Qemu-devel] [PATCH v2] checkpatch: add a warning for basename/dirname

g_path_get_* do the same as g_strdup(basename/dirname(...)) but without modifying the argument. Signed-off-by: Julia Suvorova --- scripts/checkpatch.pl | 5 + 1 file changed, 5 insertions(+) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 1b4b812..a88af61

Re: [Qemu-devel] [PATCH v2 0/4] tricore: added small features + fixed wrong masks

Hi David, On 03/01/2018 04:56 PM, David Brenken wrote: > From: David Brenken > > Hi Bastian, > > thank you for your feedback and sorry for the late reply. > > Changes from v1: > * Removed OPC1_16_SB_JNE instruction. > * Added CPU feature checks to new

Re: [Qemu-devel] [PATCHv5 4/5] qemu-doc: deprecate query-cpus

On Tue, 27 Feb 2018 20:06:55 +0100 Cornelia Huck wrote: > On Tue, 27 Feb 2018 14:41:38 +0100 > Viktor Mihajlovski wrote: > > > On 19.02.2018 15:57, Cornelia Huck wrote: > > > On Fri, 16 Feb 2018 17:08:40 +0100 > > > Viktor Mihajlovski

Re: [Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo

On 2 March 2018 at 10:29, Peter Maydell wrote: > On 2 March 2018 at 04:34, Alistair Francis wrote: >> target/arm: Report the number of cores in the cluster >> >> Previously we assumed that we only has a single cluster, which meant we >>

Re: [Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo

On 2 March 2018 at 04:34, Alistair Francis wrote: > On Thu, Mar 1, 2018 at 4:20 PM, Alistair Francis > wrote: >> The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register >> specify the number of cores present and not the number

[Qemu-devel] ping Re: [PATCH v2 0/2] block latency histogram

ping 07.02.2018 15:50, Vladimir Sementsov-Ogievskiy wrote: v2: 01: add block_latency_histogram_clear() 02: fix spelling (sorry =() some rewordings remove histogram if latency parameter unspecified Vladimir Sementsov-Ogievskiy (2): block/accounting: introduce latency histogram

Re: [Qemu-devel] [PATCH v4 1/2] tpm: extend TPM emulator with state migration support

* Marc-André Lureau (marcandre.lur...@gmail.com) wrote: > Hi Stefan > > On Thu, Mar 1, 2018 at 8:59 PM, Stefan Berger > wrote: > > Extend the TPM emulator backend device with state migration support. > > > > The external TPM emulator 'swtpm' provides a protocol over >

Re: [Qemu-devel] [PATCHv1 12/14] target/s390x: convert to TranslatorOps

On Thu, 1 Mar 2018 17:53:56 -0500 "Emilio G. Cota" wrote: > Note: I looked into dropping dc->do_debug. However, I don't see > an easy way to do it given that TOO_MANY is also valid > when we just translate more than max_insns. Thus, the check > for do_debug in "case

Re: [Qemu-devel] [PATCHv1 11/14] target/s390x: convert to DisasContextBase

On Thu, 1 Mar 2018 17:53:55 -0500 "Emilio G. Cota" wrote: > Notes: > > - Did not convert {num,max}_insns and is_jmp, since the corresponding > code will go away in the next patch. > > - Avoided a checkpatch error in use_exit_tb. > > - As suggested by David, (1) Drop ctx.pc

Re: [Qemu-devel] [PATCHv1 10/14] target/s390x: convert to DisasJumpType

On Thu, 1 Mar 2018 17:53:54 -0500 "Emilio G. Cota" wrote: > The only non-trivial modification is the use of DISAS_TOO_MANY > in the same way is used by the generic translation loop. > > Reviewed-by: David Hildenbrand > Reviewed-by: Richard Henderson

Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets

On Thu, 1 Mar 2018 17:53:44 -0500 "Emilio G. Cota" wrote: > [ What is this all about? See this message: > http://lists.gnu.org/archive/html/qemu-devel/2018-02/msg04785.html ] > > Merged the separate patchsets I sent in the last couple of weeks into > one set. This will be

Re: [Qemu-devel] [PATCH qemu v2] qmp: Add qom-list-properties to list QOM object properties

On Wed, 2018-02-28 at 15:42 +0100, Andrea Bolognani wrote: > I'm going to implement support for this new command in libvirt > and report back if I run into any issue with the current design, > but it looks very good so far. I've posted the RFC implementation to libvir-list:

Re: [Qemu-devel] [PATCHv1 12/14] target/s390x: convert to TranslatorOps

On 01.03.2018 23:53, Emilio G. Cota wrote: > Note: I looked into dropping dc->do_debug. However, I don't see > an easy way to do it given that TOO_MANY is also valid > when we just translate more than max_insns. Thus, the check > for do_debug in "case DISAS_PC_CC_UPDATED" would still need >

Re: [Qemu-devel] [PATCH v5] tap: setting error appropriately when calling net_init_tap_one()

On 2018年03月02日 17:04, Jay Zhou wrote: If netdev_add tap,id=net0,...,vhost=on failed in net_init_tap_one(), the followed up device_add virtio-net-pci,netdev=net0 will fail too, prints: TUNSETOFFLOAD ioctl() failed: Bad file descriptor TUNSETOFFLOAD ioctl() failed: Bad file descriptor

Re: [Qemu-devel] [qemu-s390x] [PATCH v4 3/3] s390x/sclp: extend SCLP event masks to 64 bits

On 02/23/2018 06:42 PM, Claudio Imbrenda wrote: > Extend the SCLP event masks to 64 bits. > > Notice that using any of the new bits results in a state that cannot be > migrated to an older version. > > Signed-off-by: Claudio Imbrenda > --- >

Re: [Qemu-devel] [PATCH v4 2/2] tpm: extend TPM TIS with state migration support

Hi On Thu, Mar 1, 2018 at 8:59 PM, Stefan Berger wrote: > Extend the TPM TIS interface with state migration support. > > We need to synchronize with the backend thread to make sure that a command > being processed by the external TPM emulator has completed and its >

Re: [Qemu-devel] [PATCHv1 11/14] target/s390x: convert to DisasContextBase

On 01.03.2018 23:53, Emilio G. Cota wrote: > Notes: > > - Did not convert {num,max}_insns and is_jmp, since the corresponding > code will go away in the next patch. > > - Avoided a checkpatch error in use_exit_tb. > > - As suggested by David, (1) Drop ctx.pc and use > ctx.base.pc_next

Re: [Qemu-devel] [PATCH v2] s390/ipl: only print boot menu error if -boot menu=on was specified

On Tue, 27 Feb 2018 14:35:21 -0500 "Collin L. Walling" wrote: > It is possible that certain QEMU configurations may not > create an IPLB (such as when -kernel is provided). In > this case, a misleading error message will be printed > stating that the "boot menu is not

Re: [Qemu-devel] [PATCH v2 1/3] virtio-balloon: VIRTIO_BALLOON_F_FREE_PAGE_HINT

On 02/07/2018 09:04 AM, Michael S. Tsirkin wrote: On Tue, Feb 06, 2018 at 07:08:17PM +0800, Wei Wang wrote: The new feature enables the virtio-balloon device to receive the hint of guest free pages from the free page vq, and clears the corresponding bits of the free page from the dirty bitmap,

Re: [Qemu-devel] [PATCH v3] vmgenid: allow VM Generation ID modification via QMP/HMP

* Or Idgar (id...@virtualoco.com) wrote: > From: Or Idgar Hi Or, > This patch allow changing the Virtual Machine Generation > ID through QMP/HMP while the vm guest is running. > the spec (http://go.microsoft.com/fwlink/?LinkId=260709) > mentions that "when the generation ID

Re: [Qemu-devel] [PATCH] checkpatch: add a warning for basename/dirname

On 02.03.2018 11:56, Paolo Bonzini wrote: > On 02/03/2018 09:22, Julia Suvorova wrote: >> Signed-off-by: Julia Suvorova >> --- >> scripts/checkpatch.pl | 5 + >> 1 file changed, 5 insertions(+) >> >> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl >> index

Re: [Qemu-devel] [PATCH v4 1/2] tpm: extend TPM emulator with state migration support

Hi Stefan On Thu, Mar 1, 2018 at 8:59 PM, Stefan Berger wrote: > Extend the TPM emulator backend device with state migration support. > > The external TPM emulator 'swtpm' provides a protocol over > its control channel to retrieve its state blobs. We implement >

Re: [Qemu-devel] [PATCH v2 0/4] vl: introduce vm_shutdown()

On Fri, Mar 02, 2018 at 08:58:26AM +0800, Fam Zheng wrote: > On Thu, 03/01 14:54, Stefan Hajnoczi wrote: > > On Thu, Mar 01, 2018 at 09:15:17AM +0800, Fam Zheng wrote: > > > On Wed, 02/28 18:19, Stefan Hajnoczi wrote: > > > > v2: > > > > * Tackle the .ioeventfd_stop() vs vq handler race by

Re: [Qemu-devel] [BUG] I/O thread segfault for QEMU on s390x

On Thu, Mar 01, 2018 at 09:33:35AM -0500, Farhan Ali wrote: > Hi, > > I have been noticing some segfaults for QEMU on s390x, and I have been > hitting this issue quite reliably (at least once in 10 runs of a test case). > The qemu version is 2.11.50, and I have systemd created coredumps > when

Re: [Qemu-devel] [qemu-s390x] [PATCH v4 2/3] s390x/sclp: clean up sclp masks

On 02/23/2018 06:42 PM, Claudio Imbrenda wrote: > Introduce an sccb_mask_t to be used for SCLP event masks instead of just > unsigned int or uint32_t. This will allow later to extend the mask with > more ease. > > Signed-off-by: Claudio Imbrenda Certainly a sane

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3] PPC: e500: Fix duplicate kernel load and device tree overlap

On 02/03/18 08:53, David Engraf wrote: Am 02.03.2018 um 02:45 schrieb David Gibson: On Thu, Feb 15, 2018 at 10:36:00AM +0100, David Engraf wrote: This patch fixes an incorrect behavior when the -kernel argument has been specified without -bios. In this case the kernel was loaded twice. At

Re: [Qemu-devel] [PATCH] hw/s390x/ipl: Bail out if the network bootloader can not be found

On Tue, 27 Feb 2018 11:05:13 +0100 Thomas Huth wrote: > If QEMU fails to load 's390-netboot.img', the guest firmware currently > loops forever and just floods the console with "Network boot device > detected" messages. The code in ipl.c apparently already tried to stop > the VM

Re: [Qemu-devel] [qemu-s390x] [PATCH v4 1/3] s390x/sclp: proper support of larger send and receive masks

On 02/23/2018 06:42 PM, Claudio Imbrenda wrote: > Until 67915de9f0383ccf4a ("s390x/event-facility: variable-length event masks") > we only supported sclp event masks with a size of exactly 4 bytes, even > though the architecture allows the guests to set up sclp event masks > from 1 to 1021 bytes

[Qemu-devel] [PATCH v3 1/3] migration: API to clear bits of guest free pages from the dirty bitmap

This patch adds an API to clear bits corresponding to guest free pages from the dirty bitmap. Spilt the free page block if it crosses the QEMU RAMBlock boundary. Signed-off-by: Wei Wang CC: Dr. David Alan Gilbert CC: Juan Quintela

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