We want to make sure that certain properties don't change during
migration, especially to catch user errors in a nice way. Let's migrate
a temporary structure and validate that the properties didn't change.
Cc: "Michael S. Tsirkin"
Cc: "Dr. David Alan Gilbert"
Signed-off-by: David Hildenbrand
Let's add some trace events that might come in handy later.
Cc: "Michael S. Tsirkin"
Cc: "Dr. David Alan Gilbert"
Signed-off-by: David Hildenbrand
---
hw/virtio/trace-events | 10 ++
hw/virtio/virtio-mem.c | 10 +-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/helper.h | 49 +++
target/riscv/insn32.decode | 16 ++
target/riscv/insn_trans/trans_rvv.inc.c | 186
We want to send qapi events in case the size of a virtio-mem device
changes. This allows upper layers to always know how much memory is
actually currently consumed via a virtio-mem device.
Unfortuantely, we have to report the id of our proxy device. Let's provide
an easy way for our proxy device
Let's wire it up similar to virtio-pmem. Also disallow unplug, so it's
harder for users to shoot themselves into the foot.
Reviewed-by: Pankaj Gupta
Cc: "Michael S. Tsirkin"
Cc: Marcel Apfelbaum
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: Eric Blake
Cc: Markus
Let's register the notifier and trigger the qapi event with the right
device id.
MEMORY_DEVICE_SIZE_CHANGE is similar to BALLOON_CHANGE, however on a
memory device level.
Don't unregister the notifier (we neither have finalize() nor unrealize()
for VirtIOPCIProxy, so it's not that simple to do
Let's make sure patches/bug reports find the right person.
Reviewed-by: Dr. David Alan Gilbert
Cc: "Michael S. Tsirkin"
Cc: Peter Maydell
Cc: Markus Armbruster
Signed-off-by: David Hildenbrand
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS
Print the memory device info just like for other memory devices.
Cc: "Dr. David Alan Gilbert"
Cc: "Michael S. Tsirkin"
Signed-off-by: David Hildenbrand
---
monitor/hmp-cmds.c | 16
1 file changed, 16 insertions(+)
diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
index
To be merged hopefully soon. Then, we can replace this by a proper
header sync.
Cc: "Michael S. Tsirkin"
Signed-off-by: David Hildenbrand
---
include/standard-headers/linux/virtio_ids.h | 1 +
include/standard-headers/linux/virtio_mem.h | 211
2 files changed, 212
Account the memory to the configured nid.
Reviewed-by: Pankaj Gupta
Cc: Eduardo Habkost
Cc: Marcel Apfelbaum
Cc: "Michael S. Tsirkin"
Signed-off-by: David Hildenbrand
---
hw/core/numa.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/core/numa.c b/hw/core/numa.c
index
This is the very basic/initial version of virtio-mem. An introduction to
virtio-mem can be found in the Linux kernel driver [1]. While it can be
used in the current state for hotplug of a smaller amount of memory, it
will heavily benefit from resizeable memory regions in the future.
Each
RDMA will pin all guest memory (as documented in docs/rdma.txt). We want
to disable RAM block discards - however, to keep it simple use
ram_block_discard_is_required() instead of inhibiting.
Note: It is not sufficient to limit disabling to pin_all. Even when only
conditionally pinning 1 MB
Discarding RAM does not work as expected with protected VMs. Let's
switch to ram_block_discard_disable() for now, as we want to get rid
of qemu_balloon_inhibit(). Note that it will currently never fail, but
might fail in the future with new technologies (e.g., virtio-mem).
Cc: Richard Henderson
Let's add a proxy for virtio-mem, make it a memory device, and
pass-through the properties.
Reviewed-by: Pankaj Gupta
Cc: "Michael S. Tsirkin"
Cc: Marcel Apfelbaum
Cc: "Dr. David Alan Gilbert"
Cc: Igor Mammedov
Signed-off-by: David Hildenbrand
---
hw/virtio/Makefile.objs| 1 +
COLO will copy all memory in a RAM block, disable discarding of RAM.
Reviewed-by: Dr. David Alan Gilbert
Tested-by: Lukas Straub
Cc: "Michael S. Tsirkin"
Cc: Hailiang Zhang
Cc: Juan Quintela
Cc: "Dr. David Alan Gilbert"
Signed-off-by: David Hildenbrand
---
include/migration/colo.h | 2 +-
The only remaining special case is postcopy. It cannot handle
concurrent discards yet, which would result in requesting already sent
pages from the source. Special-case it in virtio-balloon instead.
Introduce migration_in_incoming_postcopy(), to find out if incoming
postcopy is active.
Cc:
пон, 8. јун 2020. у 11:03 Philippe Mathieu-Daudé је
написао/ла:
>
> Last commit from Magnus Damm is fc8e320ef583, which date is
> Fri Nov 13 2009. As nobody else seems to care about the patches
> posted [*] related to the R2D and Shix machines, mark them orphan.
>
> Many thanks to Magnus for his
Discarding memory does not work as expected. At the time this is called,
we cannot have anyone active that relies on discards to work properly.
Reviewed-by: Dr. David Alan Gilbert
Cc: Paolo Bonzini
Signed-off-by: David Hildenbrand
---
accel/kvm/kvm-all.c | 4 ++--
1 file changed, 2
AMD SEV will pin all guest memory, mark discarding of RAM broken. At the
time this is called, we cannot have anyone active that relies on discards
to work properly - let's still implement error handling.
Reviewed-by: Dr. David Alan Gilbert
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Richard
VFIO is (except devices without a physical IOMMU or some mediated devices)
incompatible with discarding of RAM. The kernel will pin basically all VM
memory. Let's convert to ram_block_discard_disable(), which can now
fail, in contrast to qemu_balloon_inhibit().
Leave "x-balloon-allowed" named as
This is the very basic, initial version of virtio-mem. More info on
virtio-mem in general can be found in the Linux kernel driver v2 posting
[1] and in patch #10. The Linux driver is currently on its way upstream.
This series is based on [3]:
"[PATCH v1] pc: Support coldplugging of
The unit-stride fault-only-fault load instructions are used to
vectorize loops with data-dependent exit conditions(while loops).
These instructions execute as a regular load except that they
will only take a trap on element 0.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by:
We want to replace qemu_balloon_inhibit() by something more generic.
Especially, we want to make sure that technologies that really rely on
RAM block discards to work reliably to run mutual exclusive with
technologies that effectively break it.
E.g., vfio will usually pin all guest memory,
Vector strided operations access the first memory element at the base address,
and then access subsequent elements at address increments given by the byte
offset contained in the x register specified by rs2.
Vector unit-stride operations access elements stored contiguously in memory
starting from
I see,
I thought qemu-img (by default) checks the virtual size of the disk
before starting to copy allocated data, zeroes out all of the virtual
size (slowly) and then writes all the allocated data except for
zeroes.
But from what I understand now, qemu-img finds that the target is raw
and can
Vector indexed operations add the contents of each element of the
vector offset operand specified by vs2 to the base effective address
to give the effective address of each element.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by: Richard Henderson
---
The internals.h keeps things that are not relevant to the actual architecture,
only to the implementation, separate.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by: Richard Henderson
---
target/riscv/internals.h | 24
1 file changed, 24
vsetvl and vsetvli are two configure instructions for vl, vtype. TB flags
should update after configure instructions. The (ill, lmul, sew ) of vtype
and the bit of (VSTART == 0 && VL == VLMAX) will be placed within tb_flags.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by:
vlen is the vector register length in bits.
elen is the max element size in bits.
vext_spec is the vector specification version, default value is v0.7.1.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by: Richard Henderson
---
target/riscv/cpu.c | 7 +++
The v0.7.1 specification does not define vector status within mstatus.
A future revision will define the privileged portion of the vector status.
Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Reviewed-by: Richard Henderson
---
target/riscv/cpu_bits.h | 15 +
On Wed, 10 Jun 2020 11:41:22 +0200
Gerd Hoffmann wrote:
> First batch of microvm patches, some generic acpi stuff.
> Split the acpi-build.c monster, specifically split the
> pc and q35 and pci bits into a separate file which we
> can skip building at some point in the future.
>
It looks like
Am 09.06.2020 um 22:46 hat Eric Blake geschrieben:
> On 6/9/20 8:32 AM, Kevin Wolf wrote:
> > Am 08.06.2020 um 21:56 hat Eric Blake geschrieben:
> > > Depending on the granularity of holes and amount of metadata consumed
> > > by a file, the 'disk size:' number of 'qemu-img info' is not reliable.
The 32 vector registers will be viewed as a continuous memory block.
It avoids the convension between element index and (regno, offset).
Thus elements can be directly accessed by offset from the first vector
base address.
Signed-off-by: LIU Zhiwei
Acked-by: Alistair Francis
Reviewed-by: Richard
Am 10.06.2020 um 08:28 hat Sam Eiderman geschrieben:
> Hi,
>
> My target format is a Persistent Disk on GCP.
> https://cloud.google.com/persistent-disk
>
> And my use case is converting VMDKs to PDs so I'm just using qemu-img
> for the conversion (not using qemu as a hypervisor).
>
> Luckily
This patchset implements the vector extension for RISC-V on QEMU.
You can also find the patchset and all *test cases* in
my repo(https://github.com/romanheros/qemu.git branch:vector-upstream-v9).
All the test cases are in the directory qemu/tests/riscv/vector/. They are
riscv64 linux user mode
сре, 10. јун 2020. у 13:17 Thomas Huth је написао/ла:
>
> On 10/06/2020 13.08, Aleksandar Markovic wrote:
> > пон, 8. јун 2020. у 11:05 Philippe Mathieu-Daudé је
> > написао/ла:
> >>
> >> Aurelien Jarno expressed his desire to orphan the SH4 hardware [*]:
> >>
> >> I don't mind being [...]
Am 10.06.2020 um 08:50 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 09.06.2020 19:19, Eric Blake wrote:
> > On 6/9/20 10:18 AM, Kevin Wolf wrote:
> >
> > > > > > -Â Â Â Â Â Â Â ret = bdrv_co_pwrite_zeroes(s->data_file,
> > > > > > m->alloc_offset,
> > > > > > -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â
On 10/06/2020 13.08, Aleksandar Markovic wrote:
> пон, 8. јун 2020. у 11:05 Philippe Mathieu-Daudé је
> написао/ла:
>>
>> Aurelien Jarno expressed his desire to orphan the SH4 hardware [*]:
>>
>> I don't mind being [...] removed from there.
>> I do not really have time to work on that.
>>
>>
пон, 8. јун 2020. у 11:05 Philippe Mathieu-Daudé је
написао/ла:
>
> Aurelien Jarno expressed his desire to orphan the SH4 hardware [*]:
>
> I don't mind being [...] removed from there.
> I do not really have time to work on that.
>
> Mark the SH4 emulated hardware orphan.
>
> Many thanks to
All,
I'm finding myself needing to pass in some information to cloud-init in
some VM's in a non-cloud environment.
cloud-init is a (very) widely used tool for applying some initial
configuration to VM's. It originally exclusively used AWS's EC2's metadata
and userdata service, but has since been
On 10.06.20 12:39, Dr. David Alan Gilbert wrote:
> * David Hildenbrand (da...@redhat.com) wrote:
>> On 10.06.20 09:51, David Hildenbrand wrote:
>>> Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
>>> parser, making it possible to specify complex types. However, with this
>>>
* David Hildenbrand (da...@redhat.com) wrote:
> On 10.06.20 09:51, David Hildenbrand wrote:
> > Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
> > parser, making it possible to specify complex types. However, with this
> > change it is no longer possible to specify proper sizes
* David Hildenbrand (da...@redhat.com) wrote:
> Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
> parser, making it possible to specify complex types. However, with this
> change it is no longer possible to specify proper sizes (e.g., 2G, 128M),
> turning the interface harder to
On 10.06.20 09:51, David Hildenbrand wrote:
> Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
> parser, making it possible to specify complex types. However, with this
> change it is no longer possible to specify proper sizes (e.g., 2G, 128M),
> turning the interface harder to
Status changed to 'Confirmed' because the bug affects multiple users.
** Changed in: qemu (Ubuntu)
Status: New => Confirmed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1882671
Title:
On 10.06.20 12:07, David Gibson wrote:
> On Wed, Jun 10, 2020 at 09:22:45AM +0200, David Hildenbrand wrote:
>> On 10.06.20 06:31, David Gibson wrote:
>>> On Tue, Jun 09, 2020 at 12:44:39PM -0400, Michael S. Tsirkin wrote:
On Tue, Jun 09, 2020 at 06:28:39PM +0200, Halil Pasic wrote:
> On
On Wed, Jun 10, 2020 at 09:22:45AM +0200, David Hildenbrand wrote:
> On 10.06.20 06:31, David Gibson wrote:
> > On Tue, Jun 09, 2020 at 12:44:39PM -0400, Michael S. Tsirkin wrote:
> >> On Tue, Jun 09, 2020 at 06:28:39PM +0200, Halil Pasic wrote:
> >>> On Tue, 9 Jun 2020 17:47:47 +0200
> >>>
On Wed, Jun 10, 2020 at 10:48:42AM +0200, Cornelia Huck wrote:
> On Wed, 10 Jun 2020 14:39:22 +1000
> David Gibson wrote:
>
> > On Tue, Jun 09, 2020 at 12:16:41PM +0200, Cornelia Huck wrote:
> > > On Sun, 7 Jun 2020 13:07:35 +1000
> > > David Gibson wrote:
> > >
> > > > On Sat, Jun 06, 2020
On 6/10/20 11:03 AM, Thomas Huth wrote:
> On 10/06/2020 10.25, Philippe Mathieu-Daudé wrote:
>> On 6/10/20 9:59 AM, Thomas Huth wrote:
>>> On 10/06/2020 09.53, Philippe Mathieu-Daudé wrote:
On 6/10/20 9:50 AM, Thomas Huth wrote:
> On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
>>
We have a very frequent pattern of creating coroutine from function
with several arguments:
- create structure to pack parameters
- create _entry function to call original function taking parameters
from struct
- do different magic to handle completion: set ret to NOT_DONE or
Like for read/write in a previous commit, drop extra indirection layer,
generate directly bdrv_readv_vmstate() and bdrv_writev_vmstate().
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
block/coroutines.h| 10 +++
include/block/block.h | 6 ++--
block/io.c
We are going to keep coroutine-wrappers code (structure-packing
parameters, BDRV_POLL wrapper functions) in separate auto-generated
files. So, we'll need a header with declaration of original _co_
functions, for those which are static now. As well, we'll need
declarations for wrapper functions. Do
Now that we are not maintaining boilerplate code for coroutine
wrappers, there is no more sense in keeping the extra indirection layer
of bdrv_prwv(). Let's drop it and instead generate pure bdrv_preadv()
and bdrv_pwritev().
Currently, bdrv_pwritev() and bdrv_preadv() are returning bytes on
This is the only coroutine wrapper from block.c and block/io.c which
doesn't return a value, so let's convert it to the common behavior, to
simplify moving to generated coroutine wrappers in a further commit.
Also, bdrv_invalidate_cache is a void function, returning error only
through **errp
Use code generation implemented in previous commit to generated
coroutine wrappers in block.c and block/io.c
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
block/coroutines.h| 6 +-
include/block/block.h | 16 ++--
block.c | 73 ---
Hi all!
The aim of the series is to reduce code-duplication and writing
parameters structure-packing by hand around coroutine function wrappers.
Benefits:
- no code duplication
- less indirection
v7: apply Eric's suggestions
02: fix grammar in commit msg, add Eric's r-b
04: - don't create
Most of our coroutine wrappers already follow this convention:
We have 'coroutine_fn bdrv_co_()' as
the core function, and a wrapper 'bdrv_()' which does parameters packing and call bdrv_run_co().
The only outsiders are the bdrv_prwv_co and
bdrv_common_block_status_above wrappers. Let's refactor
On Tue, 09 Jun 2020 18:12:42 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Magnus,
>
> On 6/9/20 10:59 AM, Magnus Damm wrote:
> > Hi Markus and Thomas,
> >
> > On Tue, Jun 9, 2020 at 5:41 PM Markus Armbruster wrote:
> >>
> >> Thomas Huth writes:
> >>
> >>> On 08/06/2020 11.01, Philippe
On Wed, Jun 10, 2020 at 05:42:54AM -0400, Michael S. Tsirkin wrote:
> On Wed, Jun 10, 2020 at 10:57:26AM +0200, Stefano Garzarella wrote:
> > On Wed, Jun 10, 2020 at 01:43:51PM +0800, Jason Wang wrote:
> > > Spec said: The driver uses this to selectively prevent the device from
> > > executing
On Mon, 08 Jun 2020 17:28:41 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Aurelien,
>
> On 6/1/20 11:41 PM, Aurelien Jarno wrote:
> > On 2020-06-01 11:20, Philippe Mathieu-Daudé wrote:
> >> I don't have much clue about the Renesas hardware, but at least
> >> I know now the source files a little
When resizing an image with qcow2_co_truncate() using the falloc or
full preallocation modes the code assumes that both the old and new
sizes are cluster-aligned.
There are two problems with this:
1) The calculation of how many clusters are involved does not always
get the right result.
On Wed, Jun 10, 2020 at 10:57:26AM +0200, Stefano Garzarella wrote:
> On Wed, Jun 10, 2020 at 01:43:51PM +0800, Jason Wang wrote:
> > Spec said: The driver uses this to selectively prevent the device from
> > executing requests from this virtqueue. 1 - enabled; 0 - disabled.
> >
> > Though write
Add helper function to add fw_cfg device,
also move code to hw/i386/fw_cfg.c.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
hw/i386/fw_cfg.h | 1 +
hw/i386/acpi-build.c | 24 +---
hw/i386/fw_cfg.c | 28
x86 machines can have a single ISA bus only.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/acpi-build.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
First batch of microvm patches, some generic acpi stuff.
Split the acpi-build.c monster, specifically split the
pc and q35 and pci bits into a separate file which we
can skip building at some point in the future.
v2 changes: leave acpi-build.c largely as-is, move useful
bits to other places to
Seems to be unused.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 02cf4199c2e9..d93ea40c58b9 100644
--- a/hw/i386/acpi-build.c
+++
The _STA methods for COM+LPT used to reference them,
but that isn't the case any more.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.c | 23 ---
1 file changed, 23 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.c | 39 ---
hw/input/pckbd.c | 31 +++
2 files changed, 31 insertions(+), 39 deletions(-)
diff --git
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
---
hw/block/fdc.c | 83
hw/i386/acpi-build.c | 83
stubs/cmos.c | 7
stubs/Makefile.objs | 1 +
4 files changed, 91
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: John Snow
---
include/hw/block/fdc.h | 1 +
include/hw/i386/pc.h | 1 -
hw/block/fdc.c | 26 +-
hw/i386/pc.c | 25 -
4 files changed, 26
The _SB.PCI0.PX13.P13C opregion (holds isa device enable bits)
is not used any more, remove it from DSDT.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedow
---
hw/i386/acpi-build.c | 16
1 file changed, 16 deletions(-)
diff --git a/hw/i386/acpi-build.c
acpi aml generator needs this, but it is in floppy code now
so we can make the function static.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: John Snow
---
include/hw/block/fdc.h | 2 --
hw/block/fdc.c | 4 ++--
2 files changed,
Hi,
> Applied patch 1-7. Rest all look ok but couldn't apply
> since they seem to be on top of some other cleanups
> which are not upstream. Pls rebased and post and I'll apply.
Other way around, it is based on older master and we've got conflicting
patches merged upstream meanwhile.
I'll
08.06.2020 21:26, Eric Blake wrote:
Commit 93676c88 relaxed our NBD client code to request export names up
to the NBD protocol maximum of 4096 bytes without NUL terminator, even
though the block layer can't store anything longer than 4096 bytes
including NUL terminator for display to the user.
Philippe Mathieu-Daudé writes:
> Hi Markus, Peter.
>
> On 6/10/20 7:32 AM, Markus Armbruster wrote:
>> All remaining conversions to qdev_realize() are for bus-less devices.
>> Coccinelle script:
>>
>> // only correct for bus-less @dev!
>>
>> @@
>> expression errp;
>> expression
On 10/06/2020 10.25, Philippe Mathieu-Daudé wrote:
> On 6/10/20 9:59 AM, Thomas Huth wrote:
>> On 10/06/2020 09.53, Philippe Mathieu-Daudé wrote:
>>> On 6/10/20 9:50 AM, Thomas Huth wrote:
On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
> On 6/10/20 5:51 AM, Thomas Huth wrote:
>>
On Wed, Jun 10, 2020 at 01:43:51PM +0800, Jason Wang wrote:
> Spec said: The driver uses this to selectively prevent the device from
> executing requests from this virtqueue. 1 - enabled; 0 - disabled.
>
> Though write 0 to queue_enable is forbidden by the spec, we should not
> assume that the
08.06.2020 21:26, Eric Blake wrote:
Ever since commit 36683283 (v2.8), the server code asserts that error
strings sent to the client are well-formed per the protocol by not
exceeding the maximum string length of 4096. At the time the server
first started sending error messages, the assertion
A9 Global Timer is used with Edge triggered interrupts (This is true
at least for Zynq and i.MX6 processors).
When Event Flag is cleared in Interrupt Status Register and new interrupt
was supposed to be scheduled, interrupt request is never cleared.
Since interrupt in GIC is configured as Edge
On Wed, 10 Jun 2020 14:39:22 +1000
David Gibson wrote:
> On Tue, Jun 09, 2020 at 12:16:41PM +0200, Cornelia Huck wrote:
> > On Sun, 7 Jun 2020 13:07:35 +1000
> > David Gibson wrote:
> >
> > > On Sat, Jun 06, 2020 at 04:21:31PM -0400, Michael S. Tsirkin wrote:
> > > > On Thu, May 21, 2020
Hi,
thanks for the patch. In general this looks good to me. However, a have a few
nitpicks.
On Tue, Jun 09, 2020 at 05:25:53PM +0200, David Brenken wrote:
> From: Andreas Konopik
> +static const int tc27x_soc_irqmap[] = {
> +};
Since this is empty, it's best to just remove it.
> +
> +static
09.06.2020 18:29, Vladimir Sementsov-Ogievskiy wrote:
09.06.2020 18:18, Kevin Wolf wrote:
Am 09.06.2020 um 16:46 hat Eric Blake geschrieben:
On 6/9/20 9:28 AM, Vladimir Sementsov-Ogievskiy wrote:
09.06.2020 17:08, Kevin Wolf wrote:
Since commit c8bb23cbdbe, handle_alloc_space() is called for
On 6/10/20 9:59 AM, Thomas Huth wrote:
> On 10/06/2020 09.53, Philippe Mathieu-Daudé wrote:
>> On 6/10/20 9:50 AM, Thomas Huth wrote:
>>> On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
On 6/10/20 5:51 AM, Thomas Huth wrote:
> The #ifdef CONFIG_VFIO_IGD in pci-quirks.c is not working
Hi Markus, Peter.
On 6/10/20 7:32 AM, Markus Armbruster wrote:
> All remaining conversions to qdev_realize() are for bus-less devices.
> Coccinelle script:
>
> // only correct for bus-less @dev!
>
> @@
> expression errp;
> expression dev;
> @@
> -
Patch is on the list now:
https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg02567.html
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https://bugs.launchpad.net/bugs/1882784
Title:
Legacy IGD passthrough in QEMU 5 disabled
On 10/06/2020 09.53, Philippe Mathieu-Daudé wrote:
> On 6/10/20 9:50 AM, Thomas Huth wrote:
>> On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
>>> On 6/10/20 5:51 AM, Thomas Huth wrote:
The #ifdef CONFIG_VFIO_IGD in pci-quirks.c is not working since the
required header
On 6/10/20 7:32 AM, Markus Armbruster wrote:
> Suggested-by: Philippe Mathieu-Daudé
> Signed-off-by: Markus Armbruster
> Reviewed-by: Paolo Bonzini
> ---
> hw/arm/microbit.c | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/hw/arm/microbit.c
On 6/10/20 7:32 AM, Markus Armbruster wrote:
> Suggested-by: Philippe Mathieu-Daudé
> Signed-off-by: Markus Armbruster
> Reviewed-by: Paolo Bonzini
> ---
> include/hw/misc/auxbus.h | 4 ++--
> hw/display/xlnx_dp.c | 2 +-
> hw/misc/auxbus.c | 4 ++--
> 3 files changed, 5
On 6/10/20 9:50 AM, Thomas Huth wrote:
> On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
>> On 6/10/20 5:51 AM, Thomas Huth wrote:
>>> The #ifdef CONFIG_VFIO_IGD in pci-quirks.c is not working since the
>>> required header config-devices.h is not included, so that the legacy
>>> IGD passthrough
Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
parser, making it possible to specify complex types. However, with this
change it is no longer possible to specify proper sizes (e.g., 2G, 128M),
turning the interface harder to use for properties that consume sizes.
Let's switch
On 10/06/2020 09.31, Philippe Mathieu-Daudé wrote:
> On 6/10/20 5:51 AM, Thomas Huth wrote:
>> The #ifdef CONFIG_VFIO_IGD in pci-quirks.c is not working since the
>> required header config-devices.h is not included, so that the legacy
>> IGD passthrough is currently broken. Let's include the right
On 6/9/20 10:59 PM, Eric Blake wrote:
> The file qcow2.py was originally contributed in 2012 by Kevin Wolf,
> but was not given traditional boilerplate headers at the time. The
> missing license was just rectified (commit 16306a7b39) using the
> project-default GPLv2+, but as Vladimir is not at
On 6/9/20 6:02 PM, Peter Maydell wrote:
> This patchset converts the Neon insns in the "3 registers of different
> lengths" group to decodetree. Patch 1 is a bugfix for an earlier
> part of the conversion that's now in master.
>
> I'm definitely finding that the new decodetree version of Neon
>
On Wed, Jun 10, 2020 at 09:32:06AM +0800, Ying Fang wrote:
>
>
> On 6/8/2020 8:49 PM, Andrew Jones wrote:
> > On Mon, Jun 08, 2020 at 08:12:43PM +0800, Ying Fang wrote:
> > > From: fangying
> > >
> > > Virtual time adjustment was implemented for virt-5.0 machine type,
> > > but the cpu
On 09.06.20 18:18, Eduardo Habkost wrote:
> On Tue, Jun 09, 2020 at 11:59:04AM -0400, Michael S. Tsirkin wrote:
>> On Tue, Jun 09, 2020 at 03:26:08PM +0200, David Hildenbrand wrote:
>>> On 09.06.20 15:11, Michael S. Tsirkin wrote:
On Wed, Jun 03, 2020 at 04:48:54PM +0200, David Hildenbrand
** Description changed:
- In function megasas_handle_scsi(hw/scsi/megasas.c):
-
- ```c
- static int megasas_handle_scsi(MegasasState *s, MegasasCmd *cmd,
-int frame_cmd)
- {
-
-
** Changed in: qemu
Status: New => In Progress
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https://bugs.launchpad.net/bugs/1882817
Title:
Segfault in audio_pcm_sw_write with audio over VNC
Status in QEMU:
In Progress
On 6/9/20 6:02 PM, Peter Maydell wrote:
> The widenfn() in do_vshll_2sh() does not free the input 32-bit
> TCGv, so we need to do this in the calling code.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/translate-neon.inc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
On 6/10/20 5:51 AM, Thomas Huth wrote:
> The #ifdef CONFIG_VFIO_IGD in pci-quirks.c is not working since the
> required header config-devices.h is not included, so that the legacy
> IGD passthrough is currently broken. Let's include the right header
> to fix this issue.
>
> Buglink:
You must start the trace function of QEMU to trigger this BUG!
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https://bugs.launchpad.net/bugs/1882065
Title:
Could this cause OOB bug ?
Status in QEMU:
New
Bug description:
In
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