[Qemu-devel] [PATCH for-2.11 13/23] tcg/sparc: Introduce TCG_REG_TB

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.inc.c | 170 + 1 file changed, 140 insertions(+), 30 deletions(-) diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c index bb7f7e8906..7d73c25347 100644 ---

Re: [Qemu-devel] [PATCH 0/2] scsi: enclosure support

On 08/03/2017 05:10 PM, Paolo Bonzini wrote: > On 03/08/2017 15:26, Hannes Reinecke wrote: >> Hi all, >> >> due to a customer issue I've added simple subenclosure support >> to the SCSI emulation. The patch simply converts the current invisible >> LUN0 into an enclosure device; existing setups

[Qemu-devel] [PATCH for-2.11 21/23] tcg/ppc: Change TCG_REG_RA to TCG_REG_TB

At this point the conversion is a wash. Loading of TB+ofs is smaller, but the actual return address from exit_tb is larger. There are a few more insns required to transition between TBs. But the expectation is that accesses to the constant pool will on the whole be smaller. Signed-off-by:

Re: [Qemu-devel] [PATCH for-2.11 0/8] tcg/s390 improvments

Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH for-2.11 0/8] tcg/s390 improvments Message-id: 20170804052833.10187-1-...@twiddle.net Type: series === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log

[Qemu-devel] [PATCH for-2.11 14/23] tcg/sparc: Use constant pool for movi

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.h | 2 ++ tcg/sparc/tcg-target.inc.c | 77 +- 2 files changed, 58 insertions(+), 21 deletions(-) diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index

[Qemu-devel] [PATCH for-2.11 17/23] tcg/arm: Code rearrangement

Move constants before all of the functions. Move tcg_out_ functions before all of the others. No functional change. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 599 +++ 1 file changed, 299 insertions(+), 300

[Qemu-devel] [PATCH for-2.11 02/23] tcg: Rearrange ldst label tracking

Dispense with TCGBackendData, as it has never been used for more than holding a single pointer. Use a define in the cpu/tcg-target.h to signal requirement for TCGLabelQemuLdst, so that we can drop the no-op tcg-be-null.h stubs. Rename tcg-be-ldst.h to tcg-ldst.inc.c. Signed-off-by: Richard

[Qemu-devel] [PATCH for-2.11 23/23] tcg/ppc: Use constant pool for movi

Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.h | 1 + tcg/ppc/tcg-target.inc.c | 34 ++ 2 files changed, 31 insertions(+), 4 deletions(-) diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index c1226ea5b6..e10d7e4411

[Qemu-devel] [PATCH for-2.11 12/23] tcg/aarch64: Use constant pool for movi

Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 + tcg/aarch64/tcg-target.inc.c | 62 +++- 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index

[Qemu-devel] [PATCH for-2.11 19/23] tcg/arm: Use constant pool for movi

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 1 + tcg/arm/tcg-target.inc.c | 92 ++-- 2 files changed, 75 insertions(+), 18 deletions(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index

[Qemu-devel] [PATCH for-2.11 05/23] tcg/s390: Introduce TCG_REG_TB

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.h | 2 +- tcg/s390/tcg-target.inc.c | 71 +++ 2 files changed, 61 insertions(+), 12 deletions(-) diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index

[Qemu-devel] [PATCH for-2.11 03/23] tcg: Infrastructure for managing constant pools

A new shared header tcg-pool.inc.c adds new_pool_label, for registering a tcg_target_ulong to be emitted after the generated code, plus relocation data to install a pointer to the data. A new pointer is added to the TCGContext, so that we dump the constant pool as data, not code. Signed-off-by:

[Qemu-devel] [PATCH for-2.11 18/23] tcg/arm: Extract INSN_NOP

We'll want this for tcg_out_nop_fill. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index f40e87066f..78603a19db

[Qemu-devel] [PATCH for-2.11 11/23] tcg/s390: Use constant pool for cmpi

Also use CHI/CGHI for 16-bit signed constants. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 136 +++--- 1 file changed, 67 insertions(+), 69 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c

[Qemu-devel] [PATCH for-2.11 10/23] tcg/s390: Use constant pool for xori

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 77 --- 1 file changed, 40 insertions(+), 37 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 83fac71c31..b0b34fa5ab 100644 ---

[Qemu-devel] [PATCH for-2.11 04/23] tcg/i386: Store out-of-range call targets in constant pool

Already it saves 2 bytes per call, but also the constant pool entry may well be shared across multiple calls. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 1 + tcg/i386/tcg-target.inc.c | 18 +++--- 2 files changed, 16 insertions(+), 3

[Qemu-devel] [PATCH for-2.11 16/23] tcg/arm: Tighten tlb indexing offset test

We are not going to use ldrd for loading the comparator for 32-bit guests, so don't limit cmp_off to 8 bits then. This eliminates one insn in the tlb load for some guests. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 4 +++- 1 file changed, 3 insertions(+),

[Qemu-devel] [PATCH for-2.11 08/23] tcg/s390: Use constant pool for andi

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 29b77ff67f..4be57c5765 100644 --- a/tcg/s390/tcg-target.inc.c +++

[Qemu-devel] [PATCH for-2.11 07/23] tcg/s390: Use constant pool for movi

Split out maybe_out_small_movi for use with other operations that want to add to the constant pool. Signed-off-by: Richard Henderson --- include/elf.h | 3 +- tcg/s390/tcg-target.h | 1 + tcg/s390/tcg-target.inc.c | 130

[Qemu-devel] [PATCH for-2.11 09/23] tcg/s390: Use constant pool for ori

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 74 ++- 1 file changed, 34 insertions(+), 40 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 4be57c5765..83fac71c31 100644 ---

[Qemu-devel] [PATCH for-2.11 00/23] tcg constant pools

RISC machines often require many instructions in order to construct large constants from the immediate values available to individual instructions. Static compilers like GCC often place these large constants into read-only memory and use one load instruction to fetch the constant instead; a

[Qemu-devel] [PATCH for-2.11 01/23] tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h

Replace the USE_DIRECT_JUMP ifdef with a TCG_TARGET_HAS_direct_jump boolean test. Replace the tb_set_jmp_target1 ifdef with an unconditional function tb_target_set_jmp_target. While we're touching all backends, add a parameter for tb->tc_ptr; we're going to need it shortly for some backends.

[Qemu-devel] [PATCH for-2.11 06/23] tcg/s390: Fix sign of patch_reloc addend

We were passing in -2 instead of +2, but then ignoring the actual contents of addend in the calculation. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 25 + 1 file changed, 13 insertions(+), 12 deletions(-) diff --git

[Qemu-devel] [PATCH v8 3/3] ACPI: build and enable APEI GHES in the Makefile and configuration

Add CONFIG_ACPI_APEI configuration in the Makefile and enable it in the arm-softmmu.mak Signed-off-by: Dongjiu Geng --- thanks a lot Michael and Laszlo's review and comments: change since v5: (1) no change change since v4: (1) fix email threading in this series is

[Qemu-devel] [PATCH v8 2/3] ACPI: Add APEI GHES Table Generation support

This implements APEI GHES Table by passing the error CPER info to the guest via a fw_cfg_blob. After a CPER info is recorded, an SEA(Synchronous External Abort)/SEI(SError Interrupt) exception will be injected into the guest OS. Below is the table layout, the max number of error soure is 11,

[Qemu-devel] [PATCH 7/8] tcg/s390: Use load-on-condition-2 facility

This allows LOAD HALFWORD IMMEDIATE ON CONDITION, eliminating one insn in some common cases. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.h | 1 + tcg/s390/tcg-target.inc.c | 79 +-- 2 files changed, 63

[Qemu-devel] [PATCH 4/8] tcg/s390: Merge add2i facilities check to tcg_target_op_def

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 38 ++ 1 file changed, 14 insertions(+), 24 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index ff3f644f8e..6b08ccea6d 100644 ---

[Qemu-devel] [PATCH v8 1/3] ACPI: add APEI/HEST/CPER structures and macros

(1) Add related APEI/HEST table structures and macros, these definition refer to ACPI 6.1 and UEFI 2.6 spec. (2) Add generic error status block and CPER memory section definition, user space only handle memory section errors. Signed-off-by: Dongjiu Geng ---

[Qemu-devel] [PATCH 8/8] tcg/s390: Use slbgr for setcond le and leu

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 119 +- 1 file changed, 43 insertions(+), 76 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 0de968fde2..38b9e791ee 100644 ---

[Qemu-devel] [PATCH v8 0/3] Generate APEI GHES table and dynamically record CPER

In the armv8 platform, the mainly hardware error source are ARMv8 SEA/SEI/GSIV. For the ARMv8 SEA/SEI, the KVM or host kernel will signal SIGBUS or use other interface to notify user space, such as Qemu. After Qemu gets the notification, it will record the CPER and inject the SEA/SEI to KVM. this

[Qemu-devel] [PATCH 1/8] tcg/s390: Fully convert tcg_target_op_def

Use a switch instead of searching a table. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 278 +- 1 file changed, 154 insertions(+), 124 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c

[Qemu-devel] [PATCH 6/8] tcg/s390: Use distinct-operands facility

This allows using a 3-operand insn form for some arithmetic, logicals and shifts. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.h | 1 + tcg/s390/tcg-target.inc.c | 118 +++--- 2 files changed, 91 insertions(+), 28

[Qemu-devel] [PULL for-2.10 2/3] target/s390x: Fix CSST for 16-byte store

Found by Coverity (CID 1378273). Reviewed-by: Philippe Mathieu-Daudé Reported-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/s390x/mem_helper.c

[Qemu-devel] [PATCH 2/8] tcg/s390: Merge cmpi facilities check to tcg_target_op_def

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 68 +-- 1 file changed, 30 insertions(+), 38 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index d34649eb13..e075b4844a 100644 ---

[Qemu-devel] [PATCH 3/8] tcg/s390: Merge muli facilities check to tcg_target_op_def

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 45 + 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index e075b4844a..ff3f644f8e 100644 ---

[Qemu-devel] [PATCH for-2.11 0/8] tcg/s390 improvments

The distinct-operands facility was introduced with z196, but using it wasn't practical until the tcg_target_op_def cleanup. The load-on-condition-2 facility was introduced with z13. This has been compile-tested only, because I've never had access to anything beyond z12. It'd be nice if someone

[Qemu-devel] [PATCH 5/8] tcg/s390: Merge ori+xori facilities check to tcg_target_op_def

Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 101 +++--- 1 file changed, 33 insertions(+), 68 deletions(-) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 6b08ccea6d..5414c9d879 100644 ---

[Qemu-devel] [PULL for-2.10 3/3] tcg: Increase minimum alignment from tcg_malloc to 8

For a 64-bit ILP32 host, aligning to sizeof(long) is not enough. Guess the minimum for any host is 8, as that covers uint64_t. Qemu doesn't use a host long double or host vectors, except in extremely limited circumstances. Fixes a bus error for a sparc v8plus host. Signed-off-by: Richard

[Qemu-devel] [PULL for-2.10 1/3] tcg/arm: Fix runtime overalignment test

Patch 85aa80813dd changed the IF emitting the TST instruction, but failed to change the ?: converting CMP to CMPEQ, so the result of the TST is ignored. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Qemu-devel] [PATCH v7 2/3] ACPI: Add APEI GHES Table Generation support

This implements APEI GHES Table by passing the error CPER info to the guest via a fw_cfg_blob. After a CPER info is recorded, an SEA(Synchronous External Abort)/SEI(SError Interrupt) exception will be injected into the guest OS. Below is the table layout, the max number of error soure is 11,

[Qemu-devel] [PATCH v7 0/3] Generate APEI GHES table and dynamically record CPER

In the armv8 platform, the mainly hardware error source are ARMv8 SEA/SEI/GSIV. For the ARMv8 SEA/SEI, the KVM or host kernel will signal SIGBUS or use other interface to notify user space, such as Qemu. After Qemu gets the notification, it will record the CPER and inject the SEA/SEI to KVM. this

[Qemu-devel] [PATCH v7 3/3] ACPI: build and enable APEI GHES in the Makefile and configuration

Add CONFIG_ACPI_APEI configuration in the Makefile and enable it in the arm-softmmu.mak Signed-off-by: Dongjiu Geng --- thanks a lot Michael and Laszlo's review and comments: change since v5: (1) no change change since v4: (1) fix email threading in this series is

[Qemu-devel] [PATCH v7 1/3] ACPI: add APEI/HEST/CPER structures and macros

(1) Add related APEI/HEST table structures and macros, these definition refer to ACPI 6.1 and UEFI 2.6 spec. (2) Add generic error status block and CPER memory section definition, user space only handle memory section errors. Signed-off-by: Dongjiu Geng ---

Re: [Qemu-devel] How to make ELF headers/symbol sections available for multiboot?

Hi Kevin Thanks for the information. So I sounds like we do want multiboot to load all sections regardless of its segments info. To achieve it we need to read sections headers and load all section that were not loaded yet. I have a working implementation here

[Qemu-devel] [PATCH v6 2/3] ACPI: Add APEI GHES Table Generation support

This implements APEI GHES Table by passing the error CPER info to the guest via a fw_cfg_blob. After a CPER info is recorded, an SEA(Synchronous External Abort)/SEI(SError Interrupt) exception will be injected into the guest OS. Below is the table layout, the max number of error soure is 11,

[Qemu-devel] [PATCH v6 1/3] ACPI: add APEI/HEST/CPER structures and macros

(1) Add related APEI/HEST table structures and macros, these definition refer to ACPI 6.1 and UEFI 2.6 spec. (2) Add generic error status block and CPER memory section definition, user space only handle memory section errors. Signed-off-by: Dongjiu Geng ---

[Qemu-devel] [PATCH v6 0/3] Generate APEI GHES table and dynamically record CPER

In the armv8 platform, the mainly hardware error source are ARMv8 SEA/SEI/GSIV. For the ARMv8 SEA/SEI, the KVM or host kernel will signal SIGBUS or use other interface to notify user space, such as Qemu. After Qemu gets the notification, it will record the CPER and inject the SEA/SEI to KVM. this

[Qemu-devel] [PATCH v6 3/3] ACPI: build and enable APEI GHES in the Makefile and configuration

Add CONFIG_ACPI_APEI configuration in the Makefile and enable it in the arm-softmmu.mak Signed-off-by: Dongjiu Geng --- thanks a lot Michael and Laszlo's review and comments: change since v5: (1) no change change since v4: (1) fix email threading in this series is

Re: [Qemu-devel] [RFC 12/29] migration: allow dst vm pause on postcopy

On Thu, Aug 03, 2017 at 03:03:57PM +0100, Dr. David Alan Gilbert wrote: > * Peter Xu (pet...@redhat.com) wrote: > > On Tue, Aug 01, 2017 at 10:47:16AM +0100, Dr. David Alan Gilbert wrote: > > > * Peter Xu (pet...@redhat.com) wrote: > > > > [...] > > > > > > +/* Return true if we should continue

Re: [Qemu-devel] [PATCH 4/4] ppc: spapr: Make VCPU ID handling private to SPAPR

On Thu, Aug 03, 2017 at 04:28:52PM +1000, Sam Bobroff wrote: > The concept of a VCPU ID that differs from the CPU's index > (cpu->cpu_index) exists only within SPAPR machines so, move the > functions ppc_get_vcpu_id() and ppc_get_cpu_by_vcpu_id() into spapr.c > and rename them appropriately. > >

Re: [Qemu-devel] [Qemu-ppc] [PATCH] target/ppc: Only set PCR in kvm if actually in a compat mode

On Thu, Aug 03, 2017 at 07:28:06PM +0200, Greg Kurz wrote: > On Thu, 13 Jul 2017 11:21:18 +1000 > David Gibson wrote: > > > On Wed, Jul 12, 2017 at 04:45:17PM +1000, Suraj Jitindar Singh wrote: > > > On Mon, 2017-07-03 at 19:20 +1000, David Gibson wrote: > > > > On

Re: [Qemu-devel] [Qemu-ppc] [PATCH 3/4] ppc: spapr: Rename cpu_dt_id to vcpu_id

On Thu, Aug 03, 2017 at 03:19:40PM +0200, Greg Kurz wrote: > On Thu, 3 Aug 2017 16:28:44 +1000 > Sam Bobroff wrote: > > > This field actually records the VCPU ID used by KVM and, although the > > value is also used in the device tree it is primarily the VCPU ID so > >

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/4] e500: Use cpu_index instead of vcpu_dt_id

On Thu, Aug 03, 2017 at 03:15:04PM +0200, Greg Kurz wrote: > On Thu, 3 Aug 2017 16:28:36 +1000 > Sam Bobroff wrote: > > > The e500 platform code uses the function ppc_get_vcpu_dt_id() but that > > function is actually specific to SPAPR machines, not PPC CPUs, and > >

Re: [Qemu-devel] [Qemu-ppc] [PATCH 1/4] spapr: Fix bug in h_signal_sys_reset()

On Thu, Aug 03, 2017 at 02:37:15PM +0200, Greg Kurz wrote: > On Thu, 3 Aug 2017 16:28:27 +1000 > Sam Bobroff wrote: > > > The unicast case in h_signal_sys_reset() seems to be broken: > > rather than selecting the target CPU, it looks like it will pick > > either the

Re: [Qemu-devel] [PATCH v4 00/22] Clean up around qmp() and hmp()

Hi, This series failed automatic build test. Please find the testing commands and their output below. If you have docker installed, you can probably reproduce it locally. Subject: [Qemu-devel] [PATCH v4 00/22] Clean up around qmp() and hmp() Message-id: 20170804012551.2714-1-ebl...@redhat.com

Re: [Qemu-devel] [PATCH for-2.10 2/5] block: Allow reopen rw without BDRV_O_ALLOW_RDWR

On 08/03/2017 10:21 AM, Eric Blake wrote: > On 08/03/2017 10:02 AM, Kevin Wolf wrote: >> BDRV_O_ALLOW_RDWR is a flag that tells whether qemu can internally >> reopen a node read-write temporarily because the user requested >> read-write for the top-level image, but qemu decided that read-only is

[Qemu-devel] [PATCH v4 17/22] libqtest: Add qmp_args() helper

Similar to the previous helper, we can reduce the boilerplate of most callers by passing the command name separately from the interpolated arguments. Adjust the majority of the callers that can use the new helpers; in the process, fixing a few places where we would have failed

[Qemu-devel] [PATCH v4 20/22] tests/libqos/pci: Clean up string interpolation into QMP input

From: Markus Armbruster Leaving interpolation into JSON to qmp() is more robust than building QMP input manually, as explained in previous commits. The case in qpci_plug_device_test() is a bit complicated: it interpolates several JSON object members, not just a value. Clean

[Qemu-devel] [PATCH v4 18/22] tests/libqos/usb: Clean up string interpolation into QMP input

From: Markus Armbruster Leaving interpolation into JSON to qmp() is more robust than building QMP input manually, as explained in a previous commit. The case in usb_test_hotplug() is slightly more complicated: it interpolates *into* JSON values. Clean it up by building the

[Qemu-devel] [PATCH v4 13/22] libqtest: Add qmp_raw()

The majority of calls into libqtest's qmp() and friends are passing a JSON object that includes a command name; we can prove this by adding an assertion. The only outlier is qmp-test, which is testing appropriate error responses to protocol violations and id support, by sending raw strings, where

[Qemu-devel] [PATCH v4 14/22] libqtest: Separate qmp_discard_response() from command

Upcoming patches will be adding new convenience methods for constructing QMP commands. But making every variation of sending support every variation of response handling becomes unwieldy; it's easier to specify that discarding a JSON response is unassociated with sending the command, where

[Qemu-devel] [PATCH v4 22/22] libqtest: Rename qmp_cmd() to qmp()

Now that the previous patch got rid of the old signature of qmp(), we can go back to using the shortest possible name for the common action. Performed mechanically with: for f in $(git grep -l qmp_cmd tests/); do case $f in *qemu-iotests*) continue;; esac sed -i s/qmp_cmd/qmp/ $f; done

[Qemu-devel] [PATCH v4 11/22] test-qga: Simplify command construction

When you build qga input manually like this: cmd = g_strdup_printf("{'execute': 'guest-file-write'," " 'arguments': {'handle': %" PRId64 "," " 'buf-b64': '%s' } }", id, enc); ret = qmp_fd(fixture->fd, cmd); g_free(cmd); you're

[Qemu-devel] [PATCH v4 12/22] libqtest: Change qmp_fd_send() to drop varargs

With the previous commit, no external clients are using qmp_fd() or qmp_fd_sendv(). Making qmp_fd_sendv() static lets us refactor the public qmp_fd_send() to be the common point where we send a fixed string over the wire as well as log that string, while qmp_fd_sendv() worries about converting

[Qemu-devel] [PATCH v4 16/22] libqtest: Add qmp_cmd() helper

Now that we've asserted that all of our interpolated QMP commands include 'execute', we can reduce some of the caller boilerplate by providing a helpr function to wrap commands with no arguments (later patches will cover commands with arguments). Adjust all callers that can use the new helpers;

[Qemu-devel] [PATCH v4 06/22] qobject: Perform %% interpolation in qobject_from_jsonf()

We want -Wformat to catch blatant programming errors in format strings that we pass to qobject_from_jsonf(). But if someone were to pass a JSON string "'%s'" as the format string, gcc would insist that it be paired with a char* argument, even though our lexer does not recognize % sequences inside

[Qemu-devel] [PATCH v4 10/22] libqtest: Skip round-trip through QObject

When we don't have to do any % interpolation in qmp() and friends, there is no point wasting time allocating a QObject from the format string only to then format it back into the string we send over the wire. This is a temporary measure: it becomes important in the next patch, where test-qga will

[Qemu-devel] [PATCH v4 21/22] libqtest: Drop now-unused qmp()

All callers have been converted to a form of qmp_cmd() or qmp_args() that takes the command name with less boilerplate. Therefore, we also know that all commands are using interpolation, and can remove an assertion. This also means that we have fixed the testsuite to comply with -Wformat checking

[Qemu-devel] [PATCH v4 05/22] qobject: Simplify qobject_from_jsonv()

qobject_from_jsonv() was unusual in that it took a va_list*, instead of the more typical va_list; this was so that callers could pass NULL to avoid % interpolation. While this works under the hood, it is awkward for callers, so move the magic into qjson.c rather than in the public interface, and

[Qemu-devel] [PATCH v4 19/22] libqtest: Add qmp_args_dict() helper

Leaving interpolation into JSON to qobject_from_jsonf() is more robust than building QMP input manually; however, we have a few places where code is already creating a QDict to interpolate individual arguments, which cannot be reproduced with the qobject_from_jsonf() parser. Expose a public

[Qemu-devel] [PATCH v4 08/22] qtest: Avoid passing raw strings through hmp()

The next patch will add __attribute__((__format__)) to hmp(), which in turn causes gcc to warn about non-literal format strings. Rather than risk an arbitrary string containing % being mis-handled, always pass variable strings along with a %s format. It also makes it easier to prove correctness

[Qemu-devel] [PATCH v4 15/22] libqtest: Delete qtest_qmp() wrappers

None of our tests were directly using qtest_qmp() and friends; even tests like postcopy-test.c that manage multiple connections get along just fine changing global_qtest as needed (other than one callsite where it forgot to use the inlined form). It's also annoying that we have qmp_async() but

[Qemu-devel] [PATCH v4 04/22] tests: Add assertion for no qmp("")

Now that the previous patches have fixed all callers to avoid an empty message, we can tweak qmp_fd_sendv() to assert that we don't introduce new callers, and reindent accordingly. The additional assertions will also help verify that later refactoring is not breaking anything. Signed-off-by:

[Qemu-devel] [PATCH v4 02/22] tests: Clean up wait for event

From: Markus Armbruster We still use hacks like qmp("") to wait for an event, even though we have qmp_eventwait() since commit 8fe941f, and qmp_eventwait_ref() since commit 7ffe312. Both commits neglected to convert all the existing hacks. Make up what they missed. Bonus:

[Qemu-devel] [PATCH v4 09/22] qtest: Document calling conventions

We have two flavors of vararg usage in qtest: hmp() etc. work like sprintf(), and qmp() etc. work like qobject_from_jsonf(). Spell that out in the comments. Also add GCC_FMT_ATTR() to qtest_hmp() etc. so that the compiler can flag incorrect use. We have some cleanup work to do before we can do

[Qemu-devel] [PATCH v4 00/22] Clean up around qmp() and hmp()

Definitely 2.11 material now. v4 is a rather big overhaul of what has been previously posted, rebasing things to make it easier to pass the command name separately from the args when calling qmp() derivatives in the testsuite, and adding support for %% handling to make -Wformat checking more

[Qemu-devel] [PATCH v4 03/22] tests/libqtest: Clean up how we read the QMP greeting

From: Markus Armbruster qtest_init() still uses the qtest_qmp_discard_response(s, "") hack to receive the greeting, even though we have qtest_qmp_receive() since commit 66e0c7b. Put it to use. Bonus: gets rid of an empty format string. A step towards compile-time format

[Qemu-devel] [PATCH v4 07/22] numa-test: Use hmp()

Don't open-code something that has a convenient helper available. Signed-off-by: Eric Blake --- tests/numa-test.c | 21 +++-- 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/tests/numa-test.c b/tests/numa-test.c index 3f636840b1..e1b6152244

[Qemu-devel] [PATCH v4 01/22] qobject: Accept "%"PRId64 in qobject_from_jsonf()

Commit 1792d7d0 was written because PRId64 expands to non-portable crap for some libc, and we had testsuite failures on Mac OS as a result. This in turn makes it difficult to rely on the obvious conversions of 64-bit values into JSON, requiring things such as casting int64_t to long long so we

[Qemu-devel] [Bug 1708551] [NEW] macOS Guest Reading USB 3.0 Bus as USB 2.0

Public bug reported: Description: I'm having trouble with USB Passthrough. Running `system_profiler SPUSBDataType` on macOS guest confirms that the system "sees" my device, and that qemu is passing *something* through. However, the system sees my connection as USB 2.0, even though i'm passing

Re: [Qemu-devel] [PATCH] vl.c/exit: pause cpus before closing block devices

- Original Message - > From: "Dr. David Alan Gilbert" > To: "Alberto Garcia" > Cc: qemu-devel@nongnu.org, pbonz...@redhat.com, js...@redhat.com > Sent: Thursday, August 3, 2017 6:45:17 PM > Subject: Re: [Qemu-devel] [PATCH] vl.c/exit: pause cpus

Re: [Qemu-devel] [PATCH 15/15] nvic: Implement "user accesses BusFault" SCS region behaviour

On 08/02/2017 09:44 AM, Peter Maydell wrote: > The ARMv7M architecture specifies that most of the addresses in the > PPB region (which includes the NVIC, systick and system registers) > are not accessible to unprivileged accesses, which should > BusFault with a few exceptions: > * the STIR is

Re: [Qemu-devel] [PATCH 14/15] armv7m_nvic.h: Move from include/hw/arm to include/hw/intc

On 08/02/2017 09:44 AM, Peter Maydell wrote: > The armv7m_nvic.h header file was accidentally placed in > include/hw/arm; move it to include/hw/intc to match where > its corresponding .c file lives. > > Signed-off-by: Peter Maydell > --- > hw/intc/armv7m_nvic.c

Re: [Qemu-devel] [PATCH 13/15] target/arm: Create and use new function arm_v7m_is_handler_mode()

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Add a utility function for testing whether the CPU is in Handler > mode; this is just a check whether v7m.exception is non-zero, but > we do it in several places and it makes the code a bit easier > to read to not have to mentally figure out what the

Re: [Qemu-devel] [PATCH 12/15] target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Move the code in arm_v7m_cpu_do_interrupt() that calculates the > magic LR value down to when we're actually going to use it. > Having the calculation and use so far apart makes the code > a little harder to understand than it needs to be. > >

Re: [Qemu-devel] [PATCH 11/15] target/arm: Make arm_cpu_dump_state() handle the M-profile XPSR

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR > rather than assuming it's an A-profile CPSR. On M profile the PSR > line of a register dump will now look like this: > > XPSR=4100 -Z-- T priv-thread > > Signed-off-by:

Re: [Qemu-devel] [PATCH 10/15] target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSR

On 08/03/2017 03:13 PM, Richard Henderson wrote: > On 08/02/2017 09:43 AM, Peter Maydell wrote: >> +if (val & XPSR_EXCP) { >> +/* This is a CPSR format value from an older QEMU. (We can tell >> + * because values transferred in XPSR format always have zero >> +

Re: [Qemu-devel] [PATCH 10/15] target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSR

On 08/02/2017 09:43 AM, Peter Maydell wrote: > +if (val & XPSR_EXCP) { > +/* This is a CPSR format value from an older QEMU. (We can tell > + * because values transferred in XPSR format always have zero > + * for the EXCP field, and CPSR format will

Re: [Qemu-devel] [PATCH] virtio: Mark virtio-device as non-user-creatable

On 08/03/2017 04:45 PM, Eduardo Habkost wrote: > On Wed, Aug 02, 2017 at 02:33:00PM +0200, Halil Pasic wrote: >> >> >> On 08/02/2017 01:01 AM, Eduardo Habkost wrote: >>> TYPE_VIRTIO_DEVICE devices are already not usable with -device >>> and device_add, but they are reported as user-creatable on

Re: [Qemu-devel] [Qemu-arm] [PATCH 09/15] target/arm: Don't store M profile PRIMASK and FAULTMASK in daif

On 08/03/2017 08:38 AM, Edgar E. Iglesias wrote: >> +uint32_t primask; >> +uint32_t faultmask; > It seems like these could be booleans? I was thinking the same thing until I read the v8m description as a 32-bit register. This makes qemu match the spec, which has value. r~

Re: [Qemu-devel] [PATCH 09/15] target/arm: Don't store M profile PRIMASK and FAULTMASK in daif

On 08/02/2017 09:43 AM, Peter Maydell wrote: > We currently store the M profile CPU register state PRIMASK and > FAULTMASK in the daif field of the CPU state in its I and F > bits. This is a legacy from the original implementation, which > tried to share the cpu_exec_interrupt code between A

Re: [Qemu-devel] [PATCH 08/15] target/arm: Define and use XPSR bit masks

On 08/02/2017 09:43 AM, Peter Maydell wrote: > The M profile XPSR is almost the same format as the A profile CPSR, > but not quite. Define some XPSR_* macros and use them where we > definitely dealing with an XPSR rather than reusing the CPSR ones. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH 07/15] target/arm: Fix outdated comment about exception exit

On 08/02/2017 09:43 AM, Peter Maydell wrote: > When we switched our handling of exception exit to detect > the magic addresses at translate time rather than via > a do_unassigned_access hook, we forgot to update a > comment; correct the omission. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH 06/15] target/arm: Remove incorrect comment about MPU_CTRL

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Remove the comment that claims that some MPU_CTRL bits are stored > in sctlr_el[1]. This has never been true since MPU_CTRL was added > in commit 29c483a50607 -- the comment is a leftover from > Michael Davidsaver's original implementation, which I

Re: [Qemu-devel] [PATCH 05/15] hw/intc/armv7m_nvic.c: Remove out of date comment

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Remove an out of date comment which says there's only one > item in the NVIC container region -- we put systick into its > own device object a while back and so now there are two > things in the container. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH 04/15] target/arm: Tighten up Thumb decode where new v8M insns will be

On 08/02/2017 09:43 AM, Peter Maydell wrote: > Tighten up the T32 decoder in the places where new v8M instructions > will be: > * TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ... >which is UNPREDICTABLE: >make the UNPREDICTABLE behaviour be to UNDEF > * BXNS/BLXNS are

Re: [Qemu-devel] [PATCH 01/15] target/arm: Use MMUAccessType enum rather than int

On 08/02/2017 09:43 AM, Peter Maydell wrote: > In the ARM get_phys_addr() code, switch to using the MMUAccessType > enum and its MMU_* values rather than int and literal 0/1/2. > > Signed-off-by: Peter Maydell > --- > target/arm/helper.c| 30

Re: [Qemu-devel] [Qemu-arm] [PATCH 02/15] target/arm: Don't trap WFI/WFE for M profile

On 08/03/2017 01:40 PM, Edgar E. Iglesias wrote: > I don't have the spec at hand but IIRC the trap should only happen > if the processor would have entered the low-power state (i.e if > there's no work). when SystemHintOp_WFE if IsEventRegisterSet() then ClearEventRegister(); else

Re: [Qemu-devel] [PATCH 02/15] target/arm: Don't trap WFI/WFE for M profile

On 3 August 2017 at 21:28, Richard Henderson wrote: > While looking at this, I think there's an error in helper_wfi. The early exit > for cpu_has_work should happen after the exception check. No, that's deliberate; as Edgar says, the trap only happens "if the instruction would

Re: [Qemu-devel] [Qemu-arm] [PATCH 02/15] target/arm: Don't trap WFI/WFE for M profile

On Thu, Aug 03, 2017 at 01:28:28PM -0700, Richard Henderson wrote: > On 08/02/2017 09:43 AM, Peter Maydell wrote: > > M profile cores can never trap on WFI or WFE instructions. Check for > > M profile in check_wfx_trap() to ensure this. > > > > The existing code will do the right thing for v7M

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