On Fri, Dec 2, 2011 at 5:16 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Mon, Nov 28, 2011 at 12:31 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
Although the hardware supports interrupts we're not currently using them
at all since for small transfers the overhead is
On Thu, Mar 15, 2012 at 4:39 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
Hi all
I stumbled across this code in spi-bitbang.c:
list_for_each_entry (t, m-transfers, transfer_list) {
...
cs_change = t-cs_change;
On Mon, Apr 9, 2012 at 12:09 AM, Heiko Stübner he...@sntech.de wrote:
[@jassi: I know that you do not work at this stuff any longer, but I included
you in the list of recipients in the hope that you might be able to give me a
pointer on where to look for the culprit of the problem :-) ]
Hi,
On Wed, May 9, 2012 at 3:34 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery. Since all the platforms currently use
hierarchy of spi controller bus clock
ARM: Exynos5: Add spi clock support
spi: s3c64xx: add device tree support
Look ok to me. FWIW, Acked-by: Jassi Brar jassisinghb...@gmail.com
--
Live Security Virtual Conference
On 9 May 2012 14:50, Heiko Stübner he...@sntech.de wrote:
Am Mittwoch, 9. Mai 2012, 00:04:51 schrieb Thomas Abraham:
The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery.
On Thu, Jan 28, 2010 at 1:10 PM, Ben Gamari bgamari.f...@gmail.com wrote:
Hey all!
Recently I've been thinking about adding support to the McSPI driver for
using GPIO pins as chip selects. As a starting point, I've browsed the
driver source trying to identify what changes would be necessary
On Wed, Feb 17, 2010 at 4:33 AM, Linus Walleij
linus.ml.wall...@gmail.com wrote:
2010/2/15 jassi brar jassisinghb...@gmail.com:
I don't think adding SPI_SLAVE support is just a matter of providing
additional callbacks and structures, as is pointed out in this thread
http://www.mail
On Mon, Mar 15, 2010 at 11:44 AM, Ben Gamari bgamari.f...@gmail.com wrote:
While I can reliably see a signal sent on the SIMO line, I have not once been
able to recieve anything but zeros in return. I have verified that the the
SOMI
ball works as expected as a GPIO input.
a) You might as well
On Mon, Mar 15, 2010 at 10:06 PM, Centelles, Sylvain
sylvain.centel...@intel.com wrote:
Hi Baruch,
Thx for your fast answer.
I had seen this piece of code. But if this is the only purpose of the
msg-status, then it means it's only used to give return status of the
transfer after the
On Mon, Mar 15, 2010 at 11:09 PM, Centelles, Sylvain
sylvain.centel...@intel.com wrote:
OK, that makes sense. Even if it does not follow exactly the undefined
value mentioned in the API definition.
Anyways, you both helped me a lot to clarify this. Thx again.
btw, top posting is frowned upon
On Thu, Apr 1, 2010 at 7:35 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
There are some boards that do not strictly follow SPI standard and use
only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary
chips and controls them with GPIO based 'spi controller'. In this
On Sat, Aug 21, 2010 at 1:17 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
The S3C64xx SPI driver requires the machine to call s3c64xx_spi_set_info()
to select a few options, including the clock to use for the SPI controller.
If this is not done then a NULL will be passed as the
, yes. What was I thinking ?!
Acked-by: Jassi Brar jassisinghb...@gmail.com
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On Sat, Aug 21, 2010 at 7:08 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Sat, Aug 21, 2010 at 10:45:56AM +0900, Jassi Brar wrote:
On Sat, Aug 21, 2010 at 1:17 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
The S3C64xx SPI driver requires the machine to call
On Sun, Aug 22, 2010 at 4:30 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Sat, Aug 21, 2010 at 10:58:36PM +0900, Jassi Brar wrote:
On Sat, Aug 21, 2010 at 7:08 PM, Mark Brown
On Sat, Aug 21, 2010 at 10:45:56AM +0900, Jassi Brar wrote:
The movement of sci assignment
Hi,
Here come six bug fixes and enhancements to the S3C64XX
spi controller driver.
The first 4 are bug/warning fixes, the last two are to
enable the spi_s3c64xx.c to manage SPI controllers of newer
Samsung SoCs with essentially the same IP but scalar logic
moved into core clock management unit.
Fix compilation warning by typecasting the tx_buf pointer.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
index 9736581..774e861
We can't do without setting channel and bus width to
same size.
Inorder to do that, define a new callback to be used
to do read/write of appropriate widths.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 78 +---
1 files
clock managed by CMU.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
b/arch/arm/plat-samsung/include/plat/s3c64xx
Instead of, wrongly, reusing the 'val' variable, use a dedicated
one for reading the status register.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers
On Wed, Sep 8, 2010 at 12:37 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
In wait_for_xfer() for PIO transfer we are using val as both a
counter variable to track the number of spins we've waited for
completion and the value we read from the controller, causing
us to fail to ever
/ sdd-cur_speed;
- ms += 5; /* some tolerance */
+ ms += 10; /* some tolerance */
if (dma_mode) {
val = msecs_to_jiffies(ms) + 10;
Acked-by: Jassi Brar jassi.b...@samsung.com
On Wed, Sep 8, 2010 at 6:12 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Wed, Sep 08, 2010 at 01:55:39PM +0900, Jassi Brar wrote:
On Tue, Sep 7, 2010 at 7:29 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
Allow the use of the S3C64xx SPI controller with things like
Instead of, wrongly, reusing the 'val' variable, use a dedicated
one for reading the status register.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers
Fix compilation warning by typecasting the tx_buf pointer.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
index 9736581..774e861
Newer SoCs have the SPI clock scaling control in platform's
clock management unit. Inorder for such SoCs to work, we need
to check the flag clk_from_cmu before making any clock changes.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 94
On Thu, Sep 9, 2010 at 10:37 AM, Grant Likely grant.lik...@secretlab.ca wrote:
Hi Jassi. I've actually been working through these today (I'm not ignoring
you, just dealing with back-to-school family issues which is why I'm slow).
You'll get emails as I merge them into my tree.
You didn't
Hi,
Here come six bug fixes and enhancements to the S3C64XX
spi controller driver.
The first 4 are bug/warning fixes, the last two are to
enable the spi_s3c64xx.c to manage SPI controllers of newer
Samsung SoCs with essentially the same IP but scalar logic
moved into core clock management unit.
clock managed by CMU.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
b/arch/arm/plat-samsung/include/plat/s3c64xx
We can't do without setting channel and bus width to
same size.
Inorder to do that, define a new callback to be used
to do read/write of appropriate widths.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 78 +---
1 files
On Thu, Sep 9, 2010 at 2:11 PM, Grant Likely grant.lik...@secretlab.ca wrote:
On Fri, Sep 03, 2010 at 10:37:10AM +0900, Jassi Brar wrote:
Newer SoCs have the SPI clock scaling control in platform's
clock management unit. Inorder for such SoCs to work, we need
to check the flag clk_from_cmu
On Thu, Sep 9, 2010 at 2:55 PM, Grant Likely grant.lik...@secretlab.ca wrote:
On Thu, Sep 09, 2010 at 02:29:22PM +0900, Jassi Brar wrote:
On Thu, Sep 9, 2010 at 2:11 PM, Grant Likely grant.lik...@secretlab.ca
wrote:
On Fri, Sep 03, 2010 at 10:37:10AM +0900, Jassi Brar wrote:
Newer SoCs
On Thu, Sep 9, 2010 at 2:07 PM, Grant Likely grant.lik...@secretlab.ca wrote:
On Fri, Sep 03, 2010 at 10:36:54AM +0900, Jassi Brar wrote:
We can't do without setting channel and bus width to
same size.
Inorder to do that, define a new callback to be used
to do read/write of appropriate widths
Newer SoCs have the SPI clock scaling control in platform's
clock management unit. Inorder for such SoCs to work, we need
to check the flag clk_from_cmu before making any clock changes.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |3
We can't do without setting channel and bus width to
same size. Inorder to do that, use loop read/writes in
polling mode and appropriate burst size in DMA mode.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 76 -
1
On Thu, Sep 9, 2010 at 11:51 PM, Grant Likely grant.lik...@secretlab.ca wrote:
On Thu, Sep 09, 2010 at 04:18:57PM +0900, Jassi Brar wrote:
We can't do without setting channel and bus width to
same size. Inorder to do that, use loop read/writes in
polling mode and appropriate burst size in DMA
We can't do without setting channel and bus width to
same size. Inorder to do that, use loop read/writes in
polling mode and appropriate burst size in DMA mode.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 56 +
1
On Tue, Oct 5, 2010 at 6:02 AM, Charles Martel singerisl...@gmx.com wrote:
I had built a kernel for the s3c6410 using linux-2.6.24.
Could you plz upgrade to latest kernel ?
2.6.24 was released before I was born, so can't say much about it.
I noticed that there are drivers for the s3c24xx but
On Tue, Oct 12, 2010 at 1:22 AM, Sergii Kovalchuk
sentinelofse...@gmail.com wrote:
On Thursday 07 October 2010 19:36:18 Grant Likely wrote:
On Wed, Oct 6, 2010 at 7:49 AM, Sergii Kovalchuk
I'm implementing an SPI protocol driver for TI WL12xx combo chip.
According to the spec, for write
On Sat, Jan 8, 2011 at 3:51 AM, Kevyn-Alexandre Paré
kap...@rogue-research.com wrote:
Hi,
What's the best way to calculate the current SPI transfer speed?
Right now I use something like that and transfer one spi_message with 1
spi_transfer of 10 bytes and I do the math... I know that
On Tue, Jan 11, 2011 at 5:25 AM, Kevyn-Alexandre Paré
kap...@rogue-research.com wrote:
What's the best way to calculate the current SPI transfer speed?
Right now I use something like that and transfer one spi_message with 1
spi_transfer of 10 bytes and I do the math... I know that this
a.kesa...@samsung.com
Signed-off-by: Sangbeom Kim sbki...@samsung.com
Cc: Jassi Brar jassi.b...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
Changes since v2:
- Changed dependency of S3C64XX_DMA
Changes since v1:
- Removed dependency on EXPERIMENTAL
(Following is same
On Sun, Jun 5, 2011 at 12:48 PM, Grant Likely grant.lik...@secretlab.ca wrote:
[repost: I had a typo on the spi-devel-general mailing list address]
Sort the SPI makefile and enforce the naming convention spi_*.c for
spi drivers.
This change also rolls the contents of atmel_spi.h into the .c
Hi Baruch,
On Sun, Jun 5, 2011 at 1:24 PM, Baruch Siach bar...@tkos.co.il wrote:
Though the spi_ prefix seems redundant considering the files are in
'spi' directory.
Just a thought, no objection.
When looking at the list of loaded modules (e.g. in an Oops message), the name
spi_xilinx is
On Sun, Jun 5, 2011 at 5:49 AM, Geert Uytterhoeven ge...@linux-m68k.org
wrote:
Though the spi_ prefix seems redundant considering the files are in
'spi' directory.
Just a thought, no objection.
When looking at the list of loaded modules (e.g. in an Oops message), the
name
spi_xilinx is
On Thu, Jun 30, 2011 at 6:08 PM, Padmavathi Venna padm...@samsung.com wrote:
Fixed the bug in transmission status check for 64 bytes FIFO
level.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
drivers/spi/spi_s3c64xx.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
On Thu, Jun 30, 2011 at 2:35 PM, padma venkat padma@gmail.com wrote:
Hi,
On Thu, Jun 30, 2011 at 12:38 PM, Jassi Brar jassisinghb...@gmail.com wrote:
On Thu, Jun 30, 2011 at 6:08 PM, Padmavathi Venna padm...@samsung.com
wrote:
Fixed the bug in transmission status check for 64 bytes FIFO
On Fri, Jul 1, 2011 at 11:16 AM, padma venkat padma@gmail.com wrote:
Hi Tony,
On Thu, Jun 30, 2011 at 4:30 PM, Tony Nadackal ton...@gmail.com wrote:
Hi Padma,
With regards to your patch, even though one can check the tx done status
using the TX_DONE bit, the present macro itself would
On Tue, Aug 9, 2011 at 4:35 PM, Viresh Kumar viresh.ku...@st.com wrote:
tasklets don't allow invocation to sleeping routines. In configure_dma()
routine, sg_alloc_table() was called with GFP_KERNEL flag and so this causes
crash when called from tasklet.
Replace GFP_KERNEL with GFP_NOWAIT to
On Wed, Aug 10, 2011 at 2:59 PM, viresh kumar viresh.ku...@st.com wrote:
On 08/10/2011 02:30 PM, Russell King - ARM Linux wrote:
They must be allocated when they are required and must be freed after we
are
done with transfers. So that they can be used by other users.
Which DMA engine
On Wed, Aug 10, 2011 at 3:31 PM, Koul, Vinod vinod.k...@intel.com wrote:
On Wed, 2011-08-10 at 14:59 +0530, viresh kumar wrote:
On 08/10/2011 02:30 PM, Russell King - ARM Linux wrote:
They must be allocated when they are required and must be freed after
we are
done with transfers. So
On Wed, Aug 10, 2011 at 4:10 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Wed, Aug 10, 2011 at 04:01:13PM +0530, Jassi Brar wrote:
On Wed, Aug 10, 2011 at 3:31 PM, Koul, Vinod vinod.k...@intel.com wrote:
On Wed, 2011-08-10 at 14:59 +0530, viresh kumar wrote:
On 08/10/2011 02
On Wed, Aug 10, 2011 at 5:24 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Aug 10, 2011 at 1:24 PM, Jassi Brar jassisinghb...@gmail.com wrote:
On Wed, Aug 10, 2011 at 4:10 PM, Russell King - ARM Linux
I discussed this with Linus on the bus back from Cambridge in the evening
On Thu, Aug 11, 2011 at 2:28 AM, Vinod Koul vk...@infradead.org wrote:
The lookup of a device DMA channel should follow the
design pattern set by regulators and clocks.
Nopes. It depends upon the subsystem.
We should strive towards making this scheme as 'standalone' as
possible.
Client
On Thu, Aug 11, 2011 at 6:25 PM, Linus Walleij linus.wall...@linaro.org wrote:
2011/8/10 Jassi Brar jassisinghb...@gmail.com:
On Wed, Aug 10, 2011 at 5:24 PM, Linus Walleij linus.wall...@linaro.org
wrote:
Linus W, was there anything you said wouldn't work with the scheme ?
Please tell now
On Thu, Aug 11, 2011 at 8:18 PM, Linus Walleij linus.wall...@linaro.org wrote:
2011/8/11 Jassi Brar jassisinghb...@gmail.com:
Do you have any reason for using device pointer and strings, other
than just because clock and regulator use them ??
Basically no.
Dear, I am speechless !!
Best
Hello,
Nothing serious, just a minor point to bring to your notice.
I came across a minor but confusing discrepancy in the documentation of SPI-API
while writing a SPI controller driver.
include/linux/spi/spi.h defines num_chipselect as:-
@num_chipselect: chipselects are used to distinguish
Hello,
I see drivers/spi/spi_s3c24xx.c uses bitbang i/f eventhough 24xx has a
dedicated SPI controller. Wasn't bitbang is supposed to be for SOCs which
don't have a SPI controller.
I was wondering why cudn't we make it work without the Bitbang abstraction?
Any potential issues that I am failing
Hello,
The driver has been tested with 9pin MMC card slot soldered
to pins of SPI-1 port on the SMDK6410.
Since that is not a standard h/w configuration of SMDK, the patch
to enable SPI-1 controller for MMC_SPI in machine init code,
is not being submitted.
The arch specific patches are
On Mon, Dec 7, 2009 at 1:48 PM, Cory Maccarrone darkstar6...@gmail.com wrote:
This change adds the OMAP SPI 100k driver created by
Fabrice Crohas fcro...@gmail.com. This SPI bus is found on
OMAP7xx-series smartphones, and for many, the touchscreen is
attached to this bus.
The lion's share
On Tue, Jan 19, 2010 at 2:58 AM, Grant Likely grant.lik...@secretlab.ca wrote:
On Mon, Jan 18, 2010 at 2:50 AM, jassisinghb...@gmail.com wrote:
From: Jassi Brar jassi.b...@samsung.com
The instance of SPI clock for controller and that used for generating
signals ought to be independently
On Tue, Jan 19, 2010 at 3:12 AM, Grant Likely grant.lik...@secretlab.ca wrote:
On Mon, Jan 18, 2010 at 2:50 AM, jassisinghb...@gmail.com wrote:
From: Jassi Brar jassi.b...@samsung.com
Add precautionary check before releasing memory region.
Signed-off-by: Jassi Brar jassi.b...@samsung.com
On Tue, Jan 19, 2010 at 3:13 AM, Grant Likely grant.lik...@secretlab.ca wrote:
On Mon, Jan 18, 2010 at 2:50 AM, jassisinghb...@gmail.com wrote:
From: Jassi Brar jassi.b...@samsung.com
Header for platform specific stuff has been rename to include the SoC
type. Include the new header instead
On Tue, Jan 19, 2010 at 11:32 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
On Mon, Jan 18, 2010 at 4:42 PM, jassi brar jassisinghb...@gmail.com wrote:
On Tue, Jan 19, 2010 at 3:12 AM, Grant Likely grant.lik...@secretlab.ca
wrote:
On Mon, Jan 18, 2010 at 2:50 AM, jassisinghb...@gmail.com
On Tue, Jan 19, 2010 at 6:52 PM, jassi brar jassisinghb...@gmail.com wrote:
On Tue, Jan 19, 2010 at 11:32 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
On Mon, Jan 18, 2010 at 4:42 PM, jassi brar jassisinghb...@gmail.com wrote:
On Tue, Jan 19, 2010 at 3:12 AM, Grant Likely grant.lik
On Thu, Jan 21, 2010 at 12:28 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
Hi Ken,
Thanks for the patch. Some comments below.
On Tue, Dec 22, 2009 at 5:36 PM, Ken Mills ken.k.mi...@intel.com wrote:
diff --git a/drivers/spi/mrst_spi_slave.c b/drivers/spi/mrst_spi_slave.c
new file mode
On Thu, Jan 21, 2010 at 11:55 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
On Wed, Jan 20, 2010 at 6:46 PM, jassi brar jassisinghb...@gmail.com wrote:
On Thu, Jan 21, 2010 at 10:35 AM, jassi brar jassisinghb...@gmail.com
wrote:
Hi Grant Likely,
You have reviewed this series of patches
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