On Thu, Apr 1, 2010 at 7:35 PM, Marek Szyprowski <[email protected]> wrote: > There are some boards that do not strictly follow SPI standard and use > only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary > chips and controls them with GPIO based 'spi controller'. In this > configuration the MISO or MOSI line is missing (it is not required if the > chip does not transfer any data back to host or host only reads data from > chip). > > This patch adds support for such non-standard configuration in GPIO-based > SPI controller. It has been tested in configuration without MISO pin. Though not very clear atm, but wouldn't having some ineffective virtual GPIO assigned to this non-existing MISO/MOSI do the trick?
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