svn commit: r290647 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Tue Nov 10 11:45:41 2015
New Revision: 290647
URL: https://svnweb.freebsd.org/changeset/base/290647

Log:
  ARM: Improve robustness of locore_v6.S and fix errors.
  - boot page table is not allocated in data section, so must be
cleared before use
  - map only one section (1 MB) for SOCDEV mapping (*)
  - DSB must be used for ensuring of finishing TLB operations
  - Invalidate BTB when appropriate
  
  PR:   198360
  Reported by:  Daisuke Aoyama  (*)
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/locore-v6.S

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.STue Nov 10 11:28:02 2015
(r290646)
+++ head/sys/arm/arm/locore-v6.STue Nov 10 11:45:41 2015
(r290647)
@@ -142,9 +142,11 @@ ASENTRY_NP(_start)
orr r7, #CPU_CONTROL_AFLT_ENABLE
orr r7, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r7)
+   DSB
ISB
bl  dcache_inv_poc_all
mcr CP15_ICIALLU
+   DSB
ISB
 
/*
@@ -155,6 +157,14 @@ ASENTRY_NP(_start)
adr r0, Lpagetable
bl  translate_va_to_pa
 
+   /* Clear boot page table */
+   mov r1, r0
+   mov r2, L1_TABLE_SIZE
+   mov r3,#0
+1: str r3, [r1], #4
+   subsr2, #4
+   bgt 1b
+
/*
 * Map PA == VA
 */
@@ -174,9 +184,10 @@ ASENTRY_NP(_start)
bl  build_pagetables
 
 #if defined(SOCDEV_PA) && defined(SOCDEV_VA)
-   /* Create the custom map used for early_printf(). */
+   /* Create the custom map (1MB) used for early_printf(). */
ldr r1, =SOCDEV_PA
ldr r2, =SOCDEV_VA
+   mov r3, #1
bl  build_pagetables
 #endif
bl  init_mmu
@@ -300,7 +311,9 @@ ASENTRY_NP(init_mmu)
ISB
mcr CP15_TLBIALL/* Flush TLB */
mcr CP15_BPIALL /* Flush Branch predictor */
+   DSB
ISB
+
mov pc, lr
 END(init_mmu)
 
@@ -328,6 +341,7 @@ ASENTRY_NP(reinit_mmu)
bl  dcache_inv_pou_all
 #endif
mcr CP15_ICIALLU
+   DSB
ISB
 
/* Set auxiliary register */
@@ -336,6 +350,7 @@ ASENTRY_NP(reinit_mmu)
eor r8, r8, r6  /* Set bits */
teq r7, r8
mcrne   CP15_ACTLR(r8)
+   DSB
ISB
 
/* Enable caches. */
@@ -350,8 +365,8 @@ ASENTRY_NP(reinit_mmu)
DSB
ISB
 
-   /* Flush all TLBs */
-   mcr CP15_TLBIALL
+   mcr CP15_TLBIALL/* Flush TLB */
+   mcr CP15_BPIALL /* Flush Branch predictor */
DSB
ISB
 
@@ -362,6 +377,7 @@ ASENTRY_NP(reinit_mmu)
bl  dcache_inv_pou_all
 #endif
mcr CP15_ICIALLU
+   DSB
ISB
 
pop {r4-r11, pc}
@@ -453,11 +469,13 @@ ASENTRY_NP(mpentry)
orr r0, #CPU_CONTROL_AFLT_ENABLE
orr r0, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r0)
+   DSB
ISB
 
/* Invalidate L1 cache I+D cache */
bl  dcache_inv_pou_all
mcr CP15_ICIALLU
+   DSB
ISB
 
/* Find the delta between VA and PA */
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svn commit: r290648 - head/sys/arm/include

[Michal Meloun]

Author: mmel
Date: Tue Nov 10 12:02:41 2015
New Revision: 290648
URL: https://svnweb.freebsd.org/changeset/base/290648

Log:
  ARM: Remove trailing whitespace from sys/arm/include
  No functional changes.
  
  Approved by:kib (mentor)

Modified:
  head/sys/arm/include/_stdint.h
  head/sys/arm/include/armreg.h
  head/sys/arm/include/asm.h
  head/sys/arm/include/atags.h
  head/sys/arm/include/atomic-v4.h
  head/sys/arm/include/board.h
  head/sys/arm/include/bus.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/devmap.h
  head/sys/arm/include/disassem.h
  head/sys/arm/include/endian.h
  head/sys/arm/include/pcb.h
  head/sys/arm/include/pcpu.h
  head/sys/arm/include/physmem.h
  head/sys/arm/include/pl310.h

Modified: head/sys/arm/include/_stdint.h
==
--- head/sys/arm/include/_stdint.h  Tue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/_stdint.h  Tue Nov 10 12:02:41 2015
(r290648)
@@ -139,7 +139,7 @@
  * 7.18.3  Limits of other integer types
  */
 /* Limits of ptrdiff_t. */
-#definePTRDIFF_MIN INT32_MIN   
+#definePTRDIFF_MIN INT32_MIN
 #definePTRDIFF_MAX INT32_MAX
 
 /* Limits of sig_atomic_t. */

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Tue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/armreg.h   Tue Nov 10 12:02:41 2015
(r290648)
@@ -285,7 +285,7 @@
* in r0 steppings. See errata
* 364296.
*/
-/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */   
+/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */
 #defineARM1176_AUXCTL_PHD  0x1000 /* inst. prefetch halting 
disable */
 #defineARM1176_AUXCTL_BFD  0x2000 /* branch folding disable */
 #defineARM1176_AUXCTL_FSD  0x4000 /* force speculative ops 
disable */

Modified: head/sys/arm/include/asm.h
==
--- head/sys/arm/include/asm.h  Tue Nov 10 11:45:41 2015(r290647)
+++ head/sys/arm/include/asm.h  Tue Nov 10 12:02:41 2015(r290648)
@@ -167,7 +167,7 @@
 #else
 #define __FBSDID(s) /* nothing */
 #endif
-   
+
 
 #defineWEAK_ALIAS(alias,sym)   
\
.weak alias;\

Modified: head/sys/arm/include/atags.h
==
--- head/sys/arm/include/atags.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/atags.hTue Nov 10 12:02:41 2015
(r290648)
@@ -64,7 +64,7 @@ struct arm_lbabi_core
uint32_t pagesize;
uint32_t rootdev;
 };
-   
+
 /*
  * ATAG_MEM data -- Can be more than one to describe different
  * banks.
@@ -75,7 +75,7 @@ struct arm_lbabi_mem32
uint32_t start; /* start of physical memory */
 };
 
-/* 
+/*
  * ATAG_INITRD2 - Compressed ramdisk image details
  */
 struct arm_lbabi_initrd
@@ -92,7 +92,7 @@ struct arm_lbabi_serial_number
uint32_t low;
uint32_t high;
 };
-   
+
 /*
  * ATAG_REVISION - board revision
  */
@@ -100,7 +100,7 @@ struct arm_lbabi_revision
 {
uint32_t rev;
 };
-   
+
 /*
  * ATAG_CMDLINE - Command line from uboot
  */
@@ -109,7 +109,7 @@ struct arm_lbabi_command_line
char command[1];/* Minimum command length */
 };
 
-struct arm_lbabi_tag 
+struct arm_lbabi_tag
 {
struct arm_lbabi_header tag_hdr;
union {

Modified: head/sys/arm/include/atomic-v4.h
==
--- head/sys/arm/include/atomic-v4.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/atomic-v4.hTue Nov 10 12:02:41 2015
(r290648)
@@ -116,7 +116,7 @@ static __inline u_int32_t
 atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile 
u_int32_t newval)
 {
int ret;
-   
+
__with_interrupts_disabled(
 {
if (*p == cmpval) {
@@ -133,7 +133,7 @@ static __inline u_int64_t
 atomic_cmpset_64(volatile u_int64_t *p, volatile u_int64_t cmpval, volatile 
u_int64_t newval)
 {
int ret;
-   
+
__with_interrupts_disabled(
 {
if (*p == cmpval) {

Modified: head/sys/arm/include/board.h
==
--- head/sys/arm/include/board.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/board.hTue Nov 10 12:02:41 2015
(r290648)
@@ -37,7 +37,7 @@ struct arm_board {
  

svn commit: r290661 - head/sys/arm/include

[Michal Meloun]

Author: mmel
Date: Tue Nov 10 13:47:28 2015
New Revision: 290661
URL: https://svnweb.freebsd.org/changeset/base/290661

Log:
  ARM: Refactor interrupt_enable/disable/restore.
  Allow manipulation with PSR_A bit on ARMv6+.
  Remove declaration of unused functions.
  
  This effectively enables asynchronous aborts on early bootstrap stage,
  which previously was not enabled due to an error in enable_interrupts().
  
  PR:   201434
  Reported by:  Gregory Soutade 
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Nov 10 13:32:05 2015
(r290660)
+++ head/sys/arm/include/cpufunc.h  Tue Nov 10 13:47:28 2015
(r290661)
@@ -47,6 +47,7 @@
 #ifdef _KERNEL
 
 #include 
+#include 
 #include 
 #include  /* For in[bwl] and out[bwl] */
 
@@ -520,45 +521,54 @@ void  xscalec3_context_switch (void);
 /*
  * Macros for manipulating CPU interrupts
  */
-static __inline u_int32_t __set_cpsr_c(u_int bic, u_int eor) 
__attribute__((__unused__));
+#if __ARM_ARCH < 6
+#define__ARM_INTR_BITS (PSR_I | PSR_F)
+#else
+#define__ARM_INTR_BITS (PSR_I | PSR_F | PSR_A)
+#endif
 
-static __inline u_int32_t
-__set_cpsr_c(u_int bic, u_int eor)
+static __inline uint32_t
+__set_cpsr(uint32_t bic, uint32_t eor)
 {
-   u_int32_t   tmp, ret;
+   uint32_ttmp, ret;
 
__asm __volatile(
-   "mrs %0, cpsr\n"/* Get the CPSR */
-   "bic %1, %0, %2\n"  /* Clear bits */
-   "eor %1, %1, %3\n"  /* XOR bits */
-   "msr cpsr_c, %1\n"  /* Set the control field of CPSR */
+   "mrs %0, cpsr\n"/* Get the CPSR */
+   "bic %1, %0, %2\n"  /* Clear bits */
+   "eor %1, %1, %3\n"  /* XOR bits */
+   "msr cpsr_xc, %1\n" /* Set the CPSR */
: "=" (ret), "=" (tmp)
: "r" (bic), "r" (eor) : "memory");
 
return ret;
 }
 
-#defineARM_CPSR_F32(1 << 6)/* FIQ disable */
-#defineARM_CPSR_I32(1 << 7)/* IRQ disable */
+static __inline uint32_t
+disable_interrupts(uint32_t mask)
+{
 
-#define disable_interrupts(mask)   \
-   (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32),   \
- (mask) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
-
-#define enable_interrupts(mask)
\
-   (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32), 0))
-
-#define restore_interrupts(old_cpsr)   \
-   (__set_cpsr_c((ARM_CPSR_I32 | ARM_CPSR_F32),\
- (old_cpsr) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
+   return (__set_cpsr(mask & __ARM_INTR_BITS, mask & __ARM_INTR_BITS));
+}
+
+static __inline uint32_t
+enable_interrupts(uint32_t mask)
+{
+
+   return (__set_cpsr(mask & __ARM_INTR_BITS, 0));
+}
+
+static __inline uint32_t
+restore_interrupts(uint32_t old_cpsr)
+{
+
+   return (__set_cpsr(__ARM_INTR_BITS, old_cpsr & __ARM_INTR_BITS));
+}
 
 static __inline register_t
 intr_disable(void)
 {
-   register_t s;
 
-   s = disable_interrupts(ARM_CPSR_I32 | ARM_CPSR_F32);
-   return (s);
+   return (disable_interrupts(PSR_I | PSR_F));
 }
 
 static __inline void
@@ -567,10 +577,7 @@ intr_restore(register_t s)
 
restore_interrupts(s);
 }
-
-/* Functions to manipulate the CPSR. */
-u_int  SetCPSR(u_int bic, u_int eor);
-u_int  GetCPSR(void);
+#undef __ARM_INTR_BITS
 
 /*
  * Functions to manipulate cpu r13
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svn commit: r290234 - head/share/misc

[Michal Meloun]

Author: mmel
Date: Sun Nov  1 16:54:55 2015
New Revision: 290234
URL: https://svnweb.freebsd.org/changeset/base/290234

Log:
  Install myself as src committer.
  
  Approved by:  kib (mentor)
  > Description of fields to fill in above: 76 columns --|
  > PR:   If a GNATS PR is affected by the change.
  > Submitted by: If someone else sent in the change.
  > Reviewed by:  If someone else reviewed your modification.
  > Approved by:  If you needed approval for this commit.
  > Obtained from:If the change is from a third party.
  > MFC after:N [day[s]|week[s]|month[s]].  Request a reminder 
email.
  > MFH:  Ports tree branch name.  Request approval for 
merge.
  > Relnotes: Set to 'yes' for mention in release notes.
  > Security: Vulnerability reference (one per line) or 
description.
  > Sponsored by: If the change was sponsored by an organization.
  > Differential Revision:https://reviews.freebsd.org/D### (*full* phabric 
URL needed).
  > Empty fields above will be automatically removed.
  
  Mshare/misc/committers-src.dot

Modified:
  head/share/misc/committers-src.dot

Modified: head/share/misc/committers-src.dot
==
--- head/share/misc/committers-src.dot  Sun Nov  1 12:00:55 2015
(r290233)
+++ head/share/misc/committers-src.dot  Sun Nov  1 16:54:55 2015
(r290234)
@@ -235,6 +235,7 @@ melifaro [label="Alexander V. Chernikov\
 mjacob [label="Matt Jacob\nmja...@freebsd.org\n1997/08/13"]
 mjg [label="Mateusz Guzik\n...@freebsd.org\n2012/06/04"]
 mlaier [label="Max Laier\nmla...@freebsd.org\n2004/02/10"]
+mmel [label="Michal Meloun\nm...@freebsd.org\n2015/11/01"]
 monthadar [label="Monthadar Al Jaberi\nmontha...@freebsd.org\n2012/04/02"]
 mp [label="Mark Peek\n...@freebsd.org\n2001/07/27"]
 mr [label="Michael Reifenberger\n...@freebsd.org\n2001/09/30"]
@@ -572,6 +573,7 @@ kib -> jlh
 kib -> jpaetzel
 kib -> lulf
 kib -> melifaro
+kib -> mmel
 kib -> pho
 kib -> pluknet
 kib -> rdivacky
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Re: svn commit: r289759 - in head/sys/arm: arm include

[Michal Meloun]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

Dne 01.11.2015 v 14:01 Jason Harmening napsal(a):
> 
> 
> On Sat, Oct 31, 2015 at 4:55 AM, Jason Harmening 
> >
> wrote:
> 
> 
> 
> On 10/31/15 03:21, Ganbold Tsagaankhuu wrote:
>> On Fri, Oct 23, 2015 at 12:38 AM, Jason A. Harmening
> >
>> wrote:
>> 
>>> Author: jah Date: Thu Oct 22 16:38:01 2015 New Revision:
>>> 289759 URL: https://svnweb.freebsd.org/changeset/base/289759
>>> 
>>> Log: Use pmap_quick* functions in armv6 busdma, for bounce
>>> buffers
> and cache
>>> maintenance.  This makes it safe to sync buffers that have no
>>> VA
> mapping
>>> associated with the busdma map, but may have other mappings,
> possibly on
>>> different CPUs.  This also makes it safe to sync unmapped
>>> bounce
> buffers in
>>> non-sleepable thread contexts.
>>> 
>>> Similar to r286787 for x86, this treats userspace buffers the
> same as
>>> unmapped buffers and no longer borrows the UVA for sync
>>> operations.
>>> 
>>> Submitted by: Svatopluk Kraus  > (earlier
>>> revision) Tested by:Svatopluk Kraus Differential Revision:
>>> https://reviews.freebsd.org/D3869
>> 
>> 
>> 
>> It seems I can't boot Odroid C1 with this change.
>> 
>> http://pastebin.ca/3227678
>> 
>> r289758 works for me.
>> 
>> Am I missing something?
>> 
>> thanks,
>> 
>> Ganbold
>> 
>> 
> 
> Hmmm, the fault address of 0x20 and the fact that this is
> happening during mi_startup() make me wonder if the per-cpu
> pageframes used by pmap_quick* haven't been initialized yet.
> 
> I wonder if changing the order of qpages_init in 
> sys/arm/arm/pmap-v6[-new].c to something other than SI_ORDER_ANY 
> would help?
> 
> It seems like we'd want SI_ORDER_FOURTH or SI_ORDER_MIDDLE, since 
> mp_start() is SI_ORDER_THIRD.
> 
> It would be nice to know what's calling bus_dmamap_sync() in this
> case. I can't figure that out, but maybe that's because I haven't
> had coffee yet.
> 
> 
> Can you build the kernel with 'options VERBOSE_SYSINIT' ? That will
> add some spew to the boot log, but it should confirm whether this
> is a sysinit ordering issue.
> 

The problem is already identified.
ARM uses VM_PHYSSEG_SPARSE memory. This means that not all used memory
is backed by vm_page_array, i.e kernel code, data, bss sections and
initial CPU stacks are outside of this array.
Unfortunately, some drivers (MMC for example) initiates DMA transfer
to buffers on initial stack, (statically allocated buffers in bss or
data section is second example). I have prepared (idea quality) patch,
and I can confirm that works (for Ganbold).
See: https://gist.github.com/strejda/d5ca3ed202427a2e0557

Michal

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Re: svn commit: r290234 - head/share/misc

[Michal Meloun]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

Dne 02.11.2015 v 11:37 Gleb Smirnoff napsal(a):
> On Mon, Nov 02, 2015 at 07:13:46AM +, Alexey Dokuchaev wrote: 
> A> On Sun, Nov 01, 2015 at 04:54:55PM +0000, Michal Meloun wrote: 
> A> > New Revision: 290234 A> > URL:
> https://svnweb.freebsd.org/changeset/base/290234 A> > A> > Log: A>
> >   Install myself as src committer. A> > A> >   Approved by: kib
> (mentor) A> >   > Description of fields to fill in above:
> 76 columns --| A> >   [ garbage omitteed ] A> A> Here is a small
> advice: do not rely on "svn ci" calling your $EDITOR for A> you,
> compose the message yourself first and then do "svn ci -F
> $logfile". A> For one-liners, "svn ci -m message" works even
> better.
> 
> Alternatively: rely on $EDITOR, but don't trust the line:
> 
> --This line, and those below, will be ignored--
> 
> Finalize your message manually.
> 
> P.S. Not that there is bugs in the svn, but you can have touched
> the line.
> 

I'm sorry to all, it’s my bug.
Commit using editor (but using git) is standard practice here @work.
So I automatically select same workflow for FreeBSD.
Anyway, I already got hit from kib@, so I'll use a file for commit log
next time.

But i'm pretty sure that i have not touched template.
I only deleted all prepared unfilled lines (for PR:, MFC: ...)
and then i paste commit message.
And, ironically, only

- --This line, and those below, will be ignored--

line has been omitted from real commit log.

Michal




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svn commit: r291018 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Wed Nov 18 16:07:01 2015
New Revision: 291018
URL: https://svnweb.freebsd.org/changeset/base/291018

Log:
  ARM: Fix dma_dcache_sync() for early allocated memory.
  Drivers can request DMA to buffers that are not in memory represented
  in the vm page arrays. Because of this, store KVA of already mapped
  buffer to synclist and use it in dma_dcache_sync().
  
  Reviewed by:  jah
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4120

Modified:
  head/sys/arm/arm/busdma_machdep-v6.c

Modified: head/sys/arm/arm/busdma_machdep-v6.c
==
--- head/sys/arm/arm/busdma_machdep-v6.cWed Nov 18 15:12:24 2015
(r291017)
+++ head/sys/arm/arm/busdma_machdep-v6.cWed Nov 18 16:07:01 2015
(r291018)
@@ -117,8 +117,8 @@ struct bounce_page {
 
 struct sync_list {
vm_offset_t vaddr;  /* kva of client data */
+   bus_addr_t  paddr;  /* physical address */
vm_page_t   pages;  /* starting page of client data */
-   vm_offset_t dataoffs;   /* page offset of client data */
bus_size_t  datacount;  /* client data count */
 };
 
@@ -1076,17 +1076,19 @@ _bus_dmamap_load_phys(bus_dma_tag_t dmat
sgsize);
} else {
if (map->sync_count > 0)
-   sl_end = VM_PAGE_TO_PHYS(sl->pages) +
-   sl->dataoffs + sl->datacount;
+   sl_end = sl->paddr + sl->datacount;
 
if (map->sync_count == 0 || curaddr != sl_end) {
if (++map->sync_count > dmat->nsegments)
break;
sl++;
sl->vaddr = 0;
+   sl->paddr = curaddr;
sl->datacount = sgsize;
sl->pages = PHYS_TO_VM_PAGE(curaddr);
-   sl->dataoffs = curaddr & PAGE_MASK;
+   KASSERT(sl->pages != NULL,
+   ("%s: page at PA:0x%08lx is not in "
+   "vm_page_array", __func__, curaddr));
} else
sl->datacount += sgsize;
}
@@ -1188,8 +1190,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dm
sgsize);
} else {
if (map->sync_count > 0) {
-   sl_pend = VM_PAGE_TO_PHYS(sl->pages) +
-   sl->dataoffs + sl->datacount;
+   sl_pend = sl->paddr + sl->datacount;
sl_vend = sl->vaddr + sl->datacount;
}
 
@@ -1201,9 +1202,17 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dm
goto cleanup;
sl++;
sl->vaddr = kvaddr;
+   sl->paddr = curaddr;
+   if (kvaddr != 0) {
+   sl->pages = NULL;
+   } else {
+   sl->pages = PHYS_TO_VM_PAGE(curaddr);
+   KASSERT(sl->pages != NULL,
+   ("%s: page at PA:0x%08lx is not "
+   "in vm_page_array", __func__,
+   curaddr));
+   }
sl->datacount = sgsize;
-   sl->pages = PHYS_TO_VM_PAGE(curaddr);
-   sl->dataoffs = curaddr & PAGE_MASK;
} else
sl->datacount += sgsize;
}
@@ -1299,10 +1308,10 @@ dma_dcache_sync(struct sync_list *sl, bu
vm_offset_t va, tempva;
bus_size_t size;
 
-   offset = sl->dataoffs;
+   offset = sl->paddr & PAGE_MASK;
m = sl->pages;
size = sl->datacount;
-   pa = VM_PAGE_TO_PHYS(m) | offset;
+   pa = sl->paddr;
 
for ( ; size != 0; size -= len, pa += len, offset = 0, ++m) {
tempva = 0;
@@ -1310,13 +1319,13 @@ dma_dcache_sync(struct sync_list *sl, bu
len = min(PAGE_SIZE - offset, size);
tempva = pmap_quick_enter_page(m);
va = tempva | offset;
+   KASSERT(pa == (VM_PAGE_TO_PHYS(m) | offset),
+   ("unexpected vm_page_t phys: 0x%08x != 0x%08x",
+   VM_PAGE_TO_PHYS(m) | offset, pa));
} else {
len = sl->datacount;

svn commit: r291648 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Wed Dec  2 14:21:16 2015
New Revision: 291648
URL: https://svnweb.freebsd.org/changeset/base/291648

Log:
  OFW: Move code for searching interrupt parent into separate function.
  It can be used by interrupt controller drivers.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/ofw/ofw_bus_subr.c
  head/sys/dev/ofw/ofw_bus_subr.h

Modified: head/sys/dev/ofw/ofw_bus_subr.c
==
--- head/sys/dev/ofw/ofw_bus_subr.c Wed Dec  2 12:58:20 2015
(r291647)
+++ head/sys/dev/ofw/ofw_bus_subr.c Wed Dec  2 14:21:16 2015
(r291648)
@@ -430,6 +430,27 @@ ofw_bus_reg_to_rl(device_t dev, phandle_
return (0);
 }
 
+/*
+ * Get interrupt parent for given node.
+ * Returns 0 if interrupt parent doesn't exist.
+ */
+phandle_t
+ofw_bus_find_iparent(phandle_t node)
+{
+   phandle_t iparent;
+
+   if (OF_searchencprop(node, "interrupt-parent", ,
+   sizeof(iparent)) == -1) {
+   for (iparent = node; iparent != 0;
+   iparent = OF_parent(iparent)) {
+   if (OF_hasprop(iparent, "interrupt-controller"))
+   break;
+   }
+   iparent = OF_xref_from_node(iparent);
+   }
+   return (iparent);
+}
+
 int
 ofw_bus_intr_to_rl(device_t dev, phandle_t node,
 struct resource_list *rl, int *rlen)
@@ -442,18 +463,11 @@ ofw_bus_intr_to_rl(device_t dev, phandle
nintr = OF_getencprop_alloc(node, "interrupts",  sizeof(*intr),
(void **));
if (nintr > 0) {
-   if (OF_searchencprop(node, "interrupt-parent", ,
-   sizeof(iparent)) == -1) {
-   for (iparent = node; iparent != 0;
-   iparent = OF_parent(iparent)) {
-   if (OF_hasprop(iparent, "interrupt-controller"))
-   break;
-   }
-   if (iparent == 0) {
-   device_printf(dev, "No interrupt-parent found, "
-   "assuming direct parent\n");
-   iparent = OF_parent(node);
-   }
+   iparent = ofw_bus_find_iparent(node);
+   if (iparent == 0) {
+   device_printf(dev, "No interrupt-parent found, "
+   "assuming direct parent\n");
+   iparent = OF_parent(node);
iparent = OF_xref_from_node(iparent);
}
if (OF_searchencprop(OF_node_from_xref(iparent), 

Modified: head/sys/dev/ofw/ofw_bus_subr.h
==
--- head/sys/dev/ofw/ofw_bus_subr.h Wed Dec  2 12:58:20 2015
(r291647)
+++ head/sys/dev/ofw/ofw_bus_subr.h Wed Dec  2 14:21:16 2015
(r291648)
@@ -82,7 +82,7 @@ const char *ofw_bus_get_status(device_t 
 int ofw_bus_status_okay(device_t dev);
 
 /* Helper to get node's interrupt parent */
-void   ofw_bus_find_iparent(phandle_t);
+phandle_t ofw_bus_find_iparent(phandle_t);
 
 /* Helper routine for checking compat prop */
 int ofw_bus_is_compatible(device_t, const char *);
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svn commit: r291650 - head/sys/arm/include

[Michal Meloun]

Author: mmel
Date: Wed Dec  2 14:24:14 2015
New Revision: 291650
URL: https://svnweb.freebsd.org/changeset/base/291650

Log:
  ARM: Define PCI_RES_BUS resource for platforms having NEW_PCIB enabled.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/resource.h

Modified: head/sys/arm/include/resource.h
==
--- head/sys/arm/include/resource.h Wed Dec  2 14:22:58 2015
(r291649)
+++ head/sys/arm/include/resource.h Wed Dec  2 14:24:14 2015
(r291650)
@@ -42,5 +42,8 @@
 #defineSYS_RES_MEMORY  3   /* i/o memory */
 #defineSYS_RES_IOPORT  4   /* i/o ports */
 #defineSYS_RES_GPIO5   /* general purpose i/o */
+#ifdef NEW_PCIB
+#define PCI_RES_BUS6   /* PCI bus numbers */
+#endif
 
 #endif /* !_MACHINE_RESOURCE_H_ */
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svn commit: r291649 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Wed Dec  2 14:22:58 2015
New Revision: 291649
URL: https://svnweb.freebsd.org/changeset/base/291649

Log:
  ARM: Fix of detection of root interrupt controller.
  This fixes detection of root interrupt controller for cases,
  when interrupt parent is not defined at all or it's not defined directly
  in controller node.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Wed Dec  2 14:21:16 2015(r291648)
+++ head/sys/arm/arm/gic.c  Wed Dec  2 14:22:58 2015(r291649)
@@ -461,9 +461,13 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
 
-   i = OF_getencprop(ofw_bus_get_node(dev), "interrupt-parent",
-   , sizeof(pxref));
-   if (i > 0 && xref == pxref) {
+   /*
+* Controller is root if:
+* - doesn't have interrupt parent
+* - his interrupt parent is this controller
+*/
+   pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev));
+   if (pxref == 0 || xref == pxref) {
if (arm_pic_claim_root(dev, xref, arm_gic_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
device_printf(dev, "could not set PIC as a root\n");
@@ -471,6 +475,12 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
} else {
+   if (sc->gic_res[2] == NULL) {
+   device_printf(dev,
+   "not root PIC must have defined interrupt\n");
+   arm_pic_unregister(dev, xref);
+   goto cleanup;
+   }
if (bus_setup_intr(dev, sc->gic_res[2], INTR_TYPE_CLK,
arm_gic_intr, NULL, sc, >gic_intrhand)) {
device_printf(dev, "could not setup irq handler\n");
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svn commit: r292156 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun Dec 13 08:17:49 2015
New Revision: 292156
URL: https://svnweb.freebsd.org/changeset/base/292156

Log:
  OFW: Add helper functions for parsing xref based lists.
  By using this functions, we can parse a list of tuples, each of them holds
  xref and variable number of values.
  This kind of list is used in DT for clocks, gpios, resets ...
  
  Discussed with:   ian, nwhitehorn
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4316

Modified:
  head/sys/dev/ofw/ofw_bus_subr.c
  head/sys/dev/ofw/ofw_bus_subr.h

Modified: head/sys/dev/ofw/ofw_bus_subr.c
==
--- head/sys/dev/ofw/ofw_bus_subr.c Sun Dec 13 07:39:49 2015
(r292155)
+++ head/sys/dev/ofw/ofw_bus_subr.c Sun Dec 13 08:17:49 2015
(r292156)
@@ -607,3 +607,134 @@ ofw_bus_find_child_device_by_phandle(dev
 
return (retval);
 }
+
+/*
+ * Parse property that contain list of xrefs and values
+ * (like standard "clocks" and "resets" properties)
+ * Input arguments:
+ *  node - consumers device node
+ *  list_name  - name of parsed list - "clocks"
+ *  cells_name - name of size property - "#clock-cells"
+ * Output arguments:
+ *  producer - handle of producer
+ *  ncells   - number of cells in result
+ *  cells- array of decoded cells
+ */
+int
+ofw_bus_parse_xref_list_alloc(phandle_t node, const char *list_name,
+const char *cells_name, int idx, phandle_t *producer, int *ncells,
+pcell_t **cells)
+{
+   phandle_t pnode;
+   phandle_t *elems;
+   uint32_t  pcells;
+   int rv, i, j, nelems, cnt;
+
+   elems = NULL;
+   nelems = OF_getencprop_alloc(node, list_name,  sizeof(*elems),
+   (void **));
+   if (nelems <= 0)
+   return (ENOENT);
+   rv = ENOENT;
+   for (i = 0, cnt = 0; i < nelems; i += pcells, cnt++) {
+   pnode = elems[i++];
+   if (OF_getencprop(OF_node_from_xref(pnode),
+   cells_name, , sizeof(pcells)) == -1) {
+   printf("Missing %s property\n", cells_name);
+   rv = ENOENT;
+   break;
+   }
+
+   if ((i + pcells) > nelems) {
+   printf("Invalid %s property value <%d>\n", cells_name,
+   pcells);
+   rv = ERANGE;
+   break;
+   }
+   if (cnt == idx) {
+   *cells= malloc(pcells * sizeof(**cells), M_OFWPROP,
+   M_WAITOK);
+   *producer = pnode;
+   *ncells = pcells;
+   for (j = 0; j < pcells; j++)
+   (*cells)[j] = elems[i + j];
+   rv = 0;
+   break;
+   }
+   }
+   if (elems != NULL)
+   free(elems, M_OFWPROP);
+   return (rv);
+}
+
+/*
+ * Find index of string in string list property (case sensitive).
+ */
+int
+ofw_bus_find_string_index(phandle_t node, const char *list_name,
+const char *name, int *idx)
+{
+   char *elems;
+   int rv, i, cnt, nelems;
+
+   elems = NULL;
+   nelems = OF_getprop_alloc(node, list_name, 1, (void **));
+   if (nelems <= 0)
+   return (ENOENT);
+
+   rv = ENOENT;
+   for (i = 0, cnt = 0; i < nelems; cnt++) {
+   if (strcmp(elems + i, name) == 0) {
+   *idx = cnt;
+   rv = 0;
+   break;
+   }
+   i += strlen(elems + i) + 1;
+   }
+
+   if (elems != NULL)
+   free(elems, M_OFWPROP);
+   return (rv);
+}
+
+/*
+ * Create zero terminated array of strings from string list property.
+ */
+int
+ofw_bus_string_list_to_array(phandle_t node, const char *list_name,
+   const char ***array)
+{
+   char *elems, *tptr;
+   int i, cnt, nelems, len;
+
+   elems = NULL;
+   nelems = OF_getprop_alloc(node, list_name, 1, (void **));
+   if (nelems <= 0)
+   return (nelems);
+
+   /* Count number of strings. */
+   for (i = 0, cnt = 0; i < nelems; cnt++)
+   i += strlen(elems + i) + 1;
+
+   /* Allocate space for arrays and all strings. */
+   *array = malloc((cnt + 1) * sizeof(char *) + nelems, M_OFWPROP,
+   M_WAITOK);
+
+   /* Get address of first string. */
+   tptr = (char *)(*array + cnt);
+
+   /* Copy strings. */
+   memcpy(tptr, elems, nelems);
+   free(elems, M_OFWPROP);
+
+   /* Fill string pointers. */
+   for (i = 0, cnt = 0; i < nelems; cnt++) {
+   len = strlen(tptr + i) + 1;
+   *array[cnt] = tptr;
+   i += len;
+   tptr += len;
+   }
+   *array[cnt] = 0;
+
+   return (cnt);
+}

Modified: head/sys/dev/ofw/ofw_bus_subr.h

svn commit: r292157 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun Dec 13 08:23:45 2015
New Revision: 292157
URL: https://svnweb.freebsd.org/changeset/base/292157

Log:
  OFW_IICBUS: Register ofw_iicbus node.
  The iicbus can be referenced from other nodes in DT.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/ofw/ofw_iicbus.c

Modified: head/sys/dev/ofw/ofw_iicbus.c
==
--- head/sys/dev/ofw/ofw_iicbus.c   Sun Dec 13 08:17:49 2015
(r292156)
+++ head/sys/dev/ofw/ofw_iicbus.c   Sun Dec 13 08:23:45 2015
(r292157)
@@ -190,6 +190,8 @@ ofw_iicbus_attach(device_t dev)
device_set_ivars(childdev, dinfo);
}
 
+   /* Register bus */
+   OF_device_register_xref(OF_xref_from_node(node), dev);
return (bus_generic_attach(dev));
 }
 
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svn commit: r292159 - head/sys/dev/fdt

[Michal Meloun]

Author: mmel
Date: Sun Dec 13 09:05:55 2015
New Revision: 292159
URL: https://svnweb.freebsd.org/changeset/base/292159

Log:
  SIMPLEBUS: Don't panic if child device doesn't have devinfo set.
  Strictly speaking, missing devinfo is error which can be caused
  by instantiating child using device_add_child() instead of
  BUS_ADD_CHILD(). However, we can tolerate it.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/fdt/simplebus.c

Modified: head/sys/dev/fdt/simplebus.c
==
--- head/sys/dev/fdt/simplebus.cSun Dec 13 08:27:14 2015
(r292158)
+++ head/sys/dev/fdt/simplebus.cSun Dec 13 09:05:55 2015
(r292159)
@@ -304,6 +304,8 @@ simplebus_get_devinfo(device_t bus __unu
 struct simplebus_devinfo *ndi;
 
 ndi = device_get_ivars(child);
+   if (ndi == NULL)
+   return (NULL);
 return (>obdinfo);
 }
 
@@ -313,6 +315,8 @@ simplebus_get_resource_list(device_t bus
struct simplebus_devinfo *ndi;
 
ndi = device_get_ivars(child);
+   if (ndi == NULL)
+   return (NULL);
return (>rl);
 }
 
@@ -380,6 +384,8 @@ simplebus_print_res(struct simplebus_dev
 {
int rv;
 
+   if (di == NULL)
+   return (0);
rv = 0;
rv += resource_list_print_type(>rl, "mem", SYS_RES_MEMORY, "%#lx");
rv += resource_list_print_type(>rl, "irq", SYS_RES_IRQ, "%ld");
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svn commit: r292260 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Tue Dec 15 12:52:45 2015
New Revision: 292260
URL: https://svnweb.freebsd.org/changeset/base/292260

Log:
  ARM: Remove outdated katelib.h.
  
  Approved by:  kib (mentor)

Deleted:
  head/sys/arm/include/katelib.h
Modified:
  head/sys/arm/arm/trap.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/trap.c
==
--- head/sys/arm/arm/trap.c Tue Dec 15 12:51:58 2015(r292259)
+++ head/sys/arm/arm/trap.c Tue Dec 15 12:52:45 2015(r292260)
@@ -109,6 +109,8 @@ __FBSDID("$FreeBSD$");
 #include 
 #endif
 
+#define ReadWord(a)(*((volatile unsigned int *)(a)))
+
 extern char fusubailout[];
 
 #ifdef DEBUG

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Dec 15 12:51:58 2015
(r292259)
+++ head/sys/arm/include/cpufunc.h  Tue Dec 15 12:52:45 2015
(r292260)
@@ -49,7 +49,6 @@
 #include 
 #include 
 #include 
-#include  /* For in[bwl] and out[bwl] */
 
 static __inline void
 breakpoint(void)
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svn commit: r292259 - head/sys/arm/conf

[Michal Meloun]

Author: mmel
Date: Tue Dec 15 12:51:58 2015
New Revision: 292259
URL: https://svnweb.freebsd.org/changeset/base/292259

Log:
  ARM: option PPC_PROBE_CHIPSET is applicable only for x86. Don't enable it
  for ARM LINT config.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/conf/NOTES

Modified: head/sys/arm/conf/NOTES
==
--- head/sys/arm/conf/NOTES Tue Dec 15 11:20:20 2015(r292258)
+++ head/sys/arm/conf/NOTES Tue Dec 15 12:51:58 2015(r292259)
@@ -58,6 +58,7 @@ nooptions SMP
 nooptions  MAXCPU
 
 nooptions  COMPAT_FREEBSD4
+nooption   PPC_PROBE_CHIPSET
 
 nodevice   fdc
 nodevice   sym
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svn commit: r291424 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sat Nov 28 12:09:36 2015
New Revision: 291424
URL: https://svnweb.freebsd.org/changeset/base/291424

Log:
  ARM: Cumulative fixes for GIC
   - fix detection of interrupt root controller
   - allow (but warn) unsupported configuration bits
   - dont send EOI for spurious interrupts
   - print more informations for spurious interrupts
   - use device_printf() where appropriate
  
  Reviewed by:  ian (earlier version)
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Sat Nov 28 09:50:52 2015(r291423)
+++ head/sys/arm/arm/gic.c  Sat Nov 28 12:09:36 2015(r291424)
@@ -68,6 +68,8 @@ __FBSDID("$FreeBSD$");
 #include "pic_if.h"
 #endif
 
+#define GIC_DEBUG_SPURIOUS
+
 /* We are using GICv2 register naming */
 
 /* Distributor Registers */
@@ -135,6 +137,9 @@ struct arm_gic_softc {
uint8_t ver;
struct mtx  mutex;
uint32_tnirqs;
+#ifdef GIC_DEBUG_SPURIOUS
+   uint32_tlast_irq[MAXCPU];
+#endif
 };
 
 static struct resource_spec arm_gic_spec[] = {
@@ -287,7 +292,7 @@ arm_gic_init_secondary(device_t dev)
 }
 #endif /* ARM_INTRNG */
 #endif /* SMP */
- 
+
 #ifndef ARM_INTRNG
 int
 gic_decode_fdt(phandle_t iparent, pcell_t *intr, int *interrupt,
@@ -335,11 +340,10 @@ gic_decode_fdt(phandle_t iparent, pcell_
 */
if (fdt32_to_cpu(intr[2]) & 0x0a) {
printf("unsupported trigger/polarity configuration "
-   "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
-   return (ENOTSUP);
+   "0x%02x\n", fdt32_to_cpu(intr[2]) & 0x0f);
}
*pol  = INTR_POLARITY_CONFORM;
-   if (fdt32_to_cpu(intr[2]) & 0x01)
+   if (fdt32_to_cpu(intr[2]) & 0x03)
*trig = INTR_TRIGGER_EDGE;
else
*trig = INTR_TRIGGER_LEVEL;
@@ -367,6 +371,7 @@ arm_gic_attach(device_t dev)
int i;
uint32_ticciidr;
 #ifdef ARM_INTRNG
+   phandle_t   pxref;
intptr_txref = gic_xref(dev);
 #endif
 
@@ -456,7 +461,9 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
 
-   if (sc->gic_res[2] == NULL) {
+   i = OF_getencprop(ofw_bus_get_node(dev), "interrupt-parent",
+   , sizeof(pxref));
+   if (i > 0 && xref == pxref) {
if (arm_pic_claim_root(dev, xref, arm_gic_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
device_printf(dev, "could not set PIC as a root\n");
@@ -472,6 +479,7 @@ arm_gic_attach(device_t dev)
}
}
 
+   OF_device_register_xref(xref, dev);
return (0);
 
 cleanup:
@@ -516,8 +524,11 @@ arm_gic_intr(void *arg)
 */
 
if (irq >= sc->nirqs) {
-   device_printf(sc->gic_dev, "Spurious interrupt detected\n");
-   gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
+#ifdef GIC_DEBUG_SPURIOUS
+   device_printf(sc->gic_dev,
+   "Spurious interrupt detected: last irq: %d on CPU%d\n",
+   sc->last_irq[PCPU_GET(cpuid)], PCPU_GET(cpuid));
+#endif
return (FILTER_HANDLED);
}
 
@@ -542,12 +553,16 @@ dispatch_irq:
arm_ipi_dispatch(isrc, tf);
goto next_irq;
 #else
-   printf("SGI %u on UP system detected\n", irq - GIC_FIRST_SGI);
+   device_printf(sc->gic_dev, "SGI %u on UP system detected\n",
+   irq - GIC_FIRST_SGI);
gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
goto next_irq;
 #endif
}
 
+#ifdef GIC_DEBUG_SPURIOUS
+   sc->last_irq[PCPU_GET(cpuid)] = irq;
+#endif
if (isrc->isrc_trig == INTR_TRIGGER_EDGE)
gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
 
@@ -729,12 +744,12 @@ gic_map_fdt(struct arm_gic_softc *sc, st
 */
tripol = isrc->isrc_cells[2];
if (tripol & 0x0a) {
-   printf("unsupported trigger/polarity configuration "
-   "0x%2x\n", tripol & 0x0f);
-   return (ENOTSUP);
+   device_printf(sc->gic_dev,
+  "unsupported trigger/polarity configuration "
+  "0x%02x\n",  tripol & 0x0f);
}
pol = INTR_POLARITY_CONFORM;
-   if (tripol & 0x01)
+   if (tripol & 0x03)
trig = INTR_TRIGGER_EDGE;
else
trig = INTR_TRIGGER_LEVEL;
@@ -911,7 +926,8 @@ arm_gic_next_irq(struct arm_gic_softc *s
 
if (active_irq == 0x3FF) {
if (last_irq == 

svn commit: r291426 - head/sys/arm/include

[Michal Meloun]

Author: mmel
Date: Sat Nov 28 12:12:28 2015
New Revision: 291426
URL: https://svnweb.freebsd.org/changeset/base/291426

Log:
  ARM: Implement atomic_swap_int(9). It's used in DRM2 code.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/atomic-v4.h
  head/sys/arm/include/atomic-v6.h
  head/sys/arm/include/atomic.h

Modified: head/sys/arm/include/atomic-v4.h
==
--- head/sys/arm/include/atomic-v4.hSat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic-v4.hSat Nov 28 12:12:28 2015
(r291426)
@@ -363,6 +363,13 @@ atomic_readandclear_32(volatile u_int32_
return (__swp(0, p));
 }
 
+static __inline uint32_t
+atomic_swap_32(volatile u_int32_t *p, u_int32_t v)
+{
+
+   return (__swp(v, p));
+}
+
 #define atomic_cmpset_rel_32   atomic_cmpset_32
 #define atomic_cmpset_acq_32   atomic_cmpset_32
 #define atomic_set_rel_32  atomic_set_32

Modified: head/sys/arm/include/atomic-v6.h
==
--- head/sys/arm/include/atomic-v6.hSat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic-v6.hSat Nov 28 12:12:28 2015
(r291426)
@@ -641,6 +641,25 @@ atomic_testandset_64(volatile uint64_t *
return (atomic_testandset_32(p32, v));
 }
 
+static __inline uint32_t
+atomic_swap_32(volatile uint32_t *p, uint32_t v)
+{
+   uint32_t ret, exflag;
+
+   __asm __volatile(
+   "1: ldrex   %[ret], [%[ptr]]\n"
+   "   strex   %[exf], %[val], [%[ptr]]\n"
+   "   teq %[exf], #0  \n"
+   "   it  ne  \n"
+   "   bne 1b  \n"
+   : [ret] "=r"  (ret),
+ [exf] "=" (exflag)
+   : [val] "r"  (v),
+ [ptr] "r"  (p)
+   : "cc", "memory");
+   return (ret);
+}
+
 #undef ATOMIC_ACQ_REL
 #undef ATOMIC_ACQ_REL_LONG
 

Modified: head/sys/arm/include/atomic.h
==
--- head/sys/arm/include/atomic.h   Sat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic.h   Sat Nov 28 12:12:28 2015
(r291426)
@@ -109,5 +109,6 @@ atomic_store_long(volatile u_long *dst, 
 #define atomic_readandclear_intatomic_readandclear_32
 #define atomic_load_acq_intatomic_load_acq_32
 #define atomic_store_rel_int   atomic_store_rel_32
+#define atomic_swap_intatomic_swap_32
 
 #endif /* _MACHINE_ATOMIC_H_ */
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svn commit: r291425 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sat Nov 28 12:11:44 2015
New Revision: 291425
URL: https://svnweb.freebsd.org/changeset/base/291425

Log:
  ARM: Add support for new KRAIT 300 CPU revision.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/armreg.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sat Nov 28 12:09:36 2015(r291424)
+++ head/sys/arm/arm/cpufunc.c  Sat Nov 28 12:11:44 2015(r291425)
@@ -910,7 +910,8 @@ set_cpufuncs()
cputype == CPU_ID_CORTEXA15R1 ||
cputype == CPU_ID_CORTEXA15R2 ||
cputype == CPU_ID_CORTEXA15R3 ||
-   cputype == CPU_ID_KRAIT ) {
+   cputype == CPU_ID_KRAIT300R0 ||
+   cputype == CPU_ID_KRAIT300R1 ) {
cpufuncs = cortexa_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
get_cachetype_cp15();

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Sat Nov 28 12:09:36 2015(r291424)
+++ head/sys/arm/arm/identcpu.c Sat Nov 28 12:11:44 2015(r291425)
@@ -197,7 +197,9 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA15R3,   CPU_CLASS_CORTEXA,  "Cortex A15-r3",
  generic_steppings },
-   { CPU_ID_KRAIT, CPU_CLASS_KRAIT,"Krait",
+   { CPU_ID_KRAIT300R0,CPU_CLASS_KRAIT,"Krait 300-r0",
+ generic_steppings },
+   { CPU_ID_KRAIT300R1,CPU_CLASS_KRAIT,"Krait 300-r1",
  generic_steppings },
 
{ CPU_ID_80200, CPU_CLASS_XSCALE,   "i80200",

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Sat Nov 28 12:09:36 2015
(r291424)
+++ head/sys/arm/include/armreg.h   Sat Nov 28 12:11:44 2015
(r291425)
@@ -139,7 +139,9 @@
 #define CPU_ID_CORTEXA15R1 0x411fc0f0
 #define CPU_ID_CORTEXA15R2 0x412fc0f0
 #define CPU_ID_CORTEXA15R3 0x413fc0f0
-#defineCPU_ID_KRAIT0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
+#defineCPU_ID_KRAIT300R0   0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
+#defineCPU_ID_KRAIT300R1   0x511f06f0
+
 #defineCPU_ID_TI925T   0x54029250
 #define CPU_ID_MV88FR131   0x56251310 /* Marvell Feroceon 88FR131 Core */
 #define CPU_ID_MV88FR331   0x56153310 /* Marvell Feroceon 88FR331 Core */
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svn commit: r291427 - head/sys/dev/ahci

[Michal Meloun]

Author: mmel
Date: Sat Nov 28 14:30:42 2015
New Revision: 291427
URL: https://svnweb.freebsd.org/changeset/base/291427

Log:
  AHCI: Use bus_dmamap_sync(9) when accessing DMA buffers.
  
  Reviewed by:  mav
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4240

Modified:
  head/sys/dev/ahci/ahci.c

Modified: head/sys/dev/ahci/ahci.c
==
--- head/sys/dev/ahci/ahci.cSat Nov 28 12:12:28 2015(r291426)
+++ head/sys/dev/ahci/ahci.cSat Nov 28 14:30:42 2015(r291427)
@@ -1606,10 +1606,15 @@ ahci_execute_transaction(struct ahci_slo
if ((ch->quirks & AHCI_Q_NOBSYRES) == 0 &&
(ch->quirks & AHCI_Q_ATI_PMP_BUG) == 0 &&
softreset == 2 && et == AHCI_ERR_NONE) {
-   while ((val = fis[2]) & ATA_S_BUSY) {
-   DELAY(10);
-   if (count++ >= timeout)
+   for ( ; count < timeout; count++) {
+   bus_dmamap_sync(ch->dma.rfis_tag,
+   ch->dma.rfis_map, BUS_DMASYNC_POSTREAD);
+   val = fis[2];
+   bus_dmamap_sync(ch->dma.rfis_tag,
+   ch->dma.rfis_map, BUS_DMASYNC_PREREAD);
+   if ((val & ATA_S_BUSY) == 0)
break;
+   DELAY(10);
}
}
 
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svn commit: r291444 - head/sys/dev/ahci

[Michal Meloun]

Author: mmel
Date: Sun Nov 29 11:28:04 2015
New Revision: 291444
URL: https://svnweb.freebsd.org/changeset/base/291444

Log:
  AHCI: Fix AHCI driver for ARM.
  On ARM, we must ensure proper interdevice write ordering.
  The AHCI interrupt status register must be updated in HW before
  registers in interrupt controller.
  Unfortunately, only way how we can do it is readback.
  
  Discussed with:   mav
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4240

Modified:
  head/sys/dev/ahci/ahci.c
  head/sys/dev/ahci/ahci.h

Modified: head/sys/dev/ahci/ahci.c
==
--- head/sys/dev/ahci/ahci.cSun Nov 29 07:20:30 2015(r291443)
+++ head/sys/dev/ahci/ahci.cSun Nov 29 11:28:04 2015(r291444)
@@ -483,6 +483,7 @@ ahci_intr(void *data)
/* AHCI declares level triggered IS. */
if (!(ctlr->quirks & AHCI_Q_EDGEIS))
ATA_OUTL(ctlr->r_mem, AHCI_IS, is);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 /*
@@ -501,6 +502,7 @@ ahci_intr_one(void *data)
ctlr->interrupt[unit].function(arg);
/* AHCI declares level triggered IS. */
ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 static void
@@ -516,6 +518,7 @@ ahci_intr_one_edge(void *data)
ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
if ((arg = ctlr->interrupt[unit].argument))
ctlr->interrupt[unit].function(arg);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 struct resource *

Modified: head/sys/dev/ahci/ahci.h
==
--- head/sys/dev/ahci/ahci.hSun Nov 29 07:20:30 2015(r291443)
+++ head/sys/dev/ahci/ahci.hSun Nov 29 11:28:04 2015(r291444)
@@ -562,6 +562,20 @@ enum ahci_err_type {
 #define ATA_OUTSL_STRM(res, offset, addr, count) \
bus_write_multi_stream_4((res), (offset), (addr), (count))
 
+/*
+ * On some platforms, we must ensure proper interdevice write ordering.
+ * The AHCI interrupt status register must be updated in HW before
+ * registers in interrupt controller.
+ * Unfortunately, only way how we can do it is readback.
+ *
+ * Currently, only ARM is known to have this issue.
+ */
+#if defined(__arm__)
+#define ATA_RBL(res, offset) \
+   bus_read_4((res), (offset))
+#else
+#define ATA_RBL(res, offset)
+#endif
 
 #define AHCI_Q_NOFORCE 0x0001
 #define AHCI_Q_NOPMP   0x0002
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svn commit: r291492 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Mon Nov 30 17:09:25 2015
New Revision: 291492
URL: https://svnweb.freebsd.org/changeset/base/291492

Log:
  ARM: create new memory attribute for writethrough cacheable memory.
  - add new TEX class for WT cacheable memory
  - export new TEX class to kernel as VM_MEMATTR_WT attribute
  - add new aliases VM_MEMATTR_WRITE_COMBINING and
VM_MEMATTR_WRITE_BACK, it's used in DRM code
  
  Note:
   Only Cortex A8 supports WT caching in HW. On rest of Cortex CPUs,
   WT requests is treated as uncacheable.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/pmap-v6-new.c
  head/sys/arm/include/pte-v6.h
  head/sys/arm/include/vm.h

Modified: head/sys/arm/arm/pmap-v6-new.c
==
--- head/sys/arm/arm/pmap-v6-new.c  Mon Nov 30 16:34:13 2015
(r291491)
+++ head/sys/arm/arm/pmap-v6-new.c  Mon Nov 30 17:09:25 2015
(r291492)
@@ -388,14 +388,14 @@ pmap_debug(int level)
 
 static uint32_t tex_class[8] = {
 /* type  inner cache outer cache */
-   TEX(PRRR_MEM, NMRR_WB_WA, NMRR_WB_WA, 0),  /* 0 - ATTR_WB_WA */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 1 - ATTR_NOCACHE */
-   TEX(PRRR_DEV, NMRR_NC,NMRR_NC,0),  /* 2 - ATTR_DEVICE */
-   TEX(PRRR_SO,  NMRR_NC,NMRR_NC,0),  /* 3 - ATTR_SO*/
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 4 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 5 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 6 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 7 - NOT USED YET */
+   TEX(PRRR_MEM, NMRR_WB_WA, NMRR_WB_WA, 0),  /* 0 - ATTR_WB_WA*/
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 1 - ATTR_NOCACHE  */
+   TEX(PRRR_DEV, NMRR_NC,NMRR_NC,0),  /* 2 - ATTR_DEVICE   */
+   TEX(PRRR_SO,  NMRR_NC,NMRR_NC,0),  /* 3 - ATTR_SO   */
+   TEX(PRRR_MEM, NMRR_WT,NMRR_WT,0),  /* 4 - ATTR_WT   */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 5 - NOT USED YET  */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 6 - NOT USED YET  */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 7 - NOT USED YET  */
 };
 #undef TEX
 

Modified: head/sys/arm/include/pte-v6.h
==
--- head/sys/arm/include/pte-v6.h   Mon Nov 30 16:34:13 2015
(r291491)
+++ head/sys/arm/include/pte-v6.h   Mon Nov 30 17:09:25 2015
(r291492)
@@ -196,6 +196,7 @@
 #definePTE2_ATTR_NOCACHE   TEX2_CLASS_1
 #definePTE2_ATTR_DEVICETEX2_CLASS_2
 #definePTE2_ATTR_SOTEX2_CLASS_3
+#definePTE2_ATTR_WTTEX2_CLASS_4
 /*
  * Software defined bits for L1descriptors
  *  - L1_AP0 isused as page accessed bit

Modified: head/sys/arm/include/vm.h
==
--- head/sys/arm/include/vm.h   Mon Nov 30 16:34:13 2015(r291491)
+++ head/sys/arm/include/vm.h   Mon Nov 30 17:09:25 2015(r291492)
@@ -32,14 +32,16 @@
 #ifdef ARM_NEW_PMAP
 #include 
 
-#define VM_MEMATTR_WB_WA   ((vm_memattr_t)PTE2_ATTR_WB_WA)
-#define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
-#define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
-#define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
-
-#define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
-#define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO /*name is misused by DMA */
+#define VM_MEMATTR_WB_WA   ((vm_memattr_t)PTE2_ATTR_WB_WA)
+#define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
+#define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
+#define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
+#define VM_MEMATTR_WT  ((vm_memattr_t)PTE2_ATTR_WT)
 
+#define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
+#define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO   /* misused by DMA */
+#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WT   /* for DRM */
+#define VM_MEMATTR_WRITE_BACK  VM_MEMATTR_WB_WA/* for DRM */
 
 #else
 /* Memory attribute configuration. */
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svn commit: r301539 - in head/sys: dev/gpio kern sys

[Michal Meloun]

Author: mmel
Date: Tue Jun  7 05:08:24 2016
New Revision: 301539
URL: https://svnweb.freebsd.org/changeset/base/301539

Log:
  INTRNG: As follow up of r301451, implement mapping and configuration
  of gpio pin interrupts by new way.
  
  Note: This removes last consumer of intr_ddata machinery and we remove it
  in separate commit.

Modified:
  head/sys/dev/gpio/gpiobus.c
  head/sys/dev/gpio/gpiobusvar.h
  head/sys/kern/subr_intr.c
  head/sys/sys/intr.h

Modified: head/sys/dev/gpio/gpiobus.c
==
--- head/sys/dev/gpio/gpiobus.c Tue Jun  7 04:51:50 2016(r301538)
+++ head/sys/dev/gpio/gpiobus.c Tue Jun  7 05:08:24 2016(r301539)
@@ -79,22 +79,47 @@ static int gpiobus_pin_toggle(device_t, 
  * data will be moved into struct resource.
  */
 #ifdef INTRNG
+static void
+gpio_destruct_map_data(struct intr_map_data *map_data)
+{
+
+   KASSERT(map_data->type == INTR_MAP_DATA_GPIO,
+   ("%s: bad map_data type %d", __func__, map_data->type));
+
+   free(map_data, M_DEVBUF);
+}
+
 struct resource *
 gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags,
 gpio_pin_t pin, uint32_t intr_mode)
 {
-   u_int irqnum;
-
-   /*
-* Allocate new fictitious interrupt number and store configuration
-* into it.
-*/
-   irqnum = intr_gpio_map_irq(pin->dev, pin->pin, pin->flags, intr_mode);
-   if (irqnum == INTR_IRQ_INVALID)
+   int rv;
+   u_int irq;
+   struct intr_map_data_gpio *gpio_data;
+   struct resource *res;
+
+   gpio_data = malloc(sizeof(*gpio_data), M_DEVBUF, M_WAITOK | M_ZERO);
+   gpio_data->hdr.type = INTR_MAP_DATA_GPIO;
+   gpio_data->hdr.destruct = gpio_destruct_map_data;
+   gpio_data->gpio_pin_num = pin->pin;
+   gpio_data->gpio_pin_flags = pin->flags;
+   gpio_data->gpio_intr_mode = intr_mode;
+
+   rv = intr_map_irq(pin->dev, 0, (struct intr_map_data *)gpio_data,
+   );
+   if (rv != 0) {
+   gpio_destruct_map_data((struct intr_map_data *)gpio_data);
return (NULL);
+   }
 
-   return (bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid,
-   irqnum, irqnum, 1, alloc_flags));
+   res = bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid, irq, irq, 1,
+   alloc_flags);
+   if (res == NULL) {
+   gpio_destruct_map_data((struct intr_map_data *)gpio_data);
+   return (NULL);
+   }
+   rman_set_virtual(res, gpio_data);
+   return (res);
 }
 #else
 struct resource *

Modified: head/sys/dev/gpio/gpiobusvar.h
==
--- head/sys/dev/gpio/gpiobusvar.h  Tue Jun  7 04:51:50 2016
(r301538)
+++ head/sys/dev/gpio/gpiobusvar.h  Tue Jun  7 05:08:24 2016
(r301539)
@@ -70,6 +70,13 @@ struct gpiobus_pin_data
char*name;  /* pin name. */
 };
 
+struct intr_map_data_gpio {
+   struct intr_map_datahdr;
+   u_int   gpio_pin_num;
+   u_int   gpio_pin_flags;
+   u_int   gpio_intr_mode;
+};
+
 struct gpiobus_softc
 {
struct mtx  sc_mtx; /* bus mutex */

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Tue Jun  7 04:51:50 2016(r301538)
+++ head/sys/kern/subr_intr.c   Tue Jun  7 05:08:24 2016(r301539)
@@ -147,7 +147,9 @@ struct intr_dev_data {
 };
 
 static struct intr_dev_data *intr_ddata_tab[2 * NIRQ];
+#if 0
 static u_int intr_ddata_first_unused;
+#endif
 
 #define IRQ_DDATA_BASE 1
 CTASSERT(IRQ_DDATA_BASE > nitems(irq_sources));
@@ -534,6 +536,7 @@ intr_isrc_init_on_cpu(struct intr_irqsrc
 }
 #endif
 
+#if 0
 static struct intr_dev_data *
 intr_ddata_alloc(u_int extsize)
 {
@@ -556,6 +559,7 @@ intr_ddata_alloc(u_int extsize)
ddata->idd_data = (struct intr_map_data *)((uintptr_t)ddata + size);
return (ddata);
 }
+#endif
 
 static struct intr_irqsrc *
 intr_ddata_lookup(u_int irq, struct intr_map_data **datap)
@@ -620,30 +624,6 @@ intr_acpi_map_irq(device_t dev, u_int ir
 }
 #endif
 
-/*
- *  Store GPIO interrupt decription in framework and return unique interrupt
- *  number (resource handle) associated with it.
- */
-u_int
-intr_gpio_map_irq(device_t dev, u_int pin_num, u_int pin_flags, u_int 
intr_mode)
-{
-   struct intr_dev_data *ddata;
-   struct intr_map_data_gpio *dag;
-
-   ddata = intr_ddata_alloc(sizeof(struct intr_map_data_gpio));
-   if (ddata == NULL)
-   return (INTR_IRQ_INVALID);  /* no space left */
-
-   ddata->idd_dev = dev;
-   ddata->idd_data->type = INTR_MAP_DATA_GPIO;
-
-   dag = (struct intr_map_data_gpio *)ddata->idd_data;
-   dag->gpio_pin_num = pin_num;
-   dag->gpio_pin_flags = pin_flags;
-   

svn commit: r300951 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sun May 29 07:39:56 2016
New Revision: 300951
URL: https://svnweb.freebsd.org/changeset/base/300951

Log:
  ARM GIC: Allow to setup interrupt without configuration data.
  In some cases, like for PCI devices, only interrupt numbers are enumerated
  from HW. In this case, use INTR_foo_CONFORM as level and trigger values.

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Sun May 29 07:29:35 2016(r300950)
+++ head/sys/arm/arm/gic.c  Sun May 29 07:39:56 2016(r300951)
@@ -1128,8 +1128,11 @@ arm_gic_setup_intr(device_t dev, struct 
 
if (gi->gi_irq != irq)
return (EINVAL);
-   } else
-   return (ENOTSUP);
+   } else {
+   irq = gi->gi_irq;
+   pol = INTR_POLARITY_CONFORM;
+   trig = INTR_TRIGGER_CONFORM;
+   }
 
/* Compare config if this is not first setup. */
if (isrc->isrc_handlers != 0) {
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svn commit: r295252 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 12:11:18 2016
New Revision: 295252
URL: https://svnweb.freebsd.org/changeset/base/295252

Log:
  ARM: Don't use ugly (and hidden) global variable, control register is
  readable at any time.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Thu Feb  4 12:06:06 2016(r295251)
+++ head/sys/arm/arm/cpufunc.c  Thu Feb  4 12:11:18 2016(r295252)
@@ -88,8 +88,6 @@ u_int arm_cache_level;
 u_int  arm_cache_type[14];
 u_int  arm_cache_loc;
 
-int ctrl;
-
 #ifdef CPU_ARM9
 struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
@@ -889,7 +887,6 @@ arm9_setup(void)
 
/* Set the control register */
cpu_control(cpuctrlmask, cpuctrl);
-   ctrl = cpuctrl;
 
 }
 #endif /* CPU_ARM9 */
@@ -928,7 +925,6 @@ arm10_setup(void)
cpuctrl |= CPU_CONTROL_VECRELOC;
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 
/* And again. */
@@ -1032,7 +1028,6 @@ arm11x6_setup(void)
cp15_cpacr_set(0x0fff);
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(~cpuctrl_wax, cpuctrl);
 
tmp = cp15_actlr_get();
@@ -1074,7 +1069,6 @@ pj4bv7_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 
/* And again. */
@@ -1120,7 +1114,6 @@ cortexa_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(cpuctrlmask, cpuctrl);
 
/* And again. */
@@ -1167,7 +1160,6 @@ fa526_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 }
 #endif /* CPU_FA526 */
@@ -1221,7 +1213,6 @@ xscale_setup(void)
 * Set the control register.  Note that bits 6:3 must always
 * be set to 1.
 */
-   ctrl = cpuctrl;
 /* cpu_control(cpuctrlmask, cpuctrl);*/
cpu_control(0x, cpuctrl);
 

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Thu Feb  4 12:06:06 2016(r295251)
+++ head/sys/arm/arm/identcpu.c Thu Feb  4 12:11:18 2016(r295252)
@@ -321,7 +321,6 @@ print_enadis(int enadis, char *s)
printf(" %s %sabled", s, (enadis == 0) ? "dis" : "en");
 }
 
-extern int ctrl;
 enum cpu_class cpu_class = CPU_CLASS_NONE;
 
 u_int cpu_pfr(int num)
@@ -388,9 +387,10 @@ void
 identify_arm_cpu(void)
 {
u_int cpuid, reg, size, sets, ways;
-   u_int8_t type, linesize;
+   u_int8_t type, linesize, ctrl;
int i;
 
+   ctrl = cpu_get_control();
cpuid = cpu_ident();
 
if (cpuid == 0) {

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Thu Feb  4 12:06:06 2016
(r295251)
+++ head/sys/arm/include/cpufunc.h  Thu Feb  4 12:11:18 2016
(r295252)
@@ -202,6 +202,7 @@ u_int   cpufunc_control (u_int clear, u_i
 void   cpu_domains (u_int domains);
 u_int  cpu_faultstatus (void);
 u_int  cpu_faultaddress(void);
+u_int  cpu_get_control (void);
 u_int  cpu_pfr (int);
 
 #if defined(CPU_FA526)
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svn commit: r295348 - head/sys/cddl/dev/fbt/arm

[Michal Meloun]

Author: mmel
Date: Sat Feb  6 11:16:15 2016
New Revision: 295348
URL: https://svnweb.freebsd.org/changeset/base/295348

Log:
  ARM: Rename remaining ARMv4 specific function in DTrace code.
  I missed it in r295319.
  
  Pointed by: tuexen

Modified:
  head/sys/cddl/dev/fbt/arm/fbt_isa.c

Modified: head/sys/cddl/dev/fbt/arm/fbt_isa.c
==
--- head/sys/cddl/dev/fbt/arm/fbt_isa.c Sat Feb  6 09:01:03 2016
(r295347)
+++ head/sys/cddl/dev/fbt/arm/fbt_isa.c Sat Feb  6 11:16:15 2016
(r295348)
@@ -83,7 +83,7 @@ fbt_patch_tracepoint(fbt_probe_t *fbt, f
 {
 
*fbt->fbtp_patchpoint = val;
-   cpu_icache_sync_range((vm_offset_t)fbt->fbtp_patchpoint, sizeof(val));
+   icache_sync((vm_offset_t)fbt->fbtp_patchpoint, sizeof(val));
 }
 
 int
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svn commit: r295319 - in head/sys: arm/allwinner/a20 arm/altera/socfpga arm/amlogic/aml8726 arm/arm arm/broadcom/bcm2835 arm/freescale/imx arm/include arm/mv/armada38x arm/mv/armadaxp arm/rockchip ...

[Michal Meloun]

Author: mmel
Date: Fri Feb  5 14:57:41 2016
New Revision: 295319
URL: https://svnweb.freebsd.org/changeset/base/295319

Log:
  ARM: Use new ARMv6 naming conventions for cache and TLB functions
  in all but ARMv4 specific files.
  Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
  in L2 cache functions if ARM_L2_PIPT is defined.

Modified:
  head/sys/arm/allwinner/a20/a20_mp.c
  head/sys/arm/altera/socfpga/socfpga_mp.c
  head/sys/arm/amlogic/aml8726/aml8726_mp.c
  head/sys/arm/arm/db_interface.c
  head/sys/arm/arm/dump_machdep.c
  head/sys/arm/arm/fiq.c
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/minidump_machdep.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/sys_machdep.c
  head/sys/arm/broadcom/bcm2835/bcm2836_mp.c
  head/sys/arm/freescale/imx/imx6_mp.c
  head/sys/arm/include/cpu-v4.h
  head/sys/arm/include/cpu-v6.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/kdb.h
  head/sys/arm/mv/armada38x/pmsu.c
  head/sys/arm/mv/armadaxp/armadaxp_mp.c
  head/sys/arm/rockchip/rk30xx_mp.c
  head/sys/arm/samsung/exynos/exynos5_mp.c
  head/sys/arm/ti/omap4/omap4_mp.c
  head/sys/arm/xilinx/zy7_mp.c
  head/sys/contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c

Modified: head/sys/arm/allwinner/a20/a20_mp.c
==
--- head/sys/arm/allwinner/a20/a20_mp.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/allwinner/a20/a20_mp.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -101,8 +102,7 @@ platform_mp_start_ap(void)
) != 0)
panic("Couldn't map the CPUCFG\n");
 
-   cpu_idcache_wbinv_all();
-   cpu_l2cache_wbinv_all();
+   dcache_wbinv_poc_all();
 
bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_P_REG0,
pmap_kextract((vm_offset_t)mpentry));

Modified: head/sys/arm/altera/socfpga/socfpga_mp.c
==
--- head/sys/arm/altera/socfpga/socfpga_mp.cFri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/altera/socfpga/socfpga_mp.cFri Feb  5 14:57:41 2016
(r295319)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -162,8 +163,7 @@ platform_mp_start_ap(void)
bus_space_write_region_4(fdtbus_bs_tag, ram, 0,
(uint32_t *)_trampoline, 8);
 
-   cpu_idcache_wbinv_all();
-   cpu_l2cache_wbinv_all();
+   dcache_wbinv_poc_all();
 
/* Put CPU1 out from reset */
bus_space_write_4(fdtbus_bs_tag, rst, MPUMODRST, 0);

Modified: head/sys/arm/amlogic/aml8726/aml8726_mp.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_mp.c   Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/amlogic/aml8726/aml8726_mp.c   Fri Feb  5 14:57:41 2016
(r295319)
@@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -485,7 +486,7 @@ platform_mp_start_ap(void)
value |= AML_SCU_CONTROL_ENABLE;
SCU_WRITE_4(AML_SCU_CONTROL_REG, value);
SCU_BARRIER(AML_SCU_CONTROL_REG);
-   cpu_idcache_wbinv_all();
+   dcache_wbinv_poc_all();
 
/* Set the boot address and power on each AP. */
paddr = pmap_kextract((vm_offset_t)mpentry);

Modified: head/sys/arm/arm/db_interface.c
==
--- head/sys/arm/arm/db_interface.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/arm/db_interface.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
 #include "opt_ddb.h"
 
 #include 
+#include 
 #include 
 #include 
 #include  /* just for boothowto */
@@ -53,9 +54,9 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
@@ -63,7 +64,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
-#include 
+
 
 static int nil = 0;
 
@@ -245,11 +246,10 @@ db_write_bytes(vm_offset_t addr, size_t 
}
 
/* make sure the caches and memory are in sync */
-   cpu_icache_sync_range(addr, size);
+   icache_sync(addr, size);
 
/* In case the current page tables have been modified ... */
-   cpu_tlb_flushID();
-   cpu_cpwait();
+   tlb_flush_all();
return (0);
 }
 

Modified: head/sys/arm/arm/dump_machdep.c
==
--- head/sys/arm/arm/dump_machdep.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/arm/dump_machdep.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -59,8 +59,7 @@ dumpsys_wbinv_all(void)
 * have already been stopped, and their flush/invalidate was done as
 * part of stopping.
 */
-   

Re: svn commit: r295254 - head/sys/arm/arm

[Michal Meloun]

Yep, I'm ready to review your patch.
Allow me one question in forward.
How this patch affects JTAG based debugging of kernel? Mainly if I start
kernel under JTAG debugger, with active breakpoints (or watchpoints).

Michal

Dne 04.02.2016 v 14:41 Zbigniew Bodek napsal(a):
> Hello Michal,
> 
> I have a fix for that that I will send for review soon (I need to test
> in on some other platforms):
> https://people.freebsd.org/~zbb/arm/other/0001-Fix-debug_monitor-code-for-older-ARMs-ARM11.patch
> <https://people.freebsd.org/%7Ezbb/arm/other/0001-Fix-debug_monitor-code-for-older-ARMs-ARM11.patch>
> 
> If you don't mind I will add you to the review on Phabricator.
> 
> Best regards
> zbb
> 
> 2016-02-04 14:32 GMT+01:00 Michal Meloun <m...@freebsd.org
> <mailto:m...@freebsd.org>>:
> 
> Author: mmel
> Date: Thu Feb  4 13:32:29 2016
> New Revision: 295254
> URL: https://svnweb.freebsd.org/changeset/base/295254
> 
> Log:
>   ARM: RPI-B kernel was broken by r294740. Make it functional again.
> 
> Modified:
>   head/sys/arm/arm/debug_monitor.c
> 
> Modified: head/sys/arm/arm/debug_monitor.c
> 
> ==
> --- head/sys/arm/arm/debug_monitor.cThu Feb  4 12:49:28 2016   
> (r295253)
> +++ head/sys/arm/arm/debug_monitor.cThu Feb  4 13:32:29 2016   
> (r295254)
> @@ -845,8 +845,10 @@ dbg_arch_supported(void)
>  {
> 
> switch (dbg_model) {
> +#ifdef not_yet
> case ID_DFR0_CP_DEBUG_M_V6:
> case ID_DFR0_CP_DEBUG_M_V6_1:
> +#endif
> case ID_DFR0_CP_DEBUG_M_V7:
> case ID_DFR0_CP_DEBUG_M_V7_1:   /* fall through */
> return (TRUE);
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svn commit: r295254 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 13:32:29 2016
New Revision: 295254
URL: https://svnweb.freebsd.org/changeset/base/295254

Log:
  ARM: RPI-B kernel was broken by r294740. Make it functional again.

Modified:
  head/sys/arm/arm/debug_monitor.c

Modified: head/sys/arm/arm/debug_monitor.c
==
--- head/sys/arm/arm/debug_monitor.cThu Feb  4 12:49:28 2016
(r295253)
+++ head/sys/arm/arm/debug_monitor.cThu Feb  4 13:32:29 2016
(r295254)
@@ -845,8 +845,10 @@ dbg_arch_supported(void)
 {
 
switch (dbg_model) {
+#ifdef not_yet
case ID_DFR0_CP_DEBUG_M_V6:
case ID_DFR0_CP_DEBUG_M_V6_1:
+#endif
case ID_DFR0_CP_DEBUG_M_V7:
case ID_DFR0_CP_DEBUG_M_V7_1:   /* fall through */
return (TRUE);
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svn commit: r295259 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 14:32:48 2016
New Revision: 295259
URL: https://svnweb.freebsd.org/changeset/base/295259

Log:
  ARM: For ARMv6/v7, code in locore.S initializes SCTLR and ACTRL registers.
  Don't duplicate this initialization in cpu_setup().

Modified:
  head/sys/arm/arm/cpufunc.c

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Thu Feb  4 14:30:46 2016(r295258)
+++ head/sys/arm/arm/cpufunc.c  Thu Feb  4 14:32:48 2016(r295259)
@@ -966,47 +966,12 @@ cpu_scc_setup_ccnt(void)
 void
 arm11x6_setup(void)
 {
-   int cpuctrl, cpuctrl_wax;
uint32_t auxctrl, auxctrl_wax;
uint32_t tmp, tmp2;
-   uint32_t sbz=0;
uint32_t cpuid;
 
cpuid = cpu_ident();
 
-   cpuctrl =
-   CPU_CONTROL_MMU_ENABLE  |
-   CPU_CONTROL_DC_ENABLE   |
-   CPU_CONTROL_WBUF_ENABLE |
-   CPU_CONTROL_32BP_ENABLE |
-   CPU_CONTROL_32BD_ENABLE |
-   CPU_CONTROL_LABT_ENABLE |
-   CPU_CONTROL_SYST_ENABLE |
-   CPU_CONTROL_IC_ENABLE   |
-   CPU_CONTROL_UNAL_ENABLE;
-
-   /*
-* "write as existing" bits
-* inverse of this is mask
-*/
-   cpuctrl_wax =
-   (3 << 30) | /* SBZ */
-   (1 << 29) | /* FA */
-   (1 << 28) | /* TR */
-   (3 << 26) | /* SBZ */
-   (3 << 19) | /* SBZ */
-   (1 << 17);  /* SBZ */
-
-   cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
-   cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
-
-#ifdef __ARMEB__
-   cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-
auxctrl = 0;
auxctrl_wax = ~0;
 
@@ -1018,18 +983,6 @@ arm11x6_setup(void)
auxctrl_wax = ~ARM1176_AUXCTL_PHD;
}
 
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Now really make sure they are clean.  */
-   __asm volatile ("mcr\tp15, 0, %0, c7, c7, 0" : : "r"(sbz));
-
-   /* Allow detection code to find the VFP if it's fitted.  */
-   cp15_cpacr_set(0x0fff);
-
-   /* Set the control register */
-   cpu_control(~cpuctrl_wax, cpuctrl);
-
tmp = cp15_actlr_get();
tmp2 = tmp;
tmp &= auxctrl_wax;
@@ -1037,9 +990,6 @@ arm11x6_setup(void)
if (tmp != tmp2)
cp15_actlr_set(tmp);
 
-   /* And again. */
-   cpu_idcache_wbinv_all();
-
cpu_scc_setup_ccnt();
 }
 #endif  /* CPU_ARM1176 */
@@ -1048,32 +998,8 @@ arm11x6_setup(void)
 void
 pj4bv7_setup(void)
 {
-   int cpuctrl;
 
pj4b_config();
-
-   cpuctrl = CPU_CONTROL_MMU_ENABLE;
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
-   cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-   cpuctrl |= CPU_CONTROL_DC_ENABLE;
-   cpuctrl |= (0xf << 3);
-   cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
-   cpuctrl |= CPU_CONTROL_IC_ENABLE;
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-   cpuctrl |= (0x5 << 16) | (1 < 22);
-   cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
-
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Set the control register */
-   cpu_control(0x, cpuctrl);
-
-   /* And again. */
-   cpu_idcache_wbinv_all();
-
cpu_scc_setup_ccnt();
 }
 #endif /* CPU_MV_PJ4B */
@@ -1083,44 +1009,6 @@ pj4bv7_setup(void)
 void
 cortexa_setup(void)
 {
-   int cpuctrl, cpuctrlmask;
-
-   cpuctrlmask = CPU_CONTROL_MMU_ENABLE | /* MMU enable [0] */
-   CPU_CONTROL_AFLT_ENABLE |/* Alignment fault[1] */
-   CPU_CONTROL_DC_ENABLE |  /* DCache enable  [2] */
-   CPU_CONTROL_BPRD_ENABLE |/* Branch prediction [11] */
-   CPU_CONTROL_IC_ENABLE |  /* ICache enable [12] */
-   CPU_CONTROL_VECRELOC;/* Vector relocation [13] */
-
-   cpuctrl = CPU_CONTROL_MMU_ENABLE |
-   CPU_CONTROL_IC_ENABLE |
-   CPU_CONTROL_DC_ENABLE |
-   CPU_CONTROL_BPRD_ENABLE;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
-   cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
-   /* Switch to big endian */
-#ifdef __ARMEB__
-   cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
-   /* Check if the vector page is at the high address (0x) */
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Set the control register */
-   cpu_control(cpuctrlmask, cpuctrl);
-
-   /* And again. */
-   cpu_idcache_wbinv_all();
-#if defined(SMP) && !defined(ARM_NEW_PMAP)
-   armv7_auxctrl((1 << 6) | (1 << 0), (1 << 6) | (1 << 0)); /* Enable SMP 
+ TLB broadcasting  */
-#endif
 
cpu_scc_setup_ccnt();
 }

svn commit: r295267 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 17:01:38 2016
New Revision: 295267
URL: https://svnweb.freebsd.org/changeset/base/295267

Log:
  Replace broken implementation of fuswintr() and suswintr() by functions
  which return -1 as well as on tier 1 archs. Remove block_userspace_access
  used only in these implementations.
  
  (1) These functions may be called in interrupt context and pcb_onfault
  can be already set in this time. Thus, prior pcb_onfault must be saved
  and restored afterwards.
  
  (2) The check that an abort came either from nested interrupt or while
  in critical section or holding not sleepable lock must be avoided for
  this case.
  
  These functions are called only for profiling reason, so there will be
  only small gain by making the code more complex.

Modified:
  head/sys/arm/arm/cpufunc_asm_xscale.S
  head/sys/arm/arm/cpufunc_asm_xscale_c3.S
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/arm/fusu.S
  head/sys/arm/arm/trap-v6.c
  head/sys/arm/arm/trap.c

Modified: head/sys/arm/arm/cpufunc_asm_xscale.S
==
--- head/sys/arm/arm/cpufunc_asm_xscale.S   Thu Feb  4 16:38:24 2016
(r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale.S   Thu Feb  4 17:01:38 2016
(r295267)
@@ -80,9 +80,6 @@ __FBSDID("$FreeBSD$");
  */
 #defineDCACHE_SIZE 0x8000
 
-.Lblock_userspace_access:
-   .word   _C_LABEL(block_userspace_access)
-
 /*
  * CPWAIT -- Canonical method to wait for CP15 update.
  * From: Intel 80200 manual, section 2.3.3.
@@ -137,11 +134,6 @@ ENTRY(xscale_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
-   ldr r3, .Lblock_userspace_access
-   ldr r2, [r3]
-   orr r1, r2, #1
-   str r1, [r3]
 #endif
stmfd   sp!, {r0-r3, lr}
bl  _C_LABEL(xscale_cache_cleanID)
@@ -165,8 +157,6 @@ ENTRY(xscale_setttb)
 
 #ifdef CACHE_CLEAN_BLOCK_INTR
msr cpsr_fsxc, r3
-#else
-   str r2, [r3]
 #endif
RET
 END(xscale_setttb)
@@ -273,14 +263,9 @@ _C_LABEL(xscale_minidata_clean_size):
 #defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
msr cpsr_fsxc, r3
 #else
-#defineXSCALE_CACHE_CLEAN_BLOCK
\
-   ldr r3, .Lblock_userspace_access;   \
-   ldr ip, [r3];   \
-   orr r0, ip, #1  ;   \
-   str r0, [r3]
+#defineXSCALE_CACHE_CLEAN_BLOCK
 
-#defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
-   str ip, [r3]
+#defineXSCALE_CACHE_CLEAN_UNBLOCK
 #endif /* CACHE_CLEAN_BLOCK_INTR */
 
 #defineXSCALE_CACHE_CLEAN_PROLOGUE 
\

Modified: head/sys/arm/arm/cpufunc_asm_xscale_c3.S
==
--- head/sys/arm/arm/cpufunc_asm_xscale_c3.SThu Feb  4 16:38:24 2016
(r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale_c3.SThu Feb  4 17:01:38 2016
(r295267)
@@ -82,9 +82,6 @@ __FBSDID("$FreeBSD$");
  */
 #defineDCACHE_SIZE 0x8000
 
-.Lblock_userspace_access:
-   .word   _C_LABEL(block_userspace_access)
-
 /*
  * CPWAIT -- Canonical method to wait for CP15 update.
  * From: Intel 80200 manual, section 2.3.3.
@@ -130,16 +127,8 @@ __FBSDID("$FreeBSD$");
msr cpsr_fsxc, r4   ;   \
ldmfd   sp!, {r4}
 #else
-#defineXSCALE_CACHE_CLEAN_BLOCK
\
-   stmfd   sp!, {r4}   ;   \
-   ldr r4, .Lblock_userspace_access;   \
-   ldr ip, [r4];   \
-   orr r0, ip, #1  ;   \
-   str r0, [r4]
-
-#defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
-   str ip, [r3];   \
-   ldmfd   sp!, {r4}
+#defineXSCALE_CACHE_CLEAN_BLOCK
+#defineXSCALE_CACHE_CLEAN_UNBLOCK
 #endif /* CACHE_CLEAN_BLOCK_INTR */
 
 
@@ -352,11 +341,6 @@ ENTRY(xscalec3_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
-   ldr r3, .Lblock_userspace_access
-   ldr r2, [r3]
-   orr r1, r2, #1
-   str r1, [r3]
 #endif
stmfd   sp!, {r0-r3, lr}
bl  _C_LABEL(xscalec3_cache_cleanID)

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Thu Feb  4 16:38:24 2016
(r295266)
+++ 

svn commit: r295256 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 14:02:42 2016
New Revision: 295256
URL: https://svnweb.freebsd.org/changeset/base/295256

Log:
  ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP
  for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
  This bit have no effect until unaligned access is enabled.

Modified:
  head/sys/arm/arm/locore-v6.S

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.SThu Feb  4 13:35:40 2016
(r295255)
+++ head/sys/arm/arm/locore-v6.SThu Feb  4 14:02:42 2016
(r295256)
@@ -132,9 +132,9 @@ ASENTRY_NP(_start)
bic r7, #CPU_CONTROL_DC_ENABLE
bic r7, #CPU_CONTROL_MMU_ENABLE
bic r7, #CPU_CONTROL_IC_ENABLE
-   bic r7, #CPU_CONTROL_UNAL_ENABLE
bic r7, #CPU_CONTROL_BPRD_ENABLE
bic r7, #CPU_CONTROL_SW_ENABLE
+   orr r7, #CPU_CONTROL_UNAL_ENABLE
orr r7, #CPU_CONTROL_AFLT_ENABLE
orr r7, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r7)
@@ -456,9 +456,9 @@ ASENTRY_NP(mpentry)
bic r0, #CPU_CONTROL_MMU_ENABLE
bic r0, #CPU_CONTROL_DC_ENABLE
bic r0, #CPU_CONTROL_IC_ENABLE
-   bic r0, #CPU_CONTROL_UNAL_ENABLE
bic r0, #CPU_CONTROL_BPRD_ENABLE
bic r0, #CPU_CONTROL_SW_ENABLE
+   orr r0, #CPU_CONTROL_UNAL_ENABLE
orr r0, #CPU_CONTROL_AFLT_ENABLE
orr r0, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r0)
___
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svn commit: r295557 - head/sys/dev/uart

[Michal Meloun]

Author: mmel
Date: Fri Feb 12 05:14:58 2016
New Revision: 295557
URL: https://svnweb.freebsd.org/changeset/base/295557

Log:
  UART: Fix spurious interrupts generated by ns8250 and lpc drivers:
   - don't enable transmitter empty interrupt before filling TX FIFO.
   - add missing uart_barrier() call in interrupt service routine

Modified:
  head/sys/dev/uart/uart_dev_lpc.c
  head/sys/dev/uart/uart_dev_ns8250.c

Modified: head/sys/dev/uart/uart_dev_lpc.c
==
--- head/sys/dev/uart/uart_dev_lpc.cFri Feb 12 02:53:44 2016
(r295556)
+++ head/sys/dev/uart/uart_dev_lpc.cFri Feb 12 05:14:58 2016
(r295557)
@@ -659,6 +659,7 @@ lpc_ns8250_bus_ipend(struct uart_softc *
if (iir & IIR_TXRDY) {
ipend |= SER_INT_TXIDLE;
uart_setreg(bas, REG_IER, lpc_ns8250->ier);
+   uart_barrier(bas);
} else
ipend |= SER_INT_SIGCHG;
}
@@ -892,12 +893,12 @@ lpc_ns8250_bus_transmit(struct uart_soft
uart_lock(sc->sc_hwmtx);
while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
;
-   uart_setreg(bas, REG_IER, lpc_ns8250->ier | IER_ETXRDY);
-   uart_barrier(bas);
for (i = 0; i < sc->sc_txdatasz; i++) {
uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
uart_barrier(bas);
}
+   uart_setreg(bas, REG_IER, lpc_ns8250->ier | IER_ETXRDY);
+   uart_barrier(bas);
sc->sc_txbusy = 1;
uart_unlock(sc->sc_hwmtx);
return (0);

Modified: head/sys/dev/uart/uart_dev_ns8250.c
==
--- head/sys/dev/uart/uart_dev_ns8250.c Fri Feb 12 02:53:44 2016
(r295556)
+++ head/sys/dev/uart/uart_dev_ns8250.c Fri Feb 12 05:14:58 2016
(r295557)
@@ -708,6 +708,7 @@ ns8250_bus_ipend(struct uart_softc *sc)
if (iir & IIR_TXRDY) {
ipend |= SER_INT_TXIDLE;
uart_setreg(bas, REG_IER, ns8250->ier);
+   uart_barrier(bas);
} else
ipend |= SER_INT_SIGCHG;
}
@@ -979,12 +980,12 @@ ns8250_bus_transmit(struct uart_softc *s
uart_lock(sc->sc_hwmtx);
while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
;
-   uart_setreg(bas, REG_IER, ns8250->ier | IER_ETXRDY);
-   uart_barrier(bas);
for (i = 0; i < sc->sc_txdatasz; i++) {
uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
uart_barrier(bas);
}
+   uart_setreg(bas, REG_IER, ns8250->ier | IER_ETXRDY);
+   uart_barrier(bas);
if (broken_txfifo)
ns8250_drain(bas, UART_DRAIN_TRANSMITTER);
else
___
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svn commit: r295037 - in head/sys: arm/arm conf

[Michal Meloun]

Author: mmel
Date: Fri Jan 29 11:00:33 2016
New Revision: 295037
URL: https://svnweb.freebsd.org/changeset/base/295037

Log:
  ARM: After removal of old pmap-v6 code, rename pmap-v6-new.c to pmap-v6.c.

Added:
  head/sys/arm/arm/pmap-v6.c
 - copied unchanged from r295036, head/sys/arm/arm/pmap-v6-new.c
Deleted:
  head/sys/arm/arm/pmap-v6-new.c
Modified:
  head/sys/conf/files.arm

Copied: head/sys/arm/arm/pmap-v6.c (from r295036, 
head/sys/arm/arm/pmap-v6-new.c)
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/arm/pmap-v6.c  Fri Jan 29 11:00:33 2016(r295037, copy 
of r295036, head/sys/arm/arm/pmap-v6-new.c)
@@ -0,0 +1,6634 @@
+/*-
+ * Copyright (c) 1991 Regents of the University of California.
+ * Copyright (c) 1994 John S. Dyson
+ * Copyright (c) 1994 David Greenman
+ * Copyright (c) 2005-2010 Alan L. Cox <a...@cs.rice.edu>
+ * Copyright (c) 2014 Svatopluk Kraus <onw...@gmail.com>
+ * Copyright (c) 2014 Michal Meloun <mel...@miracle.cz>
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and William Jolitz of UUNET Technologies Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *may be used to endorse or promote products derived from this software
+ *without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from:   @(#)pmap.c  7.7 (Berkeley)  5/12/91
+ */
+/*-
+ * Copyright (c) 2003 Networks Associates Technology, Inc.
+ * All rights reserved.
+ *
+ * This software was developed for the FreeBSD Project by Jake Burkholder,
+ * Safeport Network Services, and Network Associates Laboratories, the
+ * Security Research Division of Network Associates, Inc. under
+ * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
+ * CHATS research program.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+/*
+ * Manages physical address maps.
+ *
+ * Since the information managed by this module is
+ * also stored by the logical address mapping module,
+ * this module may throw away valid virtual-to-physical
+ * mappings at almost any time.  However, invalidations
+ * of vir

svn commit: r295036 - in head/sys: arm/arm arm/conf arm/include conf

[Michal Meloun]

Author: mmel
Date: Fri Jan 29 10:31:54 2016
New Revision: 295036
URL: https://svnweb.freebsd.org/changeset/base/295036

Log:
  ARM: remove old pmap-v6 code. The new pmap-v6 is mature enough, and
  dual implementation is showstopper for major cleanup.
  
  This patch only removes old code from tree. Cleanups will follow asap.

Deleted:
  head/sys/arm/arm/pmap-v6.c
Modified:
  head/sys/arm/arm/genassym.c
  head/sys/arm/arm/locore-v6.S
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/mem.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/swtch.S
  head/sys/arm/arm/trap-v6.c
  head/sys/arm/conf/std.armv6
  head/sys/arm/include/machdep.h
  head/sys/arm/include/pmap.h
  head/sys/arm/include/pte.h
  head/sys/arm/include/sf_buf.h
  head/sys/arm/include/vm.h
  head/sys/conf/files.arm
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/genassym.c
==
--- head/sys/arm/arm/genassym.c Fri Jan 29 09:16:08 2016(r295035)
+++ head/sys/arm/arm/genassym.c Fri Jan 29 10:31:54 2016(r295036)
@@ -61,16 +61,16 @@ __FBSDID("$FreeBSD$");
 
 ASSYM(KERNBASE, KERNBASE);
 ASSYM(PCB_NOALIGNFLT, PCB_NOALIGNFLT);
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
 #endif
 ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
 #endif
 ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
 ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
 ASSYM(PCB_PL1VEC, offsetof(struct pcb, pcb_pl1vec));
 #endif

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.SFri Jan 29 09:16:08 2016
(r295035)
+++ head/sys/arm/arm/locore-v6.SFri Jan 29 10:31:54 2016
(r295036)
@@ -30,6 +30,7 @@
 
 #include "assym.s"
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -39,11 +40,6 @@
 
 __FBSDID("$FreeBSD$");
 
-#ifndef ARM_NEW_PMAP
-#definePTE1_OFFSET L1_S_OFFSET
-#definePTE1_SHIFT  L1_S_SHIFT
-#definePTE1_SIZE   L1_S_SIZE
-#endif
 
 #if __ARM_ARCH >= 7
 #if defined(__ARM_ARCH_7VE__) || defined(__clang__)
@@ -287,7 +283,6 @@ ASENTRY_NP(init_mmu)
mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
mcr CP15_DACR(r0)
 
-#ifdef ARM_NEW_PMAP
/*
 * Set TEX remap registers
 *  - All is set to uncacheable memory
@@ -296,7 +291,6 @@ ASENTRY_NP(init_mmu)
mcr CP15_PRRR(r0)
mov r0, #0
mcr CP15_NMRR(r0)
-#endif
mcr CP15_TLBIALL/* Flush TLB */
DSB
ISB
@@ -305,9 +299,7 @@ ASENTRY_NP(init_mmu)
mrc CP15_SCTLR(r0)
orr r0, r0, #CPU_CONTROL_MMU_ENABLE
orr r0, r0, #CPU_CONTROL_V6_EXTPAGE
-#ifdef ARM_NEW_PMAP
orr r0, r0, #CPU_CONTROL_TR_ENABLE
-#endif
orr r0, r0, #CPU_CONTROL_AF_ENABLE
mcr CP15_SCTLR(r0)
DSB
@@ -398,23 +390,11 @@ END(reinit_mmu)
  * Addresses must be 1MiB aligned
  */
 build_device_pagetables:
-#if defined(ARM_NEW_PMAP)
ldr r4, =PTE1_V|PTE1_A|PTE1_AP_KRW|TEX1_CLASS_0
-#elif defined(SMP)
-   ldr r4, =(L1_TYPE_S|L1_S_AP(AP_KRW)|L1_SHARED)
-#else
-   ldr r4, =(L1_TYPE_S|L1_S_AP(AP_KRW))
-#endif
b   1f
 build_pagetables:
/* Set the required page attributed */
-#if defined(ARM_NEW_PMAP)
ldr r4, =PTE1_V|PTE1_A|PTE1_AP_KRW|TEX1_CLASS_0
-#elif defined(SMP)
-   ldr r4, =(L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)|L1_SHARED)
-#else
-   ldr r4, =(L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-#endif
 1:
orr r1, r4
 

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Fri Jan 29 09:16:08 2016(r295035)
+++ head/sys/arm/arm/machdep.c  Fri Jan 29 10:31:54 2016(r295036)
@@ -199,7 +199,7 @@ static char *loader_envp;
 
 vm_paddr_t pmap_pa;
 
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 vm_offset_t systempage;
 vm_offset_t irqstack;
 vm_offset_t undstack;
@@ -456,7 +456,7 @@ cpu_startup(void *dummy)
pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
USPACE_SVC_STACK_TOP;
pmap_set_pcb_pagedir(pmap_kernel(), pcb);
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH  < 6
vector_page_setprot(VM_PROT_READ);
pmap_postinit();
 #endif
@@ -1283,7 +1283,7 @@ arm_predict_branch(void *cookie, u_int i
}
 }
 
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 void
 set_stackptrs(int cpu)
 {
@@ -1447,7 +1447,7 @@ print_kenv(void)
debugf(" %x %s\n", (uint32_t)cp, cp);
 }
 
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 void *
 initarm(struct arm_boot_params *abp)
 {
@@ -1717,7 +1717,7 @@ 

svn commit: r295097 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 16:55:52 2016
New Revision: 295097
URL: https://svnweb.freebsd.org/changeset/base/295097

Log:
  ARM: Fix END() symbol for cpu_ident function. I forgot to rename it
  in r295096.

Modified:
  head/sys/arm/arm/cpufunc_asm.S

Modified: head/sys/arm/arm/cpufunc_asm.S
==
--- head/sys/arm/arm/cpufunc_asm.S  Sun Jan 31 16:34:06 2016
(r295096)
+++ head/sys/arm/arm/cpufunc_asm.S  Sun Jan 31 16:55:52 2016
(r295097)
@@ -65,7 +65,7 @@ END(cpufunc_nullop)
 ENTRY(cpu_ident)
mrc p15, 0, r0, c0, c0, 0
RET
-END(cpufunc_id)
+END(cpu_ident)
 
 ENTRY(cpu_get_control)
mrc p15, 0, r0, c1, c0, 0
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svn commit: r295122 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Mon Feb  1 13:13:53 2016
New Revision: 295122
URL: https://svnweb.freebsd.org/changeset/base/295122

Log:
  ARM: Remove never used cpu_tlb_flushI and cpu_tlb_flushI_SE() functions
  and their implementations.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_arm10.S
  head/sys/arm/arm/cpufunc_asm_arm11.S
  head/sys/arm/arm/cpufunc_asm_armv4.S
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Mon Feb  1 08:06:17 2016(r295121)
+++ head/sys/arm/arm/cpufunc.c  Mon Feb  1 13:13:53 2016(r295122)
@@ -116,8 +116,6 @@ struct cpu_functions arm9_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -171,8 +169,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   arm10_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -280,8 +276,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
armv7_tlb_flushID,  /* tlb_flushID  */
armv7_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv7_tlb_flushID,  /* tlb_flushI   */
-   armv7_tlb_flushID_SE,   /* tlb_flushI_SE*/
armv7_tlb_flushID,  /* tlb_flushD   */
armv7_tlb_flushID_SE,   /* tlb_flushD_SE*/
 
@@ -336,8 +330,6 @@ struct cpu_functions xscale_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
xscale_tlb_flushID_SE,  /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -392,8 +384,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
armv4_tlb_flushID,  /* tlb_flushID  */
xscale_tlb_flushID_SE,  /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -447,8 +437,6 @@ struct cpu_functions fa526_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
fa526_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   fa526_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -502,8 +490,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
arm11_tlb_flushID,  /* tlb_flushID  */
arm11_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   arm11_tlb_flushI,   /* tlb_flushI   */
-   arm11_tlb_flushI_SE,/* tlb_flushI_SE*/
arm11_tlb_flushD,   /* tlb_flushD   */
arm11_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -561,8 +547,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
armv7_tlb_flushID,  /* tlb_flushID  */
armv7_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv7_tlb_flushID,  /* tlb_flushI   */
-   armv7_tlb_flushID_SE,   /* tlb_flushI_SE*/
armv7_tlb_flushID,  /* tlb_flushD   */
armv7_tlb_flushID_SE,   /* tlb_flushD_SE*/
 

Modified: head/sys/arm/arm/cpufunc_asm_arm10.S
==
--- head/sys/arm/arm/cpufunc_asm_arm10.SMon Feb  1 08:06:17 2016
(r295121)
+++ head/sys/arm/arm/cpufunc_asm_arm10.SMon Feb  1 13:13:53 2016
(r295122)
@@ -44,11 +44,6 @@ ENTRY(arm10_tlb_flushID_SE)
bx  lr
 END(arm10_tlb_flushID_SE)
 
-ENTRY(arm10_tlb_flushI_SE)
-   mcr p15, 0, r0, c8, c5, 1   /* flush I tlb single entry */
-   bx  lr

svn commit: r295201 - head/sys/arm/xscale/i8134x

[Michal Meloun]

Author: mmel
Date: Wed Feb  3 10:39:29 2016
New Revision: 295201
URL: https://svnweb.freebsd.org/changeset/base/295201

Log:
  ARM: Remove C++ comments erroneously committed  in r295200.

Modified:
  head/sys/arm/xscale/i8134x/i80321reg.h

Modified: head/sys/arm/xscale/i8134x/i80321reg.h
==
--- head/sys/arm/xscale/i8134x/i80321reg.h  Wed Feb  3 09:15:44 2016
(r295200)
+++ head/sys/arm/xscale/i8134x/i80321reg.h  Wed Feb  3 10:39:29 2016
(r295201)
@@ -331,12 +331,12 @@
 #defineICU_INT_bit26   26
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_SSP 25  /* SSP serial port */
+#defineICU_INT_SSP 25  /* SSP serial port */
 
 #defineICU_INT_MUE 24  /* msg unit error */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_AAUE23  /* AAU error */
+#defineICU_INT_AAUE23  /* AAU error */
 
 #defineICU_INT_bit22   22
 #defineICU_INT_DMA1E   21  /* DMA Ch 1 error */
@@ -355,8 +355,8 @@
 #defineICU_INT_CPPM8   /* core processor PMU */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_AAU_EOC 7   /* AAU end-of-chain */
-//#define  ICU_INT_AAU_EOT 6   /* AAU end-of-transfer */
+#defineICU_INT_AAU_EOC 7   /* AAU end-of-chain */
+#defineICU_INT_AAU_EOT 6   /* AAU end-of-transfer */
 
 #defineICU_INT_bit55
 #defineICU_INT_bit44
@@ -366,11 +366,11 @@
 #defineICU_INT_DMA0_EOT0   /* DMA0 end-of-transfer */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_HWMASK  (0x & \
-// ~((1 << ICU_INT_bit26) | \
-//   (1 << ICU_INT_bit22) | \
-//   (1 << ICU_INT_bit5)  | \
-//   (1 << ICU_INT_bit4)))
+#defineICU_INT_HWMASK  (0x & \
+   ~((1 << ICU_INT_bit26) | \
+ (1 << ICU_INT_bit22) | \
+ (1 << ICU_INT_bit5)  | \
+ (1 << ICU_INT_bit4)))
 
 /*
  * Peripheral Bus Interface Unit
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svn commit: r295198 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Wed Feb  3 08:12:21 2016
New Revision: 295198
URL: https://svnweb.freebsd.org/changeset/base/295198

Log:
  ARM: acle-compat.h is arm specific header, don't include it for aarch64. This
  fixes aarch64 buildkernel.

Modified:
  head/sys/arm/arm/devmap.c

Modified: head/sys/arm/arm/devmap.c
==
--- head/sys/arm/arm/devmap.c   Wed Feb  3 04:02:50 2016(r295197)
+++ head/sys/arm/arm/devmap.c   Wed Feb  3 08:12:21 2016(r295198)
@@ -40,7 +40,9 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#ifdef __arm__
 #include 
+#endif
 #include 
 #include 
 #include 
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svn commit: r295200 - in head/sys: arm/arm arm/conf arm/include arm/xscale/i80321 arm/xscale/i8134x conf

[Michal Meloun]

Author: mmel
Date: Wed Feb  3 09:15:44 2016
New Revision: 295200
URL: https://svnweb.freebsd.org/changeset/base/295200

Log:
  ARM: Remove support for xscale i80219 and i80321 CPUs. We haven't single
  supported config/board with these CPUs.

Deleted:
  head/sys/arm/xscale/i80321/
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/conf/NOTES
  head/sys/arm/include/cpuconf.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/xscale/i8134x/i80321reg.h
  head/sys/conf/files.arm
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Wed Feb  3 08:59:12 2016(r295199)
+++ head/sys/arm/arm/cpufunc.c  Wed Feb  3 09:15:44 2016(r295200)
@@ -60,18 +60,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219)
-#include 
-#include 
-#endif
-
-/*
- * Some definitions in i81342reg.h clash with i80321reg.h.
- * This only happens for the LINT kernel. As it happens,
- * we don't need anything from i81342reg.h that we already
- * got from somewhere else during a LINT compile.
- */
-#if defined(CPU_XSCALE_81342) && !defined(COMPILING_LINT)
+#if defined(CPU_XSCALE_81342)
 #include 
 #endif
 
@@ -306,9 +295,7 @@ struct cpu_functions pj4bv7_cpufuncs = {
 };
 #endif /* CPU_MV_PJ4B */
 
-#if defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
-  defined(CPU_XSCALE_80219)
+#if defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
 
 struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
@@ -359,8 +346,7 @@ struct cpu_functions xscale_cpufuncs = {
xscale_setup/* cpu setup*/
 };
 #endif
-/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
-   CPU_XSCALE_80219 */
+/* CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
 
 #ifdef CPU_XSCALE_81342
 struct cpu_functions xscalec3_cpufuncs = {
@@ -588,10 +574,10 @@ u_int cpu_reset_needs_v4_MMU_disable; /*
 
 #if defined(CPU_ARM9) ||   \
   defined (CPU_ARM9E) ||   \
-  defined(CPU_ARM1176) || defined(CPU_XSCALE_80321) || \
+  defined(CPU_ARM1176) ||  \
   defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||  \
   defined(CPU_FA526) || defined(CPU_MV_PJ4B) ||\
-  defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
+  defined(CPU_XSCALE_81342) || \
   defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 
 /* Global cache line sizes, use 32 as default */
@@ -829,18 +815,6 @@ set_cpufuncs()
}
 #endif /* CPU_FA526 */
 
-#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219)
-   if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 ||
-   cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0 ||
-   cputype == CPU_ID_80219_400 || cputype == CPU_ID_80219_600) {
-   cpufuncs = xscale_cpufuncs;
-   cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
-   get_cachetype_cp15();
-   pmap_pte_init_xscale();
-   goto out;
-   }
-#endif /* CPU_XSCALE_80321 */
-
 #if defined(CPU_XSCALE_81342)
if (cputype == CPU_ID_81342) {
cpufuncs = xscalec3_cpufuncs;
@@ -1207,9 +1181,8 @@ fa526_setup(void)
 }
 #endif /* CPU_FA526 */
 
-#if defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
-  defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
+#if defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
+  defined(CPU_XSCALE_81342)
 void
 xscale_setup(void)
 {
@@ -1276,5 +1249,4 @@ xscale_setup(void)
__asm __volatile("mcr p15, 0, %0, c1, c0, 1"
: : "r" (auxctl));
 }
-#endif /* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
-  CPU_XSCALE_80219 */
+#endif /* CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Wed Feb  3 08:59:12 2016
(r295199)
+++ head/sys/arm/arm/elf_trampoline.c   Wed Feb  3 09:15:44 2016
(r295200)
@@ -67,9 +67,7 @@ extern void fa526_idcache_wbinv_all(void
 extern void armv5_ec_idcache_wbinv_all(void);
 #elif defined(CPU_ARM1176)
 #define cpu_idcache_wbinv_all  armv6_idcache_wbinv_all
-#elif defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||  \
-  defined(CPU_XSCALE_80219)
+#elif defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
 #define cpu_idcache_wbinv_all  xscale_cache_purgeID
 extern void xscale_cache_purgeID(void);
 #elif defined(CPU_XSCALE_81342)

Modified: head/sys/arm/conf/NOTES
==
--- head/sys/arm/conf/NOTES Wed Feb  3 08:59:12 2016(r295199)
+++ 

svn commit: r295213 - in head/sys/arm: arm at91 cavium/cns11xx include xscale/i8134x xscale/ixp425 xscale/pxa

[Michal Meloun]

Author: mmel
Date: Wed Feb  3 16:44:06 2016
New Revision: 295213
URL: https://svnweb.freebsd.org/changeset/base/295213

Log:
  ARM: Consistently use cpu_setttb() instead of setttb().
  Remove unused #define for drain_writebuf.

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/arm/at91/at91_machdep.c
  head/sys/arm/cavium/cns11xx/econa_machdep.c
  head/sys/arm/include/cpufunc.h
  head/sys/arm/xscale/i8134x/crb_machdep.c
  head/sys/arm/xscale/ixp425/avila_machdep.c
  head/sys/arm/xscale/pxa/pxa_machdep.c

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Wed Feb  3 15:45:13 2016(r295212)
+++ head/sys/arm/arm/machdep.c  Wed Feb  3 16:44:06 2016(r295213)
@@ -1622,7 +1622,7 @@ initarm(struct arm_boot_params *abp)
 
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 
DOMAIN_CLIENT);
pmap_pa = kernel_l1pt.pv_pa;
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
 
@@ -1675,7 +1675,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.
@@ -1867,7 +1867,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/at91/at91_machdep.c
==
--- head/sys/arm/at91/at91_machdep.cWed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/at91/at91_machdep.cWed Feb  3 16:44:06 2016
(r295213)
@@ -566,7 +566,7 @@ initarm(struct arm_boot_params *abp)
 
arm_devmap_bootstrap(l1pagetable, at91_devmap);
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 
DOMAIN_CLIENT);
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
 
@@ -612,7 +612,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/cavium/cns11xx/econa_machdep.c
==
--- head/sys/arm/cavium/cns11xx/econa_machdep.c Wed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/cavium/cns11xx/econa_machdep.c Wed Feb  3 16:44:06 2016
(r295213)
@@ -275,7 +275,7 @@ initarm(struct arm_boot_params *abp)
 
arm_devmap_bootstrap(l1pagetable, econa_devmap);
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
cninit();
@@ -297,7 +297,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Wed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/include/cpufunc.h  Wed Feb  3 16:44:06 2016
(r295213)
@@ -412,9 +412,6 @@ voidxscalec3_context_switch (void);
 
 

svn commit: r295235 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Feb  4 06:39:20 2016
New Revision: 295235
URL: https://svnweb.freebsd.org/changeset/base/295235

Log:
  ARM: Remove unused symbols from genassym.c.

Modified:
  head/sys/arm/arm/genassym.c

Modified: head/sys/arm/arm/genassym.c
==
--- head/sys/arm/arm/genassym.c Thu Feb  4 05:03:35 2016(r295234)
+++ head/sys/arm/arm/genassym.c Thu Feb  4 06:39:20 2016(r295235)
@@ -59,7 +59,6 @@ __FBSDID("$FreeBSD$");
 #include 
 
 ASSYM(KERNBASE, KERNBASE);
-ASSYM(PCB_NOALIGNFLT, PCB_NOALIGNFLT);
 #if __ARM_ARCH >= 6
 ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
 #endif
@@ -67,7 +66,6 @@ ASSYM(PCB_ONFAULT, offsetof(struct pcb, 
 #if __ARM_ARCH < 6
 ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
 #endif
-ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
 ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
 #if __ARM_ARCH < 6
 ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
@@ -93,23 +91,15 @@ ASSYM(M_DATA, offsetof(struct mbuf, m_da
 ASSYM(M_NEXT, offsetof(struct mbuf, m_next));
 ASSYM(IP_SRC, offsetof(struct ip, ip_src));
 ASSYM(IP_DST, offsetof(struct ip, ip_dst));
-ASSYM(CF_SETTTB, offsetof(struct cpu_functions, cf_setttb));
-ASSYM(CF_CONTROL, offsetof(struct cpu_functions, cf_control));
 ASSYM(CF_CONTEXT_SWITCH, offsetof(struct cpu_functions, cf_context_switch));
 ASSYM(CF_DCACHE_WB_RANGE, offsetof(struct cpu_functions, cf_dcache_wb_range));
-ASSYM(CF_L2CACHE_WB_RANGE, offsetof(struct cpu_functions, 
cf_l2cache_wb_range));
 ASSYM(CF_IDCACHE_WBINV_ALL, offsetof(struct cpu_functions, 
cf_idcache_wbinv_all));
 ASSYM(CF_L2CACHE_WBINV_ALL, offsetof(struct cpu_functions, 
cf_l2cache_wbinv_all));
 ASSYM(CF_TLB_FLUSHID_SE, offsetof(struct cpu_functions, cf_tlb_flushID_SE));
 
-ASSYM(V_TRAP, offsetof(struct vmmeter, v_trap));
-ASSYM(V_SOFT, offsetof(struct vmmeter, v_soft));
-ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
-
 ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
 ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
 ASSYM(TD_PROC, offsetof(struct thread, td_proc));
-ASSYM(TD_FRAME, offsetof(struct thread, td_frame));
 ASSYM(TD_MD, offsetof(struct thread, td_md));
 ASSYM(TD_LOCK, offsetof(struct thread, td_lock));
 ASSYM(MD_TP, offsetof(struct mdthread, md_tp));
@@ -146,10 +136,6 @@ ASSYM(PMAP_INCLUDE_PTE_SYNC, 1);
 #endif
 ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
 ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
-ASSYM(P_TRACED, P_TRACED);
-ASSYM(P_SIGEVENT, P_SIGEVENT);
-ASSYM(P_PROFIL, P_PROFIL);
-ASSYM(TRAPFRAMESIZE, sizeof(struct trapframe));
 
 ASSYM(MAXCOMLEN, MAXCOMLEN);
 ASSYM(MAXCPU, MAXCPU);
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svn commit: r295066 - in head/sys: arm/arm conf

[Michal Meloun]

Author: mmel
Date: Sat Jan 30 08:02:12 2016
New Revision: 295066
URL: https://svnweb.freebsd.org/changeset/base/295066

Log:
  ARM: Split swtch.S into common, ARMv4 and ARMv6 parts. Cleanup them.

Added:
  head/sys/arm/arm/swtch-v4.S
 - copied, changed from r295065, head/sys/arm/arm/swtch.S
  head/sys/arm/arm/swtch-v6.S
 - copied, changed from r295065, head/sys/arm/arm/swtch.S
Modified:
  head/sys/arm/arm/swtch.S
  head/sys/conf/files.arm

Copied and modified: head/sys/arm/arm/swtch-v4.S (from r295065, 
head/sys/arm/arm/swtch.S)
==
--- head/sys/arm/arm/swtch.SSat Jan 30 07:00:36 2016(r295065, copy 
source)
+++ head/sys/arm/arm/swtch-v4.S Sat Jan 30 08:02:12 2016(r295066)
@@ -89,19 +89,9 @@
 
 __FBSDID("$FreeBSD$");
 
-#if __ARM_ARCH >= 6 && defined(SMP)
-#define GET_PCPU(tmp, tmp2) \
-   mrc p15, 0, tmp, c0, c0, 5; \
-   and tmp, tmp, #0xf; \
-   ldr tmp2, .Lcurpcpu+4;  \
-   mul tmp, tmp, tmp2; \
-   ldr tmp2, .Lcurpcpu;\
-   add tmp, tmp, tmp2;
-#else
 
 #define GET_PCPU(tmp, tmp2) \
ldr tmp, .Lcurpcpu
-#endif
 
 #ifdef VFP
.fpu vfp/* allow VFP instructions */
@@ -114,8 +104,6 @@ __FBSDID("$FreeBSD$");
.word   _C_LABEL(blocked_lock)
 
 
-#if __ARM_ARCH < 6
-
 #define DOMAIN_CLIENT  0x01
 
 .Lcpufuncs:
@@ -147,10 +135,8 @@ ENTRY(cpu_throw)
/* Switch to lwp0 context */
 
ldr r9, .Lcpufuncs
-#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && 
!defined(CPU_KRAIT)
mov lr, pc
ldr pc, [r9, #CF_IDCACHE_WBINV_ALL]
-#endif
ldr r0, [r7, #(PCB_PL1VEC)]
ldr r1, [r7, #(PCB_DACR)]
/*
@@ -198,21 +184,16 @@ ENTRY(cpu_throw)
str r7, [r6, #PC_CURPCB]
/* We have a new curthread now so make a note it */
str r5, [r6, #PC_CURTHREAD]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r5, c13, c0, 4
-#endif
+
/* Set the new tp */
ldr r6, [r5, #(TD_MD + MD_TP)]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r6, c13, c0, 3
-#else
ldr r4, =ARM_TP_ADDRESS
str r6, [r4]
ldr r6, [r5, #(TD_MD + MD_RAS_START)]
str r6, [r4, #4] /* ARM_RAS_START */
ldr r6, [r5, #(TD_MD + MD_RAS_END)]
str r6, [r4, #8] /* ARM_RAS_END */
-#endif
+
/* Restore all the saved registers and exit */
add r3, r7, #PCB_R4
ldmia   r3, {r4-r12, sp, pc}
@@ -245,9 +226,6 @@ ENTRY(cpu_switch)
/* We have a new curthread now so make a note it */
GET_PCPU(r7, r2)
str r1, [r7, #PC_CURTHREAD]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r1, c13, c0, 4
-#endif
 
/* Hook in a new pcb */
ldr r2, [r1, #TD_PCB]
@@ -259,14 +237,6 @@ ENTRY(cpu_switch)
ldr r2, [r0, #(TD_PCB)]
mov r4, r0 /* Save the old thread. */
 
-#if __ARM_ARCH >= 6
-   /*
-* Set new tp.  No need to store the old one first, userland can't
-* change it directly on armv6.
-*/
-   ldr r9, [r1, #(TD_MD + MD_TP)]
-   mcr p15, 0, r9, c13, c0, 3
-#else
/* Store the old tp; userland can change it on armv4. */
ldr r3, =ARM_TP_ADDRESS
ldr r9, [r3]
@@ -283,7 +253,6 @@ ENTRY(cpu_switch)
str r9, [r3, #4]
ldr r9, [r1, #(TD_MD + MD_RAS_END)]
str r9, [r3, #8]
-#endif
 
/* Get the user structure for the new process in r9 */
ldr r9, [r1, #(TD_PCB)]
@@ -327,7 +296,6 @@ ENTRY(cpu_switch)
cmpeq   r0, r5  /* Same DACR? */
beq .Lcs_context_switched   /* yes! */
 
-#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && 
!defined(CPU_KRAIT)
/*
 * Definately need to flush the cache.
 */
@@ -335,7 +303,7 @@ ENTRY(cpu_switch)
ldr r1, .Lcpufuncs
mov lr, pc
ldr pc, [r1, #CF_IDCACHE_WBINV_ALL]
-#endif
+
 .Lcs_cache_purge_skipped:
/* rem: r6 = lock */
/* rem: r9 = new PCB */
@@ -399,14 +367,6 @@ ENTRY(cpu_switch)
 
/* Release the old thread */
str r6, [r4, #TD_LOCK]
-#if defined(SCHED_ULE) && defined(SMP)
-   ldr r6, .Lblocked_lock
-   GET_CURTHREAD_PTR(r3)
-1:
-   ldr r4, [r3, #TD_LOCK]
-   cmp r4, r6
-   beq 1b
-#endif
 
/* XXXSCW: Safe to re-enable FIQs here */
 
@@ -418,404 +378,4 @@ ENTRY(cpu_switch)
 END(cpu_switch)
 
 
-#else /* __ARM_ARCH < 6 */
-#include 
-
-ENTRY(cpu_context_switch) /* QQQ: What about macro instead of function?
*/
-   DSB
-   mcr CP15_TTBR0(r0)  /* set the new TTB */
-   ISB
-   mov r0, #(CPU_ASID_KERNEL)
-   mcr CP15_TLBIASID(r0)   /* flush not global TLBs */
-   /*
-   * Flush entire Branch Target Cache 

svn commit: r295067 - head/sys/dev/usb/controller

[Michal Meloun]

Author: mmel
Date: Sat Jan 30 08:27:09 2016
New Revision: 295067
URL: https://svnweb.freebsd.org/changeset/base/295067

Log:
  EHCI: Correct address of EHCI_USBMODE_LPM register is 0xC8, not 0xA8.

Modified:
  head/sys/dev/usb/controller/ehcireg.h

Modified: head/sys/dev/usb/controller/ehcireg.h
==
--- head/sys/dev/usb/controller/ehcireg.h   Sat Jan 30 08:02:12 2016
(r295066)
+++ head/sys/dev/usb/controller/ehcireg.h   Sat Jan 30 08:27:09 2016
(r295067)
@@ -167,7 +167,7 @@
  * bits are equal
  */
 #defineEHCI_USBMODE_NOLPM  0x68/* RW USB Device mode reg (no 
LPM) */
-#defineEHCI_USBMODE_LPM0xA8/* RW USB Device mode reg (LPM) 
*/
+#defineEHCI_USBMODE_LPM0xC8/* RW USB Device mode reg (LPM) 
*/
 #defineEHCI_UM_CM  0x0003  /* R/WO Controller Mode 
*/
 #defineEHCI_UM_CM_IDLE 0x0 /* Idle */
 #defineEHCI_UM_CM_HOST 0x3 /* Host Controller */
___
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svn commit: r295068 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sat Jan 30 10:10:29 2016
New Revision: 295068
URL: https://svnweb.freebsd.org/changeset/base/295068

Log:
  ARM: Don't misuse ARM_TP_ADDRESS as ARMv4 / ARMv6 selector.

Modified:
  head/sys/arm/arm/machdep.c

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Jan 30 08:27:09 2016(r295067)
+++ head/sys/arm/arm/machdep.c  Sat Jan 30 10:10:29 2016(r295068)
@@ -427,11 +427,9 @@ cpu_startup(void *dummy)
 {
struct pcb *pcb = thread0.td_pcb;
const unsigned int mbyte = 1024 * 1024;
-#ifdef ARM_TP_ADDRESS
-#ifndef ARM_CACHE_LOCK_ENABLE
+#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
vm_page_t m;
 #endif
-#endif
 
identify_arm_cpu();
 
@@ -456,11 +454,9 @@ cpu_startup(void *dummy)
pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
USPACE_SVC_STACK_TOP;
pmap_set_pcb_pagedir(kernel_pmap, pcb);
-#if __ARM_ARCH  < 6
+#if __ARM_ARCH < 6
vector_page_setprot(VM_PROT_READ);
pmap_postinit();
-#endif
-#ifdef ARM_TP_ADDRESS
 #ifdef ARM_CACHE_LOCK_ENABLE
pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
arm_lock_cache_line(ARM_TP_ADDRESS);
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svn commit: r295073 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sat Jan 30 13:11:13 2016
New Revision: 295073
URL: https://svnweb.freebsd.org/changeset/base/295073

Log:
  ARM: Remove TLB IPI.
  We don't support SMP on ARMv6. All ARMv7 multicore cpus already uses
  hardware broadcast for TLB and cache operations.

Modified:
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/smp.h

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Sat Jan 30 12:58:38 2016
(r295072)
+++ head/sys/arm/arm/mp_machdep.c   Sat Jan 30 13:11:13 2016
(r295073)
@@ -341,13 +341,6 @@ ipi_hardclock(void *arg)
critical_exit();
 }
 
-static void
-ipi_tlb(void *dummy __unused)
-{
-
-   CTR1(KTR_SMP, "%s: IPI_TLB", __func__);
-   cpufuncs.cf_tlb_flushID();
-}
 #else
 static int
 ipi_handler(void *arg)
@@ -413,10 +406,6 @@ ipi_handler(void *arg)
CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
hardclockintr();
break;
-   case IPI_TLB:
-   CTR1(KTR_SMP, "%s: IPI_TLB", __func__);
-   cpufuncs.cf_tlb_flushID();
-   break;
default:
panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu);
}
@@ -446,7 +435,6 @@ release_aps(void *dummy __unused)
intr_ipi_set_handler(IPI_STOP, "stop", ipi_stop, NULL, 0);
intr_ipi_set_handler(IPI_PREEMPT, "preempt", ipi_preempt, NULL, 0);
intr_ipi_set_handler(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL, 
0);
-   intr_ipi_set_handler(IPI_TLB, "tlb", ipi_tlb, NULL, 0);
 
 #else
 #ifdef IPI_IRQ_START
@@ -538,10 +526,3 @@ ipi_selected(cpuset_t cpus, u_int ipi)
platform_ipi_send(cpus, ipi);
 }
 
-void
-tlb_broadcast(int ipi)
-{
-
-   if (smp_started)
-   ipi_all_but_self(ipi);
-}

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Sat Jan 30 12:58:38 2016
(r295072)
+++ head/sys/arm/include/cpufunc.h  Sat Jan 30 13:11:13 2016
(r295073)
@@ -184,8 +184,6 @@ extern u_int cputype;
 #define cpu_faultstatus()  cpufuncs.cf_faultstatus()
 #define cpu_faultaddress() cpufuncs.cf_faultaddress()
 
-#ifndef SMP
-
 #definecpu_tlb_flushID()   cpufuncs.cf_tlb_flushID()
 #definecpu_tlb_flushID_SE(e)   cpufuncs.cf_tlb_flushID_SE(e)
 #definecpu_tlb_flushI()cpufuncs.cf_tlb_flushI()
@@ -193,51 +191,6 @@ extern u_int cputype;
 #definecpu_tlb_flushD()cpufuncs.cf_tlb_flushD()
 #definecpu_tlb_flushD_SE(e)cpufuncs.cf_tlb_flushD_SE(e)
 
-#else
-void tlb_broadcast(int);
-
-#if defined(CPU_CORTEXA) || defined(CPU_MV_PJ4B) || defined(CPU_KRAIT)
-#define TLB_BROADCAST  /* No need to explicitely send an IPI */
-#else
-#define TLB_BROADCAST  tlb_broadcast(7)
-#endif
-
-#definecpu_tlb_flushID() do { \
-   cpufuncs.cf_tlb_flushID(); \
-   TLB_BROADCAST; \
-} while(0)
-
-#definecpu_tlb_flushID_SE(e) do { \
-   cpufuncs.cf_tlb_flushID_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushI() do { \
-   cpufuncs.cf_tlb_flushI(); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushI_SE(e) do { \
-   cpufuncs.cf_tlb_flushI_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushD() do { \
-   cpufuncs.cf_tlb_flushD(); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushD_SE(e) do { \
-   cpufuncs.cf_tlb_flushD_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-#endif
-
 #definecpu_icache_sync_all()   cpufuncs.cf_icache_sync_all()
 #definecpu_icache_sync_range(a, s) cpufuncs.cf_icache_sync_range((a), 
(s))
 

Modified: head/sys/arm/include/smp.h
==
--- head/sys/arm/include/smp.h  Sat Jan 30 12:58:38 2016(r295072)
+++ head/sys/arm/include/smp.h  Sat Jan 30 13:11:13 2016(r295073)
@@ -14,8 +14,8 @@ enum {
IPI_STOP,
IPI_STOP_HARD = IPI_STOP, /* These are synonyms on arm. */
IPI_HARDCLOCK,
-   IPI_TLB,
-   IPI_CACHE,
+   IPI_TLB,/* Not used now, but keep it reserved. */
+   IPI_CACHE,  /* Not used now, but keep it reserved. */
INTR_IPI_COUNT
 };
 #else
@@ -25,8 +25,8 @@ enum {
 #define IPI_STOP   4
 #define IPI_STOP_HARD  4
 #define IPI_HARDCLOCK  6
-#define IPI_TLB7
-#define IPI_CACHE  8
+#define IPI_TLB7   /* Not used now, but keep it reserved. 
*/
+#define IPI_CACHE  8   /* Not used now, but keep it reserved. */
 #endif /* INTRNG */
 
 void   init_secondary(int cpu);
___

svn commit: r295071 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sat Jan 30 12:23:28 2016
New Revision: 295071
URL: https://svnweb.freebsd.org/changeset/base/295071

Log:
  ARM: Cleanup mp_machdep.c. SMP is supported only on ARMv6 and later.

Modified:
  head/sys/arm/arm/mp_machdep.c

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Sat Jan 30 11:10:22 2016
(r295070)
+++ head/sys/arm/arm/mp_machdep.c   Sat Jan 30 12:23:28 2016
(r295071)
@@ -156,7 +156,6 @@ init_secondary(int cpu)
 #ifndef ARM_INTRNG
int start = 0, end = 0;
 #endif
-#if __ARM_ARCH >= 6
uint32_t actlr_mask, actlr_set;
 
pmap_set_tex();
@@ -168,11 +167,6 @@ init_secondary(int cpu)
set_stackptrs(cpu);
 
enable_interrupts(PSR_A);
-#else /* __ARM_ARCH >= 6 */
-   cpu_setup();
-   setttb(pmap_pa);
-   cpu_tlb_flushID();
-#endif /* __ARM_ARCH >= 6 */
pc = &__pcpu[cpu];
 
/*
@@ -184,10 +178,6 @@ init_secondary(int cpu)
 
pcpu_init(pc, cpu, sizeof(struct pcpu));
dpcpu_init(dpcpu[cpu - 1], cpu);
-#if __ARM_ARCH < 6
-   /* Provide stack pointers for other processor modes. */
-   set_stackptrs(cpu);
-#endif
/* Signal our startup to BSP */
atomic_add_rel_32(_naps, 1);
 
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svn commit: r295090 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 08:53:53 2016
New Revision: 295090
URL: https://svnweb.freebsd.org/changeset/base/295090

Log:
  ARM: Convert spaces to tabs, fix formatting.
  Not a functional change.

Modified:
  head/sys/arm/arm/swtch-v4.S
  head/sys/arm/arm/swtch-v6.S

Modified: head/sys/arm/arm/swtch-v4.S
==
--- head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:06:22 2016(r295089)
+++ head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:53:53 2016(r295090)
@@ -98,7 +98,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 .Lcurpcpu:
-   .word   _C_LABEL(__pcpu)
+   .word   _C_LABEL(__pcpu)
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 
@@ -129,7 +129,7 @@ ENTRY(cpu_throw)
 #endif
 
GET_PCPU(r7, r9)
-   ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */
+   ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */
 
/* Switch to lwp0 context */
 
@@ -275,25 +275,25 @@ ENTRY(cpu_switch)
/* rem: r2 = old PCB */
/* rem: r9 = new PCB */
 
-   ldr r5, [r9, #(PCB_DACR)]   /* r5 = new DACR */
+   ldr r5, [r9, #(PCB_DACR)]   /* r5 = new DACR */
mov r2, #DOMAIN_CLIENT
-   cmp r5, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
-   beq .Lcs_context_switched/* Yup. Don't flush cache */
-   mrc p15, 0, r0, c3, c0, 0   /* r0 = old DACR */
+   cmp r5, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
+   beq .Lcs_context_switched   /* Yup. Don't flush cache */
+   mrc p15, 0, r0, c3, c0, 0   /* r0 = old DACR */
/*
-* Get the new L1 table pointer into r11.  If we're switching to
+* Get the new L1 table pointer into r11. If we're switching to
 * an LWP with the same address space as the outgoing one, we can
 * skip the cache purge and the TTB load.
 *
 * To avoid data dep stalls that would happen anyway, we try
 * and get some useful work done in the mean time.
 */
-   mrc p15, 0, r10, c2, c0, 0  /* r10 = old L1 */
-   ldr r11, [r9, #(PCB_PAGEDIR)]   /* r11 = new L1 */
+   mrc p15, 0, r10, c2, c0, 0  /* r10 = old L1 */
+   ldr r11, [r9, #(PCB_PAGEDIR)] /* r11 = new L1 */
 
-   teq r10, r11/* Same L1? */
-   cmpeq   r0, r5  /* Same DACR? */
-   beq .Lcs_context_switched   /* yes! */
+   teq r10, r11/* Same L1? */
+   cmpeq   r0, r5  /* Same DACR? */
+   beq .Lcs_context_switched   /* yes! */
 
/*
 * Definately need to flush the cache.
@@ -375,6 +375,3 @@ ENTRY(cpu_switch)
add r3, r9, #PCB_R4
ldmia   r3, {r4-r12, sp, pc}
 END(cpu_switch)
-
-
-

Modified: head/sys/arm/arm/swtch-v6.S
==
--- head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:06:22 2016(r295089)
+++ head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:53:53 2016(r295090)
@@ -109,7 +109,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 .Lcurpcpu:
-   .word   _C_LABEL(__pcpu)
+   .word   _C_LABEL(__pcpu)
.word   PCPU_SIZE
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
@@ -134,7 +134,7 @@ ENTRY(cpu_context_switch) /* QQQ: What a
*  it's the only place where standalone predictor flush must be
*  executed in kernel (except self modifying code case).
*/
-   mcr   CP15_BPIALL   /* and flush entire Branch Target Cache */
+   mcr CP15_BPIALL /* flush entire Branch Target Cache */
DSB
mov pc, lr
 END(cpu_context_switch)
@@ -155,9 +155,9 @@ ENTRY(cpu_throw)
bl  _C_LABEL(vfp_discard)   /* VFP without preserving state. */
 #endif
GET_PCPU(r8, r9)/* r8 = current pcpu */
-   ldr r4, [r8, #PC_CPUID] /* r4 = current cpu id */
+   ldr r4, [r8, #PC_CPUID] /* r4 = current cpu id */
 
-   cmp r10, #0 /* old thread? */
+   cmp r10, #0 /* old thread? */
beq 2f  /* no, skip */
 
/* Remove this CPU from the active list. */
@@ -206,7 +206,7 @@ ENTRY(cpu_throw)
 */
 
/* MMU switch to new thread. */
-   ldr r0, [r7, #(PCB_PAGEDIR)]
+   ldr r0, [r7, #(PCB_PAGEDIR)]
 #ifdef INVARIANTS
cmp r0, #0  /* new thread? */
beq badsw4  /* no, panic */
@@ -290,11 +290,11 @@ ENTRY(cpu_switch)
 * it is time to restore them for the new thread. However,
 * some registers are not safe over function call.
 */
-   mov r9, r2  /* r9  = lock */
+   mov r9, r2  /* r9 = lock */
mov r10, r0 /* r10 = oldtd 

svn commit: r295091 - head/sys/arm/include

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 09:16:20 2016
New Revision: 295091
URL: https://svnweb.freebsd.org/changeset/base/295091

Log:
  ARM: Rename ARM specific VM_MEMATTR_WT memory attribute to standard one.

Modified:
  head/sys/arm/include/vm.h

Modified: head/sys/arm/include/vm.h
==
--- head/sys/arm/include/vm.h   Sun Jan 31 08:53:53 2016(r295090)
+++ head/sys/arm/include/vm.h   Sun Jan 31 09:16:20 2016(r295091)
@@ -38,13 +38,13 @@
 #define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
 #define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
 #define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
-#define VM_MEMATTR_WT  ((vm_memattr_t)PTE2_ATTR_WT)
+#define VM_MEMATTR_WRITE_THROUGH   ((vm_memattr_t)PTE2_ATTR_WT)
 
 #define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
 #define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO   /* misused by DMA */
 #ifdef _KERNEL
 /* Don't export aliased VM_MEMATTR to userland */
-#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WT   /* for DRM */
+#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WRITE_THROUGH /* for DRM */
 #define VM_MEMATTR_WRITE_BACK  VM_MEMATTR_WB_WA/* for DRM */
 #endif
 #else
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svn commit: r295089 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 08:06:22 2016
New Revision: 295089
URL: https://svnweb.freebsd.org/changeset/base/295089

Log:
  ARM: Next round of cleanup in swtch-v*.S.
   - remove now useless #if __ARM_ARCH conditional
   - use macro for accessing CP15 registers
   - remove unused PCPU_SIZE
  
  Pointed by: kib

Modified:
  head/sys/arm/arm/swtch-v4.S
  head/sys/arm/arm/swtch-v6.S

Modified: head/sys/arm/arm/swtch-v4.S
==
--- head/sys/arm/arm/swtch-v4.S Sun Jan 31 02:23:30 2016(r295088)
+++ head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:06:22 2016(r295089)
@@ -99,7 +99,6 @@ __FBSDID("$FreeBSD$");
 
 .Lcurpcpu:
.word   _C_LABEL(__pcpu)
-   .word   PCPU_SIZE
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 

Modified: head/sys/arm/arm/swtch-v6.S
==
--- head/sys/arm/arm/swtch-v6.S Sun Jan 31 02:23:30 2016(r295088)
+++ head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:06:22 2016(r295089)
@@ -85,13 +85,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 __FBSDID("$FreeBSD$");
 
-#if __ARM_ARCH >= 6 && defined(SMP)
+#if defined(SMP)
 #define GET_PCPU(tmp, tmp2) \
-   mrc p15, 0, tmp, c0, c0, 5; \
+   mrc CP15_MPIDR(tmp);\
and tmp, tmp, #0xf; \
ldr tmp2, .Lcurpcpu+4;  \
mul tmp, tmp, tmp2; \
@@ -113,9 +114,6 @@ __FBSDID("$FreeBSD$");
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 
-
-#include 
-
 ENTRY(cpu_context_switch) /* QQQ: What about macro instead of function?
*/
DSB
mcr CP15_TTBR0(r0)  /* set the new TTB */
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svn commit: r295149 - in head/sys: arm/arm arm/include conf

[Michal Meloun]

Author: mmel
Date: Tue Feb  2 14:53:34 2016
New Revision: 295149
URL: https://svnweb.freebsd.org/changeset/base/295149

Log:
  ARM: All remaining functions in cpufunc_asm_arm10.S are identical with
  functions in cpufunc_asm_arm9.S. Use arm9 variants and remove
  cpufunc_asm_arm10.S completly.

Deleted:
  head/sys/arm/arm/cpufunc_asm_arm10.S
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/include/cpufunc.h
  head/sys/conf/Makefile.arm
  head/sys/conf/files.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/arm/arm/cpufunc.c  Tue Feb  2 14:53:34 2016(r295149)
@@ -167,7 +167,7 @@ struct cpu_functions armv5_ec_cpufuncs =
/* TLB functions */
 
armv4_tlb_flushID,  /* tlb_flushID  */
-   arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
+   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -199,7 +199,7 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Soft functions */
 
-   arm10_context_switch,   /* context_switch   */
+   arm9_context_switch,/* context_switch   */
 
arm10_setup /* cpu setup*/
 
@@ -218,7 +218,7 @@ struct cpu_functions sheeva_cpufuncs = {
/* TLB functions */
 
armv4_tlb_flushID,  /* tlb_flushID  */
-   arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
+   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -250,7 +250,7 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Soft functions */
 
-   arm10_context_switch,   /* context_switch   */
+   arm9_context_switch,/* context_switch   */
 
arm10_setup /* cpu setup*/
 };

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Feb  2 14:16:07 2016
(r295148)
+++ head/sys/arm/include/cpufunc.h  Tue Feb  2 14:53:34 2016
(r295149)
@@ -225,11 +225,13 @@ void  fa526_idcache_wbinv_range(vm_offset
 #endif
 
 
-#ifdef CPU_ARM9
+#if defined(CPU_ARM9) || defined(CPU_ARM9E)
 void   arm9_setttb (u_int);
-
 void   arm9_tlb_flushID_SE (u_int va);
+void   arm9_context_switch (void);
+#endif
 
+#if defined(CPU_ARM9) 
 void   arm9_icache_sync_all(void);
 void   arm9_icache_sync_range  (vm_offset_t, vm_size_t);
 
@@ -241,8 +243,6 @@ voidarm9_dcache_wb_range(vm_offset_t, 
 void   arm9_idcache_wbinv_all  (void);
 void   arm9_idcache_wbinv_range (vm_offset_t, vm_size_t);
 
-void   arm9_context_switch (void);
-
 void   arm9_setup  (void);
 
 extern unsigned arm9_dcache_sets_max;
@@ -252,10 +252,6 @@ extern unsigned arm9_dcache_index_inc;
 #endif
 
 #if defined(CPU_ARM9E)
-void   arm10_tlb_flushID_SE(u_int);
-
-void   arm10_context_switch(void);
-
 void   arm10_setup (void);
 
 u_int  sheeva_control_ext  (u_int, u_int);

Modified: head/sys/conf/Makefile.arm
==
--- head/sys/conf/Makefile.arm  Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/conf/Makefile.arm  Tue Feb  2 14:53:34 2016(r295149)
@@ -68,7 +68,6 @@ SYSTEM_LD_TAIL +=;sed s/" + SIZEOF_HEADE
 
 FILES_CPU_FUNC = \
$S/$M/$M/cpufunc_asm_arm9.S \
-   $S/$M/$M/cpufunc_asm_arm10.S \
$S/$M/$M/cpufunc_asm_xscale.S $S/$M/$M/cpufunc_asm.S \
$S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S \
$S/$M/$M/cpufunc_asm_fa526.S $S/$M/$M/cpufunc_asm_sheeva.S \

Modified: head/sys/conf/files.arm
==
--- head/sys/conf/files.arm Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/conf/files.arm Tue Feb  2 14:53:34 2016(r295149)
@@ -11,8 +11,7 @@ arm/arm/busdma_machdep-v6.c   optionalar
 arm/arm/copystr.S  standard
 arm/arm/cpufunc.c  standard
 arm/arm/cpufunc_asm.S  standard
-arm/arm/cpufunc_asm_arm9.S optionalcpu_arm9
-arm/arm/cpufunc_asm_arm10.Soptionalcpu_arm9e
+arm/arm/cpufunc_asm_arm9.S optionalcpu_arm9 | cpu_arm9e
 arm/arm/cpufunc_asm_arm11.Soptionalcpu_arm1176
 arm/arm/cpufunc_asm_arm11x6.S  optionalcpu_arm1176
 arm/arm/cpufunc_asm_armv4.Soptionalcpu_arm9 | cpu_arm9e | 
cpu_fa526 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | 

svn commit: r295145 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Tue Feb  2 10:50:32 2016
New Revision: 295145
URL: https://svnweb.freebsd.org/changeset/base/295145

Log:
  ARM: Remove last unused function, cpu_flush_prefetchbuf(),
  from cpu_functions table.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_arm11x6.S
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Feb  2 10:39:18 2016(r295144)
+++ head/sys/arm/arm/cpufunc.c  Tue Feb  2 10:50:32 2016(r295145)
@@ -140,7 +140,6 @@ struct cpu_functions arm9_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -194,7 +193,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -246,7 +244,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
sheeva_cpu_sleep,   /* sleep*/
@@ -298,7 +295,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -352,7 +348,6 @@ struct cpu_functions xscale_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
xscale_cpu_sleep,   /* sleep*/
@@ -406,7 +401,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
xscale_cpu_sleep,   /* sleep*/
@@ -459,7 +453,6 @@ struct cpu_functions fa526_cpufuncs = {
 
/* Other functions */
 
-   fa526_flush_prefetchbuf,/* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
fa526_cpu_sleep,/* sleep*/
@@ -513,7 +506,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
/* Other functions */
 
-   arm11x6_flush_prefetchbuf,  /* flush_prefetchbuf*/
arm11_drain_writebuf,   /* drain_writebuf   */
 
arm11x6_sleep,  /* sleep*/
@@ -574,7 +566,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
 
armv7_cpu_sleep,/* sleep*/

Modified: head/sys/arm/arm/cpufunc_asm_arm11x6.S
==
--- head/sys/arm/arm/cpufunc_asm_arm11x6.S  Tue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/arm/cpufunc_asm_arm11x6.S  Tue Feb  2 10:50:32 2016
(r295145)
@@ -138,11 +138,6 @@ ENTRY_NP(arm11x6_icache_sync_all)
RET
 END(arm11x6_icache_sync_all)
 
-ENTRY_NP(arm11x6_flush_prefetchbuf)
-   mcr p15, 0, r0, c7, c5, 4   /* Flush Prefetch Buffer */
-   RET
-END(arm11x6_flush_prefetchbuf)
-
 ENTRY_NP(arm11x6_icache_sync_range)
add r1, r1, r0
sub r1, r1, #1

Modified: head/sys/arm/arm/cpufunc_asm_fa526.S
==
--- head/sys/arm/arm/cpufunc_asm_fa526.STue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/arm/cpufunc_asm_fa526.STue Feb  2 10:50:32 2016
(r295145)
@@ -72,12 +72,6 @@ ENTRY(fa526_cpu_sleep)
mov pc, lr
 END(fa526_cpu_sleep)
 
-ENTRY(fa526_flush_prefetchbuf)
-   mov r0, #0
-   mcr p15, 0, r0, c7, c5, 4   /* Pre-fetch flush */
-   mov pc, lr
-END(fa526_flush_prefetchbuf)
-
 /*
  * Cache functions
  */

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/include/cpufunc.h  Tue Feb  2 10:50:32 2016
(r295145)
@@ -149,7 +149,6 @@ struct cpu_functions {
 
/* Other functions */
 
-   void(*cf_flush_prefetchbuf) (void);
void

svn commit: r295123 - in head/sys/arm: arm mv/armadaxp ti

[Michal Meloun]

Author: mmel
Date: Mon Feb  1 14:28:58 2016
New Revision: 295123
URL: https://svnweb.freebsd.org/changeset/base/295123

Log:
  ARM: Rename remaining instances of cpufunc_id() to cpu_ident(),
  forgotten in r295096.
  Remove tlb_flushI/tlb_flushI_SE functions forgotten in r295122.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/arm/pmap.c
  head/sys/arm/mv/armadaxp/armadaxp.c
  head/sys/arm/mv/armadaxp/armadaxp_mp.c
  head/sys/arm/ti/ti_cpuid.c

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/arm/cpufunc.c  Mon Feb  1 14:28:58 2016(r295123)
@@ -221,8 +221,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   arm10_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/arm/elf_trampoline.c   Mon Feb  1 14:28:58 2016
(r295123)
@@ -49,7 +49,7 @@ void _start(void);
 void __start(void);
 void __startC(void);
 
-extern unsigned int cpufunc_id(void);
+extern unsigned int cpu_ident(void);
 extern void armv6_idcache_wbinv_all(void);
 extern void armv7_idcache_wbinv_all(void);
 extern void do_call(void *, void *, void *, int);
@@ -248,7 +248,7 @@ _startC(void)
 #ifndef KZIP
 #ifdef CPU_ARM9
/* So that idcache_wbinv works; */
-   if ((cpufunc_id() & 0xf000) == 0x9000)
+   if ((cpu_ident() & 0xf000) == 0x9000)
arm9_setup();
 #endif
 #endif
@@ -266,7 +266,7 @@ get_cachetype_cp15()
__asm __volatile("mrc p15, 0, %0, c0, c0, 1"
: "=r" (ctype));
 
-   cpuid = cpufunc_id();
+   cpuid = cpu_ident();
/*
 * ...and thus spake the ARM ARM:
 *
@@ -683,7 +683,7 @@ __start(void)
 
 #ifdef CPU_ARM9
/* So that idcache_wbinv works; */
-   if ((cpufunc_id() & 0xf000) == 0x9000)
+   if ((cpu_ident() & 0xf000) == 0x9000)
arm9_setup();
 #endif
setup_pagetables(pt_addr, (vm_paddr_t)curaddr,

Modified: head/sys/arm/arm/pmap.c
==
--- head/sys/arm/arm/pmap.c Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/arm/pmap.c Mon Feb  1 14:28:58 2016(r295123)
@@ -561,7 +561,7 @@ pmap_pte_init_xscale(void)
{
uint32_t id, type;
 
-   id = cpufunc_id();
+   id = cpu_ident();
type = id & ~(CPU_ID_XSCALE_COREREV_MASK|CPU_ID_REVISION_MASK);
 
if (type == CPU_ID_PXA250 || type == CPU_ID_PXA210) {

Modified: head/sys/arm/mv/armadaxp/armadaxp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp.c Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/mv/armadaxp/armadaxp.c Mon Feb  1 14:28:58 2016
(r295123)
@@ -128,7 +128,7 @@ get_tclk(void)
 {
uint32_t cputype;
 
-   cputype = cpufunc_id();
+   cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
 
if (cputype == CPU_ID_MV88SV584X_V7)

Modified: head/sys/arm/mv/armadaxp/armadaxp_mp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp_mp.c  Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/mv/armadaxp/armadaxp_mp.c  Mon Feb  1 14:28:58 2016
(r295123)
@@ -111,7 +111,7 @@ platform_mp_start_ap(void)
 * Initialization procedure depends on core revision,
 * in this step CHIP ID is checked to choose proper procedure
 */
-   cputype = cpufunc_id();
+   cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
 
/*

Modified: head/sys/arm/ti/ti_cpuid.c
==
--- head/sys/arm/ti/ti_cpuid.c  Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/ti/ti_cpuid.c  Mon Feb  1 14:28:58 2016(r295123)
@@ -120,7 +120,7 @@ omap4_get_revision(void)
 * the ARM cpuid to get the correct revision.
 */
if (revision == 0) {
-   id_code = cpufunc_id();
+   id_code = cpu_ident();
revision = (id_code & 0xf) - 1;
}
 
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svn commit: r295096 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 16:34:06 2016
New Revision: 295096
URL: https://svnweb.freebsd.org/changeset/base/295096

Log:
  ARM: cpufunc_domains, cpufunc_faultstatus and cpufunc_faultaddress
  functions are equal for all ARM variants. Remove them from cpu_functions
  table.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:36:13 2016(r295095)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 16:34:06 2016(r295096)
@@ -105,16 +105,12 @@ int ctrl;
 struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
arm9_setttb,/* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -164,16 +160,12 @@ struct cpu_functions arm9_cpufuncs = {
 struct cpu_functions armv5_ec_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
armv5_ec_setttb,/* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -222,16 +214,12 @@ struct cpu_functions armv5_ec_cpufuncs =
 struct cpu_functions sheeva_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
sheeva_setttb,  /* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -281,16 +269,12 @@ struct cpu_functions sheeva_cpufuncs = {
 struct cpu_functions pj4bv7_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
armv7_drain_writebuf,   /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
armv7_setttb,   /* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -341,16 +325,12 @@ struct cpu_functions pj4bv7_cpufuncs = {
 struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
xscale_cpwait,  /* cpwait   */
 
/* MMU functions */
 
xscale_control, /* control  */
-   cpufunc_domains,/* domain   */
xscale_setttb,  /* setttb   */
-   cpufunc_faultstatus,/* faultstatus  */
-   cpufunc_faultaddress,   /* faultaddress */
 
/* TLB functions */
 
@@ -401,16 +381,12 @@ struct cpu_functions xscale_cpufuncs = {
 struct cpu_functions xscalec3_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
xscale_cpwait,  /* cpwait   */
 
/* MMU functions */
 
xscale_control, /* control  */
-   cpufunc_domains,/* domain   */
xscalec3_setttb,/* setttb   */
-   cpufunc_faultstatus,/* faultstatus  */
-   cpufunc_faultaddress,   /* faultaddress */
 
/* TLB functions */
 
@@ -460,16 +436,12 @@ struct cpu_functions xscalec3_cpufuncs =
 struct cpu_functions fa526_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
- 

svn commit: r295095 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 15:36:13 2016
New Revision: 295095
URL: https://svnweb.freebsd.org/changeset/base/295095

Log:
  ARM: Next round of cpufunc.* cleaning. Nobody uses flush_brnchtgt* functions,
  delete them.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:18:03 2016(r295094)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:36:13 2016(r295095)
@@ -148,8 +148,6 @@ struct cpu_functions arm9_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -210,8 +208,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -270,8 +266,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
sheeva_cpu_sleep,   /* sleep*/
 
@@ -330,8 +324,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -392,8 +384,6 @@ struct cpu_functions xscale_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
xscale_cpu_sleep,   /* sleep*/
 
@@ -454,8 +444,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
xscale_cpu_sleep,   /* sleep*/
 
@@ -515,8 +503,6 @@ struct cpu_functions fa526_cpufuncs = {
 
fa526_flush_prefetchbuf,/* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   fa526_flush_brnchtgt_E, /* flush_brnchtgt_E */
 
fa526_cpu_sleep,/* sleep*/
 
@@ -577,8 +563,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
arm11x6_flush_prefetchbuf,  /* flush_prefetchbuf*/
arm11_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
arm11x6_sleep,  /* sleep*/
 
@@ -646,8 +630,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
armv7_cpu_sleep,/* sleep*/
 

Modified: head/sys/arm/arm/cpufunc_asm_fa526.S
==
--- head/sys/arm/arm/cpufunc_asm_fa526.SSun Jan 31 15:18:03 2016
(r295094)
+++ head/sys/arm/arm/cpufunc_asm_fa526.SSun Jan 31 15:36:13 2016
(r295095)
@@ -200,12 +200,6 @@ ENTRY(fa526_icache_sync_range)
mov pc, lr
 END(fa526_icache_sync_range)
 
-ENTRY(fa526_flush_brnchtgt_E)
-   mov r0, #0
-   mcr p15, 0, r0, c7, c5, 6   /* invalidate BTB cache */
-   mov pc, lr
-END(fa526_flush_brnchtgt_E)
-
 ENTRY(fa526_context_switch)
/*
 * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.

Modified: head/sys/arm/include/cpufunc.h

svn commit: r295092 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sun Jan 31 13:59:16 2016
New Revision: 295092
URL: https://svnweb.freebsd.org/changeset/base/295092

Log:
  ARM: First round of cpufunc.* cleaning. All abort_fixup functions are
  not currently used or defined. Delete them.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 09:16:20 2016(r295091)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 13:59:16 2016(r295092)
@@ -155,9 +155,6 @@ struct cpu_functions arm9_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm9_context_switch,/* context_switch   */
 
arm9_setup  /* cpu setup*/
@@ -220,9 +217,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm10_context_switch,   /* context_switch   */
 
arm10_setup /* cpu setup*/
@@ -283,9 +277,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm10_context_switch,   /* context_switch   */
 
arm10_setup /* cpu setup*/
@@ -345,10 +336,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
(void *)cpufunc_nullop, /* sleep*/
 
/* Soft functions */
-
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
armv7_context_switch,   /* context_switch   */
 
pj4bv7_setup/* cpu setup*/
@@ -412,9 +399,6 @@ struct cpu_functions xscale_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
xscale_context_switch,  /* context_switch   */
 
xscale_setup/* cpu setup*/
@@ -477,9 +461,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
xscalec3_context_switch,/* context_switch   */
 
xscale_setup/* cpu setup*/
@@ -541,8 +522,6 @@ struct cpu_functions fa526_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
 
fa526_context_switch,   /* context_switch   */
 
@@ -605,9 +584,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm11_context_switch,   /* context_switch   */
 
arm11x6_setup   /* cpu setup*/
@@ -677,9 +653,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
armv7_context_switch,   /* context_switch   */
 
cortexa_setup /* cpu setup*/
@@ -995,27 +968,6 @@ out:
 }
 
 /*
- * Fixup routines for data and prefetch aborts.
- *
- * Several compile time symbols are used
- *
- * DEBUG_FAULT_CORRECTION - Print debugging information during the
- * correction of registers after a fault.
- */
-
-
-/*
- * Null abort fixup routine.
- * For use when no fixup is required.
- */
-int
-cpufunc_null_fixup(arg)
-   void *arg;
-{
-   return(ABORT_FIXUP_OK);
-}
-
-/*
  * CPU Setup code
  */
 

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Sun Jan 31 09:16:20 2016
(r295091)
+++ head/sys/arm/include/cpufunc.h  Sun Jan 31 13:59:16 2016
(r295092)
@@ -164,9 +164,6 @@ struct cpu_functions {
 
/* Soft functions */
 
-   int (*cf_dataabt_fixup) (void *arg);
-   int (*cf_prefetchabt_fixup) (void *arg);
-
void(*cf_context_switch)(void);
 
void(*cf_setup) (void);
@@ -215,12 +212,6 @@ extern u_int cputype;
 
 #define cpu_sleep(m)   cpufuncs.cf_sleep(m)
 

svn commit: r294989 - in head/sys: arm/freescale/vybrid arm/xilinx dev/usb/controller mips/atheros powerpc/ps3

[Michal Meloun]

Author: mmel
Date: Thu Jan 28 14:11:59 2016
New Revision: 294989
URL: https://svnweb.freebsd.org/changeset/base/294989

Log:
  EHCI: Make core reset and port speed reading more generic.
  
  Use driver settable callbacks for handling of:
  - core post reset
  - reading actual port speed
  
  Typically, OTG enabled EHCI cores wants setting of USBMODE register,
  but this register is not defined in EHCI specification and different
  cores can have it on different offset.
  
  Also, for cores with TT extension, actual port speed must be determinable.
  But again, EHCI specification not covers this so this patch provides
  function for two most common variant of speed bits layout.
  
  Reviewed by: hselasky
  Differential Revision: https://reviews.freebsd.org/D5088

Modified:
  head/sys/arm/freescale/vybrid/vf_ehci.c
  head/sys/arm/xilinx/zy7_ehci.c
  head/sys/dev/usb/controller/ehci.c
  head/sys/dev/usb/controller/ehci.h
  head/sys/dev/usb/controller/ehci_ixp4xx.c
  head/sys/dev/usb/controller/ehci_mv.c
  head/sys/dev/usb/controller/ehcireg.h
  head/sys/mips/atheros/ar71xx_ehci.c
  head/sys/powerpc/ps3/ehci_ps3.c

Modified: head/sys/arm/freescale/vybrid/vf_ehci.c
==
--- head/sys/arm/freescale/vybrid/vf_ehci.c Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/arm/freescale/vybrid/vf_ehci.c Thu Jan 28 14:11:59 2016
(r294989)
@@ -169,6 +169,18 @@ static devclass_t ehci_devclass;
 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
 MODULE_DEPEND(ehci, usb, 1, 1, 1);
 
+static void
+vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
+{
+   uint32_t usbmode;
+
+   /* Force HOST mode */
+   usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
+   usbmode &= ~EHCI_UM_CM;
+   usbmode |= EHCI_UM_CM_HOST;
+   EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
+}
+
 /*
  * Public methods
  */
@@ -343,8 +355,10 @@ vybrid_ehci_attach(device_t dev)
reg |= 0x3;
bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
 
-   /* Set flags */
-   sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_NORESTERM;
+   /* Set flags  and callbacks*/
+   sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
+   sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
+   sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
 
err = ehci_init(sc);
if (!err) {

Modified: head/sys/arm/xilinx/zy7_ehci.c
==
--- head/sys/arm/xilinx/zy7_ehci.c  Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/arm/xilinx/zy7_ehci.c  Thu Jan 28 14:11:59 2016
(r294989)
@@ -138,6 +138,18 @@ __FBSDID("$FreeBSD$");
 #define EHCI_REG_OFFSETZY7_USB_CAPLENGTH_HCIVERSION
 #define EHCI_REG_SIZE  0x100
 
+static void
+zy7_ehci_post_reset(struct ehci_softc *ehci_softc)
+{
+   uint32_t usbmode;
+
+   /* Force HOST mode */
+   usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
+   usbmode &= ~EHCI_UM_CM;
+   usbmode |= EHCI_UM_CM_HOST;
+   EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
+}
+
 static int
 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
 {
@@ -275,8 +287,9 @@ zy7_ehci_attach(device_t dev)
}
 
/* Customization. */
-   sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_TT |
-   EHCI_SCFLG_NORESTERM;
+   sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
+   sc->sc_vendor_post_reset = zy7_ehci_post_reset;
+   sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
 
/* Modify FIFO burst threshold from 2 to 8. */
bus_space_write_4(sc->sc_io_tag, bsh,

Modified: head/sys/dev/usb/controller/ehci.c
==
--- head/sys/dev/usb/controller/ehci.c  Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/dev/usb/controller/ehci.c  Thu Jan 28 14:11:59 2016
(r294989)
@@ -189,24 +189,8 @@ ehci_reset(ehci_softc_t *sc)
usb_pause_mtx(NULL, hz / 128);
hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
if (!hcr) {
-   if (sc->sc_flags & (EHCI_SCFLG_SETMODE | 
EHCI_SCFLG_BIGEMMIO)) {
-   /*
-* Force USBMODE as requested.  Controllers
-* may have multiple operating modes.
-*/
-   uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
-   if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
-   usbmode = (usbmode &~ EHCI_UM_CM) | 
EHCI_UM_CM_HOST;
-   device_printf(sc->sc_bus.bdev,
-   "set host controller mode\n");
-   }
-

svn commit: r294660 - in head/sys: conf dev/extres dev/extres/clk

[Michal Meloun]

Author: mmel
Date: Sun Jan 24 11:00:38 2016
New Revision: 294660
URL: https://svnweb.freebsd.org/changeset/base/294660

Log:
  Add clock framework, a first part of new 'extended resources' family of
  support frameworks(i.e. reset/regulators/phy/tsensors/fuses...).
  
  The clock framework significantly simplifies handling of complex clock
  structures found in modern SoCs. It provides the unified consumers
  interface, holds and manages actual clock topology, frequency and gating.
  
  It's tested on three different ARM boards (Nvidia Tegra TK1, Inforce 6410 and
  Odroid XU2) and on one MIPS board (Creator Ci20) by kan@.
  
  The framework is still far from perfect and probably doesn't have stable
  interface yet, but we want to start testing it on more real boards and
  different architectures.
  
  Reviewed by: ian, kan (earlier version)

Added:
  head/sys/dev/extres/
  head/sys/dev/extres/clk/
  head/sys/dev/extres/clk/clk.c   (contents, props changed)
  head/sys/dev/extres/clk/clk.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_div.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_div.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_fixed.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_fixed.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_gate.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_gate.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_mux.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_mux.h   (contents, props changed)
  head/sys/dev/extres/clk/clkdev_if.m   (contents, props changed)
  head/sys/dev/extres/clk/clknode_if.m   (contents, props changed)
Modified:
  head/sys/conf/files
  head/sys/conf/options

Modified: head/sys/conf/files
==
--- head/sys/conf/files Sun Jan 24 09:24:23 2016(r294659)
+++ head/sys/conf/files Sun Jan 24 11:00:38 2016(r294660)
@@ -1410,6 +1410,13 @@ dev/ex/if_ex.c   optional ex
 dev/ex/if_ex_isa.c optional ex isa
 dev/ex/if_ex_pccard.c  optional ex pccard
 dev/exca/exca.coptional cbb
+dev/extres/clk/clk.c   optional ext_resources clk
+dev/extres/clk/clkdev_if.m optional ext_resources clk
+dev/extres/clk/clknode_if.moptional ext_resources clk
+dev/extres/clk/clk_div.c   optional ext_resources clk
+dev/extres/clk/clk_fixed.c optional ext_resources clk
+dev/extres/clk/clk_gate.c  optional ext_resources clk
+dev/extres/clk/clk_mux.c   optional ext_resources clk
 dev/fatm/if_fatm.c optional fatm pci
 dev/fb/fbd.c   optional fbd | vt
 dev/fb/fb_if.m standard

Modified: head/sys/conf/options
==
--- head/sys/conf/options   Sun Jan 24 09:24:23 2016(r294659)
+++ head/sys/conf/options   Sun Jan 24 11:00:38 2016(r294660)
@@ -90,6 +90,7 @@ COMPAT_LINUXKPI   opt_compat.h
 COMPILING_LINT opt_global.h
 CY_PCI_FASTINTR
 DEADLKRES  opt_watchdog.h
+EXT_RESOURCES  opt_global.h
 DIRECTIO
 FILEMONopt_dontuse.h
 FFCLOCK

Added: head/sys/dev/extres/clk/clk.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/clk/clk.c   Sun Jan 24 11:00:38 2016
(r294660)
@@ -0,0 +1,1261 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include "opt_

svn commit: r294661 - in head/sys: conf dev/extres/hwreset

[Michal Meloun]

Author: mmel
Date: Sun Jan 24 11:03:35 2016
New Revision: 294661
URL: https://svnweb.freebsd.org/changeset/base/294661

Log:
  Add reset framework, a second part of new 'extended resources' family of
  support frameworks (i.e. regulators/phy/tsensors/fuses...).
  
  It provides simple unified consumers interface for manipulations with
  on-chip resets.
  
  Reviewed by: ian, imp (paritaly)

Added:
  head/sys/dev/extres/hwreset/
  head/sys/dev/extres/hwreset/hwreset.c   (contents, props changed)
  head/sys/dev/extres/hwreset/hwreset.h   (contents, props changed)
  head/sys/dev/extres/hwreset/hwreset_if.m   (contents, props changed)
Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Sun Jan 24 11:00:38 2016(r294660)
+++ head/sys/conf/files Sun Jan 24 11:03:35 2016(r294661)
@@ -1417,6 +1417,8 @@ dev/extres/clk/clk_div.c  optional ext_re
 dev/extres/clk/clk_fixed.c optional ext_resources clk
 dev/extres/clk/clk_gate.c  optional ext_resources clk
 dev/extres/clk/clk_mux.c   optional ext_resources clk
+dev/extres/hwreset/hwreset.c   optional ext_resources hwreset
+dev/extres/hwreset/hwreset_if.moptional ext_resources hwreset
 dev/fatm/if_fatm.c optional fatm pci
 dev/fb/fbd.c   optional fbd | vt
 dev/fb/fb_if.m standard

Added: head/sys/dev/extres/hwreset/hwreset.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/hwreset/hwreset.c   Sun Jan 24 11:03:35 2016
(r294661)
@@ -0,0 +1,186 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_platform.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef FDT
+#include 
+#include 
+#endif
+
+#include 
+
+#include "hwreset_if.h"
+
+struct hwreset {
+   device_t consumer_dev;  /* consumer device*/
+   device_t provider_dev;  /* provider device*/
+   int rst_id; /* reset id */
+};
+
+MALLOC_DEFINE(M_HWRESET, "hwreset", "Reset framework");
+
+int
+hwreset_assert(hwreset_t rst)
+{
+
+   return (HWRESET_ASSERT(rst->provider_dev, rst->rst_id, true));
+}
+
+int
+hwreset_deassert(hwreset_t rst)
+{
+
+   return (HWRESET_ASSERT(rst->provider_dev, rst->rst_id, false));
+}
+
+int
+hwreset_is_asserted(hwreset_t rst, bool *value)
+{
+
+   return (HWRESET_IS_ASSERTED(rst->provider_dev, rst->rst_id, value));
+}
+
+void
+hwreset_release(hwreset_t rst)
+{
+   free(rst, M_HWRESET);
+}
+
+int
+hwreset_get_by_id(device_t consumer_dev, device_t provider_dev, intptr_t id,
+hwreset_t *rst_out)
+{
+   hwreset_t rst;
+
+   /* Create handle */
+   rst = malloc(sizeof(struct hwreset), M_HWRESET,
+   M_WAITOK | M_ZERO);
+   rst->consumer_dev = consumer_dev;
+   rst->provider_dev = provider_dev;
+   rst->rst_id = id;
+   *rst_out = rst;
+   return (0);
+}
+
+#ifdef FDT
+int
+hwreset_default_ofw_map(device_t provider_dev, phandle_t xref, int ncells,
+pcell_t *cells, intptr_t *id)
+{
+   if (ncells == 0)
+   *id = 1;
+   else if (ncells == 1)
+   *id = cells[0];
+   else
+   return  (ERANGE);
+
+   return (0);
+}
+
+int
+hwreset_get_by_ofw_idx(device_t consumer_dev, int idx, hwreset_t *rst)
+{
+   phandle_t cnode, xnode;
+   pcell_t *cells;
+   devi

Re: svn commit: r295557 - head/sys/dev/uart

[Michal Meloun]

Dne 13.02.2016 v 1:58 Marius Strobl napsal(a):
> On Sat, Feb 13, 2016 at 06:53:25AM +1100, Bruce Evans wrote:
>> On Fri, 12 Feb 2016, Marius Strobl wrote:
>>
>>> On Fri, Feb 12, 2016 at 05:14:58AM +, Michal Meloun wrote:
>>>> Author: mmel
>>>> Date: Fri Feb 12 05:14:58 2016
>>>> New Revision: 295557
>>>> URL: https://svnweb.freebsd.org/changeset/base/295557
>>>>
>>>> Log:
>>>>   UART: Fix spurious interrupts generated by ns8250 and lpc drivers:
>>>>- don't enable transmitter empty interrupt before filling TX FIFO.
>>>
>>> Are you sure this doesn't create a race that leads to lost TX ready
>>> interrupts? For a single character, the TX FIFO very well may be empty
>>> again at the point in time IER_ETXRDY is enabled now.  With the varying
>>> behavior of 8250/16x50 chips - some of which is documented in sio(4) -
>>
>> That is mostly FUD.  More likely driver bugs than chip bugs.
>>
>> A non-broken xx50 interrupts after you (re)enable tx interrupts, iff
>> the fifo is already empty.  This gives a "spurious" interrupt.  But
>> perhaps depending on this is too fragile.  Normal operation is to keep
>> the tx interrupt enabled and depend on writing to the fifo causing a
>> tx interrupt later.  But it is a more common chip bug for tx interrupts
>> later to not go away when they should (normally by reading the IIR),
>> so some drivers toggle the tx interrupt enable dynamically.
>>
>> An example of a driver bug is only enabling tx interrupts for this.
>> It takes a transition of the interrupt enable bit from off to on to
>> get the interrupt.  Other driver bugs may result in a missing transition
>> because the bit was supposed to be off but is actually on.
>>
>>> I'd expect there are many that no longer generate a TX ready at all
>>> with this change in place. In this case, receiving spurious interrupts
>>> (which ones? IIR_NOPEND? IIR_TXRDY?) with some devices appears to be
>>> the lesser evil.
>>
>> Not many.  Only broken ones.
> 
> In my experience many xx50 are broken, especially the integrated
> on-board ones you still have in workstations and servers today.
> 
>> The "spurious" interrupts are just normal
>> ones from bon-broken chips:
>>
>> - uart first does a potentially-unbounded busy-wait before the doing
>>anything to ensure that the fifo is empty.  This should be unecessary
>>since this function should not be called unless sc_txbusy is 0 and
>>sc_txbusy should be nonzero if the fifo is not empty.  If it is called
>>when the fifo is not emptu, then the worst-case busy-wait is approx.
>>640 seconds for a 128-byte fifo at 2 bps. The 'broken_txfifo case'
>>busy-waits for a long time in normal operation.
>> - enabling the tx interrupt causes one immediately on non-broken uarts
>> - the interrupt handler is normally called immediately.  Then it always
>>blocks on uart_lock()
>> - then the main code fills the fifo and unlocks
>> - then the interrupt handler runs.  It normally finds that the fifo is
>>not empty (since it has just been filled) and does nothing
>> - another tx interrupt occurs later and the interrupt handler runs again.
>>It normally doesn't hit the lock again, and normally finds the fifo
>>empty, so it does something.
> 
> You correctly describe what happens at r295556 with a non-broken xx50.
> That revision causes a spurious interrupt with non-broken xx50 but
> also ensures that the relevant TX interrupt isn't missed with broken
> xx50 that do not issue an interrupt when enabling IER_ETXRDY. Besides,
> as you say, the general approach of dynamically enabling TX interrupts
> works around the common brokenness of these interrupts no longer going
> away when they should.
> 
>> But you are probably correct that a 1-byte write to the fifo often
>> loses the race.  This depends on how fast the hardware moves the byte
>> from the fifo to the tx register.  Actually, since we didn't wait
>> for the tx register to become empty, it will often take a full character
>> time before the move.  After that, I think it might take 1 bit time but
>> no more.
> 
> My concern is that with r295557, when this race is lost no TX interrupt
> is seen at all with broken xx50 that do not trigger an interrupt when
> enabling IER_ETXRDY.
> 
> Marius
> 

No, I’m not sure, nobody can be sure if we talking about ns8250
compatible device(s). Also, all UARTs known to me, generates an
interrupt on TX unmasking (assuming level sensitive interrupt).
Only IIR 

svn commit: r297011 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Fri Mar 18 07:13:09 2016
New Revision: 297011
URL: https://svnweb.freebsd.org/changeset/base/297011

Log:
  TEGRA: Fix tegra_pcie driver after rman_res_t size change.

Modified:
  head/sys/arm/nvidia/tegra_pcie.c

Modified: head/sys/arm/nvidia/tegra_pcie.c
==
--- head/sys/arm/nvidia/tegra_pcie.cFri Mar 18 04:22:07 2016
(r297010)
+++ head/sys/arm/nvidia/tegra_pcie.cFri Mar 18 07:13:09 2016
(r297011)
@@ -491,7 +491,7 @@ tegra_pcib_alloc_resource(device_t dev, 
struct rman *rm;
struct resource *res;
 
-   debugf("%s: enter %d start %lx end %lx count %lx\n", __func__,
+   debugf("%s: enter %d start %#jx end %#jx count %#jx\n", __func__,
type, start, end, count);
sc = device_get_softc(dev);
 
@@ -513,7 +513,7 @@ tegra_pcib_alloc_resource(device_t dev, 
 
if (bootverbose) {
device_printf(dev,
-   "rman_reserve_resource: start=%#lx, end=%#lx, count=%#lx\n",
+   "rman_reserve_resource: start=%#jx, end=%#jx, count=%#jx\n",
start, end, count);
}
 
@@ -532,7 +532,7 @@ tegra_pcib_alloc_resource(device_t dev, 
 fail:
if (bootverbose) {
device_printf(dev, "%s FAIL: type=%d, rid=%d, "
-   "start=%016lx, end=%016lx, count=%016lx, flags=%x\n",
+   "start=%016jx, end=%016jx, count=%016jx, flags=%x\n",
__func__, type, *rid, start, end, count, flags);
}
 
@@ -565,14 +565,13 @@ tegra_pcib_release_resource(device_t dev
 
 static int
 tegra_pcib_adjust_resource(device_t dev, device_t child, int type,
-   struct resource *res, u_long start, u_long end)
+   struct resource *res, rman_res_t start, rman_res_t 
end)
 {
struct tegra_pcib_softc *sc;
struct rman *rm;
 
sc = device_get_softc(dev);
-   debugf("%s: %d start %lx end %lx \n", __func__,
-   type, start, end);
+   debugf("%s: %d start %jx end %jx \n", __func__, type, start, end);
 
 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
if (type == PCI_RES_BUS)
@@ -609,7 +608,7 @@ tegra_pcib_pcie_activate_resource(device
}
 
if (bootverbose)
-   printf("%s: start %zx, len %ld\n", __func__, start,
+   printf("%s: start %zx, len %jd\n", __func__, start,
rman_get_size(r));
 
p = pmap_mapdev(start, (vm_size_t)rman_get_size(r));
@@ -667,7 +666,7 @@ tegra_pcib_route_interrupt(device_t bus,
struct tegra_pcib_softc *sc;
 
sc = device_get_softc(bus);
-   device_printf(bus, "route pin %d for device %d.%d to %lu\n",
+   device_printf(bus, "route pin %d for device %d.%d to %ju\n",
  pin, pci_get_slot(dev), pci_get_function(dev),
  rman_get_start(sc->irq_res));
 
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svn commit: r296903 - head/sys/dev/extres/clk

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:25:26 2016
New Revision: 296903
URL: https://svnweb.freebsd.org/changeset/base/296903

Log:
  CLK: Remove forgotten mutex from clk_fixed class.

Modified:
  head/sys/dev/extres/clk/clk_fixed.c
  head/sys/dev/extres/clk/clk_fixed.h

Modified: head/sys/dev/extres/clk/clk_fixed.c
==
--- head/sys/dev/extres/clk/clk_fixed.c Tue Mar 15 15:24:55 2016
(r296902)
+++ head/sys/dev/extres/clk/clk_fixed.c Tue Mar 15 15:25:26 2016
(r296903)
@@ -42,13 +42,9 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
-#defineDEVICE_LOCK(_sc)  mtx_lock((_sc)->mtx)
-#defineDEVICE_UNLOCK(_sc)mtx_unlock((_sc)->mtx)
-
 static int clknode_fixed_init(struct clknode *clk, device_t dev);
 static int clknode_fixed_recalc(struct clknode *clk, uint64_t *freq);
 struct clknode_fixed_sc {
-   struct mtx  *mtx;
int fixed_flags;
uint64_tfreq;
uint32_tmult;
@@ -74,6 +70,7 @@ clknode_fixed_init(struct clknode *clk, 
clknode_init_parent_idx(clk, 0);
return(0);
 }
+
 static int
 clknode_fixed_recalc(struct clknode *clk, uint64_t *freq)
 {
@@ -90,8 +87,7 @@ clknode_fixed_recalc(struct clknode *clk
 }
 
 int
-clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef,
-struct mtx *dev_mtx)
+clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef)
 {
struct clknode *clk;
struct clknode_fixed_sc *sc;
@@ -103,7 +99,6 @@ clknode_fixed_register(struct clkdom *cl
return (1);
 
sc = clknode_get_softc(clk);
-   sc->mtx = dev_mtx;
sc->fixed_flags = clkdef->fixed_flags;
sc->freq = clkdef->freq;
sc->mult = clkdef->mult;

Modified: head/sys/dev/extres/clk/clk_fixed.h
==
--- head/sys/dev/extres/clk/clk_fixed.h Tue Mar 15 15:24:55 2016
(r296902)
+++ head/sys/dev/extres/clk/clk_fixed.h Tue Mar 15 15:25:26 2016
(r296903)
@@ -47,7 +47,6 @@ struct clk_fixed_def {
int fixed_flags;
 };
 
-int clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef,
-struct mtx *dev_mtx);
+int clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def 
*clkdef);
 
 #endif /*_DEV_EXTRES_CLK_FIXED_H_*/
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svn commit: r296905 - head/sys/dev/extres/clk

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:28:24 2016
New Revision: 296905
URL: https://svnweb.freebsd.org/changeset/base/296905

Log:
  CLK: Add and use explicit locking for access to clock device registers.
  Implicit locking (for read/write/modify) is not sufficient for complex
  cases.

Modified:
  head/sys/dev/extres/clk/clk_div.c
  head/sys/dev/extres/clk/clk_gate.c
  head/sys/dev/extres/clk/clk_mux.c
  head/sys/dev/extres/clk/clkdev_if.m

Modified: head/sys/dev/extres/clk/clk_div.c
==
--- head/sys/dev/extres/clk/clk_div.c   Tue Mar 15 15:27:15 2016
(r296904)
+++ head/sys/dev/extres/clk/clk_div.c   Tue Mar 15 15:28:24 2016
(r296905)
@@ -46,6 +46,10 @@ __FBSDID("$FreeBSD$");
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
 #defineMD4(_clk, off, clr, set )   
\
CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
+#defineDEVICE_LOCK(_clk)   
\
+   CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
+#defineDEVICE_UNLOCK(_clk) 
\
+   CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
 
 static int clknode_div_init(struct clknode *clk, device_t dev);
 static int clknode_div_recalc(struct clknode *clk, uint64_t *req);
@@ -86,7 +90,9 @@ clknode_div_init(struct clknode *clk, de
 
sc = clknode_get_softc(clk);
 
+   DEVICE_LOCK(clk);
rv = RD4(clk, sc->offset, );
+   DEVICE_UNLOCK(clk);
if (rv != 0)
return (rv);
 
@@ -171,12 +177,17 @@ clknode_div_set_freq(struct clknode *clk
(*fout != (_fin / divider)))
return (ERANGE);
 
+   DEVICE_LOCK(clk);
rv = MD4(clk, sc->offset,
(sc->i_mask << sc->i_shift) | (sc->f_mask << sc->f_shift),
(i_div << sc->i_shift) | (f_div << sc->f_shift));
-   if (rv != 0)
+   if (rv != 0) {
+   DEVICE_UNLOCK(clk);
return (rv);
+   }
RD4(clk, sc->offset, );
+   DEVICE_UNLOCK(clk);
+
sc->divider = divider;
}
 

Modified: head/sys/dev/extres/clk/clk_gate.c
==
--- head/sys/dev/extres/clk/clk_gate.c  Tue Mar 15 15:27:15 2016
(r296904)
+++ head/sys/dev/extres/clk/clk_gate.c  Tue Mar 15 15:28:24 2016
(r296905)
@@ -46,7 +46,10 @@ __FBSDID("$FreeBSD$");
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
 #defineMD4(_clk, off, clr, set )   
\
CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
-
+#defineDEVICE_LOCK(_clk)   
\
+   CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
+#defineDEVICE_UNLOCK(_clk) 
\
+   CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
 
 static int clknode_gate_init(struct clknode *clk, device_t dev);
 static int clknode_gate_set_gate(struct clknode *clk, bool enable);
@@ -77,7 +80,9 @@ clknode_gate_init(struct clknode *clk, d
int rv;
 
sc = clknode_get_softc(clk);
+   DEVICE_LOCK(clk);
rv = RD4(clk, sc->offset, );
+   DEVICE_UNLOCK(clk);
if (rv != 0)
return (rv);
reg = (reg >> sc->shift) & sc->mask;
@@ -95,11 +100,15 @@ clknode_gate_set_gate(struct clknode *cl
 
sc = clknode_get_softc(clk);
sc->ungated = enable;
+   DEVICE_LOCK(clk);
rv = MD4(clk, sc->offset, sc->mask << sc->shift,
(sc->ungated ? sc->on_value : sc->off_value) << sc->shift);
-   if (rv != 0)
+   if (rv != 0) {
+   DEVICE_UNLOCK(clk);
return (rv);
+   }
RD4(clk, sc->offset, );
+   DEVICE_UNLOCK(clk);
return(0);
 }
 

Modified: head/sys/dev/extres/clk/clk_mux.c
==
--- head/sys/dev/extres/clk/clk_mux.c   Tue Mar 15 15:27:15 2016
(r296904)
+++ head/sys/dev/extres/clk/clk_mux.c   Tue Mar 15 15:28:24 2016
(r296905)
@@ -46,6 +46,10 @@ __FBSDID("$FreeBSD$");
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
 #defineMD4(_clk, off, clr, set )   
\
CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
+#defineDEVICE_LOCK(_clk)   
\
+   CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
+#defineDEVICE_UNLOCK(_clk) 
\
+   CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
 
 static int clknode_mux_init(struct clknode *clk, device_t dev);
 static int clknode_mux_set_mux(struct clknode *clk, int 

svn commit: r296906 - in head/sys: conf dev/extres/regulator

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:30:17 2016
New Revision: 296906
URL: https://svnweb.freebsd.org/changeset/base/296906

Log:
  Add regulator framework, a next part of new 'extended resources' family of
  support frameworks(i.e. clk/reset/phy/tsensors/fuses...).
  
  The framework is still far from perfect and probably doesn't have stable
  interface yet, but we want to start testing it on more real boards and
  different architectures.

Added:
  head/sys/dev/extres/regulator/
  head/sys/dev/extres/regulator/regdev_if.m   (contents, props changed)
  head/sys/dev/extres/regulator/regnode_if.m   (contents, props changed)
  head/sys/dev/extres/regulator/regulator.c   (contents, props changed)
  head/sys/dev/extres/regulator/regulator.h   (contents, props changed)
  head/sys/dev/extres/regulator/regulator_bus.c   (contents, props changed)
  head/sys/dev/extres/regulator/regulator_fixed.c   (contents, props changed)
  head/sys/dev/extres/regulator/regulator_fixed.h   (contents, props changed)
Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Mar 15 15:28:24 2016(r296905)
+++ head/sys/conf/files Tue Mar 15 15:30:17 2016(r296906)
@@ -1420,6 +1420,11 @@ dev/extres/clk/clk_gate.coptional ext_r
 dev/extres/clk/clk_mux.c   optional ext_resources clk
 dev/extres/hwreset/hwreset.c   optional ext_resources hwreset
 dev/extres/hwreset/hwreset_if.moptional ext_resources hwreset
+dev/extres/regulator/regdev_if.m   optional ext_resources regulator
+dev/extres/regulator/regnode_if.m  optional ext_resources regulator
+dev/extres/regulator/regulator.c   optional ext_resources regulator
+dev/extres/regulator/regulator_bus.c   optional ext_resources regulator fdt
+dev/extres/regulator/regulator_fixed.c optional ext_resources regulator
 dev/fatm/if_fatm.c optional fatm pci
 dev/fb/fbd.c   optional fbd | vt
 dev/fb/fb_if.m standard
@@ -1561,10 +1566,10 @@ ipw_monitor.fw  optional ipwmonitorfw |
compile-with"${NORMAL_FW}"  \
no-obj no-implicit-rule \
clean   "ipw_monitor.fw"
-dev/iscsi/icl.coptional iscsi | ctl 
-dev/iscsi/icl_conn_if.moptional iscsi | ctl 
+dev/iscsi/icl.coptional iscsi | ctl
+dev/iscsi/icl_conn_if.moptional iscsi | ctl
 dev/iscsi/icl_proxy.c  optional iscsi | ctl
-dev/iscsi/icl_soft.c   optional iscsi | ctl 
+dev/iscsi/icl_soft.c   optional iscsi | ctl
 dev/iscsi/iscsi.c  optional iscsi scbus
 dev/iscsi_initiator/iscsi.coptional iscsi_initiator scbus
 dev/iscsi_initiator/iscsi_subr.c   optional iscsi_initiator scbus

Added: head/sys/dev/extres/regulator/regdev_if.m
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/regulator/regdev_if.m   Tue Mar 15 15:30:17 2016
(r296906)
@@ -0,0 +1,56 @@
+#-
+# Copyright 2016 Michal Meloun <m...@freebsd.org>
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#notice, this list of conditions and the following disclaimer in the
+#documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# $FreeBSD$
+#
+
+#ifdef FDT
+#include 
+#include 
+#endif
+
+#include 
+
+INTERFACE regdev;
+
+#ifdef FDT
+
+HEADER {
+int regdev_default_ofw_map(device_t , phandle_t, int, pcell_t *, intptr_t *);
+}
+
+#
+# map fdt property cells to regulator number
+# Returns 0 on success or a standard errno value.
+#
+METHOD int map {
+   device_tprovider_dev;
+   phandle

svn commit: r296901 - in head/sys/dev: gpio ofw

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:24:18 2016
New Revision: 296901
URL: https://svnweb.freebsd.org/changeset/base/296901

Log:
  Use EARLY_DRIVER_MODULE() with BUS_PASS_BUS priority for ofw_gpiobus
  and ofw_iicbus. This causes enumeration of gpiobus/iicbus at the base driver
  attach time. Due to this, childern drivers can be also attached early.

Modified:
  head/sys/dev/gpio/ofw_gpiobus.c
  head/sys/dev/ofw/ofw_iicbus.c

Modified: head/sys/dev/gpio/ofw_gpiobus.c
==
--- head/sys/dev/gpio/ofw_gpiobus.c Tue Mar 15 15:24:14 2016
(r296900)
+++ head/sys/dev/gpio/ofw_gpiobus.c Tue Mar 15 15:24:18 2016
(r296901)
@@ -575,6 +575,7 @@ static devclass_t ofwgpiobus_devclass;
 
 DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods,
 sizeof(struct gpiobus_softc), gpiobus_driver);
-DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass, 0, 
0);
+EARLY_DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass,
+0, 0, BUS_PASS_BUS);
 MODULE_VERSION(ofw_gpiobus, 1);
 MODULE_DEPEND(ofw_gpiobus, gpiobus, 1, 1, 1);

Modified: head/sys/dev/ofw/ofw_iicbus.c
==
--- head/sys/dev/ofw/ofw_iicbus.c   Tue Mar 15 15:24:14 2016
(r296900)
+++ head/sys/dev/ofw/ofw_iicbus.c   Tue Mar 15 15:24:18 2016
(r296901)
@@ -80,8 +80,10 @@ static devclass_t ofwiicbus_devclass;
 
 DEFINE_CLASS_1(iicbus, ofw_iicbus_driver, ofw_iicbus_methods,
 sizeof(struct iicbus_softc), iicbus_driver);
-DRIVER_MODULE(ofw_iicbus, iicbb, ofw_iicbus_driver, ofwiicbus_devclass, 0, 0);
-DRIVER_MODULE(ofw_iicbus, iichb, ofw_iicbus_driver, ofwiicbus_devclass, 0, 0);
+EARLY_DRIVER_MODULE(ofw_iicbus, iicbb, ofw_iicbus_driver, ofwiicbus_devclass,
+0, 0, BUS_PASS_BUS);
+EARLY_DRIVER_MODULE(ofw_iicbus, iichb, ofw_iicbus_driver, ofwiicbus_devclass,
+0, 0, BUS_PASS_BUS);
 MODULE_VERSION(ofw_iicbus, 1);
 MODULE_DEPEND(ofw_iicbus, iicbus, 1, 1, 1);
 
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svn commit: r296904 - in head/sys: conf dev/extres/clk

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:27:15 2016
New Revision: 296904
URL: https://svnweb.freebsd.org/changeset/base/296904

Log:
  CLK: Add enumerator for 'clocks' OFW node. Add bus device bindings
  for clk_fixed class.

Added:
  head/sys/dev/extres/clk/clk_bus.c   (contents, props changed)
Modified:
  head/sys/conf/files
  head/sys/dev/extres/clk/clk.c
  head/sys/dev/extres/clk/clk.h
  head/sys/dev/extres/clk/clk_fixed.c

Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Mar 15 15:25:26 2016(r296903)
+++ head/sys/conf/files Tue Mar 15 15:27:15 2016(r296904)
@@ -1413,6 +1413,7 @@ dev/exca/exca.c   optional cbb
 dev/extres/clk/clk.c   optional ext_resources clk
 dev/extres/clk/clkdev_if.m optional ext_resources clk
 dev/extres/clk/clknode_if.moptional ext_resources clk
+dev/extres/clk/clk_bus.c   optional ext_resources clk fdt
 dev/extres/clk/clk_div.c   optional ext_resources clk
 dev/extres/clk/clk_fixed.c optional ext_resources clk
 dev/extres/clk/clk_gate.c  optional ext_resources clk

Modified: head/sys/dev/extres/clk/clk.c
==
--- head/sys/dev/extres/clk/clk.c   Tue Mar 15 15:25:26 2016
(r296903)
+++ head/sys/dev/extres/clk/clk.c   Tue Mar 15 15:27:15 2016
(r296904)
@@ -1258,4 +1258,75 @@ clk_get_by_ofw_name(device_t dev, const 
return (rv);
return (clk_get_by_ofw_index(dev, idx, clk));
 }
+
+/* --
+ *
+ * Support functions for parsing various clock related OFW things.
+ */
+
+/*
+ * Get "clock-output-names" and  (optional) "clock-indices" lists.
+ * Both lists are alocated using M_OFWPROP specifier.
+ *
+ * Returns number of items or 0.
+ */
+int
+clk_parse_ofw_out_names(device_t dev, phandle_t node, const char ***out_names,
+   uint32_t *indices)
+{
+   int name_items, rv;
+
+   *out_names = NULL;
+   indices = NULL;
+   if (!OF_hasprop(node, "clock-output-names"))
+   return (0);
+   rv = ofw_bus_string_list_to_array(node, "clock-output-names",
+   out_names);
+   if (rv <= 0)
+   return (0);
+   name_items = rv;
+
+   if (!OF_hasprop(node, "clock-indices"))
+   return (name_items);
+   rv = OF_getencprop_alloc(node, "clock-indices", sizeof (uint32_t),
+   (void **)indices);
+   if (rv != name_items) {
+   device_printf(dev, " Size of 'clock-output-names' and "
+   "'clock-indices' differs\n");
+   free(*out_names, M_OFWPROP);
+   free(indices, M_OFWPROP);
+   return (0);
+   }
+   return (name_items);
+}
+
+/*
+ * Get output clock name for single output clock node.
+ */
+int
+clk_parse_ofw_clk_name(device_t dev, phandle_t node, const char **name)
+{
+   const char **out_names;
+   const char  *tmp_name;
+   int rv;
+
+   *name = NULL;
+   if (!OF_hasprop(node, "clock-output-names")) {
+   tmp_name  = ofw_bus_get_name(dev);
+   if (tmp_name == NULL)
+   return (ENXIO);
+   *name = strdup(tmp_name, M_OFWPROP);
+   return (0);
+   }
+   rv = ofw_bus_string_list_to_array(node, "clock-output-names",
+   _names);
+   if (rv != 1) {
+   free(out_names, M_OFWPROP);
+   device_printf(dev, "Malformed 'clock-output-names' property\n");
+   return (ENXIO);
+   }
+   *name = strdup(out_names[0], M_OFWPROP);
+   free(out_names, M_OFWPROP);
+   return (0);
+}
 #endif

Modified: head/sys/dev/extres/clk/clk.h
==
--- head/sys/dev/extres/clk/clk.h   Tue Mar 15 15:25:26 2016
(r296903)
+++ head/sys/dev/extres/clk/clk.h   Tue Mar 15 15:27:15 2016
(r296904)
@@ -131,6 +131,9 @@ const char *clk_get_name(clk_t clk);
 #ifdef FDT
 int clk_get_by_ofw_index(device_t dev, int idx, clk_t *clk);
 int clk_get_by_ofw_name(device_t dev, const char *name, clk_t *clk);
+int clk_parse_ofw_out_names(device_t dev, phandle_t node,
+const char ***out_names, uint32_t *indices);
+int clk_parse_ofw_clk_name(device_t dev, phandle_t node, const char **name);
 #endif
 
 #endif /* _DEV_EXTRES_CLK_H_ */

Added: head/sys/dev/extres/clk/clk_bus.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/clk/clk_bus.c   Tue Mar 15 15:27:15 2016
(r296904)
@@ -0,0 +1,93 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserv

svn commit: r296907 - in head/sys: conf dev/extres/phy

[Michal Meloun]

Author: mmel
Date: Tue Mar 15 15:31:17 2016
New Revision: 296907
URL: https://svnweb.freebsd.org/changeset/base/296907

Log:
  Add phy framework, a next part of new 'extended resources' family of
  support frameworks (i.e. clk/regulators/tsensors/fuses...).
  
  It provides simple unified consumers interface for manipulations with
  phy (USB/SATA/PCIe) resources.

Added:
  head/sys/dev/extres/phy/
  head/sys/dev/extres/phy/phy.c   (contents, props changed)
  head/sys/dev/extres/phy/phy.h   (contents, props changed)
  head/sys/dev/extres/phy/phy_if.m   (contents, props changed)
Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Mar 15 15:30:17 2016(r296906)
+++ head/sys/conf/files Tue Mar 15 15:31:17 2016(r296907)
@@ -1418,6 +1418,8 @@ dev/extres/clk/clk_div.c  optional ext_re
 dev/extres/clk/clk_fixed.c optional ext_resources clk
 dev/extres/clk/clk_gate.c  optional ext_resources clk
 dev/extres/clk/clk_mux.c   optional ext_resources clk
+dev/extres/phy/phy.c   optional ext_resources phy
+dev/extres/phy/phy_if.moptional ext_resources phy
 dev/extres/hwreset/hwreset.c   optional ext_resources hwreset
 dev/extres/hwreset/hwreset_if.moptional ext_resources hwreset
 dev/extres/regulator/regdev_if.m   optional ext_resources regulator

Added: head/sys/dev/extres/phy/phy.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/phy/phy.c   Tue Mar 15 15:31:17 2016
(r296907)
@@ -0,0 +1,235 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_platform.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef FDT
+#include 
+#include 
+#endif
+
+#include  
+
+#include "phy_if.h"
+
+struct phy {
+   device_tconsumer_dev;   /* consumer device*/
+   device_tprovider_dev;   /* provider device*/
+   uintptr_t   phy_id; /* phy id */
+};
+
+MALLOC_DEFINE(M_PHY, "phy", "Phy framework");
+
+int
+phy_init(device_t consumer, phy_t phy)
+{
+
+   return (PHY_INIT(phy->provider_dev, phy->phy_id, true));
+}
+
+int
+phy_deinit(device_t consumer, phy_t phy)
+{
+
+   return (PHY_INIT(phy->provider_dev, phy->phy_id, false));
+}
+
+
+int
+phy_enable(device_t consumer, phy_t phy)
+{
+
+   return (PHY_ENABLE(phy->provider_dev, phy->phy_id, true));
+}
+
+int
+phy_disable(device_t consumer, phy_t phy)
+{
+
+   return (PHY_ENABLE(phy->provider_dev, phy->phy_id, false));
+}
+
+int
+phy_status(device_t consumer, phy_t phy, int *value)
+{
+
+   return (PHY_STATUS(phy->provider_dev, phy->phy_id, value));
+}
+
+int
+phy_get_by_id(device_t consumer_dev, device_t provider_dev, intptr_t id,
+phy_t *phy_out)
+{
+   phy_t phy;
+
+   /* Create handle */
+   phy = malloc(sizeof(struct phy), M_PHY,
+   M_WAITOK | M_ZERO);
+   phy->consumer_dev = consumer_dev;
+   phy->provider_dev = provider_dev;
+   phy->phy_id = id;
+   *phy_out = phy;
+   return (0);
+}
+
+void
+phy_release(phy_t phy)
+{
+   free(phy, M_PHY);
+}
+
+
+#ifdef FDT
+int phy_default_map(device_t provider, phandle_t xref, int ncells,
+pcell_t *cells, intptr_t *id)
+{
+
+   if (ncells == 0)
+   *id = 1;
+   else if (ncells == 1)
+   *id = cells[0];
+   else
+   return  (ERANGE);
+
+ 

svn commit: r297026 - head/sys/arm/conf

[Michal Meloun]

Author: mmel
Date: Fri Mar 18 15:27:57 2016
New Revision: 297026
URL: https://svnweb.freebsd.org/changeset/base/297026

Log:
  TEGRA: Connect TEGRA124 to universe build.

Added:
  head/sys/arm/conf/TEGRA124
 - copied, changed from r297025, head/sys/arm/conf/TEGRA124.common
Deleted:
  head/sys/arm/conf/TEGRA124.common
Modified:
  head/sys/arm/conf/JETSON-TK1

Modified: head/sys/arm/conf/JETSON-TK1
==
--- head/sys/arm/conf/JETSON-TK1Fri Mar 18 15:07:43 2016
(r297025)
+++ head/sys/arm/conf/JETSON-TK1Fri Mar 18 15:27:57 2016
(r297026)
@@ -19,7 +19,7 @@
 
 #NO_UNIVERSE
 
-include"TEGRA124.common"
+include"TEGRA124"
 ident  JETSON-TK1
 
 # Flattened Device Tree

Copied and modified: head/sys/arm/conf/TEGRA124 (from r297025, 
head/sys/arm/conf/TEGRA124.common)
==
--- head/sys/arm/conf/TEGRA124.common   Fri Mar 18 15:07:43 2016
(r297025, copy source)
+++ head/sys/arm/conf/TEGRA124  Fri Mar 18 15:27:57 2016(r297026)
@@ -21,6 +21,8 @@
 include"std.armv6"
 include"../nvidia/tegra124/std.tegra124"
 
+ident  TEGRA124
+
 optionsHZ=100  # Scheduling quantum is 10 milliseconds.
 optionsSCHED_ULE   # ULE scheduler
 optionsPLATFORM# Platform based SoC
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svn commit: r296936 - in head/sys: arm/conf arm/nvidia arm/nvidia/tegra124 boot/fdt/dts/arm

[Michal Meloun]

B Ethernet
+#devicerue # RealTek RTL8150 USB Ethernet
+#deviceudav# Davicom DM9601E USB
+
+# USB Wireless
+#devicerum # Ralink Technology RT2501USB 
wireless NICs
+
+# Wireless NIC cards
+#devicewlan# 802.11 support
+#devicewlan_wep# 802.11 WEP support
+#devicewlan_ccmp   # 802.11 CCMP support
+#devicewlan_tkip   # 802.11 TKIP support
+#devicewlan_amrr   # AMRR transmit rate control 
algorithm
+
+# PCI
+optionsNEW_PCIB
+device pci
+
+# PCI Ethernet NICs that use the common MII bus controller code.
+# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
+device re  # RealTek 8139C+/8169/8169S/8110S
+
+# DRM2
+#devicefbd
+#devicevt
+#devicesplash
+#devicekbdmux
+#devicedrm2
+
+# Sound
+#devicesound
+#devicesnd_hda
+
+# Flattened Device Tree
+optionsFDT # Configure using FDT/DTB data
+device fdt_pinctrl
+
+# SoC-specific devices
+
+#devicehwpmc
+#options   HWPMC_HOOKS

Added: head/sys/arm/nvidia/as3722.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/nvidia/as3722.cWed Mar 16 13:01:48 2016
(r296936)
@@ -0,0 +1,411 @@
+/*-
+ * Copyright (c) 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+/*
+ * AS3722 PMIC driver
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "clock_if.h"
+#include "regdev_if.h"
+
+#include "as3722.h"
+
+static struct ofw_compat_data compat_data[] = {
+   {"ams,as3722",  1},
+   {NULL,  0},
+};
+
+#defineLOCK(_sc)   sx_xlock(&(_sc)->lock)
+#defineUNLOCK(_sc) sx_xunlock(&(_sc)->lock)
+#defineLOCK_INIT(_sc)  sx_init(&(_sc)->lock, "as3722")
+#defineLOCK_DESTROY(_sc)   sx_destroy(&(_sc)->lock);
+#defineASSERT_LOCKED(_sc)  sx_assert(&(_sc)->lock, SA_XLOCKED);
+#defineASSERT_UNLOCKED(_sc)sx_assert(&(_sc)->lock, SA_UNLOCKED);
+
+#defineAS3722_DEVICE_ID0x0C
+
+/*
+ * Raw register access function.
+ */
+int
+as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val)
+{
+   uint8_t addr;
+   int rv;
+   struct iic_msg msgs[2] = {
+   {0, IIC_M_WR, 1, },
+   {0, IIC_M_RD, 1, val},
+   };
+
+   msgs[0].slave = sc->bus_addr;
+   msgs[1].slave = sc->bus_addr;
+   addr = reg;
+
+   rv = iicbus_transfer(sc->dev, msgs, 2);
+   if (rv != 0) {
+   device_printf(sc->dev,
+   "Error when reading reg 0x%02X, rv: %d\n", reg,  rv);
+   return (EIO);
+   }
+
+   return (0);
+}
+
+int as3722_read_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf,
+size_t size)
+{
+   uint8_t addr;
+   int rv;
+   struct iic_msg msgs[2] = {
+   {0, IIC_M_WR, 1, },
+   {0, IIC_M_RD, size, buf},
+   }

Re: svn commit: r297047 - head/sys/conf

[Michal Meloun]

Dne 19.03.2016 v 0:55 Bjoern A. Zeeb napsal(a):
> Author: bz
> Date: Fri Mar 18 23:55:25 2016
> New Revision: 297047
> URL: https://svnweb.freebsd.org/changeset/base/297047
> 
> Log:
>   Allow pci_host_generic to be compiled into ARM kernels, used, e.g., in
>   simulators.
>   
>   Sponsored by:   DARPA/AFRL
> 
> Modified:
>   head/sys/conf/files.arm
> 
> Modified: head/sys/conf/files.arm
> ==
> --- head/sys/conf/files.arm   Fri Mar 18 22:52:11 2016(r297046)
> +++ head/sys/conf/files.arm   Fri Mar 18 23:55:25 2016(r297047)
> @@ -103,6 +103,7 @@ dev/hwpmc/hwpmc_arm.c optionalhwpmc
>  dev/hwpmc/hwpmc_armv7.c  optionalhwpmc armv6
>  dev/iicbus/twsi/twsi.c   optionaltwsi
>  dev/ofw/ofw_cpu.coptionalfdt
> +dev/pci/pci_host_generic.c   optionalpci fdt
>  dev/psci/psci.c  optionalpsci
>  dev/psci/psci_arm.S  optionalpsci
>  dev/syscons/scgfbrndr.c  optionalsc
> 

This commit broke Tegra and all others boards with PCI(e) interface.
The pci_host_generic.c driver is unconditionally build into all
kernels with PCI and FDT defined. But, for now, we don't support
multiple different pcib in one kernel (all pcib drivers must have same
driver name 'pcib', because pci bus binding).
Please, convert this driver to standard device form (e.g.'device
pci_host_generic').
Michal

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svn commit: r297284 - in head/sys/arm: arm at91 conf include

[Michal Meloun]

Author: mmel
Date: Sat Mar 26 06:55:55 2016
New Revision: 297284
URL: https://svnweb.freebsd.org/changeset/base/297284

Log:
  ARM: Teach LINUX_BOOT_ABI to recognize DT blob.
  This allow us to boot FreeBSD kernel (using uImage encapsulation) directly
  from U-boot using 'bootm' command or by Android fastboot loader.
  For now, kernel uImage must be marked as Linux, but we can add support for
  FreeBSD into U-Boot later.

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/arm/at91/board_tsc4370.c
  head/sys/arm/conf/TEGRA124
  head/sys/arm/include/machdep.h

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Mar 26 03:46:12 2016(r297283)
+++ head/sys/arm/arm/machdep.c  Sat Mar 26 06:55:55 2016(r297284)
@@ -115,6 +115,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #ifdef FDT
+#include 
 #include 
 #include 
 #endif
@@ -959,7 +960,8 @@ makectx(struct trapframe *tf, struct pcb
  * Fake up a boot descriptor table
  */
 vm_offset_t
-fake_preload_metadata(struct arm_boot_params *abp __unused)
+fake_preload_metadata(struct arm_boot_params *abp __unused, void *dtb_ptr,
+size_t dtb_size)
 {
 #ifdef DDB
vm_offset_t zstart = 0, zend = 0;
@@ -997,6 +999,16 @@ fake_preload_metadata(struct arm_boot_pa
} else
 #endif
lastaddr = (vm_offset_t)
+   if (dtb_ptr != NULL) {
+   /* Copy DTB to KVA space and insert it into module chain. */
+   lastaddr = roundup(lastaddr, sizeof(int));
+   fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP;
+   fake_preload[i++] = sizeof(uint32_t);
+   fake_preload[i++] = (uint32_t)lastaddr;
+   memmove((void *)lastaddr, dtb_ptr, dtb_size);
+   lastaddr += dtb_size;
+   lastaddr = roundup(lastaddr, sizeof(int));
+   }
fake_preload[i++] = 0;
fake_preload[i] = 0;
preload_metadata = (void *)fake_preload;
@@ -1023,20 +1035,35 @@ linux_parse_boot_param(struct arm_boot_p
struct arm_lbabi_tag *walker;
uint32_t revision;
uint64_t serial;
+#ifdef FDT
+   struct fdt_header *dtb_ptr;
+   uint32_t dtb_size;
+#endif
 
/*
 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
 * is atags or dtb pointer.  If all of these aren't satisfied,
-* then punt.
+* then punt. Unfortunately, it looks like DT enabled kernels
+* doesn't uses board type and U-Boot delivers 0 in r1 for them.
 */
-   if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
-   return 0;
+   if (abp->abp_r0 != 0 || abp->abp_r2 == 0)
+   return (0);
+#ifdef FDT
+   /* Test if r2 point to valid DTB. */
+   dtb_ptr = (struct fdt_header *)abp->abp_r2;
+   if (fdt_check_header(dtb_ptr) == 0) {
+   dtb_size = fdt_totalsize(dtb_ptr);
+   return (fake_preload_metadata(abp, dtb_ptr, dtb_size));
+   }
+#endif
+   /* Old, ATAG based boot must have board type set. */
+   if (abp->abp_r1 == 0)
+   return (0);
 
board_id = abp->abp_r1;
walker = (struct arm_lbabi_tag *)
(abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
 
-   /* xxx - Need to also look for binary device tree */
if (ATAG_TAG(walker) != ATAG_CORE)
return 0;
 
@@ -1077,7 +1104,7 @@ linux_parse_boot_param(struct arm_boot_p
 
init_static_kenv(NULL, 0);
 
-   return fake_preload_metadata(abp);
+   return fake_preload_metadata(abp, NULL, 0);
 }
 #endif
 
@@ -1135,7 +1162,7 @@ default_parse_boot_param(struct arm_boot
return lastaddr;
 #endif
/* Fall back to hardcoded metadata. */
-   lastaddr = fake_preload_metadata(abp);
+   lastaddr = fake_preload_metadata(abp, NULL, 0);
 
return lastaddr;
 }

Modified: head/sys/arm/at91/board_tsc4370.c
==
--- head/sys/arm/at91/board_tsc4370.c   Sat Mar 26 03:46:12 2016
(r297283)
+++ head/sys/arm/at91/board_tsc4370.c   Sat Mar 26 06:55:55 2016
(r297284)
@@ -601,7 +601,7 @@ parse_boot_param(struct arm_boot_params 
inkernel_bootinfo = *(struct tsc_bootinfo *)(abp->abp_r1);
}
 
-   return fake_preload_metadata(abp);
+   return fake_preload_metadata(abp, NULL, 0);
 }
 
 ARM_BOARD(NONE, "TSC4370 Controller Board");

Modified: head/sys/arm/conf/TEGRA124
==
--- head/sys/arm/conf/TEGRA124  Sat Mar 26 03:46:12 2016(r297283)
+++ head/sys/arm/conf/TEGRA124  Sat Mar 26 06:55:55 2016(r297284)
@@ -28,6 +28,7 @@ options   SCHED_ULE   # ULE scheduler
 optionsPLATFORM# Platform based SoC
 optionsPLATFORM_SMP
 optionsSMP 

svn commit: r297288 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Sat Mar 26 10:09:28 2016
New Revision: 297288
URL: https://svnweb.freebsd.org/changeset/base/297288

Log:
  TEGRA: Fixes for UART driver:
   - add mising 'or' in tegra_uart_attach()
 Pointed by: kan
   - fix indentation of tegra_softc
   - remove forgoten debug printf

Modified:
  head/sys/arm/nvidia/tegra_uart.c

Modified: head/sys/arm/nvidia/tegra_uart.c
==
--- head/sys/arm/nvidia/tegra_uart.cSat Mar 26 08:59:56 2016
(r297287)
+++ head/sys/arm/nvidia/tegra_uart.cSat Mar 26 10:09:28 2016
(r297288)
@@ -60,8 +60,8 @@ __FBSDID("$FreeBSD$");
  * High-level UART interface.
  */
 struct tegra_softc {
-   struct ns8250_softc ns8250_base;
-   clk_t   clk;
+   struct ns8250_softc ns8250_base;
+   clk_t   clk;
hwreset_t   reset;
 };
 
@@ -82,7 +82,7 @@ tegra_uart_attach(struct uart_softc *sc)
ns8250->ier_rxbits = 0x1d;
ns8250->ier_mask = 0xc0;
ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask;
-   ns8250->ier = ns8250->ier_rxbits;
+   ns8250->ier |= ns8250->ier_rxbits;
uart_setreg(bas, REG_IER, ns8250->ier);
uart_barrier(bas);
return (0);
@@ -217,7 +217,6 @@ tegra_uart_probe(device_t dev)
device_printf(dev, "Cannot enable UART clock: %d\n", rv);
return (ENXIO);
}
-   device_printf(dev, "got UART clock: %lld\n", freq);
return (uart_bus_probe(dev, shift, (int)freq, 0, 0));
 }
 
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svn commit: r297286 - in head/sys: arm/arm dev/fdt

[Michal Meloun]

Author: mmel
Date: Sat Mar 26 06:59:01 2016
New Revision: 297286
URL: https://svnweb.freebsd.org/changeset/base/297286

Log:
  ARM: Parse command line delivered by U-Boot:
  - in atags
  - in DT blob (by using 'fdt chosen' U-Boot command)
  
  The command line must start with guard's string 'FreeBSD:' and can contain
  list of comma separated kenv strings. Also, boot modifier strings from
  boot.h are recognised and parsed into boothowto.
  
  The command line must be passed from U-Boot by setting of bootargs variable:
  'setenv bootargs FreeBSD:boot_single=1,vfs.root.mountfrom=ufs:/dev/ada0s1a'
  followed by 'fdt chosen' (only for DT based boot)

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/dev/fdt/fdt_common.c
  head/sys/dev/fdt/fdt_common.h

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Mar 26 06:57:36 2016(r297285)
+++ head/sys/arm/arm/machdep.c  Sat Mar 26 06:59:01 2016(r297286)
@@ -60,6 +60,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -74,6 +75,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -232,6 +234,7 @@ static struct pv_addr kernelstack;
 #if defined(LINUX_BOOT_ABI)
 #define LBABI_MAX_BANKS10
 
+#define CMDLINE_GUARD "FreeBSD:"
 uint32_t board_id;
 struct arm_lbabi_tag *atag_list;
 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
@@ -1029,6 +1032,53 @@ pcpu0_init(void)
 }
 
 #if defined(LINUX_BOOT_ABI)
+
+/* Convert the U-Boot command line into FreeBSD kenv and boot options. */
+static void
+cmdline_set_env(char *cmdline, const char *guard)
+{
+   char *cmdline_next, *env;
+   size_t size, guard_len;
+   int i;
+
+   size = strlen(cmdline);
+   /* Skip leading spaces. */
+   for (; isspace(*cmdline) && (size > 0); cmdline++)
+   size--;
+
+   /* Test and remove guard. */
+   if (guard != NULL && guard[0] != '\0') {
+   guard_len  =  strlen(guard);
+   if (strncasecmp(cmdline, guard, guard_len) != 0){
+   init_static_kenv(cmdline, 0);
+   return;
+
+   cmdline += guard_len;
+   size -= guard_len;
+   }
+   }
+
+   /* Skip leading spaces. */
+   for (; isspace(*cmdline) && (size > 0); cmdline++)
+   size--;
+
+   /* Replace ',' with '\0'. */
+   /* TODO: implement escaping for ',' character. */
+   cmdline_next = cmdline;
+   while(strsep(_next, ",") != NULL)
+   ;
+   init_static_kenv(cmdline, 0);
+   /* Parse boothowto. */
+   for (i = 0; howto_names[i].ev != NULL; i++) {
+   env = kern_getenv(howto_names[i].ev);
+   if (env != NULL) {
+   if (strtoul(env, NULL, 10) != 0)
+   boothowto |= howto_names[i].mask;
+   freeenv(env);
+   }
+   }
+}
+
 vm_offset_t
 linux_parse_boot_param(struct arm_boot_params *abp)
 {
@@ -1036,6 +1086,7 @@ linux_parse_boot_param(struct arm_boot_p
uint32_t revision;
uint64_t serial;
int size;
+   vm_offset_t lastaddr;
 #ifdef FDT
struct fdt_header *dtb_ptr;
uint32_t dtb_size;
@@ -1057,9 +1108,6 @@ linux_parse_boot_param(struct arm_boot_p
return (fake_preload_metadata(abp, dtb_ptr, dtb_size));
}
 #endif
-   /* Old, ATAG based boot must have board type set. */
-   if (abp->abp_r1 == 0)
-   return (0);
 
board_id = abp->abp_r1;
walker = (struct arm_lbabi_tag *)abp->abp_r2;
@@ -1089,10 +1137,9 @@ linux_parse_boot_param(struct arm_boot_p
board_set_revision(revision);
break;
case ATAG_CMDLINE:
-   /* XXX open question: Parse this for boothowto? */
size = ATAG_SIZE(walker) -
sizeof(struct arm_lbabi_header);
-   size = min(size, sizeof(linux_command_line) - 1);
+   size = min(size, LBABI_MAX_COMMAND_LINE);
strncpy(linux_command_line, walker->u.tag_cmd.command,
size);
linux_command_line[size] = '\0';
@@ -1107,9 +1154,9 @@ linux_parse_boot_param(struct arm_boot_p
bcopy(atag_list, atags,
(char *)walker - (char *)atag_list + ATAG_SIZE(walker));
 
-   init_static_kenv(NULL, 0);
-
-   return fake_preload_metadata(abp, NULL, 0);
+   lastaddr = fake_preload_metadata(abp, NULL, 0);
+   cmdline_set_env(linux_command_line, CMDLINE_GUARD);
+   return lastaddr;
 }
 #endif
 
@@ -1785,6 +1832,12 @@ initarm(struct arm_boot_params *abp)
if (OF_init((void *)dtbp) != 0)
panic("OF_init failed with the 

svn commit: r297285 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Sat Mar 26 06:57:36 2016
New Revision: 297285
URL: https://svnweb.freebsd.org/changeset/base/297285

Log:
  ARM: Fix ATAG handling in LINUX_BOOT_API:
   - Don't convert atags address passed from U-Boot. It's real physical
 address (and we have 1:1 mapping).
   - Size of tags is encoded in words, not in bytes

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/arm/include/atags.h

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Mar 26 06:55:55 2016(r297284)
+++ head/sys/arm/arm/machdep.c  Sat Mar 26 06:57:36 2016(r297285)
@@ -1035,6 +1035,7 @@ linux_parse_boot_param(struct arm_boot_p
struct arm_lbabi_tag *walker;
uint32_t revision;
uint64_t serial;
+   int size;
 #ifdef FDT
struct fdt_header *dtb_ptr;
uint32_t dtb_size;
@@ -1061,8 +1062,7 @@ linux_parse_boot_param(struct arm_boot_p
return (0);
 
board_id = abp->abp_r1;
-   walker = (struct arm_lbabi_tag *)
-   (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
+   walker = (struct arm_lbabi_tag *)abp->abp_r2;
 
if (ATAG_TAG(walker) != ATAG_CORE)
return 0;
@@ -1079,8 +1079,9 @@ linux_parse_boot_param(struct arm_boot_p
case ATAG_INITRD2:
break;
case ATAG_SERIAL:
-   serial = walker->u.tag_sn.low |
-   ((uint64_t)walker->u.tag_sn.high << 32);
+   serial = walker->u.tag_sn.high;
+   serial <<= 32;
+   serial |= walker->u.tag_sn.low;
board_set_serial(serial);
break;
case ATAG_REVISION:
@@ -1089,8 +1090,12 @@ linux_parse_boot_param(struct arm_boot_p
break;
case ATAG_CMDLINE:
/* XXX open question: Parse this for boothowto? */
-   bcopy(walker->u.tag_cmd.command, linux_command_line,
- ATAG_SIZE(walker));
+   size = ATAG_SIZE(walker) -
+   sizeof(struct arm_lbabi_header);
+   size = min(size, sizeof(linux_command_line) - 1);
+   strncpy(linux_command_line, walker->u.tag_cmd.command,
+   size);
+   linux_command_line[size] = '\0';
break;
default:
break;

Modified: head/sys/arm/include/atags.h
==
--- head/sys/arm/include/atags.hSat Mar 26 06:55:55 2016
(r297284)
+++ head/sys/arm/include/atags.hSat Mar 26 06:57:36 2016
(r297285)
@@ -123,7 +123,7 @@ struct arm_lbabi_tag
 };
 
 #defineATAG_TAG(a)  (a)->tag_hdr.tag
-#define ATAG_SIZE(a) (a)->tag_hdr.size
+#define ATAG_SIZE(a) ((a)->tag_hdr.size * sizeof(uint32_t))
 #define ATAG_NEXT(a) (struct arm_lbabi_tag *)((char *)(a) + ATAG_SIZE(a))
 
 #endif /* __MACHINE_ATAGS_H__ */
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svn commit: r297292 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Sat Mar 26 12:19:27 2016
New Revision: 297292
URL: https://svnweb.freebsd.org/changeset/base/297292

Log:
  ARM: Fix bug introduced in r297286.
   - don't put command line without guard to kernel environment.
   - kernel environment delivered from ubldr must have absolute precedence.

Modified:
  head/sys/arm/arm/machdep.c

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Mar 26 12:11:46 2016(r297291)
+++ head/sys/arm/arm/machdep.c  Sat Mar 26 12:19:27 2016(r297292)
@@ -1049,13 +1049,10 @@ cmdline_set_env(char *cmdline, const cha
/* Test and remove guard. */
if (guard != NULL && guard[0] != '\0') {
guard_len  =  strlen(guard);
-   if (strncasecmp(cmdline, guard, guard_len) != 0){
-   init_static_kenv(cmdline, 0);
+   if (strncasecmp(cmdline, guard, guard_len) != 0)
return;
-
-   cmdline += guard_len;
-   size -= guard_len;
-   }
+   cmdline += guard_len;
+   size -= guard_len;
}
 
/* Skip leading spaces. */
@@ -1833,7 +1830,7 @@ initarm(struct arm_boot_params *abp)
panic("OF_init failed with the found device tree");
 
 #if defined(LINUX_BOOT_ABI)
-   if (fdt_get_chosen_bootargs(linux_command_line,
+   if (loader_envp == NULL && fdt_get_chosen_bootargs(linux_command_line,
LBABI_MAX_COMMAND_LINE) == 0)
cmdline_set_env(linux_command_line, CMDLINE_GUARD);
 #endif
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svn commit: r296982 - head/sys/arm/allwinner

[Michal Meloun]

Author: mmel
Date: Thu Mar 17 08:57:41 2016
New Revision: 296982
URL: https://svnweb.freebsd.org/changeset/base/296982

Log:
  A20: Gpiobus can be attached only after full gpio driver initialization.
  While i'm in, remove now unused global variable.
  
  Submited by:  Emmanuel Vadot 

Modified:
  head/sys/arm/allwinner/a10_gpio.c

Modified: head/sys/arm/allwinner/a10_gpio.c
==
--- head/sys/arm/allwinner/a10_gpio.c   Thu Mar 17 08:40:58 2016
(r296981)
+++ head/sys/arm/allwinner/a10_gpio.c   Thu Mar 17 08:57:41 2016
(r296982)
@@ -136,8 +136,6 @@ extern const struct allwinner_padconf a3
 #defineA10_GPIO_GP_INT_STA 0x214
 #defineA10_GPIO_GP_INT_DEB 0x218
 
-static struct a10_gpio_softc *a10_gpio_sc;
-
 #defineA10_GPIO_WRITE(_sc, _off, _val) \
 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
 #defineA10_GPIO_READ(_sc, _off)\
@@ -562,12 +560,6 @@ a10_gpio_attach(device_t dev)
/* Node is not a GPIO controller. */
goto fail;
 
-   a10_gpio_sc = sc;
-   sc->sc_busdev = gpiobus_attach_bus(dev);
-   if (sc->sc_busdev == NULL)
-   goto fail;
-
-
/* Use the right pin data for the current SoC */
switch (allwinner_soc_type()) {
 #ifdef SOC_ALLWINNER_A10
@@ -594,6 +586,10 @@ a10_gpio_attach(device_t dev)
return (ENOENT);
}
 
+   sc->sc_busdev = gpiobus_attach_bus(dev);
+   if (sc->sc_busdev == NULL)
+   goto fail;
+
/*
 * Register as a pinctrl device
 */
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svn commit: r296269 - head/sys/dev/gpio

[Michal Meloun]

Author: mmel
Date: Tue Mar  1 16:10:15 2016
New Revision: 296269
URL: https://svnweb.freebsd.org/changeset/base/296269

Log:
  OFW_GPIOBUS: Add utility functions for easier handling of OFW GPIO pins.
  
  Reviewed by: ian, loos (paritaly)

Modified:
  head/sys/dev/gpio/gpiobusvar.h
  head/sys/dev/gpio/ofw_gpiobus.c

Modified: head/sys/dev/gpio/gpiobusvar.h
==
--- head/sys/dev/gpio/gpiobusvar.h  Tue Mar  1 15:21:01 2016
(r296268)
+++ head/sys/dev/gpio/gpiobusvar.h  Tue Mar  1 16:10:15 2016
(r296269)
@@ -38,6 +38,7 @@
 
 #ifdef FDT
 #include 
+#include 
 #endif
 
 #include "gpio_if.h"
@@ -83,6 +84,7 @@ struct gpiobus_pin
uint32_tflags;  /* pin flags */
uint32_tpin;/* pin number */
 };
+typedef struct gpiobus_pin *gpio_pin_t;
 
 struct gpiobus_ivar
 {
@@ -109,6 +111,16 @@ device_t ofw_gpiobus_add_fdt_child(devic
 int ofw_gpiobus_parse_gpios(device_t, char *, struct gpiobus_pin **);
 void ofw_gpiobus_register_provider(device_t);
 void ofw_gpiobus_unregister_provider(device_t);
+
+/* Consumers interface. */
+int gpio_pin_get_by_ofw_name(device_t consumer, char *name, gpio_pin_t *gpio);
+int gpio_pin_get_by_ofw_idx(device_t consumer, int idx, gpio_pin_t *gpio);
+int gpio_pin_get_by_ofw_property(device_t consumer, char *name,
+gpio_pin_t *gpio);
+void gpio_pin_release(gpio_pin_t gpio);
+int gpio_pin_is_active(gpio_pin_t pin, bool *active);
+int gpio_pin_set_active(gpio_pin_t pin, bool active);
+int gpio_pin_setflags(gpio_pin_t pin, uint32_t flags);
 #endif
 int gpio_check_flags(uint32_t, uint32_t);
 device_t gpiobus_attach_bus(device_t);

Modified: head/sys/dev/gpio/ofw_gpiobus.c
==
--- head/sys/dev/gpio/ofw_gpiobus.c Tue Mar  1 15:21:01 2016
(r296268)
+++ head/sys/dev/gpio/ofw_gpiobus.c Tue Mar  1 16:10:15 2016
(r296269)
@@ -47,6 +47,166 @@ static void ofw_gpiobus_destroy_devinfo(
 static int ofw_gpiobus_parse_gpios_impl(device_t, phandle_t, char *,
struct gpiobus_softc *, struct gpiobus_pin **);
 
+/*
+ * Utility functions for easier handling of OFW GPIO pins.
+ *
+ * !!! BEWARE !!!
+ * GPIOBUS uses children's IVARs, so we cannot use this interface for cross
+ * tree consumers.
+ *
+ */
+static int
+gpio_pin_get_by_ofw_impl(device_t consumer_dev, char *prop_name, int idx,
+gpio_pin_t *out_pin)
+{
+   phandle_t cnode, xref;
+   pcell_t *cells;
+   device_t busdev;
+   struct gpiobus_pin pin;
+   int ncells, rv;
+
+   cnode = ofw_bus_get_node(consumer_dev);
+   if (cnode <= 0) {
+   device_printf(consumer_dev,
+   "%s called on not ofw based device\n", __func__);
+   return (ENXIO);
+   }
+
+   rv = ofw_bus_parse_xref_list_alloc(cnode, prop_name, "#gpio-cells",
+   idx, , , );
+   if (rv != 0)
+   return (rv);
+
+   /* Translate provider to device. */
+   pin.dev = OF_device_from_xref(xref);
+   if (pin.dev == NULL) {
+   free(cells, M_OFWPROP);
+   return (ENODEV);
+   }
+
+   /* Test if GPIO bus already exist. */
+   busdev = GPIO_GET_BUS(pin.dev);
+   if (busdev == NULL) {
+   free(cells, M_OFWPROP);
+   return (ENODEV);
+   }
+
+   /* Map GPIO pin. */
+   rv = gpio_map_gpios(pin.dev, cnode, OF_node_from_xref(xref), ncells,
+   cells, , );
+   free(cells, M_OFWPROP);
+   if (rv != 0) {
+   device_printf(consumer_dev, "Cannot map the gpio property.\n");
+   return (ENXIO);
+   }
+
+   /* Reserve GPIO pin. */
+   rv = gpiobus_map_pin(busdev, pin.pin);
+   if (rv != 0) {
+   device_printf(consumer_dev, "Cannot reserve gpio pin.\n");
+   return (EBUSY);
+   }
+
+   *out_pin = malloc(sizeof(struct gpiobus_pin), M_DEVBUF,
+   M_WAITOK | M_ZERO);
+   **out_pin = pin;
+   return (0);
+}
+
+int
+gpio_pin_get_by_ofw_idx(device_t consumer_dev, int idx, gpio_pin_t *pin)
+{
+
+   return (gpio_pin_get_by_ofw_impl(consumer_dev, "gpios", idx, pin));
+}
+
+int
+gpio_pin_get_by_ofw_property(device_t consumer_dev, char *name, gpio_pin_t 
*pin)
+{
+
+   return (gpio_pin_get_by_ofw_impl(consumer_dev, name, 0, pin));
+}
+
+int
+gpio_pin_get_by_ofw_name(device_t consumer_dev, char *name, gpio_pin_t *pin)
+{
+   int rv, idx;
+   phandle_t cnode;
+
+   cnode = ofw_bus_get_node(consumer_dev);
+   if (cnode <= 0) {
+   device_printf(consumer_dev,
+   "%s called on not ofw based device\n",  __func__);
+   return (ENXIO);
+   }
+   rv = ofw_bus_find_string_index(cnode, "gpio-names", name, );
+   if (rv != 0)
+   return (rv);
+   return (gpio_pin_get_by_ofw_idx(consumer_dev, idx, pin));
+}
+
+void

svn commit: r297576 - head/sys/arm/nvidia/tegra124

[Michal Meloun]

Author: mmel
Date: Tue Apr  5 09:20:52 2016
New Revision: 297576
URL: https://svnweb.freebsd.org/changeset/base/297576

Log:
  TEGRA: Fix CPU frequency switching.
  The PLL_X, base CPU frequency source, doesn't have a bypass switch and thus
  we must use another frequency source for CPU while changing its frequency.
  PLL_P is ideal for this, it runs at 480MHz and CPU can be clocked at this
  frequency at any CPU voltage.

Modified:
  head/sys/arm/nvidia/tegra124/tegra124_clk_pll.c
  head/sys/arm/nvidia/tegra124/tegra124_clk_super.c
  head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c

Modified: head/sys/arm/nvidia/tegra124/tegra124_clk_pll.c
==
--- head/sys/arm/nvidia/tegra124/tegra124_clk_pll.c Tue Apr  5 08:37:21 
2016(r297575)
+++ head/sys/arm/nvidia/tegra124/tegra124_clk_pll.c Tue Apr  5 09:20:52 
2016(r297576)
@@ -823,12 +823,10 @@ pllx_set_freq(struct pll_sc *sc, uint64_
return (0);
}
 
-   /* Set bypass. */
+   /* PLLX doesn't have bypass, disable it first. */
RD4(sc, sc->base_reg, );
-   reg |= PLL_BASE_BYPASS;
+   reg &= ~PLL_BASE_ENABLE;
WR4(sc, sc->base_reg, reg);
-   RD4(sc, sc->base_reg, );
-   DELAY(100);
 
/* Set PLL. */
RD4(sc, sc->base_reg, );
@@ -840,16 +838,16 @@ pllx_set_freq(struct pll_sc *sc, uint64_
RD4(sc, sc->base_reg, );
DELAY(100);
 
+   /* Enable lock detection. */
+   RD4(sc, sc->misc_reg, );
+   reg |= sc->lock_enable;
+   WR4(sc, sc->misc_reg, reg);
+
/* Enable PLL. */
RD4(sc, sc->base_reg, );
reg |= PLL_BASE_ENABLE;
WR4(sc, sc->base_reg, reg);
 
-   /* Enable lock detection */
-   RD4(sc, sc->misc_reg, );
-   reg |= sc->lock_enable;
-   WR4(sc, sc->misc_reg, reg);
-
rv = wait_for_lock(sc);
if (rv != 0) {
/* Disable PLL */
@@ -860,10 +858,6 @@ pllx_set_freq(struct pll_sc *sc, uint64_
}
RD4(sc, sc->misc_reg, );
 
-   /* Clear bypass. */
-   RD4(sc, sc->base_reg, );
-   reg &= ~PLL_BASE_BYPASS;
-   WR4(sc, sc->base_reg, reg);
*fout = ((fin / m) * n) / p;
return (0);
 }

Modified: head/sys/arm/nvidia/tegra124/tegra124_clk_super.c
==
--- head/sys/arm/nvidia/tegra124/tegra124_clk_super.c   Tue Apr  5 08:37:21 
2016(r297575)
+++ head/sys/arm/nvidia/tegra124/tegra124_clk_super.c   Tue Apr  5 09:20:52 
2016(r297576)
@@ -205,8 +205,7 @@ super_mux_set_mux(struct clknode *clk, i
(state != SUPER_MUX_STATE_IDLE)) {
panic("Unexpected super mux state: %u", state);
}
-
-   shift = state * SUPER_MUX_MUX_WIDTH;
+   shift = (state - 1) * SUPER_MUX_MUX_WIDTH;
sc->mux = idx;
if (sc->flags & SMF_HAVE_DIVIDER_2) {
if (idx == sc->src_div2) {
@@ -222,6 +221,7 @@ super_mux_set_mux(struct clknode *clk, i
}
reg &= ~(((1 << SUPER_MUX_MUX_WIDTH) - 1) << shift);
reg |= idx << shift;
+
WR4(sc, sc->base_reg, reg);
RD4(sc, sc->base_reg, );
DEVICE_UNLOCK(sc);

Modified: head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c
==
--- head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c Tue Apr  5 08:37:21 
2016(r297575)
+++ head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c Tue Apr  5 09:20:52 
2016(r297576)
@@ -335,12 +335,27 @@ set_cpu_freq(struct tegra124_cpufreq_sof
if (rv != 0)
return (rv);
}
-   rv = clk_set_freq(sc->clk_cpu_g, point->freq, CLK_SET_ROUND_DOWN);
+
+   /* Switch supermux to PLLP first */
+   rv = clk_set_parent_by_clk(sc->clk_cpu_g, sc->clk_pll_p);
+   if (rv != 0) {
+   device_printf(sc->dev, "Can't set parent to PLLP\n");
+   return (rv);
+   }
+
+   /* Set PLLX frequency */
+   rv = clk_set_freq(sc->clk_pll_x, point->freq, CLK_SET_ROUND_DOWN);
if (rv != 0) {
device_printf(sc->dev, "Can't set CPU clock frequency\n");
return (rv);
}
 
+   rv = clk_set_parent_by_clk(sc->clk_cpu_g, sc->clk_pll_x);
+   if (rv != 0) {
+   device_printf(sc->dev, "Can't set parent to PLLX\n");
+   return (rv);
+   }
+
if (sc->act_speed_point->uvolt > point->uvolt) {
/* set cpu voltage */
rv = regulator_set_voltage(sc->supply_vdd_cpu,
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svn commit: r297579 - in head/sys: arm/nvidia dev/usb/controller

[Michal Meloun]

Author: mmel
Date: Tue Apr  5 12:13:53 2016
New Revision: 297579
URL: https://svnweb.freebsd.org/changeset/base/297579

Log:
  ehci_interrupt is MPSAFE code. Most drivers in tree calls bus_setup_intr
  with MPSAFE, some are not. Fix those.
  
  Submitted by: Howard Su 
  Differential Revision: https://reviews.freebsd.org/D5755

Modified:
  head/sys/arm/nvidia/tegra_ehci.c
  head/sys/dev/usb/controller/ehci_fsl.c
  head/sys/dev/usb/controller/ehci_imx.c

Modified: head/sys/arm/nvidia/tegra_ehci.c
==
--- head/sys/arm/nvidia/tegra_ehci.cTue Apr  5 11:30:52 2016
(r297578)
+++ head/sys/arm/nvidia/tegra_ehci.cTue Apr  5 12:13:53 2016
(r297579)
@@ -253,8 +253,8 @@ tegra_ehci_attach(device_t dev)
}
 
/* Setup interrupt handler. */
-   rv = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO, NULL,
-   (driver_intr_t *)ehci_interrupt, esc, >sc_intr_hdl);
+   rv = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
+   NULL, (driver_intr_t *)ehci_interrupt, esc, >sc_intr_hdl);
if (rv != 0) {
device_printf(dev, "Could not setup IRQ\n");
goto out;

Modified: head/sys/dev/usb/controller/ehci_fsl.c
==
--- head/sys/dev/usb/controller/ehci_fsl.c  Tue Apr  5 11:30:52 2016
(r297578)
+++ head/sys/dev/usb/controller/ehci_fsl.c  Tue Apr  5 12:13:53 2016
(r297579)
@@ -294,7 +294,7 @@ fsl_ehci_attach(device_t self)
}
 
/* Setup interrupt handler */
-   err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO,
+   err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)ehci_interrupt, sc, >sc_intr_hdl);
if (err) {
device_printf(self, "Could not setup irq, %d\n", err);

Modified: head/sys/dev/usb/controller/ehci_imx.c
==
--- head/sys/dev/usb/controller/ehci_imx.c  Tue Apr  5 11:30:52 2016
(r297578)
+++ head/sys/dev/usb/controller/ehci_imx.c  Tue Apr  5 12:13:53 2016
(r297579)
@@ -261,8 +261,8 @@ imx_ehci_attach(device_t dev)
}
 
/* Setup interrupt handler. */
-   err = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO, NULL, 
-   (driver_intr_t *)ehci_interrupt, esc, >sc_intr_hdl);
+   err = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
+   NULL, (driver_intr_t *)ehci_interrupt, esc, >sc_intr_hdl);
if (err != 0) {
device_printf(dev, "Could not setup IRQ\n");
goto out;
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svn commit: r298740 - head/sys/arm/arm

[Michal Meloun]

Author: mmel
Date: Thu Apr 28 12:05:07 2016
New Revision: 298740
URL: https://svnweb.freebsd.org/changeset/base/298740

Log:
  ARM: Use kernel pmap as intermediate mapping in context switch.
  On ARM, we can directly switch between translation tables only when
  the size of the mapping for any given virtual address is the same in
  the old and new translation tables. The load of new TTB and subsequent
  TLB flush is not atomic operation. So speculative page table walk can
  load TLB entry from new mapping while rest of TLB entries are still the
  old ones. In worst case, this can lead to situation when TLB cache can
  contain multiple matching TLB entries. One (from old mapping) L2 entry
  for VA + 4k and one (from new mapping) L1 entry for VA.
  
  Thus, we must switch to kernel pmap translation table as intermediate
  mapping because all sizes of these (old pmap and kernel pmap) mappings
  are same (or unmapped). The same is true for switch from kernel pmap
  translation table to new pmap one.

Modified:
  head/sys/arm/arm/swtch-v6.S

Modified: head/sys/arm/arm/swtch-v6.S
==
--- head/sys/arm/arm/swtch-v6.S Thu Apr 28 12:04:12 2016(r298739)
+++ head/sys/arm/arm/swtch-v6.S Thu Apr 28 12:05:07 2016(r298740)
@@ -114,25 +114,37 @@ __FBSDID("$FreeBSD$");
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 
-ENTRY(cpu_context_switch) /* QQQ: What about macro instead of function?
*/
+ENTRY(cpu_context_switch)
DSB
-   mcr CP15_TTBR0(r0)  /* set the new TTB */
+   /*
+   * We can directly switch between translation tables only when the
+   * size of the mapping for any given virtual address is the same
+   * in the old and new translation tables.
+   * Thus, we must switch to kernel pmap translation table as
+   * intermediate mapping because all sizes of these mappings are same
+   * (or unmapped). The same is true for switch from kernel pmap
+   * translation table to new pmap one.
+   */
+   mov r2, #(CPU_ASID_KERNEL)
+   ldr r1, =(_C_LABEL(pmap_kern_ttb))
+   ldr r1, [r1]
+   mcr CP15_TTBR0(r1)  /* switch to kernel TTB */
+   ISB
+   mcr CP15_TLBIASID(r2)   /* flush not global TLBs */
+   DSB
+   mcr CP15_TTBR0(r0)  /* switch to new TTB */
ISB
-   mov r0, #(CPU_ASID_KERNEL)
-   mcr CP15_TLBIASID(r0)   /* flush not global TLBs */
+   /*
+   * We must flush not global TLBs again because PT2MAP mapping
+   * is different.
+   */
+   mcr CP15_TLBIASID(r2)   /* flush not global TLBs */
/*
* Flush entire Branch Target Cache because of the branch predictor
* is not architecturally invisible. See ARM Architecture Reference
* Manual ARMv7-A and ARMv7-R edition, page B2-1264(65), Branch
* predictors and Requirements for branch predictor maintenance
* operations sections.
-   *
-   * QQQ: The predictor is virtually addressed and holds virtual target
-   *  addresses. Therefore, if mapping is changed, the predictor cache
-   *  must be flushed.The flush is part of entire i-cache invalidation
-   *  what is always called when code mapping is changed. So herein,
-   *  it's the only place where standalone predictor flush must be
-   *  executed in kernel (except self modifying code case).
*/
mcr CP15_BPIALL /* flush entire Branch Target Cache */
DSB
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svn commit: r298738 - in head/sys: dev/gpio kern sys

[Michal Meloun]

Author: mmel
Date: Thu Apr 28 12:03:22 2016
New Revision: 298738
URL: https://svnweb.freebsd.org/changeset/base/298738

Log:
  GPIO: Add support for gpio pin interrupts.
  Add new function gpio_alloc_intr_resource(), which allows an allocation
  of interrupt resource associated to given gpio pin. It also allows to
  specify interrupt configuration.
  
  Note: This functionality is dependent on INTRNG, and must be
  implemented in each GPIO controller.

Modified:
  head/sys/dev/gpio/gpiobus.c
  head/sys/dev/gpio/gpiobusvar.h
  head/sys/kern/subr_intr.c
  head/sys/sys/gpio.h
  head/sys/sys/intr.h

Modified: head/sys/dev/gpio/gpiobus.c
==
--- head/sys/dev/gpio/gpiobus.c Thu Apr 28 09:40:24 2016(r298737)
+++ head/sys/dev/gpio/gpiobus.c Thu Apr 28 12:03:22 2016(r298738)
@@ -31,6 +31,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -72,6 +73,31 @@ static int gpiobus_pin_set(device_t, dev
 static int gpiobus_pin_get(device_t, device_t, uint32_t, unsigned int*);
 static int gpiobus_pin_toggle(device_t, device_t, uint32_t);
 
+/*
+ * XXX -> Move me to better place - gpio_subr.c?
+ * Also, this function must be changed when interrupt configuration
+ * data will be moved into struct resource.
+ */
+#ifdef INTRNG
+struct resource *
+gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags,
+gpio_pin_t pin, uint32_t intr_mode)
+{
+   u_int irqnum;
+
+   /*
+* Allocate new fictitious interrupt number and store configuration
+* into it.
+*/
+   irqnum = intr_gpio_map_irq(pin->dev, pin->pin, pin->flags, intr_mode);
+   if (irqnum == 0x)
+   return (NULL);
+
+   return (bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid,
+   irqnum, irqnum, 1, alloc_flags));
+}
+#endif
+
 int
 gpio_check_flags(uint32_t caps, uint32_t flags)
 {

Modified: head/sys/dev/gpio/gpiobusvar.h
==
--- head/sys/dev/gpio/gpiobusvar.h  Thu Apr 28 09:40:24 2016
(r298737)
+++ head/sys/dev/gpio/gpiobusvar.h  Thu Apr 28 12:03:22 2016
(r298738)
@@ -61,6 +61,9 @@
 #defineGPIOBUS_WAIT1
 #defineGPIOBUS_DONTWAIT2
 
+/* Use default interrupt mode -  for gpio_alloc_intr_resource */
+#define GPIO_INTR_CONFORM  GPIO_INTR_NONE
+
 struct gpiobus_pin_data
 {
int mapped; /* pin is mapped/reserved. */
@@ -122,6 +125,10 @@ int gpio_pin_is_active(gpio_pin_t pin, b
 int gpio_pin_set_active(gpio_pin_t pin, bool active);
 int gpio_pin_setflags(gpio_pin_t pin, uint32_t flags);
 #endif
+#ifdef INTRNG
+struct resource *gpio_alloc_intr_resource(device_t consumer_dev, int *rid,
+u_int alloc_flags, gpio_pin_t pin, uint32_t intr_mode);
+#endif
 int gpio_check_flags(uint32_t, uint32_t);
 device_t gpiobus_attach_bus(device_t);
 int gpiobus_detach_bus(device_t);

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Thu Apr 28 09:40:24 2016(r298737)
+++ head/sys/kern/subr_intr.c   Thu Apr 28 12:03:22 2016(r298738)
@@ -596,6 +596,27 @@ intr_fdt_map_irq(phandle_t node, pcell_t
 }
 #endif
 
+/*
+ *  Store GPIO interrupt decription in framework and return unique interrupt
+ *  number (resource handle) associated with it.
+ */
+u_int
+intr_gpio_map_irq(device_t dev, u_int pin_num, u_int pin_flags, u_int 
intr_mode)
+{
+   struct intr_dev_data *ddata;
+
+   ddata = intr_ddata_alloc(0);
+   if (ddata == NULL)
+   return (0x);/* no space left */
+
+   ddata->idd_dev = dev;
+   ddata->idd_data.type = INTR_MAP_DATA_GPIO;
+   ddata->idd_data.gpio.gpio_pin_num = pin_num;
+   ddata->idd_data.gpio.gpio_pin_flags = pin_flags;
+   ddata->idd_data.gpio.gpio_intr_mode = intr_mode;
+   return (ddata->idd_irq);
+}
+
 #ifdef INTR_SOLO
 /*
  *  Setup filter into interrupt source.

Modified: head/sys/sys/gpio.h
==
--- head/sys/sys/gpio.h Thu Apr 28 09:40:24 2016(r298737)
+++ head/sys/sys/gpio.h Thu Apr 28 12:03:22 2016(r298738)
@@ -60,16 +60,26 @@
 #define GPIOMAXNAME64
 
 /* GPIO pin configuration flags */
-#define GPIO_PIN_INPUT 0x0001  /* input direction */
-#define GPIO_PIN_OUTPUT0x0002  /* output direction */
-#define GPIO_PIN_OPENDRAIN 0x0004  /* open-drain output */
-#define GPIO_PIN_PUSHPULL  0x0008  /* push-pull output */
-#define GPIO_PIN_TRISTATE  0x0010  /* output disabled */
-#define GPIO_PIN_PULLUP0x0020  /* internal pull-up enabled */
-#define GPIO_PIN_PULLDOWN  0x0040  /* internal pull-down enabled */
-#define GPIO_PIN_INVIN 0x0080  /* invert input */

svn commit: r298739 - in head/sys: dev/gpio kern sys

[Michal Meloun]

Author: mmel
Date: Thu Apr 28 12:04:12 2016
New Revision: 298739
URL: https://svnweb.freebsd.org/changeset/base/298739

Log:
  INTRNG: Define 'INTR_IRQ_INVALID' constant and use it consistently
  as error indicator.

Modified:
  head/sys/dev/gpio/gpiobus.c
  head/sys/kern/subr_intr.c
  head/sys/sys/intr.h

Modified: head/sys/dev/gpio/gpiobus.c
==
--- head/sys/dev/gpio/gpiobus.c Thu Apr 28 12:03:22 2016(r298738)
+++ head/sys/dev/gpio/gpiobus.c Thu Apr 28 12:04:12 2016(r298739)
@@ -90,7 +90,7 @@ gpio_alloc_intr_resource(device_t consum
 * into it.
 */
irqnum = intr_gpio_map_irq(pin->dev, pin->pin, pin->flags, intr_mode);
-   if (irqnum == 0x)
+   if (irqnum == INTR_IRQ_INVALID)
return (NULL);
 
return (bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid,

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Thu Apr 28 12:03:22 2016(r298738)
+++ head/sys/kern/subr_intr.c   Thu Apr 28 12:04:12 2016(r298739)
@@ -109,8 +109,6 @@ static struct mtx isrc_table_lock;
 static struct intr_irqsrc *irq_sources[NIRQ];
 u_int irq_next_free;
 
-#define IRQ_INVALIDnitems(irq_sources)
-
 /*
  *  XXX - All stuff around struct intr_dev_data is considered as temporary
  *  until better place for storing struct intr_map_data will be find.
@@ -138,7 +136,7 @@ static struct intr_dev_data *intr_ddata_
 static u_int intr_ddata_first_unused;
 
 #define IRQ_DDATA_BASE 1
-CTASSERT(IRQ_DDATA_BASE > IRQ_INVALID);
+CTASSERT(IRQ_DDATA_BASE > nitems(irq_sources));
 
 #ifdef SMP
 static boolean_t irq_assign_cpu = FALSE;
@@ -399,7 +397,7 @@ isrc_free_irq(struct intr_irqsrc *isrc)
return (EINVAL);
 
irq_sources[isrc->isrc_irq] = NULL;
-   isrc->isrc_irq = IRQ_INVALID;   /* just to be safe */
+   isrc->isrc_irq = INTR_IRQ_INVALID;  /* just to be safe */
return (0);
 }
 
@@ -427,7 +425,7 @@ intr_isrc_register(struct intr_irqsrc *i
 
bzero(isrc, sizeof(struct intr_irqsrc));
isrc->isrc_dev = dev;
-   isrc->isrc_irq = IRQ_INVALID;   /* just to be safe */
+   isrc->isrc_irq = INTR_IRQ_INVALID;  /* just to be safe */
isrc->isrc_flags = flags;
 
va_start(ap, fmt);
@@ -560,7 +558,7 @@ intr_acpi_map_irq(device_t dev, u_int ir
 
ddata = intr_ddata_alloc(0);
if (ddata == NULL)
-   return (0x);/* no space left */
+   return (INTR_IRQ_INVALID);  /* no space left */
 
ddata->idd_dev = dev;
ddata->idd_data.type = INTR_MAP_DATA_ACPI;
@@ -585,7 +583,7 @@ intr_fdt_map_irq(phandle_t node, pcell_t
cellsize = ncells * sizeof(*cells);
ddata = intr_ddata_alloc(cellsize);
if (ddata == NULL)
-   return (0x);/* no space left */
+   return (INTR_IRQ_INVALID);  /* no space left */
 
ddata->idd_xref = (intptr_t)node;
ddata->idd_data.type = INTR_MAP_DATA_FDT;
@@ -607,7 +605,7 @@ intr_gpio_map_irq(device_t dev, u_int pi
 
ddata = intr_ddata_alloc(0);
if (ddata == NULL)
-   return (0x);/* no space left */
+   return (INTR_IRQ_INVALID);  /* no space left */
 
ddata->idd_dev = dev;
ddata->idd_data.type = INTR_MAP_DATA_GPIO;

Modified: head/sys/sys/intr.h
==
--- head/sys/sys/intr.h Thu Apr 28 12:03:22 2016(r298738)
+++ head/sys/sys/intr.h Thu Apr 28 12:04:12 2016(r298739)
@@ -32,6 +32,8 @@
 
 #include 
 
+#defineINTR_IRQ_INVALID0x
+
 enum intr_map_data_type {
INTR_MAP_DATA_ACPI,
INTR_MAP_DATA_FDT,
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svn commit: r298742 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Thu Apr 28 13:00:40 2016
New Revision: 298742
URL: https://svnweb.freebsd.org/changeset/base/298742

Log:
  TEGRA: Add interrupt support for Tegra GPIO controller.

Modified:
  head/sys/arm/nvidia/tegra_gpio.c

Modified: head/sys/arm/nvidia/tegra_gpio.c
==
--- head/sys/arm/nvidia/tegra_gpio.cThu Apr 28 12:24:58 2016
(r298741)
+++ head/sys/arm/nvidia/tegra_gpio.cThu Apr 28 13:00:40 2016
(r298742)
@@ -30,21 +30,20 @@ __FBSDID("$FreeBSD$");
 /*
  * Tegra GPIO driver.
  */
-#include 
-__FBSDID("$FreeBSD$");
-
+#include "opt_platform.h"
 #include 
 #include 
 #include 
-
+#include 
 #include 
-#include 
+#include 
 #include 
 #include 
+#include 
 #include 
-#include 
 
 #include 
+#include 
 #include 
 
 #include 
@@ -53,14 +52,15 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include "pic_if.h"
 
-#defineGPIO_LOCK(_sc)  mtx_lock(&(_sc)->sc_mtx)
-#defineGPIO_UNLOCK(_sc)mtx_unlock(&(_sc)->sc_mtx)
-#defineGPIO_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx,  
\
-   device_get_nameunit(_sc->sc_dev), "tegra_gpio", MTX_DEF)
-#defineGPIO_LOCK_DESTROY(_sc)  mtx_destroy(&_sc->sc_mtx);
-#defineGPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
-#defineGPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
+#defineGPIO_LOCK(_sc)  mtx_lock(&(_sc)->mtx)
+#defineGPIO_UNLOCK(_sc)mtx_unlock(&(_sc)->mtx)
+#defineGPIO_LOCK_INIT(_sc) mtx_init(&_sc->mtx, 
\
+   device_get_nameunit(_sc->dev), "tegra_gpio", MTX_DEF)
+#defineGPIO_LOCK_DESTROY(_sc)  mtx_destroy(&_sc->mtx);
+#defineGPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED);
+#defineGPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED);
 
 #defineWR4(_sc, _r, _v)bus_write_4((_sc)->mem_res, (_r), (_v))
 #defineRD4(_sc, _r)bus_read_4((_sc)->mem_res, (_r))
@@ -87,6 +87,11 @@ __FBSDID("$FreeBSD$");
 #defineGPIO_INT_STA0x40
 #defineGPIO_INT_ENB0x50
 #defineGPIO_INT_LVL0x60
+#define  GPIO_INT_LVL_DELTA(1 << 16)
+#define  GPIO_INT_LVL_EDGE (1 << 8)
+#define  GPIO_INT_LVL_HIGH (1 << 0)
+#define  GPIO_INT_LVL_MASK (GPIO_INT_LVL_DELTA |   \
+GPIO_INT_LVL_EDGE | GPIO_INT_LVL_HIGH)
 #defineGPIO_INT_CLR0x70
 #defineGPIO_MSK_CNF0x80
 #defineGPIO_MSK_OE 0x90
@@ -102,19 +107,33 @@ char *tegra_gpio_port_names[] = {
 "M",  "N",  "O",  "P", /* Bank 3 */
 "Q",  "R",  "S",  "T", /* Bank 4 */
 "U",  "V",  "W",  "X", /* Bank 5 */
-"Y",  "Z", "AA", "BB", /* Bank 5 */
-   "CC", "DD", "EE"/* Bank 5 */
+"Y",  "Z", "AA", "BB", /* Bank 6 */
+   "CC", "DD", "EE"/* Bank 7 */
+};
+
+struct tegra_gpio_irqsrc {
+   struct intr_irqsrc  isrc;
+   u_int   irq;
+   uint32_tcfgreg;
+};
+
+struct tegra_gpio_softc;
+struct tegra_gpio_irq_cookie {
+   struct tegra_gpio_softc *sc;
+   int bank_num;
 };
 
 struct tegra_gpio_softc {
device_tdev;
-   device_tsc_busdev;
-   struct mtx  sc_mtx;
+   device_tbusdev;
+   struct mtx  mtx;
struct resource *mem_res;
-   struct resource *irq_res;
-   void*gpio_ih;
+   struct resource *irq_res[GPIO_NUM_BANKS];
+   void*irq_ih[GPIO_NUM_BANKS];
+   struct tegra_gpio_irq_cookie irq_cookies[GPIO_NUM_BANKS];
int gpio_npins;
struct gpio_pin gpio_pins[NGPIO];
+   struct tegra_gpio_irqsrc *isrcs;
 };
 
 static struct ofw_compat_data compat_data[] = {
@@ -122,6 +141,11 @@ static struct ofw_compat_data compat_dat
{NULL,  0}
 };
 
+/* --
+ *
+ * GPIO
+ *
+ */
 static inline void
 gpio_write_masked(struct tegra_gpio_softc *sc, bus_size_t reg,
 struct gpio_pin *pin, uint32_t val)
@@ -134,6 +158,7 @@ gpio_write_masked(struct tegra_gpio_soft
tmp |= (val & 1) << bit;/* value */
bus_write_4(sc->mem_res, reg + GPIO_REGNUM(pin->gp_pin), tmp);
 }
+
 static inline uint32_t
 gpio_read(struct tegra_gpio_softc *sc, bus_size_t reg, struct gpio_pin *pin)
 {
@@ -170,7 +195,7 @@ tegra_gpio_get_bus(device_t dev)
struct tegra_gpio_softc *sc;
 
sc = device_get_softc(dev);
-   return (sc->sc_busdev);
+   return (sc->busdev);
 }
 
 static int
@@ -308,32 +333,363 @@ tegra_gpio_pin_toggle(device_t dev, uint
return (0);

svn commit: r299853 - head/sys/dev/gpio

[Michal Meloun]

Author: mmel
Date: Sun May 15 14:43:52 2016
New Revision: 299853
URL: https://svnweb.freebsd.org/changeset/base/299853

Log:
  OFWGPIOBUS: Make ofwgpiobus_devclass externaly visible.
  It's needed for binding of gpio controllers.

Modified:
  head/sys/dev/gpio/ofw_gpiobus.c

Modified: head/sys/dev/gpio/ofw_gpiobus.c
==
--- head/sys/dev/gpio/ofw_gpiobus.c Sun May 15 14:39:41 2016
(r299852)
+++ head/sys/dev/gpio/ofw_gpiobus.c Sun May 15 14:43:52 2016
(r299853)
@@ -569,7 +569,7 @@ static device_method_t ofw_gpiobus_metho
DEVMETHOD_END
 };
 
-static devclass_t ofwgpiobus_devclass;
+devclass_t ofwgpiobus_devclass;
 
 DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods,
 sizeof(struct gpiobus_softc), gpiobus_driver);
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svn commit: r299854 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Sun May 15 14:47:50 2016
New Revision: 299854
URL: https://svnweb.freebsd.org/changeset/base/299854

Log:
  TEGRA: Don't use common name 'gpio' for tegra specific GPIO driver.
  Using commn name for different drivers breaks generic kernel creation.

Modified:
  head/sys/arm/nvidia/tegra_gpio.c

Modified: head/sys/arm/nvidia/tegra_gpio.c
==
--- head/sys/arm/nvidia/tegra_gpio.cSun May 15 14:43:52 2016
(r299853)
+++ head/sys/arm/nvidia/tegra_gpio.cSun May 15 14:47:50 2016
(r299854)
@@ -883,7 +883,7 @@ static device_method_t tegra_gpio_method
 };
 
 static driver_t tegra_gpio_driver = {
-   "gpio",
+   "tegra_gpio",
tegra_gpio_methods,
sizeof(struct tegra_gpio_softc),
 };
@@ -891,3 +891,8 @@ static devclass_t tegra_gpio_devclass;
 
 EARLY_DRIVER_MODULE(tegra_gpio, simplebus, tegra_gpio_driver,
 tegra_gpio_devclass, 0, 0, 70);
+
+extern devclass_t ofwgpiobus_devclass;
+extern driver_t ofw_gpiobus_driver;
+EARLY_DRIVER_MODULE(ofw_gpiobus, tegra_gpio, ofw_gpiobus_driver,
+ofwgpiobus_devclass, 0, 0, BUS_PASS_BUS);
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svn commit: r299855 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun May 15 15:13:56 2016
New Revision: 299855
URL: https://svnweb.freebsd.org/changeset/base/299855

Log:
  OFWIICBUS: Make ofwiicbus_devclass externaly visible.
  It's needed for binding of iic controllers.

Modified:
  head/sys/dev/ofw/ofw_iicbus.c

Modified: head/sys/dev/ofw/ofw_iicbus.c
==
--- head/sys/dev/ofw/ofw_iicbus.c   Sun May 15 14:47:50 2016
(r299854)
+++ head/sys/dev/ofw/ofw_iicbus.c   Sun May 15 15:13:56 2016
(r299855)
@@ -76,7 +76,7 @@ struct ofw_iicbus_devinfo {
struct ofw_bus_devinfo  opd_obdinfo;
 };
 
-static devclass_t ofwiicbus_devclass;
+devclass_t ofwiicbus_devclass;
 
 DEFINE_CLASS_1(iicbus, ofw_iicbus_driver, ofw_iicbus_methods,
 sizeof(struct iicbus_softc), iicbus_driver);
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svn commit: r299858 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Sun May 15 15:31:44 2016
New Revision: 299858
URL: https://svnweb.freebsd.org/changeset/base/299858

Log:
  TEGRA: Also attach gpioc to tegra_gpio driver. Forgotten in r299854.

Modified:
  head/sys/arm/nvidia/tegra_gpio.c

Modified: head/sys/arm/nvidia/tegra_gpio.c
==
--- head/sys/arm/nvidia/tegra_gpio.cSun May 15 15:26:19 2016
(r299857)
+++ head/sys/arm/nvidia/tegra_gpio.cSun May 15 15:31:44 2016
(r299858)
@@ -895,4 +895,7 @@ EARLY_DRIVER_MODULE(tegra_gpio, simplebu
 extern devclass_t ofwgpiobus_devclass;
 extern driver_t ofw_gpiobus_driver;
 EARLY_DRIVER_MODULE(ofw_gpiobus, tegra_gpio, ofw_gpiobus_driver,
-ofwgpiobus_devclass, 0, 0, BUS_PASS_BUS);
+ofwgpiobus_devclass, 0, 0, BUS_PASS_BUS);
+extern devclass_t gpioc_devclass;
+extern driver_t gpioc_driver;
+DRIVER_MODULE(gpioc, tegra_gpio, gpioc_driver, gpioc_devclass, 0, 0);
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svn commit: r299856 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Sun May 15 15:14:46 2016
New Revision: 299856
URL: https://svnweb.freebsd.org/changeset/base/299856

Log:
  TEGRA: Don't use common name 'iicb' for tegra specific IIC driver.
  Using commn name for different drivers breaks generic kernel creation.

Modified:
  head/sys/arm/nvidia/tegra_i2c.c

Modified: head/sys/arm/nvidia/tegra_i2c.c
==
--- head/sys/arm/nvidia/tegra_i2c.c Sun May 15 15:13:56 2016
(r299855)
+++ head/sys/arm/nvidia/tegra_i2c.c Sun May 15 15:14:46 2016
(r299856)
@@ -800,5 +800,9 @@ static device_method_t tegra_i2c_methods
 DEFINE_CLASS_0(iichb, tegra_i2c_driver, tegra_i2c_methods,
 sizeof(struct tegra_i2c_softc));
 static devclass_t tegra_i2c_devclass;
-EARLY_DRIVER_MODULE(iichb, simplebus, tegra_i2c_driver, tegra_i2c_devclass, 0,
-0, 73);
+EARLY_DRIVER_MODULE(tegra_iic, simplebus, tegra_i2c_driver, tegra_i2c_devclass,
+0, 0, 73);
+extern devclass_t ofwiicbus_devclass;
+extern driver_t ofw_iicbus_driver;
+EARLY_DRIVER_MODULE(ofw_iicbus, tegra_iic, ofw_iicbus_driver,
+ofwiicbus_devclass, 0, 0, BUS_PASS_BUS);
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Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 23.07.2016 v 20:35 Nathan Whitehorn napsal(a):
>
>
> On 07/23/16 03:45, Michal Meloun wrote:
>> Dne 21.07.2016 v 17:53 Nathan Whitehorn napsal(a):
>>>
>>> On PowerPC, GENERIC64 supports FDT systems (some IBM hardware), OFW
>>> systems (Macs, some IBM hardware), systems with no device trees at
>>> all (old-style PS3), and systems with a mixture of device tree and
>>> no device tree (new-style PS3). On these, there is a mixture of
>>> "real" interrupts and GPIO-type interrupts. There is no limitation
>>> that this be used only for device-tree-type systems.
>>>
>>> The system requires two things: an interrupt domain key and an
>>> arbitrary unique byte string describing the interrupt. When running
>>> with a device tree, these are set to the phandle of the
>>> interrupt-parent and the contents of the device tree interrupt
>>> specifier, respectively, and the system was of course developed with
>>> that in mind. But they don't need to be, and often aren't. You could
>>> make the domain an element of an enum (where "ACPI" is a choice, for
>>> instance -- this is what PS3 does), or set it to a pointer to a
>>> device_t, or really anything you like. Similarly, the interrupt
>>> specifier is totally free-form.
>>
>> Yes, I agree. and i think that we followed the same direction. But i
>> see two problems with this approach.
>> - in some cases (OFW, device_t)  you don't have  control over domain
>> key value, so you cannot guarantee its uniqueness.
>>   Of course, probability of collision is low, but it is.
>
> We could solve this in a number of ways, for example widening to 64
> bits, or adding another value (domain type, for example). You could
> also make an acpi_bus_map_intr() to go with the OFW one that connect
> in some machine-dependent code if you have fundamentally incompatible
> bus enumeration mechanisms that you expect to exist simultaneously --
> but, of course, no systems like this seem to actually exist, so the
> problem is both easily solved and totally theoretical.
>
>> - within ofw_bus_map_intr() (or later - at the time when byte string
>> must be decoded)  you are not able (easily) to differentiate
>>   between different formats, thus you are not able to select
>> appropriate  decoder. The GPIO controller, for example,
>>   must be able to handle interrupts defined by standard OFW property,
>> or by <device_t, pin number> pair concurrently.
>
> In principle, you could solve that as above, or by registering a
> second interrupt domain for the same controller.
>
> In practice, it doesn't matter since, in the GPIO case, for example,
> the GPIO controller is never itself also a normal interrupt controller
> (i.e. the GIC and GPIO controller are always different devices). As
> such, the theoretical does not occur in practice.
form
https://svnweb.freebsd.org/base/head/sys/gnu/dts/arm/tegra124-jetson-tk1.dts?revision=295436=markup#l1380
"interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; "
Do you want more examples ?


>
>> For this reason we makes domain key composite, in our model, the
>> domain key consist of "domain key type"
>> and "domain key value". This composite key guarantees uniqueness and 
>> it also allows to select proper parser for byte string.
>
> Yes, but this solves what is a nonexistant problem by making the
> system substantially less flexible and more invasive. Which is not a
> good tradeoff.
>
I think that existence of problem is confirmed in the above example .
Quote from previous paragraph:
"We could solve this in a number of ways, ... , or adding another value
(domain type, for example)."
What can I say more ...

>> This is, imho, only one difference between us.
>
> One of many, yes.
>
>>
>>> You could, for instance, set it to one of the structures introduced
>>> in r301453 if you wanted to.
>>>
>>> I would have zero problems with changing the prototype of the
>>> existing dev/ofw function to something more generic in name, like:
>>>
>>> bus_map_intr(device_t dev, uintptr_t iparent, size_t intrlen, void
>>> *intr)
>>>
>>> instead of the existing equivalent:
>>>
>>> ofw_bus_map_intr(device_t dev, phandle_t iparent, int icells,
>>> pcell_t *intr)
>>>
>> Our bus_map_intr() method is not indeed as replacement of 
>> ofw_bus_map_intr(). Its evolution of "how we can store more complex
>> data to resource list (from bus enumerator) and transfer it  to
>> bus_allocate_resource() and/or to bus_

Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 24.07.2016 v 17:32 Nathan Whitehorn napsal(a):
>
>
> On 07/24/16 00:45, Michal Meloun wrote:
>> Dne 23.07.2016 v 20:35 Nathan Whitehorn napsal(a):
>>>
>>>
>>> On 07/23/16 03:45, Michal Meloun wrote:
>>>> Dne 21.07.2016 v 17:53 Nathan Whitehorn napsal(a):
>>>>>
>>>>> On PowerPC, GENERIC64 supports FDT systems (some IBM hardware),
>>>>> OFW systems (Macs, some IBM hardware), systems with no device
>>>>> trees at all (old-style PS3), and systems with a mixture of device
>>>>> tree and no device tree (new-style PS3). On these, there is a
>>>>> mixture of "real" interrupts and GPIO-type interrupts. There is no
>>>>> limitation that this be used only for device-tree-type systems.
>>>>>
>>>>> The system requires two things: an interrupt domain key and an
>>>>> arbitrary unique byte string describing the interrupt. When
>>>>> running with a device tree, these are set to the phandle of the
>>>>> interrupt-parent and the contents of the device tree interrupt
>>>>> specifier, respectively, and the system was of course developed
>>>>> with that in mind. But they don't need to be, and often aren't.
>>>>> You could make the domain an element of an enum (where "ACPI" is a
>>>>> choice, for instance -- this is what PS3 does), or set it to a
>>>>> pointer to a device_t, or really anything you like. Similarly, the
>>>>> interrupt specifier is totally free-form.
>>>>
>>>> Yes, I agree. and i think that we followed the same direction. But
>>>> i see two problems with this approach.
>>>> - in some cases (OFW, device_t)  you don't have  control over
>>>> domain key value, so you cannot guarantee its uniqueness.
>>>>   Of course, probability of collision is low, but it is.
>>>
>>> We could solve this in a number of ways, for example widening to 64
>>> bits, or adding another value (domain type, for example). You could
>>> also make an acpi_bus_map_intr() to go with the OFW one that connect
>>> in some machine-dependent code if you have fundamentally
>>> incompatible bus enumeration mechanisms that you expect to exist
>>> simultaneously -- but, of course, no systems like this seem to
>>> actually exist, so the problem is both easily solved and totally
>>> theoretical.
>>>
>>>> - within ofw_bus_map_intr() (or later - at the time when byte
>>>> string must be decoded)  you are not able (easily) to differentiate
>>>>   between different formats, thus you are not able to select
>>>> appropriate  decoder. The GPIO controller, for example,
>>>>   must be able to handle interrupts defined by standard OFW
>>>> property, or by <device_t, pin number> pair concurrently.
>>>
>>> In principle, you could solve that as above, or by registering a
>>> second interrupt domain for the same controller.
>>>
>>> In practice, it doesn't matter since, in the GPIO case, for example,
>>> the GPIO controller is never itself also a normal interrupt
>>> controller (i.e. the GIC and GPIO controller are always different
>>> devices). As such, the theoretical does not occur in practice.
>> form
>> https://svnweb.freebsd.org/base/head/sys/gnu/dts/arm/tegra124-jetson-tk1.dts?revision=295436=markup#l1380
>> "interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; "
>> Do you want more examples ?
>
> Those have the identical format to the GPIO properties, because they
> are the same thing. So it works out of the box. Do you have examples
> of something that *doesn't work*?
>
>>
>>>
>>>> For this reason we makes domain key composite, in our model, the
>>>> domain key consist of "domain key type"
>>>> and "domain key value". This composite key guarantees uniqueness
>>>> and  it also allows to select proper parser for byte string.
>>>
>>> Yes, but this solves what is a nonexistant problem by making the
>>> system substantially less flexible and more invasive. Which is not a
>>> good tradeoff.
>>>
>> I think that existence of problem is confirmed in the above example .
>> Quote from previous paragraph:
>> "We could solve this in a number of ways, ... , or adding another
>> value (domain type, for example)."
>> What can I say more ...
>
> Except that the example you gave *is not an example* 

Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

I'm sorry for the blank response sent by mistake.

Dne 24.07.2016 v 17:32 Nathan Whitehorn napsal(a):
>
>
> On 07/24/16 00:45, Michal Meloun wrote:
>> Dne 23.07.2016 v 20:35 Nathan Whitehorn napsal(a):
>>>
>>>
>>> On 07/23/16 03:45, Michal Meloun wrote:
>>>> Dne 21.07.2016 v 17:53 Nathan Whitehorn napsal(a):
>>>>>
>>>>> On PowerPC, GENERIC64 supports FDT systems (some IBM hardware),
>>>>> OFW systems (Macs, some IBM hardware), systems with no device
>>>>> trees at all (old-style PS3), and systems with a mixture of device
>>>>> tree and no device tree (new-style PS3). On these, there is a
>>>>> mixture of "real" interrupts and GPIO-type interrupts. There is no
>>>>> limitation that this be used only for device-tree-type systems.
>>>>>
>>>>> The system requires two things: an interrupt domain key and an
>>>>> arbitrary unique byte string describing the interrupt. When
>>>>> running with a device tree, these are set to the phandle of the
>>>>> interrupt-parent and the contents of the device tree interrupt
>>>>> specifier, respectively, and the system was of course developed
>>>>> with that in mind. But they don't need to be, and often aren't.
>>>>> You could make the domain an element of an enum (where "ACPI" is a
>>>>> choice, for instance -- this is what PS3 does), or set it to a
>>>>> pointer to a device_t, or really anything you like. Similarly, the
>>>>> interrupt specifier is totally free-form.
>>>>
>>>> Yes, I agree. and i think that we followed the same direction. But
>>>> i see two problems with this approach.
>>>> - in some cases (OFW, device_t)  you don't have  control over
>>>> domain key value, so you cannot guarantee its uniqueness.
>>>>   Of course, probability of collision is low, but it is.
>>>
>>> We could solve this in a number of ways, for example widening to 64
>>> bits, or adding another value (domain type, for example). You could
>>> also make an acpi_bus_map_intr() to go with the OFW one that connect
>>> in some machine-dependent code if you have fundamentally
>>> incompatible bus enumeration mechanisms that you expect to exist
>>> simultaneously -- but, of course, no systems like this seem to
>>> actually exist, so the problem is both easily solved and totally
>>> theoretical.
>>>
>>>> - within ofw_bus_map_intr() (or later - at the time when byte
>>>> string must be decoded)  you are not able (easily) to differentiate
>>>>   between different formats, thus you are not able to select
>>>> appropriate  decoder. The GPIO controller, for example,
>>>>   must be able to handle interrupts defined by standard OFW
>>>> property, or by <device_t, pin number> pair concurrently.
>>>
>>> In principle, you could solve that as above, or by registering a
>>> second interrupt domain for the same controller.
>>>
>>> In practice, it doesn't matter since, in the GPIO case, for example,
>>> the GPIO controller is never itself also a normal interrupt
>>> controller (i.e. the GIC and GPIO controller are always different
>>> devices). As such, the theoretical does not occur in practice.
>> form
>> https://svnweb.freebsd.org/base/head/sys/gnu/dts/arm/tegra124-jetson-tk1.dts?revision=295436=markup#l1380
>> "interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; "
>> Do you want more examples ?
>
> Those have the identical format to the GPIO properties, because they
> are the same thing. So it works out of the box. Do you have examples
> of something that *doesn't work*?
>>
>>>
>>>> For this reason we makes domain key composite, in our model, the
>>>> domain key consist of "domain key type"
>>>> and "domain key value". This composite key guarantees uniqueness
>>>> and  it also allows to select proper parser for byte string.
>>>
>>> Yes, but this solves what is a nonexistant problem by making the
>>> system substantially less flexible and more invasive. Which is not a
>>> good tradeoff.
>>>
>> I think that existence of problem is confirmed in the above example .
>> Quote from previous paragraph:
>> "We could solve this in a number of ways, ... , or adding another
>> value (domain type, for example)."
>> What can I say more ...
>
> Except th

svn commit: r304071 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun Aug 14 05:10:26 2016
New Revision: 304071
URL: https://svnweb.freebsd.org/changeset/base/304071

Log:
  OFWPCI: Don't strip RF_ACTIVE from flags when parent bus method is called.
  
  Reviewed by:  nwhitehorn
  MFC after:3 weeks

Modified:
  head/sys/dev/ofw/ofwpci.c

Modified: head/sys/dev/ofw/ofwpci.c
==
--- head/sys/dev/ofw/ofwpci.c   Sun Aug 14 04:35:04 2016(r304070)
+++ head/sys/dev/ofw/ofwpci.c   Sun Aug 14 05:10:26 2016(r304071)
@@ -414,14 +414,14 @@
 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
if (type ==  PCI_RES_BUS) {
  return (pci_domain_alloc_bus(sc->sc_pci_domain, child, rid,
- start, end, count, flags));
+ start, end, count, flags | needactivate));
}
 #endif
 
rm = ofw_pci_get_rman(sc, type, flags);
if (rm == NULL)  {
return (bus_generic_alloc_resource(bus, child, type, rid,
-   start, end, count, flags));
+   start, end, count, flags | needactivate));
}
 
rv = rman_reserve_resource(rm, start, end, count, flags, child);
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Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 20.07.2016 v 17:45 Nathan Whitehorn napsal(a):
>
>
> On 07/20/16 04:28, Michal Meloun wrote:
>> Dne 19.07.2016 v 17:06 Nathan Whitehorn napsal(a):
>>>
>>>
>>> On 07/19/16 04:13, Michal Meloun wrote:
>>>> Dne 19.07.2016 v 2:11 Nathan Whitehorn napsal(a):
>>>> Hi Nathan,
>>>> I’m afraid that skra is on vacation, for next 2 weeks (at minimum), so
>>>> please don’t expect quick response.
>>>>
>>>>> Could you please describe what this change is in more detail?
>>>> Short description is appended.
>>>>
>>>>> It breaks a lot of encapsulations we have worked very hard to
>>>>> maintain,
>>>>> moves ARM code into MI parts of the kernel, and the OFW parts violate
>>>>> IEEE 1275 (the Open Firmware standard). In particular, there is no
>>>>> guarantee that the interrupts for a newbus (or OF) device are
>>>>> encoded in
>>>>> a property called "interrupts" (or, indeed, in any property at
>>>>> all) on
>>>>> that node and there are many, many device trees where that is not the
>>>>> case (e.g. ones with interrupt maps, as well as Apple hardware). By
>>>>> putting that knowledge into the OF root bus device, which we have
>>>>> tried
>>>>> to keep it out of, this enforces a standard that doesn't actually
>>>>> exist.
>>>> Imho, this patch doesn’t change anything in this area. Only
>>>> handling of
>>>> “interrupts” property is changed, all other cases are unchanged (I
>>>> hope).  Also, INTRNG code is currently shared by ARM, ARM64 and MIPS.
>>>
>>> But "interrupts" isn't a generic part of OF. This makes it one,
>>> incorrectly.
>> How? Can you be little more exact ?
>
> Because it puts knowledge into ofwbus that expects that children at
> arbitrary levels of nesting have interrupts defined by an "interrupts"
> property. You could patch this through on sub-devices, of course, but
> that's already done correctly by the existing ofw_bus_map_intr() code
> in a much more robust way that doesn't involve trying to guess how
> sub-buses and devices have chosen to allocate resources. Why reinvent
> the wheel all the way through the bus hierarchy?
 Nope, the code only expect that „interrupts" property is default way
hot to get interrupt description.  Any device or bus in the hierarchy
can fill appropriate resource list, or terminate call at any level.
>
>>>
>>>>
>>>>> I'm hesitant to ask for reversion on something that landed 6 weeks
>>>>> ago
>>>>> without me noticing, but this needs a lot more architectural work
>>>>> before
>>>>> any parts of the kernel should use it.
>>>>> -Nathan
>>>> I think that it’s too late.  This patch series consist of r301451
>>>> (https://reviews.freebsd.org/D6632),
>>>> r301453, r301539 and 301543.  And new GPIO interrupts are currently
>>>> used
>>>> (by in tree drivers or in development trees).
>>>
>>> Well, then we need in-place rearchitecture.
>>>
>>>>
>>>>
>>>> The root of problem is that standard way of delivering interrupt
>>>> resource to consumer driver doesn’t works in OFW world.
>>>>
>>>> So we have some fact:
>>>> - the format of interrupt property is dependent of interrupt
>>>>controller and only interrupt controller can parse it.
>>>> - the interrupt property can have more data than just interrupt
>>>>number.
>>>> - single interrupt controller must be able to handle multiple
>>>>format of interrupt description.
>>>>
>>>> In pre-patchset era, simplebus enumerates children and attempts to set
>>>> memory and interrupts to resource list for them. But the interrupt
>>>> controllers are not yet populated so nobody can parse interrupt
>>>> property. Moreover, in all cases (parsed or not), we cannot store
>>>> complete interrupt description into resource list.
>>>
>>> We have done this for many years on PowerPC and sparc64 with delayed
>>> configuration of interrupts and a look-up table. This handles
>>> complicated bus configurations better than this code and requires no
>>> changes outside of a few MD files. That is why the (now partially
>>> duplicated) OFW_BUS_MAP_INTR() function exists. That one also has
>>> the benef

svn commit: r302951 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun Jul 17 13:43:00 2016
New Revision: 302951
URL: https://svnweb.freebsd.org/changeset/base/302951

Log:
  OFWPCI: Improve resource handling.
  - add new rman for prefetchable memory. Is used only if given 'ranges'
property contains prefetchable memory range.
  
  - not all ranges in 'ranges' property are subject for rman's filling.
Tegra for example, have two addition records which are used for
'pci 'register' -> 'assigned-address' -> 'ranges' machinery.
Add sc_ranges_mask for masking not rman related ranges.
  
  - consistently pass unknown (not managed at this level) resources
allocation/release/adjust requests to parent.
  
  MFC after: 3 weeks

Modified:
  head/sys/dev/ofw/ofwpci.c
  head/sys/dev/ofw/ofwpci.h

Modified: head/sys/dev/ofw/ofwpci.c
==
--- head/sys/dev/ofw/ofwpci.c   Sun Jul 17 13:33:35 2016(r302950)
+++ head/sys/dev/ofw/ofwpci.c   Sun Jul 17 13:43:00 2016(r302951)
@@ -94,6 +94,7 @@ static phandle_t ofw_pci_get_node(device
  * local methods
  */
 static int ofw_pci_fill_ranges(phandle_t, struct ofw_pci_range *);
+static struct rman *ofw_pci_get_rman(struct ofw_pci_softc *, int, u_int);
 
 /*
  * Driver methods.
@@ -137,7 +138,7 @@ ofw_pci_init(device_t dev)
phandle_t node;
u_int32_t busrange[2];
struct ofw_pci_range *rp;
-   int error;
+   int i, error;
struct ofw_pci_cell_info *cell_info;
 
node = ofw_bus_get_node(dev);
@@ -201,17 +202,27 @@ ofw_pci_init(device_t dev)
}
 
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-   sc->sc_mem_rman.rm_descr = "PCI Memory";
+   sc->sc_mem_rman.rm_descr = "PCI Non Prefetchable Memory";
error = rman_init(>sc_mem_rman);
if (error != 0) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
goto out;
}
 
-   for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
-   rp->pci_hi != 0; rp++) {
+   sc->sc_pmem_rman.rm_type = RMAN_ARRAY;
+   sc->sc_pmem_rman.rm_descr = "PCI Prefetchable Memory";
+   error = rman_init(>sc_pmem_rman);
+   if (error != 0) {
+   device_printf(dev, "rman_init() failed. error = %d\n", error);
+   goto out;
+   }
+
+   for (i = 0; i < sc->sc_nrange; i++) {
error = 0;
+   rp = sc->sc_range + i;
 
+   if (sc->sc_range_mask & ((uint64_t)1 << i))
+   continue;
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
case OFW_PCI_PHYS_HI_SPACE_CONFIG:
break;
@@ -221,8 +232,14 @@ ofw_pci_init(device_t dev)
break;
case OFW_PCI_PHYS_HI_SPACE_MEM32:
case OFW_PCI_PHYS_HI_SPACE_MEM64:
-   error = rman_manage_region(>sc_mem_rman, rp->pci,
-   rp->pci + rp->size - 1);
+   if (rp->pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) {
+   sc->sc_have_pmem = 1;
+   error = rman_manage_region(>sc_pmem_rman,
+   rp->pci, rp->pci + rp->size - 1);
+   } else {
+   error = rman_manage_region(>sc_mem_rman,
+   rp->pci, rp->pci + rp->size - 1);
+   }
break;
}
 
@@ -244,6 +261,7 @@ out:
free(sc->sc_range, M_DEVBUF);
rman_fini(>sc_io_rman);
rman_fini(>sc_mem_rman);
+   rman_fini(>sc_pmem_rman);
 
return (error);
 }
@@ -385,28 +403,16 @@ ofw_pci_alloc_resource(device_t bus, dev
struct rman *rm;
int needactivate;
 
+
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
 
sc = device_get_softc(bus);
 
-   switch (type) {
-   case SYS_RES_MEMORY:
-   rm = >sc_mem_rman;
-   break;
-
-   case SYS_RES_IOPORT:
-   rm = >sc_io_rman;
-   break;
-
-   case SYS_RES_IRQ:
-   return (bus_alloc_resource(bus, type, rid, start, end, count,
-   flags));
-
-   default:
-   device_printf(bus, "unknown resource request from %s\n",
-   device_get_nameunit(child));
-   return (NULL);
+   rm = ofw_pci_get_rman(sc, type, flags);
+   if (rm == NULL)  {
+   return (bus_generic_alloc_resource(bus, child, type, rid,
+   start, end, count, flags));
}
 
rv = rman_reserve_resource(rm, start, end, count, flags, child);
@@ -435,15 +441,24 @@ static int
 ofw_pci_release_resource(device_t bus, device_t child, int type, int rid,
 struct resource *res)
 {
+   struct ofw_pci_softc *sc;
+   struct rman *rm;
+   int error;
 
-   if (rman_get_flags(res) & 

svn commit: r302952 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Sun Jul 17 13:43:46 2016
New Revision: 302952
URL: https://svnweb.freebsd.org/changeset/base/302952

Log:
  OFWPCI: Add support for NEW_PCIB.
  
  MFC after: 3 weeks

Modified:
  head/sys/dev/ofw/ofwpci.c
  head/sys/dev/ofw/ofwpci.h

Modified: head/sys/dev/ofw/ofwpci.c
==
--- head/sys/dev/ofw/ofwpci.c   Sun Jul 17 13:43:00 2016(r302951)
+++ head/sys/dev/ofw/ofwpci.c   Sun Jul 17 13:43:46 2016(r302952)
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -145,6 +146,7 @@ ofw_pci_init(device_t dev)
sc = device_get_softc(dev);
sc->sc_initialized = 1;
sc->sc_range = NULL;
+   sc->sc_pci_domain = device_get_unit(dev);
 
cell_info = (struct ofw_pci_cell_info *)malloc(sizeof(*cell_info),
M_DEVBUF, M_WAITOK | M_ZERO);
@@ -336,7 +338,7 @@ ofw_pci_read_ivar(device_t dev, device_t
 
switch (which) {
case PCIB_IVAR_DOMAIN:
-   *result = device_get_unit(dev);
+   *result = sc->sc_pci_domain;
return (0);
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
@@ -409,6 +411,13 @@ ofw_pci_alloc_resource(device_t bus, dev
 
sc = device_get_softc(bus);
 
+#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
+   if (type ==  PCI_RES_BUS) {
+ return (pci_domain_alloc_bus(sc->sc_pci_domain, child, rid,
+ start, end, count, flags));
+   }
+#endif
+
rm = ofw_pci_get_rman(sc, type, flags);
if (rm == NULL)  {
return (bus_generic_alloc_resource(bus, child, type, rid,
@@ -447,6 +456,12 @@ ofw_pci_release_resource(device_t bus, d
 
sc = device_get_softc(bus);
 
+#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
+   if (type == PCI_RES_BUS)
+   return (pci_domain_release_bus(sc->sc_pci_domain, child, rid,
+   res));
+#endif
+
rm = ofw_pci_get_rman(sc, type, rman_get_flags(res));
if (rm == NULL) {
return (bus_generic_release_resource(bus, child, type, rid,
@@ -566,6 +581,11 @@ ofw_pci_adjust_resource(device_t bus, de
struct ofw_pci_softc *sc;
 
sc = device_get_softc(bus);
+#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
+   if (type == PCI_RES_BUS)
+   return (pci_domain_adjust_bus(sc->sc_pci_domain, child, res,
+   start, end));
+#endif
 
rm = ofw_pci_get_rman(sc, type, rman_get_flags(res));
if (rm == NULL) {

Modified: head/sys/dev/ofw/ofwpci.h
==
--- head/sys/dev/ofw/ofwpci.h   Sun Jul 17 13:43:00 2016(r302951)
+++ head/sys/dev/ofw/ofwpci.h   Sun Jul 17 13:43:46 2016(r302952)
@@ -72,6 +72,7 @@ struct ofw_pci_softc {
struct rman sc_pmem_rman;
bus_space_tag_t sc_memt;
bus_dma_tag_t   sc_dmat;
+   int sc_pci_domain;
 
struct ofw_bus_iinfosc_pci_iinfo;
 };
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svn commit: r302961 - head/sys/arm/nvidia

[Michal Meloun]

Author: mmel
Date: Sun Jul 17 14:45:15 2016
New Revision: 302961
URL: https://svnweb.freebsd.org/changeset/base/302961

Log:
  TEGRA: Subclass Tegra PCIE driver from ofw_pci base driver.
  Remove now redundant code.

Modified:
  head/sys/arm/nvidia/tegra_pcie.c

Modified: head/sys/arm/nvidia/tegra_pcie.c
==
--- head/sys/arm/nvidia/tegra_pcie.cSun Jul 17 14:17:58 2016
(r302960)
+++ head/sys/arm/nvidia/tegra_pcie.cSun Jul 17 14:45:15 2016
(r302961)
@@ -57,6 +57,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -64,100 +65,13 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#include "ofw_bus_if.h"
-#include "pcib_if.h"
-
 #include 
 
-/* --- Move to ofw_pci.c/.h --- */
-
-struct tegra_pci_range {
-   /* parsed phys.hi */
-   int nonrelocatable;
-   int prefetchable;
-   int aliased;
-   int space_code; /* In native format (not shifted)*/
-   int bus;
-   int device;
-   int function;
-   int reg;
-   pci_addr_t  pci_addr;   /* PCI Address */
-   bus_addr_t  host_addr;  /* Host bus address*/
-   bus_size_t  size;   /* Range size */
-};
-
-static int
-tegra_pci_get_ranges(phandle_t node,  struct tegra_pci_range **ranges)
-{
-   int host_address_cells, pci_address_cells, size_cells;
-   cell_t *base_ranges;
-   ssize_t nbase_ranges;
-   int nranges;
-   int i, j, k;
-   uint32_t flags;
-   uint64_t tmp;
-
-   host_address_cells = 1;
-   pci_address_cells = 3;
-   size_cells = 2;
-   OF_getencprop(OF_parent(node), "#address-cells", _address_cells,
-   sizeof(host_address_cells));
-   OF_getencprop(node, "#address-cells", _address_cells,
-   sizeof(pci_address_cells));
-   OF_getencprop(node, "#size-cells", _cells, sizeof(size_cells));
-
-   nbase_ranges = OF_getproplen(node, "ranges");
-   if (nbase_ranges <= 0)
-   return (-1);
-   nranges = nbase_ranges / sizeof(cell_t) /
-   (pci_address_cells + host_address_cells + size_cells);
-
-   *ranges = malloc(nranges * sizeof(struct tegra_pci_range),
-   M_DEVBUF, M_WAITOK);
-   base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
-   OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
-
-   for (i = 0, j = 0; i < nranges; i++) {
-   flags =  base_ranges[j++];
-   (*ranges)[i].nonrelocatable =
-  flags & OFW_PCI_PHYS_HI_NONRELOCATABLE ? 1 : 0;
-   (*ranges)[i].prefetchable =
-  flags & OFW_PCI_PHYS_HI_PREFETCHABLE ? 1 : 0;
-   (*ranges)[i].aliased =
-  flags & OFW_PCI_PHYS_HI_ALIASED ? 1 : 0;
-   (*ranges)[i].space_code = flags & OFW_PCI_PHYS_HI_SPACEMASK;
-   (*ranges)[i].bus = OFW_PCI_PHYS_HI_BUS(flags);
-   (*ranges)[i].device = OFW_PCI_PHYS_HI_DEVICE(flags);
-   (*ranges)[i].function = OFW_PCI_PHYS_HI_FUNCTION(flags);
-   (*ranges)[i].reg = flags & OFW_PCI_PHYS_HI_REGISTERMASK;
-
-   tmp = 0;
-   for (k = 0; k < pci_address_cells - 1; k++) {
-   tmp <<= 32;
-   tmp |= base_ranges[j++];
-   }
-   (*ranges)[i].pci_addr = (pci_addr_t)tmp;
-
-   tmp = 0;
-   for (k = 0; k < host_address_cells; k++) {
-   tmp <<= 32;
-   tmp |= base_ranges[j++];
-   }
-   (*ranges)[i].host_addr = (bus_addr_t)tmp;
-   tmp = 0;
+#include "ofw_bus_if.h"
+#include "pcib_if.h"
 
-   for (k = 0; k < size_cells; k++) {
-   tmp <<= 32;
-   tmp |= base_ranges[j++];
-   }
-   (*ranges)[i].size = (bus_size_t)tmp;
-   }
 
-   free(base_ranges, M_DEVBUF);
-   return (nranges);
-}
 
-/* -- 
*/
 #defineAFI_AXI_BAR0_SZ 0x000
 #defineAFI_AXI_BAR1_SZ 0x004
 #defineAFI_AXI_BAR2_SZ 0x008
@@ -358,12 +272,9 @@ struct tegra_pcib_port {
 
 #defineTEGRA_PCIB_MAX_PORTS3
 struct tegra_pcib_softc {
+   struct ofw_pci_softcofw_pci;
device_tdev;
struct mtx  mtx;
-   struct ofw_bus_iinfopci_iinfo;
-   struct rman pref_mem_rman;
-   struct rman mem_rman;
-   struct rman io_rman;
struct resource *pads_mem_res;
struct resource *afi_mem_res;
struct resource *cfg_mem_res;
@@ -372,18 

Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 19.07.2016 v 2:11 Nathan Whitehorn napsal(a):
Hi Nathan,
I’m afraid that skra is on vacation, for next 2 weeks (at minimum), so
please don’t expect quick response.

> Could you please describe what this change is in more detail?
Short description is appended.

> 
> It breaks a lot of encapsulations we have worked very hard to maintain,
> moves ARM code into MI parts of the kernel, and the OFW parts violate
> IEEE 1275 (the Open Firmware standard). In particular, there is no
> guarantee that the interrupts for a newbus (or OF) device are encoded in
> a property called "interrupts" (or, indeed, in any property at all) on
> that node and there are many, many device trees where that is not the
> case (e.g. ones with interrupt maps, as well as Apple hardware). By
> putting that knowledge into the OF root bus device, which we have tried
> to keep it out of, this enforces a standard that doesn't actually exist.
Imho, this patch doesn’t change anything in this area. Only handling of
“interrupts” property is changed, all other cases are unchanged (I
hope).  Also, INTRNG code is currently shared by ARM, ARM64 and MIPS.

> 
> I'm hesitant to ask for reversion on something that landed 6 weeks ago
> without me noticing, but this needs a lot more architectural work before
> any parts of the kernel should use it.
> -Nathan
I think that it’s too late.  This patch series consist of r301451
(https://reviews.freebsd.org/D6632),
r301453, r301539 and 301543.  And new GPIO interrupts are currently used
(by in tree drivers or in development trees).



The root of problem is that standard way of delivering interrupt
resource to consumer driver doesn’t works in OFW world.

So we have some fact:
- the format of interrupt property is dependent of interrupt
  controller and only interrupt controller can parse it.
- the interrupt property can have more data than just interrupt
  number.
- single interrupt controller must be able to handle multiple
  format of interrupt description.

In pre-patchset era, simplebus enumerates children and attempts to set
memory and interrupts to resource list for them. But the interrupt
controllers are not yet populated so nobody can parse interrupt
property. Moreover, in all cases (parsed or not), we cannot store
complete interrupt description into resource list.

The patch simply postpones reading of interrupt property to
bus_alloc_resource() (called by consumer driver) time.

Due to this, we can:
- parse  interrupt property. The interrupt driver must exist
  at this time.
- bus_alloc_resource() returns resource, so we can attach parsed
  interrupt data to it. By this, the resource itself can be used
  for delivering configuration data to subsequent call to
  bus_setup_intr() (or to all related  bus_() calls).


The patched code still accepts delivering of interrupts in resource list.

Michal

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Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 19.07.2016 v 17:06 Nathan Whitehorn napsal(a):
>
>
> On 07/19/16 04:13, Michal Meloun wrote:
>> Dne 19.07.2016 v 2:11 Nathan Whitehorn napsal(a):
>> Hi Nathan,
>> I’m afraid that skra is on vacation, for next 2 weeks (at minimum), so
>> please don’t expect quick response.
>>
>>> Could you please describe what this change is in more detail?
>> Short description is appended.
>>
>>> It breaks a lot of encapsulations we have worked very hard to maintain,
>>> moves ARM code into MI parts of the kernel, and the OFW parts violate
>>> IEEE 1275 (the Open Firmware standard). In particular, there is no
>>> guarantee that the interrupts for a newbus (or OF) device are
>>> encoded in
>>> a property called "interrupts" (or, indeed, in any property at all) on
>>> that node and there are many, many device trees where that is not the
>>> case (e.g. ones with interrupt maps, as well as Apple hardware). By
>>> putting that knowledge into the OF root bus device, which we have tried
>>> to keep it out of, this enforces a standard that doesn't actually
>>> exist.
>> Imho, this patch doesn’t change anything in this area. Only handling of
>> “interrupts” property is changed, all other cases are unchanged (I
>> hope).  Also, INTRNG code is currently shared by ARM, ARM64 and MIPS.
>
> But "interrupts" isn't a generic part of OF. This makes it one,
> incorrectly.
How? Can you be little more exact ?
>
>>
>>> I'm hesitant to ask for reversion on something that landed 6 weeks ago
>>> without me noticing, but this needs a lot more architectural work
>>> before
>>> any parts of the kernel should use it.
>>> -Nathan
>> I think that it’s too late.  This patch series consist of r301451
>> (https://reviews.freebsd.org/D6632),
>> r301453, r301539 and 301543.  And new GPIO interrupts are currently used
>> (by in tree drivers or in development trees).
>
> Well, then we need in-place rearchitecture.
>
>>
>>
>> The root of problem is that standard way of delivering interrupt
>> resource to consumer driver doesn’t works in OFW world.
>>
>> So we have some fact:
>> - the format of interrupt property is dependent of interrupt
>>controller and only interrupt controller can parse it.
>> - the interrupt property can have more data than just interrupt
>>number.
>> - single interrupt controller must be able to handle multiple
>>format of interrupt description.
>>
>> In pre-patchset era, simplebus enumerates children and attempts to set
>> memory and interrupts to resource list for them. But the interrupt
>> controllers are not yet populated so nobody can parse interrupt
>> property. Moreover, in all cases (parsed or not), we cannot store
>> complete interrupt description into resource list.
>
> We have done this for many years on PowerPC and sparc64 with delayed
> configuration of interrupts and a look-up table. This handles
> complicated bus configurations better than this code and requires no
> changes outside of a few MD files. That is why the (now partially
> duplicated) OFW_BUS_MAP_INTR() function exists. That one also has the
> benefit of still working when used in conjunction with, e.g., devices
> with an interrupt-map-mask property.
>
>>
>> The patch simply postpones reading of interrupt property to
>> bus_alloc_resource() (called by consumer driver) time.
>>
>> Due to this, we can:
>> - parse  interrupt property. The interrupt driver must exist
>>at this time.
>
> This only works with some types of interrupt properties, not all, and
> breaks if the interrupt driver hasn't attached yet (which it can't be
> guaranteed to -- some PPC systems have interrupt drivers that live on
> the PCI bus, for example).
How you can allocate (and reserve it in rman) interrupt if is not mapped
(so you have not real IRQ number for it). Just for notice -  multiple
virtual IRQs can be mapped into single real IRQ.

>
>> - bus_alloc_resource() returns resource, so we can attach parsed
>>interrupt data to it. By this, the resource itself can be used
>>for delivering configuration data to subsequent call to
>>bus_setup_intr() (or to all related  bus_() calls).
>>
>>
>> The patched code still accepts delivering of interrupts in resource
>> list.
>>
>> Michal
>>
>
> Given that other code depends on this, fixing it will likely require
> some complex work. I wish I had known about it when it went in.
>
> There are three main problems:
> 1. It doesn't work for interrupts defined 

svn commit: r302528 - in head/sys: arm/allwinner arm/allwinner/clk arm/nvidia arm/nvidia/tegra124 dev/dwc dev/extres/clk dev/extres/hwreset dev/extres/phy dev/extres/regulator dev/iicbus/twsi dev/u...

[Michal Meloun]

Author: mmel
Date: Sun Jul 10 18:28:15 2016
New Revision: 302528
URL: https://svnweb.freebsd.org/changeset/base/302528

Log:
  EXTRES: Add OF node as argument to all _get_by_ofw_() functions.
  In some cases, the driver must handle given properties located in
  specific OF subnode. Instead of creating duplicate set of function, add
  'node' as argument to existing functions, defaulting it to device OF node.
  
  MFC after: 3 weeks

Modified:
  head/sys/arm/allwinner/a10_ahci.c
  head/sys/arm/allwinner/a10_codec.c
  head/sys/arm/allwinner/a10_dmac.c
  head/sys/arm/allwinner/a10_ehci.c
  head/sys/arm/allwinner/a10_fb.c
  head/sys/arm/allwinner/a10_gpio.c
  head/sys/arm/allwinner/a10_hdmi.c
  head/sys/arm/allwinner/a10_mmc.c
  head/sys/arm/allwinner/aw_if_dwc.c
  head/sys/arm/allwinner/aw_rsb.c
  head/sys/arm/allwinner/aw_usbphy.c
  head/sys/arm/allwinner/clk/aw_ahbclk.c
  head/sys/arm/allwinner/clk/aw_apbclk.c
  head/sys/arm/allwinner/clk/aw_axiclk.c
  head/sys/arm/allwinner/clk/aw_codecclk.c
  head/sys/arm/allwinner/clk/aw_cpuclk.c
  head/sys/arm/allwinner/clk/aw_cpusclk.c
  head/sys/arm/allwinner/clk/aw_debeclk.c
  head/sys/arm/allwinner/clk/aw_gate.c
  head/sys/arm/allwinner/clk/aw_gmacclk.c
  head/sys/arm/allwinner/clk/aw_hdmiclk.c
  head/sys/arm/allwinner/clk/aw_lcdclk.c
  head/sys/arm/allwinner/clk/aw_mmcclk.c
  head/sys/arm/allwinner/clk/aw_modclk.c
  head/sys/arm/allwinner/clk/aw_pll.c
  head/sys/arm/allwinner/clk/aw_usbclk.c
  head/sys/arm/allwinner/if_awg.c
  head/sys/arm/allwinner/if_emac.c
  head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c
  head/sys/arm/nvidia/tegra124/tegra124_pmc.c
  head/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c
  head/sys/arm/nvidia/tegra_ahci.c
  head/sys/arm/nvidia/tegra_efuse.c
  head/sys/arm/nvidia/tegra_ehci.c
  head/sys/arm/nvidia/tegra_i2c.c
  head/sys/arm/nvidia/tegra_pcie.c
  head/sys/arm/nvidia/tegra_rtc.c
  head/sys/arm/nvidia/tegra_sdhci.c
  head/sys/arm/nvidia/tegra_soctherm.c
  head/sys/arm/nvidia/tegra_uart.c
  head/sys/arm/nvidia/tegra_usbphy.c
  head/sys/dev/dwc/if_dwc.c
  head/sys/dev/extres/clk/clk.c
  head/sys/dev/extres/clk/clk.h
  head/sys/dev/extres/clk/clk_fixed.c
  head/sys/dev/extres/hwreset/hwreset.c
  head/sys/dev/extres/hwreset/hwreset.h
  head/sys/dev/extres/phy/phy.c
  head/sys/dev/extres/phy/phy.h
  head/sys/dev/extres/regulator/regulator.c
  head/sys/dev/extres/regulator/regulator.h
  head/sys/dev/iicbus/twsi/a10_twsi.c
  head/sys/dev/uart/uart_dev_snps.c
  head/sys/dev/usb/controller/generic_ohci.c

Modified: head/sys/arm/allwinner/a10_ahci.c
==
--- head/sys/arm/allwinner/a10_ahci.c   Sun Jul 10 17:16:56 2016
(r302527)
+++ head/sys/arm/allwinner/a10_ahci.c   Sun Jul 10 18:28:15 2016
(r302528)
@@ -313,12 +313,12 @@ ahci_a10_attach(device_t dev)
return (ENXIO);
 
/* Enable clocks */
-   error = clk_get_by_ofw_index(dev, 0, _pll);
+   error = clk_get_by_ofw_index(dev, 0, 0, _pll);
if (error != 0) {
device_printf(dev, "Cannot get PLL clock\n");
goto fail;
}
-   error = clk_get_by_ofw_index(dev, 1, _gate);
+   error = clk_get_by_ofw_index(dev, 0, 1, _gate);
if (error != 0) {
device_printf(dev, "Cannot get gate clock\n");
goto fail;

Modified: head/sys/arm/allwinner/a10_codec.c
==
--- head/sys/arm/allwinner/a10_codec.c  Sun Jul 10 17:16:56 2016
(r302527)
+++ head/sys/arm/allwinner/a10_codec.c  Sun Jul 10 18:28:15 2016
(r302528)
@@ -786,12 +786,12 @@ a10codec_attach(device_t dev)
}
 
/* Get clocks */
-   error = clk_get_by_ofw_name(dev, "apb", _apb);
+   error = clk_get_by_ofw_name(dev, 0, "apb", _apb);
if (error != 0) {
device_printf(dev, "cannot find apb clock\n");
goto fail;
}
-   error = clk_get_by_ofw_name(dev, "codec", _codec);
+   error = clk_get_by_ofw_name(dev, 0, "codec", _codec);
if (error != 0) {
device_printf(dev, "cannot find codec clock\n");
goto fail;

Modified: head/sys/arm/allwinner/a10_dmac.c
==
--- head/sys/arm/allwinner/a10_dmac.c   Sun Jul 10 17:16:56 2016
(r302527)
+++ head/sys/arm/allwinner/a10_dmac.c   Sun Jul 10 18:28:15 2016
(r302528)
@@ -124,7 +124,7 @@ a10dmac_attach(device_t dev)
mtx_init(>sc_mtx, "a10 dmac", NULL, MTX_SPIN);
 
/* Activate DMA controller clock */
-   error = clk_get_by_ofw_index(dev, 0, );
+   error = clk_get_by_ofw_index(dev, 0, 0, );
if (error != 0) {
device_printf(dev, "cannot get clock\n");
return (error);

Modified: head/sys/arm/allwinner/a10_ehci.c

svn commit: r302560 - head/sys/dev/ofw

[Michal Meloun]

Author: mmel
Date: Mon Jul 11 08:24:04 2016
New Revision: 302560
URL: https://svnweb.freebsd.org/changeset/base/302560

Log:
  OFWPCI: Fix style(9).
  No functional change.
  
  MFC after: 3 weeks

Modified:
  head/sys/dev/ofw/ofwpci.c

Modified: head/sys/dev/ofw/ofwpci.c
==
--- head/sys/dev/ofw/ofwpci.c   Mon Jul 11 08:12:04 2016(r302559)
+++ head/sys/dev/ofw/ofwpci.c   Mon Jul 11 08:24:04 2016(r302560)
@@ -195,7 +195,7 @@ ofw_pci_init(device_t dev)
sc->sc_io_rman.rm_type = RMAN_ARRAY;
sc->sc_io_rman.rm_descr = "PCI I/O Ports";
error = rman_init(>sc_io_rman);
-   if (error) {
+   if (error != 0) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
goto out;
}
@@ -203,7 +203,7 @@ ofw_pci_init(device_t dev)
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "PCI Memory";
error = rman_init(>sc_mem_rman);
-   if (error) {
+   if (error != 0) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
goto out;
}
@@ -226,7 +226,7 @@ ofw_pci_init(device_t dev)
break;
}
 
-   if (error) {
+   if (error != 0) {
device_printf(dev,
"rman_manage_region(%x, %#jx, %#jx) failed. "
"error = %d\n", rp->pci_hi &
@@ -257,7 +257,7 @@ ofw_pci_attach(device_t dev)
sc = device_get_softc(dev);
if (!sc->sc_initialized) {
error = ofw_pci_init(dev);
-   if (error)
+   if (error != 0)
return (error);
}
 
@@ -437,9 +437,11 @@ ofw_pci_release_resource(device_t bus, d
 {
 
if (rman_get_flags(res) & RF_ACTIVE) {
-   int error = bus_deactivate_resource(child, type, rid, res);
-   if (error)
-   return error;
+   int error;
+
+   error = bus_deactivate_resource(child, type, rid, res);
+   if (error != 0)
+   return (error);
}
 
return (rman_release_resource(res));
@@ -544,9 +546,10 @@ static int
 ofw_pci_adjust_resource(device_t bus, device_t child, int type,
 struct resource *res, rman_res_t start, rman_res_t end)
 {
-   struct rman *rm = NULL;
-   struct ofw_pci_softc *sc = device_get_softc(bus);
+   struct rman *rm;
+   struct ofw_pci_softc *sc;
 
+   sc = device_get_softc(bus);
KASSERT(!(rman_get_flags(res) & RF_ACTIVE),
("active resources cannot be adjusted"));
if (rman_get_flags(res) & RF_ACTIVE)
___
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Re: svn commit: r301453 - in head/sys: arm/arm arm64/arm64 dev/fdt dev/gpio dev/iicbus dev/ofw dev/pci dev/vnic kern mips/mips sys

[Michal Meloun]

Dne 21.07.2016 v 17:53 Nathan Whitehorn napsal(a):
>
>
> On 07/21/16 00:34, Michal Meloun wrote:
>> Dne 20.07.2016 v 17:45 Nathan Whitehorn napsal(a):
>>>
>>>
>>> On 07/20/16 04:28, Michal Meloun wrote:
>>>> Dne 19.07.2016 v 17:06 Nathan Whitehorn napsal(a):
>>>>>
>>>>>
>>>>> On 07/19/16 04:13, Michal Meloun wrote:
>>>>>> Dne 19.07.2016 v 2:11 Nathan Whitehorn napsal(a):
>>>>>> Hi Nathan,
>>>>>> I’m afraid that skra is on vacation, for next 2 weeks (at
>>>>>> minimum), so
>>>>>> please don’t expect quick response.
>>>>>>
>>>>>>> Could you please describe what this change is in more detail?
>>>>>> Short description is appended.
>>>>>>
>>>>>>> It breaks a lot of encapsulations we have worked very hard to
>>>>>>> maintain,
>>>>>>> moves ARM code into MI parts of the kernel, and the OFW parts
>>>>>>> violate
>>>>>>> IEEE 1275 (the Open Firmware standard). In particular, there is no
>>>>>>> guarantee that the interrupts for a newbus (or OF) device are
>>>>>>> encoded in
>>>>>>> a property called "interrupts" (or, indeed, in any property at
>>>>>>> all) on
>>>>>>> that node and there are many, many device trees where that is
>>>>>>> not the
>>>>>>> case (e.g. ones with interrupt maps, as well as Apple hardware). By
>>>>>>> putting that knowledge into the OF root bus device, which we
>>>>>>> have tried
>>>>>>> to keep it out of, this enforces a standard that doesn't
>>>>>>> actually exist.
>>>>>> Imho, this patch doesn’t change anything in this area. Only
>>>>>> handling of
>>>>>> “interrupts” property is changed, all other cases are unchanged (I
>>>>>> hope).  Also, INTRNG code is currently shared by ARM, ARM64 and
>>>>>> MIPS.
>>>>>
>>>>> But "interrupts" isn't a generic part of OF. This makes it one,
>>>>> incorrectly.
>>>> How? Can you be little more exact ?
>>>
>>> Because it puts knowledge into ofwbus that expects that children at
>>> arbitrary levels of nesting have interrupts defined by an
>>> "interrupts" property. You could patch this through on sub-devices,
>>> of course, but that's already done correctly by the existing
>>> ofw_bus_map_intr() code in a much more robust way that doesn't
>>> involve trying to guess how sub-buses and devices have chosen to
>>> allocate resources. Why reinvent the wheel all the way through the
>>> bus hierarchy?
>>  Nope, the code only expect that „interrupts" property is default way
>> hot to get interrupt description.  Any device or bus in the hierarchy
>> can fill appropriate resource list, or terminate call at any level.
>
> "interrupts" should not be the default -- it's part of the OF bindings
> for the bus and is used (notably) by simplebus. The issue of
> cross-correlating RIDs is a much larger problem, however.
>
Can we postpone this problem while, please?
> [snip]
>>>
>>>>>>
>>>>>> The patch simply postpones reading of interrupt property to
>>>>>> bus_alloc_resource() (called by consumer driver) time.
>>>>>>
>>>>>> Due to this, we can:
>>>>>> - parse  interrupt property. The interrupt driver must exist
>>>>>>at this time.
>>>>>
>>>>> This only works with some types of interrupt properties, not all,
>>>>> and breaks if the interrupt driver hasn't attached yet (which it
>>>>> can't be guaranteed to -- some PPC systems have interrupt drivers
>>>>> that live on the PCI bus, for example).
>>>> How you can allocate (and reserve it in rman) interrupt if is not
>>>> mapped (so you have not real IRQ number for it). Just for notice - 
>>>> multiple virtual IRQs can be mapped into single real IRQ.
>>>
>>> The core idea is to think of the full interrupt specifier -- the
>>> interrupt parent and the full byte string in the device tree -- as
>>> the IRQ rather than the interrupt pin on some chip (which is
>>> usually, but not always, the first word in that byte string). The
>>>