from:"Michal Meloun"

svn commit: r368187 - head/sys/dev/nvme

2020-11-30 Thread Michal Meloun

Author: mmel
Date: Mon Nov 30 14:51:48 2020
New Revision: 368187
URL: https://svnweb.freebsd.org/changeset/base/368187

Log:
  Unbreak r368167 in userland. Decorate unused arguments.
  
  Reported by:  kp, tuexen, jenkins, and many others
  MFC with: r368167

Modified:
  head/sys/dev/nvme/nvme.h

Modified: head/sys/dev/nvme/nvme.h
==
--- head/sys/dev/nvme/nvme.hMon Nov 30 14:49:13 2020(r368186)
+++ head/sys/dev/nvme/nvme.hMon Nov 30 14:51:48 2020(r368187)
@@ -1728,9 +1728,15 @@ extern int nvme_use_nvd;
 
 #endif /* _KERNEL */
 
+#if _BYTE_ORDER != _LITTLE_ENDIAN
+#define MODIF
+#else
+#define MODIF __unused
+#endif
+
 /* Endianess conversion functions for NVMe structs */
 static inline
-void   nvme_completion_swapbytes(struct nvme_completion *s)
+void   nvme_completion_swapbytes(struct nvme_completion *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1744,7 +1750,7 @@ void  nvme_completion_swapbytes(struct 
nvme_completion 
 }
 
 static inline
-void   nvme_power_state_swapbytes(struct nvme_power_state *s)
+void   nvme_power_state_swapbytes(struct nvme_power_state *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1757,7 +1763,7 @@ void  nvme_power_state_swapbytes(struct 
nvme_power_stat
 }
 
 static inline
-void   nvme_controller_data_swapbytes(struct nvme_controller_data *s)
+void   nvme_controller_data_swapbytes(struct nvme_controller_data *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1809,7 +1815,7 @@ void  nvme_controller_data_swapbytes(struct 
nvme_contro
 }
 
 static inline
-void   nvme_namespace_data_swapbytes(struct nvme_namespace_data *s)
+void   nvme_namespace_data_swapbytes(struct nvme_namespace_data *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1838,7 +1844,8 @@ void  nvme_namespace_data_swapbytes(struct 
nvme_namespa
 }
 
 static inline
-void   nvme_error_information_entry_swapbytes(struct 
nvme_error_information_entry *s)
+void   nvme_error_information_entry_swapbytes(
+struct nvme_error_information_entry *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1855,7 +1862,7 @@ void  nvme_error_information_entry_swapbytes(struct 
nvm
 }
 
 static inline
-void   nvme_le128toh(void *p)
+void   nvme_le128toh(void *p MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
/* Swap 16 bytes in place */
@@ -1871,7 +1878,8 @@ void  nvme_le128toh(void *p)
 }
 
 static inline
-void   nvme_health_information_page_swapbytes(struct 
nvme_health_information_page *s)
+void   nvme_health_information_page_swapbytes(
+struct nvme_health_information_page *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1899,7 +1907,7 @@ void  nvme_health_information_page_swapbytes(struct 
nvm
 }
 
 static inline
-void   nvme_firmware_page_swapbytes(struct nvme_firmware_page *s)
+void   nvme_firmware_page_swapbytes(struct nvme_firmware_page *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1910,7 +1918,7 @@ void  nvme_firmware_page_swapbytes(struct 
nvme_firmware
 }
 
 static inline
-void   nvme_ns_list_swapbytes(struct nvme_ns_list *s)
+void   nvme_ns_list_swapbytes(struct nvme_ns_list *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1921,7 +1929,8 @@ void  nvme_ns_list_swapbytes(struct nvme_ns_list *s)
 }
 
 static inline
-void   nvme_command_effects_page_swapbytes(struct nvme_command_effects_page *s)
+void   nvme_command_effects_page_swapbytes(
+struct nvme_command_effects_page *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1934,7 +1943,8 @@ void  nvme_command_effects_page_swapbytes(struct 
nvme_c
 }
 
 static inline
-void   nvme_res_notification_page_swapbytes(struct nvme_res_notification_page 
*s)
+void   nvme_res_notification_page_swapbytes(
+struct nvme_res_notification_page *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
s->log_page_count = le64toh(s->log_page_count);
@@ -1943,7 +1953,8 @@ void  nvme_res_notification_page_swapbytes(struct 
nvme_
 }
 
 static inline
-void   nvme_sanitize_status_page_swapbytes(struct nvme_sanitize_status_page *s)
+void   nvme_sanitize_status_page_swapbytes(
+struct nvme_sanitize_status_page *s MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
s->sprog = le16toh(s->sprog);
@@ -1959,7 +1970,7 @@ void  nvme_sanitize_status_page_swapbytes(struct 
nvme_s
 }
 
 static inline
-void   intel_log_temp_stats_swapbytes(struct intel_log_temp_stats *s)
+void   intel_log_temp_stats_swapbytes(struct intel_log_temp_stats *s  MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1976,7 +1987,8 @@ void  intel_log_temp_stats_swapbytes(struct 
intel_log_t
 }
 
 static inline
-void   nvme_resv_status_swapbytes(struct nvme_resv_status *s, size_t size)
+void   nvme_resv_status_swapbytes(struct nvme_resv_status *s MODIF,
+size_t size MODIF)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
u_int i, n;
@@ -1993,7

Re: svn commit: r368167 - head/sys/dev/nvme

2020-11-30 Thread Michal Meloun





On 30.11.2020 11:35, Michael Tuexen wrote:

On 30. Nov 2020, at 08:01, Michal Meloun  wrote:

Author: mmel
Date: Mon Nov 30 07:01:12 2020
New Revision: 368167
URL: https://svnweb.freebsd.org/changeset/base/368167

Log:
  NVME: Don't try to swap data on little endian machines.
  These swapping functions violate BUSDMA contract - we cannot write
  to armed (by bus_dmamap_sync(PRE_..)) buffers. Remove them at least
  from little endian machines until a better solution will be developed.

This breaks building libsysdecode on a little endian (amd64) system:



Fixed in r368187. Sorry for troubles.
Michal
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368167 - head/sys/dev/nvme

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Mon Nov 30 07:01:12 2020
New Revision: 368167
URL: https://svnweb.freebsd.org/changeset/base/368167

Log:
  NVME: Don't try to swap data on little endian machines.
  These swapping functions violate BUSDMA contract - we cannot write
  to armed (by bus_dmamap_sync(PRE_..)) buffers. Remove them at least
  from little endian machines until a better solution will be developed.
  
  Reviewed by:  imp
  MFC after:3 weeks

Modified:
  head/sys/dev/nvme/nvme.h

Modified: head/sys/dev/nvme/nvme.h
==
--- head/sys/dev/nvme/nvme.hSun Nov 29 23:37:18 2020(r368166)
+++ head/sys/dev/nvme/nvme.hMon Nov 30 07:01:12 2020(r368167)
@@ -1732,6 +1732,7 @@ extern int nvme_use_nvd;
 static inline
 void   nvme_completion_swapbytes(struct nvme_completion *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
 
s->cdw0 = le32toh(s->cdw0);
/* omit rsvd1 */
@@ -1739,22 +1740,26 @@ voidnvme_completion_swapbytes(struct 
nvme_completion 
s->sqid = le16toh(s->sqid);
/* omit cid */
s->status = le16toh(s->status);
+#endif
 }
 
 static inline
 void   nvme_power_state_swapbytes(struct nvme_power_state *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
 
s->mp = le16toh(s->mp);
s->enlat = le32toh(s->enlat);
s->exlat = le32toh(s->exlat);
s->idlp = le16toh(s->idlp);
s->actp = le16toh(s->actp);
+#endif
 }
 
 static inline
 void   nvme_controller_data_swapbytes(struct nvme_controller_data *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
s->vid = le16toh(s->vid);
@@ -1800,11 +1805,13 @@ voidnvme_controller_data_swapbytes(struct 
nvme_contro
s->mnan = le32toh(s->mnan);
for (i = 0; i < 32; i++)
nvme_power_state_swapbytes(>power_state[i]);
+#endif
 }
 
 static inline
 void   nvme_namespace_data_swapbytes(struct nvme_namespace_data *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
s->nsze = le64toh(s->nsze);
@@ -1827,11 +1834,13 @@ voidnvme_namespace_data_swapbytes(struct 
nvme_namespa
s->endgid = le16toh(s->endgid);
for (i = 0; i < 16; i++)
s->lbaf[i] = le32toh(s->lbaf[i]);
+#endif
 }
 
 static inline
 void   nvme_error_information_entry_swapbytes(struct 
nvme_error_information_entry *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
 
s->error_count = le64toh(s->error_count);
s->sqid = le16toh(s->sqid);
@@ -1842,6 +1851,7 @@ void  nvme_error_information_entry_swapbytes(struct 
nvm
s->nsid = le32toh(s->nsid);
s->csi = le64toh(s->csi);
s->ttsi = le16toh(s->ttsi);
+#endif
 }
 
 static inline
@@ -1857,14 +1867,13 @@ voidnvme_le128toh(void *p)
tmp[i] = tmp[15-i];
tmp[15-i] = b;
}
-#else
-   (void)p;
 #endif
 }
 
 static inline
 void   nvme_health_information_page_swapbytes(struct 
nvme_health_information_page *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
s->temperature = le16toh(s->temperature);
@@ -1886,47 +1895,57 @@ voidnvme_health_information_page_swapbytes(struct 
nvm
s->tmt2tc = le32toh(s->tmt2tc);
s->ttftmt1 = le32toh(s->ttftmt1);
s->ttftmt2 = le32toh(s->ttftmt2);
+#endif
 }
 
 static inline
 void   nvme_firmware_page_swapbytes(struct nvme_firmware_page *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
for (i = 0; i < 7; i++)
s->revision[i] = le64toh(s->revision[i]);
+#endif
 }
 
 static inline
 void   nvme_ns_list_swapbytes(struct nvme_ns_list *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
for (i = 0; i < 1024; i++)
s->ns[i] = le32toh(s->ns[i]);
+#endif
 }
 
 static inline
 void   nvme_command_effects_page_swapbytes(struct nvme_command_effects_page *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
 
for (i = 0; i < 256; i++)
s->acs[i] = le32toh(s->acs[i]);
for (i = 0; i < 256; i++)
s->iocs[i] = le32toh(s->iocs[i]);
+#endif
 }
 
 static inline
 void   nvme_res_notification_page_swapbytes(struct nvme_res_notification_page 
*s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
s->log_page_count = le64toh(s->log_page_count);
s->nsid = le32toh(s->nsid);
+#endif
 }
 
 static inline
 void   nvme_sanitize_status_page_swapbytes(struct nvme_sanitize_status_page *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
s->sprog = le16toh(s->sprog);
s->sstat = le16toh(s->sstat);
s->scdw10 = le32toh(s->scdw10);
@@ -1936,11 +1955,13 @@ voidnvme_sanitize_status_page_swapbytes(struct 
nvme_s
s->etfownd = le32toh(s->etfownd);
s->etfbewnd = le32toh(s->etfbewnd);
s->etfcewnd = le32toh(s->etfcewnd);
+#endif
 }
 
 static inline
 void   intel_log_temp_stats_swapbytes(struct intel_log_temp_stats *s)
 {
+#if _BYTE_ORDER != _LITTLE_ENDIAN
 
s->current = le64toh(s->current);

Re: svn commit: r368187 - head/sys/dev/nvme

2020-11-30 Thread Michal Meloun





On 30.11.2020 17:02, Ian Lepore wrote:

On Mon, 2020-11-30 at 14:51 +, Michal Meloun wrote:

Author: mmel
Date: Mon Nov 30 14:51:48 2020
New Revision: 368187
URL: https://svnweb.freebsd.org/changeset/base/368187

Log:
   Unbreak r368167 in userland. Decorate unused arguments.
   
   Reported by:	kp, tuexen, jenkins, and many others

   MFC with:r368167

Modified:
   head/sys/dev/nvme/nvme.h

Modified: head/sys/dev/nvme/nvme.h
=
=
--- head/sys/dev/nvme/nvme.hMon Nov 30 14:49:13 2020(r368186)
+++ head/sys/dev/nvme/nvme.hMon Nov 30 14:51:48 2020(r368187)
@@ -1728,9 +1728,15 @@ extern int nvme_use_nvd;
  
  #endif /* _KERNEL */
  
+#if _BYTE_ORDER != _LITTLE_ENDIAN

+#define MODIF
+#else
+#define MODIF __unused
+#endif
+
  /* Endianess conversion functions for NVMe structs */
  static inline
-void   nvme_completion_swapbytes(struct nvme_completion *s)
+void   nvme_completion_swapbytes(struct nvme_completion *s MODIF)


IMO, this is pretty ugly, it causes the brain to screech to a halt when
you see it.  Why not just add an unconditional __unused to the
functions?  The unused attribute is defined as marking the variable as
"potentially unused" -- there is no penalty for having it there and
then actually using the variable.



I understand, (and I have significant tendency to agree) but I did not 
find more correct way how to do it.
Are you sure that __unused is defined as *potentially* unused?  I cannot 
find nothing about this and you known how are compiler guys creative 
with generating of new warnings...
I known that C++17 have 'maybe_unused' attribute, but relationship to 
standard '__unused' looks unclear.


In any case, I have not single problem to change this to the proposed 
style if we found that this is the optimal way.


Michal
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368340 - in head/sys: arm/rockchip arm64/rockchip arm64/rockchip/clk

2020-12-04 Thread Michal Meloun

Author: mmel
Date: Fri Dec  4 16:24:44 2020
New Revision: 368340
URL: https://svnweb.freebsd.org/changeset/base/368340

Log:
  Add support for RK3288 SoC.

Added:
  head/sys/arm/rockchip/files.rk32xx   (contents, props changed)
  head/sys/arm/rockchip/rk32xx_machdep.c   (contents, props changed)
  head/sys/arm/rockchip/rk32xx_mp.c   (contents, props changed)
  head/sys/arm/rockchip/rk32xx_mp.h   (contents, props changed)
  head/sys/arm/rockchip/std.rk32xx   (contents, props changed)
  head/sys/arm64/rockchip/clk/rk3288_cru.c   (contents, props changed)
  head/sys/arm64/rockchip/rk_pmu.c   (contents, props changed)
  head/sys/arm64/rockchip/rk_usbphy.c   (contents, props changed)
Modified:
  head/sys/arm64/rockchip/clk/rk_clk_pll.c
  head/sys/arm64/rockchip/clk/rk_clk_pll.h
  head/sys/arm64/rockchip/clk/rk_cru.c
  head/sys/arm64/rockchip/clk/rk_cru.h
  head/sys/arm64/rockchip/rk_pwm.c
  head/sys/arm64/rockchip/rk_tsadc.c

Added: head/sys/arm/rockchip/files.rk32xx
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/files.rk32xx  Fri Dec  4 16:24:44 2020
(r368340)
@@ -0,0 +1,31 @@
+# $FreeBSD$
+kern/kern_clocksource.cstandard
+
+arm/rockchip/rk32xx_machdep.c  standard
+arm/rockchip/rk32xx_mp.c   optionalsmp
+arm64/rockchip/if_dwc_rk.c standard
+arm64/rockchip/rk_i2c.cstandard
+arm64/rockchip/rk_iodomain.c   standard
+arm64/rockchip/rk_gpio.c   standard
+arm64/rockchip/rk_grf.cstandard
+arm64/rockchip/rk_pinctrl.cstandard
+arm64/rockchip/rk_pmu.cstandard
+arm64/rockchip/rk_pwm.cstandard
+arm64/rockchip/rk_tsadc.c  standard
+arm64/rockchip/rk_tsadc_if.m   standard
+arm64/rockchip/rk_usbphy.c standard
+arm64/rockchip/clk/rk_clk_armclk.c standard
+arm64/rockchip/clk/rk_clk_composite.c  standard
+arm64/rockchip/clk/rk_clk_fract.c  standard
+arm64/rockchip/clk/rk_clk_gate.c   standard
+arm64/rockchip/clk/rk_clk_mux.cstandard
+arm64/rockchip/clk/rk_clk_pll.cstandard
+arm64/rockchip/clk/rk_cru.cstandard
+arm64/rockchip/clk/rk3288_cru.cstandard
+
+dev/iicbus/pmic/act8846.c  standard
+dev/iicbus/pmic/act8846_regulator.cstandard
+dev/iicbus/pmic/fan53555.c standard
+dev/iicbus/rtc/hym8563.c   standard
+dev/mmc/host/dwmmc.c   optionaldwmmc
+dev/mmc/host/dwmmc_rockchip.c  optionaldwmmc

Added: head/sys/arm/rockchip/rk32xx_machdep.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/rk32xx_machdep.c  Fri Dec  4 16:24:44 2020
(r368340)
@@ -0,0 +1,126 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Michal Meloun 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_platform.h"
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "platform_if.h"
+#define CRU_PHYSBASE   0xFF76
+#define CRU_SIZE   0x0001
+#define CRU_GLB_SRST_FST_VALUE  0x1B0
+
+static platform_def_t rk3288w_platform;
+
+static void
+rk32xx_late_init(platform_t plat)
+{
+
+}
+
+/*
+ * Set up static device mappings.
+ */
+

svn commit: r368367 - in head/sys: arm64/conf modules/dtb/freescale

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 11:17:54 2020
New Revision: 368367
URL: https://svnweb.freebsd.org/changeset/base/368367

Log:
  Connect DTB files based on LX2160A SoC to build.
  Mainly LX2K Honeycomb and ClearFog-CX boards.

Added:
  head/sys/modules/dtb/freescale/
  head/sys/modules/dtb/freescale/Makefile   (contents, props changed)
Modified:
  head/sys/arm64/conf/GENERIC

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Sat Dec  5 10:57:15 2020(r368366)
+++ head/sys/arm64/conf/GENERIC Sat Dec  5 11:17:54 2020(r368367)
@@ -367,4 +367,4 @@ options FDT
 device acpi
 
 # DTBs
-makeoptionsMODULES_EXTRA="dtb/allwinner dtb/imx8 dtb/mv dtb/rockchip 
dtb/rpi"
+makeoptionsMODULES_EXTRA="dtb/allwinner dtb/freescale dtb/imx8 dtb/mv 
dtb/rockchip dtb/rpi"

Added: head/sys/modules/dtb/freescale/Makefile
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/modules/dtb/freescale/Makefile Sat Dec  5 11:17:54 2020
(r368367)
@@ -0,0 +1,8 @@
+# $FreeBSD$
+# All the dts files for Freescale (now NXP) systems we support.
+DTS=   freescale/fsl-lx2160a-clearfog-cx.dts \
+   freescale/fsl-lx2160a-honeycomb.dts \
+   freescale/fsl-lx2160a-qds.dts \
+   freescale/fsl-lx2160a-rdb.dts
+
+.include 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368362 - head/sys/modules/dtb/rockchip

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 10:00:39 2020
New Revision: 368362
URL: https://svnweb.freebsd.org/changeset/base/368362

Log:
  Also build DTB files for Asus Tinker board (RK3288 based).

Modified:
  head/sys/modules/dtb/rockchip/Makefile

Modified: head/sys/modules/dtb/rockchip/Makefile
==
--- head/sys/modules/dtb/rockchip/Makefile  Sat Dec  5 09:08:26 2020
(r368361)
+++ head/sys/modules/dtb/rockchip/Makefile  Sat Dec  5 10:00:39 2020
(r368362)
@@ -1,6 +1,12 @@
 # $FreeBSD$
+# All the dts files for rockchip systems we support.
 
+.if ${MACHINE_ARCH} == "armv7"
 DTS=   \
+   rk3288-tinker.dts   \
+   rk3288-tinker-s.dts
+.elif ${MACHINE_ARCH} == "aarch64"
+DTS=   \
rockchip/rk3399-khadas-edge-captain.dts \
rockchip/rk3399-khadas-edge.dts \
rockchip/rk3399-khadas-edge-v.dts \
@@ -10,5 +16,6 @@ DTS=  \
rockchip/rk3399-rockpro64.dts
 
 DTSO=  rk3328-dwc3.dtso
+.endif
 
 .include 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368369 - in head/sys: arm/freescale/vybrid arm64/qoriq arm64/qoriq/clk conf dev/ahci dev/iicbus/mux

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 12:08:37 2020
New Revision: 368369
URL: https://svnweb.freebsd.org/changeset/base/368369

Log:
  Add basic support for Freescale LX2160A SoC.
  All peripherals but the network processor are supported.

Added:
  head/sys/arm64/qoriq/clk/lx2160a_clkgen.c   (contents, props changed)
  head/sys/arm64/qoriq/qoriq_dw_pci.c   (contents, props changed)
  head/sys/arm64/qoriq/qoriq_therm.c   (contents, props changed)
  head/sys/arm64/qoriq/qoriq_therm_if.m   (contents, props changed)
  head/sys/dev/iicbus/mux/pca9547.c   (contents, props changed)
Modified:
  head/sys/arm/freescale/vybrid/vf_i2c.c
  head/sys/conf/files
  head/sys/conf/files.arm64
  head/sys/dev/ahci/ahci_fsl_fdt.c

Modified: head/sys/arm/freescale/vybrid/vf_i2c.c
==
--- head/sys/arm/freescale/vybrid/vf_i2c.c  Sat Dec  5 11:18:37 2020
(r368368)
+++ head/sys/arm/freescale/vybrid/vf_i2c.c  Sat Dec  5 12:08:37 2020
(r368369)
@@ -147,7 +147,8 @@ static struct i2c_div_type vf610_div_table[] = {
{ 0x2C, 576 }, { 0x2D, 640 }, { 0x2E, 768 }, { 0x32, 896 },
{ 0x2F, 960 }, { 0x33, 1024 }, { 0x34, 1152 }, { 0x35, 1280 },
{ 0x36, 1536 }, { 0x3A, 1792 }, { 0x37, 1920 }, { 0x3B, 2048 },
-   { 0x3C, 2304 }, { 0x3D, 2560 }, { 0x3E, 3072 }, { 0x3F, 3840 }
+   { 0x3C, 2304 }, { 0x3D, 2560 }, { 0x3E, 3072 }, { 0x3F, 3840 },
+   { 0x3F, 3840 }, { 0x7B, 4096 }, { 0x7D, 5120 }, { 0x7E, 6144 },
 };
 #endif
 
@@ -307,7 +308,15 @@ wait_for_icf(struct i2c_softc *sc)
 
return (IIC_ETIMEOUT);
 }
+/* Get ACK bit from last write */
+static bool
+tx_acked(struct i2c_softc *sc)
+{
 
+   return (READ1(sc, I2C_IBSR) & IBSR_RXAK) ? false : true;
+
+}
+
 static int
 i2c_repeated_start(device_t dev, u_char slave, int timeout)
 {
@@ -342,6 +351,12 @@ i2c_repeated_start(device_t dev, u_char slave, int tim
 
error = wait_for_iif(sc);
 
+   if (!tx_acked(sc)) {
+   vf_i2c_dbg(sc,
+   "cant i2c start: missing ACK after slave addres\n");
+   return (IIC_ENOACK);
+   }
+
mtx_unlock(>mutex);
 
if (error != 0)
@@ -384,13 +399,19 @@ i2c_start(device_t dev, u_char slave, int timeout)
WRITE1(sc, I2C_IBDR, slave);
 
error = wait_for_iif(sc);
-
-   mtx_unlock(>mutex);
if (error != 0) {
+   mtx_unlock(>mutex);
vf_i2c_dbg(sc, "cant i2c start: iif error\n");
return (error);
}
+   mtx_unlock(>mutex);
 
+   if (!tx_acked(sc)) {
+   vf_i2c_dbg(sc,
+   "cant i2c start: missing QACK after slave addres\n");
+   return (IIC_ENOACK);
+   }
+
return (IIC_NOERR);
 }
 
@@ -568,10 +589,15 @@ i2c_write(device_t dev, const char *buf, int len, int 
return (error);
}
 
+   if (!tx_acked(sc) && (*sent  = (len - 2)) ){
+   mtx_unlock(>mutex);
+   vf_i2c_dbg(sc, "no ACK on %d write\n", *sent);
+   return (IIC_ENOACK);
+   }
+
(*sent)++;
}
mtx_unlock(>mutex);
-
return (IIC_NOERR);
 }
 
@@ -600,14 +626,8 @@ static device_method_t i2c_methods[] = {
{ 0, 0 }
 };
 
-static driver_t i2c_driver = {
-   "i2c",
-   i2c_methods,
-   sizeof(struct i2c_softc),
-};
-
 static devclass_t i2c_devclass;
-
-DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
+static DEFINE_CLASS_0(i2c, i2c_driver, i2c_methods, sizeof(struct i2c_softc));
+DRIVER_MODULE(vybrid_i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
 DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
 DRIVER_MODULE(ofw_iicbus, i2c, ofw_iicbus_driver, ofw_iicbus_devclass, 0, 0);

Added: head/sys/arm64/qoriq/clk/lx2160a_clkgen.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm64/qoriq/clk/lx2160a_clkgen.c   Sat Dec  5 12:08:37 2020
(r368369)
@@ -0,0 +1,211 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright 2020 Michal Meloun 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDIN

svn commit: r368363 - head/sys/arm/conf

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 10:10:25 2020
New Revision: 368363
URL: https://svnweb.freebsd.org/changeset/base/368363

Log:
  Connect RK3288 to GENERIC kernel.

Modified:
  head/sys/arm/conf/GENERIC

Modified: head/sys/arm/conf/GENERIC
==
--- head/sys/arm/conf/GENERIC   Sat Dec  5 10:00:39 2020(r368362)
+++ head/sys/arm/conf/GENERIC   Sat Dec  5 10:10:25 2020(r368363)
@@ -42,6 +42,7 @@ files "../freescale/imx/files.imx6"
 files  "../mv/files.arm7"
 files  "../nvidia/tegra124/files.tegra124"
 files  "../qemu/files.qemu"
+files  "../rockchip/files.rk32xx"
 files  "../ti/files.ti"
 files  "../ti/am335x/files.am335x"
 files  "../ti/omap4/files.omap4"
@@ -91,6 +92,7 @@ devicegeneric_timer
 device mpcore_timer
 
 # MMC/SD/SDIO Card slot support
+device dwmmc
 device sdhci   # SD controller
 device mmc # mmc/sd bus
 device mmcsd   # mmc/sd flash cards
@@ -285,6 +287,7 @@ makeoptions MODULES_EXTRA+="dtb/am335x"
 makeoptionsMODULES_EXTRA+="dtb/imx6"
 makeoptionsMODULES_EXTRA+="dtb/nvidia"
 makeoptionsMODULES_EXTRA+="dtb/omap4"
+makeoptionsMODULES_EXTRA+="dtb/rockchip"
 makeoptionsMODULES_EXTRA+="dtb/rpi"
 makeoptionsMODULES_EXTRA+="dtb/zynq"
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368364 - head/sys/dev/pci

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 10:55:09 2020
New Revision: 368364
URL: https://svnweb.freebsd.org/changeset/base/368364

Log:
  DesignWare PCIe driver: Don't call bus_generic_attach() twice.
  bus_generic_attach() should be called from the attach function of the real
  implementation, not from the common init function.
  
  MFC after:1 week

Modified:
  head/sys/dev/pci/pci_dw.c

Modified: head/sys/dev/pci/pci_dw.c
==
--- head/sys/dev/pci/pci_dw.c   Sat Dec  5 10:10:25 2020(r368363)
+++ head/sys/dev/pci/pci_dw.c   Sat Dec  5 10:55:09 2020(r368364)
@@ -640,7 +640,7 @@ pci_dw_init(device_t dev)
 
device_add_child(dev, "pci", -1);
 
-   return (bus_generic_attach(dev));
+   return (0);
 out:
/* XXX Cleanup */
return (rv);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368370 - in head/sys/arm64: arm64 include

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 14:06:01 2020
New Revision: 368370
URL: https://svnweb.freebsd.org/changeset/base/368370

Log:
  Simplify startup of secondary cores and store MPIDR register to pcpu.
  
   - record MPIDR for all started cores in pcpu, they will be used as link
 between physical locality of given core, ID in external description
 (FDT or ACPI) and cupid.
   - because of above, cpuid can (and should) be freely assigned, only boot
 CPU  must have cpuid 0. Simplify startup code according this.
  
  Please note that pure cpuid is not sufficient instrument to hold any
  information about core or cluster topology, nor to determistically iterate
  over subpart of cores in CPU (iterate over all cores in single cluster for
  example). Situation is more complicated by fact that PSCI can reject start
  of core without reporting error (because power budget for example), or by
  fact that is possible that we booted on non-first core in cluster (thus with
  cpuid 0 assigned to random core).
  
  Given cores topology should be exhibited to other parts of system
  (for example to scheduler for big.little or multicluster systems) by using
  smp_topo interface.
  
  Differential Revision:  https://reviews.freebsd.org/D13863

Modified:
  head/sys/arm64/arm64/machdep.c
  head/sys/arm64/arm64/mp_machdep.c
  head/sys/arm64/include/pcpu.h

Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c  Sat Dec  5 12:08:37 2020
(r368369)
+++ head/sys/arm64/arm64/machdep.c  Sat Dec  5 14:06:01 2020
(r368370)
@@ -661,6 +661,7 @@ cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t siz
 {
 
pcpu->pc_acpi_id = 0x;
+   pcpu->pc_mpidr = 0x;
 }
 
 void

Modified: head/sys/arm64/arm64/mp_machdep.c
==
--- head/sys/arm64/arm64/mp_machdep.c   Sat Dec  5 12:08:37 2020
(r368369)
+++ head/sys/arm64/arm64/mp_machdep.c   Sat Dec  5 14:06:01 2020
(r368370)
@@ -125,12 +125,9 @@ static void ipi_stop(void *);
 
 struct pcb stoppcbs[MAXCPU];
 
-/*
- * Not all systems boot from the first CPU in the device tree. To work around
- * this we need to find which CPU we have booted from so when we later
- * enable the secondary CPUs we skip this one.
- */
-static int cpu0 = -1;
+#ifdef FDT
+static u_int fdt_cpuid;
+#endif
 
 void mpentry(unsigned long cpuid);
 void init_secondary(uint64_t);
@@ -432,36 +429,23 @@ cpu_mp_probe(void)
 }
 
 static bool
-start_cpu(u_int id, uint64_t target_cpu)
+start_cpu(u_int cpuid, uint64_t target_cpu)
 {
struct pcpu *pcpup;
vm_paddr_t pa;
-   u_int cpuid;
int err, naps;
 
/* Check we are able to start this cpu */
-   if (id > mp_maxid)
+   if (cpuid > mp_maxid)
return (false);
 
-   KASSERT(id < MAXCPU, ("Too many CPUs"));
+   KASSERT(cpuid < MAXCPU, ("Too many CPUs"));
+   KASSERT(__pcpu[0].pc_mpidr != (target_cpu & CPU_AFF_MASK),
+   ("Start_cpu() was called on the boot CPU"));
 
-   /* We are already running on cpu 0 */
-   if (id == cpu0)
-   return (true);
-
-   /*
-* Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
-* CPUs ordered as they are likely grouped into clusters so it can be
-* useful to keep that property, e.g. for the GICv3 driver to send
-* an IPI to all CPUs in the cluster.
-*/
-   cpuid = id;
-   if (cpuid < cpu0)
-   cpuid += mp_maxid + 1;
-   cpuid -= cpu0;
-
pcpup = &__pcpu[cpuid];
pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
+   pcpup->pc_mpidr = target_cpu & CPU_AFF_MASK;
 
dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
dpcpu_init(dpcpu[cpuid - 1], cpuid);
@@ -483,7 +467,7 @@ start_cpu(u_int id, uint64_t target_cpu)
KASSERT(err == PSCI_MISSING ||
(mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
("Failed to start CPU %u (%lx), error %d\n",
-   id, target_cpu, err));
+   cpuid, target_cpu, err));
 
pcpu_destroy(pcpup);
kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
@@ -492,9 +476,6 @@ start_cpu(u_int id, uint64_t target_cpu)
bootstacks[cpuid] = NULL;
mp_ncpus--;
 
-   /* Notify the user that the CPU failed to start */
-   printf("Failed to start CPU %u (%lx), error %d\n",
-   id, target_cpu, err);
} else {
/* Wait for the AP to switch to its boot stack. */
while (atomic_load_int(_started) < naps + 1)
@@ -518,6 +499,13 @@ madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
cpuid = arg;

Re: svn commit: r368159 - in head/sys: arm/conf conf

2020-12-05 Thread Michal Meloun





On 05.12.2020 17:18, Mateusz Guzik wrote:

On 11/29/20, Michal Meloun  wrote:

Author: mmel
Date: Sun Nov 29 17:42:32 2020
New Revision: 368159
URL: https://svnweb.freebsd.org/changeset/base/368159

Log:
   Remove unused options.

   Marvell files and their related SOC_MV_ options should be cleaned up
   in another pass.



Since this change tinderbox fails to build VERSATILEPB and EFIKA_MX:
/usr/src/sys/dev/syscons/scgfbrndr.c:35:10: fatal error: 'opt_gfb.h'
file not found
#include "opt_gfb.h"
  ^~~


Fixed in r368373.
thanks for report.

Michal
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368373 - in head/sys: conf dev/syscons

2020-12-05 Thread Michal Meloun

Author: mmel
Date: Sat Dec  5 19:44:00 2020
New Revision: 368373
URL: https://svnweb.freebsd.org/changeset/base/368373

Log:
  Remove remaning definition of GFB_ options.
  They are not used in source files.
  This fixes build of some arm boards after r368159.
  
  Reported by: mjg

Modified:
  head/sys/conf/options.mips
  head/sys/conf/options.powerpc
  head/sys/dev/syscons/scgfbrndr.c

Modified: head/sys/conf/options.mips
==
--- head/sys/conf/options.mips  Sat Dec  5 14:53:24 2020(r368372)
+++ head/sys/conf/options.mips  Sat Dec  5 19:44:00 2020(r368373)
@@ -66,10 +66,6 @@ CFE_CONSOLE  opt_global.h
 CFE_ENVopt_global.h
 CFE_ENV_SIZE   opt_global.h
 
-GFB_DEBUG  opt_gfb.h
-GFB_NO_FONT_LOADINGopt_gfb.h
-GFB_NO_MODE_CHANGE opt_gfb.h
-
 NOFPU  opt_global.h
 
 TICK_USE_YAMON_FREQopt_global.h

Modified: head/sys/conf/options.powerpc
==
--- head/sys/conf/options.powerpc   Sat Dec  5 14:53:24 2020
(r368372)
+++ head/sys/conf/options.powerpc   Sat Dec  5 19:44:00 2020
(r368373)
@@ -15,10 +15,6 @@ FPU_EMU
 
 COMPAT_FREEBSD32   opt_global.h
 
-GFB_DEBUG  opt_gfb.h
-GFB_NO_FONT_LOADINGopt_gfb.h
-GFB_NO_MODE_CHANGE opt_gfb.h
-
 MOEA64_STATS   opt_pmap.h
 AMIGAONE   opt_platform.h
 MIKROTIK   opt_platform.h

Modified: head/sys/dev/syscons/scgfbrndr.c
==
--- head/sys/dev/syscons/scgfbrndr.cSat Dec  5 14:53:24 2020
(r368372)
+++ head/sys/dev/syscons/scgfbrndr.cSat Dec  5 19:44:00 2020
(r368373)
@@ -32,7 +32,6 @@
 __FBSDID("$FreeBSD$");
 
 #include "opt_syscons.h"
-#include "opt_gfb.h"
 #ifdef __powerpc__
 #include "opt_ofwfb.h"
 #endif
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r367955 - head/sys/dev/nvme

2020-11-23 Thread Michal Meloun

Author: mmel
Date: Mon Nov 23 14:30:22 2020
New Revision: 367955
URL: https://svnweb.freebsd.org/changeset/base/367955

Log:
  Ensure that the buffer is in nvme_single_map() mapped to single segment.
  Not a functional change.
  
  MFC after:1 week

Modified:
  head/sys/dev/nvme/nvme_private.h

Modified: head/sys/dev/nvme/nvme_private.h
==
--- head/sys/dev/nvme/nvme_private.hMon Nov 23 14:26:59 2020
(r367954)
+++ head/sys/dev/nvme/nvme_private.hMon Nov 23 14:30:22 2020
(r367955)
@@ -478,6 +478,7 @@ nvme_single_map(void *arg, bus_dma_segment_t *seg, int
 {
uint64_t *bus_addr = (uint64_t *)arg;
 
+   KASSERT(nseg == 1, ("number of segments (%d) is not 1", nseg));
if (error != 0)
printf("nvme_single_map err %d\n", error);
*bus_addr = seg[0].ds_addr;
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368331 - head/sys/dev/iicbus/pmic

2020-12-04 Thread Michal Meloun

Author: mmel
Date: Fri Dec  4 14:57:12 2020
New Revision: 368331
URL: https://svnweb.freebsd.org/changeset/base/368331

Log:
  Add a driver for ACT8846 used as PMIC for RK3288 SoC.

Added:
  head/sys/dev/iicbus/pmic/
  head/sys/dev/iicbus/pmic/act8846.c   (contents, props changed)
  head/sys/dev/iicbus/pmic/act8846.h   (contents, props changed)
  head/sys/dev/iicbus/pmic/act8846_reg.h   (contents, props changed)
  head/sys/dev/iicbus/pmic/act8846_regulator.c   (contents, props changed)

Added: head/sys/dev/iicbus/pmic/act8846.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/iicbus/pmic/act8846.c  Fri Dec  4 14:57:12 2020
(r368331)
@@ -0,0 +1,258 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Michal Meloun 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+/*
+ * ACT8846 PMIC driver
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "regdev_if.h"
+
+static struct ofw_compat_data compat_data[] = {
+   {"active-semi,act8846", 1},
+   {NULL,  0}
+};
+
+#defineLOCK(_sc)   sx_xlock(&(_sc)->lock)
+#defineUNLOCK(_sc) sx_xunlock(&(_sc)->lock)
+#defineLOCK_INIT(_sc)  sx_init(&(_sc)->lock, "act8846")
+#defineLOCK_DESTROY(_sc)   sx_destroy(&(_sc)->lock);
+#defineASSERT_LOCKED(_sc)  sx_assert(&(_sc)->lock, SA_XLOCKED);
+#defineASSERT_UNLOCKED(_sc)sx_assert(&(_sc)->lock, SA_UNLOCKED);
+
+
+/*
+ * Raw register access function.
+ */
+int
+act8846_read(struct act8846_softc *sc, uint8_t reg, uint8_t *val)
+{
+   uint8_t addr;
+   int rv;
+   struct iic_msg msgs[2] = {
+   {0, IIC_M_WR, 1, },
+   {0, IIC_M_RD, 1, val},
+   };
+
+   msgs[0].slave = sc->bus_addr;
+   msgs[1].slave = sc->bus_addr;
+   addr = reg;
+
+   rv = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
+   if (rv != 0) {
+   device_printf(sc->dev,
+   "Error when reading reg 0x%02X, rv: %d\n", reg,  rv);
+   return (EIO);
+   }
+
+   return (0);
+}
+
+int act8846_read_buf(struct act8846_softc *sc, uint8_t reg, uint8_t *buf,
+size_t size)
+{
+   uint8_t addr;
+   int rv;
+   struct iic_msg msgs[2] = {
+   {0, IIC_M_WR, 1, },
+   {0, IIC_M_RD, size, buf},
+   };
+
+   msgs[0].slave = sc->bus_addr;
+   msgs[1].slave = sc->bus_addr;
+   addr = reg;
+
+   rv = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
+   if (rv != 0) {
+   device_printf(sc->dev,
+   "Error when reading reg 0x%02X, rv: %d\n", reg,  rv);
+   return (EIO);
+   }
+
+   return (0);
+}
+
+int
+act8846_write(struct act8846_softc *sc, uint8_t reg, uint8_t val)
+{
+   uint8_t data[2];
+   int rv;
+
+   struct iic_msg msgs[1] = {
+   {0, IIC_M_WR, 2, data},
+   };
+
+   msgs[0].slave = sc->bus_addr;
+   data[0] = reg;
+   data[1] = val;
+
+   rv = iicbus_transfer_excl(sc->dev, msgs, 1, IIC_INTRWAIT);
+   if (rv != 0) {
+   device_printf(sc->dev,
+   "Error when writing reg 0x%02X, rv: %d\n", reg, rv);
+   return (EIO);
+   }
+   retur

svn commit: r368332 - head/sys/dev/iicbus/rtc

2020-12-04 Thread Michal Meloun

Author: mmel
Date: Fri Dec  4 15:09:42 2020
New Revision: 368332
URL: https://svnweb.freebsd.org/changeset/base/368332

Log:
  Add a driver for HYM8563 based RTC.

Added:
  head/sys/dev/iicbus/rtc/hym8563.c   (contents, props changed)

Added: head/sys/dev/iicbus/rtc/hym8563.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/iicbus/rtc/hym8563.c   Fri Dec  4 15:09:42 2020
(r368332)
@@ -0,0 +1,314 @@
+/*-
+ * Copyright (c) 2017 Hiroki Mori.  All rights reserved.
+ * Copyright (c) 2017 Ian Lepore.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This code base on isl12xx.c
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+/*
+ * Driver for realtime clock HAOYU HYM8563
+ */
+
+#include "opt_platform.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef FDT
+#include 
+#include 
+#endif
+
+#include 
+#include 
+
+#include "clock_if.h"
+#include "iicbus_if.h"
+
+/* Registers */
+#defineHYM8563_CTRL1   0x00
+#define HYM8563_CTRL1_TEST (1 << 7)
+#define HYM8563_CTRL1_STOP (1 << 5)
+#define HYM8563_CTRL1_TESTC(1 << 3)
+
+#defineHYM8563_CTRL2   0x01
+#define HYM8563_CTRL2_TI_TP(1 << 4)
+#define HYM8563_CTRL2_AF   (1 << 3)
+#define HYM8563_CTRL2_TF   (1 << 2)
+#define HYM8563_CTRL2_AIE  (1 << 1)
+#define HYM8563_CTRL2_TIE  (1 << 0)
+
+#defineHYM8563_SEC 0x02/* plus battery low bit */
+#define HYM8563_SEC_VL (1 << 7)
+
+#defineHYM8563_MIN 0x03
+#defineHYM8563_HOUR0x04
+#defineHYM8563_DAY 0x05
+#defineHYM8563_WEEKDAY 0x06
+#defineHYM8563_MONTH   0x07/* plus 1 bit for century */
+#define HYM8563_MONTH_CENTURY  (1 << 7)
+#define HYM8563_YEAR   0x08
+
+struct hym8563_softc {
+   device_tdev;
+   struct intr_config_hook init_hook;
+};
+
+#ifdef FDT
+static struct ofw_compat_data compat_data[] = {
+   {"haoyu,hym8563", 1},
+   {NULL,   0},
+};
+#endif
+
+
+static inline int
+hym8563_read_buf(struct hym8563_softc *sc, uint8_t reg, uint8_t *buf,
+uint16_t buflen) 
+{
+
+   return (iicdev_readfrom(sc->dev, reg, buf, buflen, IIC_WAIT));
+}
+
+static inline int
+hym8563_write_buf(struct hym8563_softc *sc, uint8_t reg, uint8_t *buf,
+uint16_t buflen) 
+{
+
+   return (iicdev_writeto(sc->dev, reg, buf, buflen, IIC_WAIT));
+}
+
+static inline int
+hym8563_read_1(struct hym8563_softc *sc, uint8_t reg, uint8_t *data) 
+{
+
+   return (iicdev_readfrom(sc->dev, reg, data, 1, IIC_WAIT));
+}
+
+static inline int
+hym8563_write_1(struct hym8563_softc *sc, uint8_t reg, uint8_t val) 
+{
+
+   return (iicdev_writeto(sc->dev, reg, , 1, IIC_WAIT));
+}
+
+static int
+hym8563_gettime(device_t dev, struct timespec *ts)
+{
+   struct hym8563_softc*sc;
+   struct bcd_clocktime bct;
+   uint8_t  buf[7];
+   int  rv;
+
+   sc = device_get_softc(dev);
+
+   /* Read all RTC data */
+   rv = hym8563_read_buf(sc, HYM8563_SEC, buf, sizeof(buf));
+   if (rv != 0) {
+   device_printf(sc->dev, "Cannot read time registers: %d\n", rv);
+   return (rv);
+   }
+
+   /* Check for low voltage flag */
+   if (buf[0] & HYM8563_SEC_VL)
+   {
+   device_printf(sc->dev,
+   "WARNING: RTC battery failed; time is

svn commit: r368334 - head/sys/dev/iicbus/pmic

2020-12-04 Thread Michal Meloun

Author: mmel
Date: Fri Dec  4 15:23:43 2020
New Revision: 368334
URL: https://svnweb.freebsd.org/changeset/base/368334

Log:
  Add a driver for FAN53555 based PMIC.

Added:
  head/sys/dev/iicbus/pmic/fan53555.c   (contents, props changed)

Added: head/sys/dev/iicbus/pmic/fan53555.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/iicbus/pmic/fan53555.c Fri Dec  4 15:23:43 2020
(r368334)
@@ -0,0 +1,477 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2016 Jared McNeill 
+ * Copyright (c) 2018 Emmanuel Vadot 
+ * Copyright (c) 2019 Michal Meloun 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "regdev_if.h"
+
+/* Registers */
+#defineFAN53555_VSEL0  0x00
+#defineFAN53555_VSEL1  0x01
+#define FAN53555_VSEL_ENA  (1 << 7)
+#define FAN53555_VSEL_MODE (1 << 6)
+#define FAN53555_VSEL_MASK 0x3f
+#defineFAN53555_CTRL   0x02
+#defineFAN53555_ID10x03
+#define FAN53555_ID1_DIE_ID(x) (((x) >> 4) & 0x0F)
+#defineFAN53555_ID20x04
+#define FAN53555_ID2_DIE_REV(x)(((x) >> 4) & 0x0F)
+#defineFAN53555_MON0x05
+
+
+#if 0
+#definedprintf(sc, format, arg...) 
\
+   device_printf(sc->base_dev, "%s: " format, __func__, arg)
+#else
+#definedprintf(sc, format, arg...)
+#endif
+
+enum fan53555_pmic_type {
+   FAN53555 = 1,
+   SYR827,
+   SYR828,
+};
+
+static struct ofw_compat_data compat_data[] = {
+   {"fcs,fan53555",FAN53555},
+   {"silergy,syr827",  SYR827},
+   {"silergy,syr828",  SYR828},
+   {NULL,  0}
+};
+
+struct fan53555_reg_sc {
+   struct regnode  *regnode;
+   char*name;
+   device_tbase_dev;
+   uint8_t live_reg;
+   uint8_t sleep_reg;
+   struct regulator_range  *range;
+   struct regnode_std_param *param;
+};
+
+struct fan53555_softc {
+   device_tdev;
+   uint8_t live_reg;
+   uint8_t sleep_reg;
+};
+
+static struct regulator_range syr_8_range =
+   REG_RANGE_INIT(  0, 0x3F,  712500, 12500);
+
+static struct regulator_range fan_0_0_range =
+   REG_RANGE_INIT(  0, 0x3F,  60, 1);
+static struct regulator_range fan_0_13_range =
+   REG_RANGE_INIT(  0, 0x3F,  80, 1);
+static struct regulator_range fan_1_range =
+   REG_RANGE_INIT(  0, 0x3F,  60, 1);
+static struct regulator_range fan_4_range =
+   REG_RANGE_INIT(  0, 0x3F,  603000, 12826);
+
+
+static int
+fan53555_read(device_t dev, uint8_t reg, uint8_t *val)
+{
+   uint8_t addr;
+   int rv;
+   struct iic_msg msgs[2] = {
+   {0, IIC_M_WR | IIC_M_NOSTOP, 1, },
+   {0, IIC_M_RD, 1, val},
+   };
+
+   msgs[0].slave = iicbus_get_addr(dev);
+   msgs[1].slave = iicbus_get_addr(dev);
+   addr = reg;
+
+   rv = iicbus_transfer_excl(dev, msgs, 2, IIC_INTRWAIT);
+   if (rv != 0) {
+   device_printf(dev, "Error when reading reg 0x%02X, rv: %d\n",
+   reg,  rv);
+   return (EIO);
+   }
+
+   retur

svn commit: r368126 - in head/sys: arm/arm arm/include conf

2020-11-28 Thread Michal Meloun

Author: mmel
Date: Sat Nov 28 15:00:08 2020
New Revision: 368126
URL: https://svnweb.freebsd.org/changeset/base/368126

Log:
  Remove now unused armv4 and not-INTRNG files.

Deleted:
  head/sys/arm/arm/identcpu-v4.c
  head/sys/arm/arm/intr.c
  head/sys/arm/arm/locore-v4.S
  head/sys/arm/arm/pmap-v4.c
  head/sys/arm/arm/swtch-v4.S
  head/sys/arm/arm/trap-v4.c
  head/sys/arm/include/atomic-v4.h
  head/sys/arm/include/cpu-v4.h
  head/sys/arm/include/pmap-v4.h
  head/sys/arm/include/pte-v4.h
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/locore.S
  head/sys/arm/include/atomic.h
  head/sys/arm/include/cpu.h
  head/sys/arm/include/pmap.h
  head/sys/conf/files.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sat Nov 28 12:19:20 2020(r368125)
+++ head/sys/arm/arm/cpufunc.c  Sat Nov 28 15:00:08 2020(r368126)
@@ -256,9 +256,6 @@ struct cpu_functions cortexa_cpufuncs = {
 
 struct cpu_functions cpufuncs;
 u_int cputype;
-#if __ARM_ARCH <= 5
-u_int cpu_reset_needs_v4_MMU_disable;  /* flag used in locore-v4.s */
-#endif
 
 #if defined (CPU_ARM9E) || \
   defined(CPU_ARM1176) ||  \

Modified: head/sys/arm/arm/locore.S
==
--- head/sys/arm/arm/locore.S   Sat Nov 28 12:19:20 2020(r368125)
+++ head/sys/arm/arm/locore.S   Sat Nov 28 15:00:08 2020(r368126)
@@ -34,8 +34,4 @@
 
 #include 
 
-#if __ARM_ARCH >= 6
 #include "locore-v6.S"
-#else
-#include "locore-v4.S"
-#endif

Modified: head/sys/arm/include/atomic.h
==
--- head/sys/arm/include/atomic.h   Sat Nov 28 12:19:20 2020
(r368125)
+++ head/sys/arm/include/atomic.h   Sat Nov 28 15:00:08 2020
(r368126)
@@ -49,11 +49,7 @@
 #include 
 #endif
 
-#if __ARM_ARCH >= 6
 #include 
-#else /* < armv6 */
-#include 
-#endif /* Arch >= v6 */
 
 static __inline u_long
 atomic_swap_long(volatile u_long *p, u_long v)

Modified: head/sys/arm/include/cpu.h
==
--- head/sys/arm/include/cpu.h  Sat Nov 28 12:19:20 2020(r368125)
+++ head/sys/arm/include/cpu.h  Sat Nov 28 15:00:08 2020(r368126)
@@ -11,11 +11,7 @@ void cpu_halt(void);
 void   swi_vm(void *);
 
 #ifdef _KERNEL
-#if __ARM_ARCH >= 6
 #include 
-#else
-#include 
-#endif /* __ARM_ARCH >= 6 */
 
 static __inline uint64_t
 get_cyclecount(void)

Modified: head/sys/arm/include/pmap.h
==
--- head/sys/arm/include/pmap.h Sat Nov 28 12:19:20 2020(r368125)
+++ head/sys/arm/include/pmap.h Sat Nov 28 15:00:08 2020(r368126)
@@ -32,11 +32,7 @@
 #ifndef _MACHINE_PMAP_H_
 #define _MACHINE_PMAP_H_
 
-#if __ARM_ARCH >= 6
 #include 
-#else
-#include 
-#endif
 
 #ifdef _KERNEL
 #include 

Modified: head/sys/conf/files.arm
==
--- head/sys/conf/files.arm Sat Nov 28 12:19:20 2020(r368125)
+++ head/sys/conf/files.arm Sat Nov 28 15:00:08 2020(r368126)
@@ -19,7 +19,7 @@ arm/arm/cpufunc_asm_armv7.S   optionalcpu_cortexa | 
cpu
 arm/arm/cpufunc_asm_pj4b.S optionalcpu_mv_pj4b
 arm/arm/cpufunc_asm_sheeva.S   optionalcpu_arm9e
 arm/arm/cpuinfo.c  standard
-arm/arm/cpu_asm-v6.S   optionalarmv7 | armv6
+arm/arm/cpu_asm-v6.S   standard
 arm/arm/db_disasm.coptionalddb
 arm/arm/db_interface.c optionalddb
 arm/arm/db_trace.c optionalddb
@@ -37,14 +37,12 @@ arm/arm/gdb_machdep.c   optionalgdb
 arm/arm/generic_timer.coptionalgeneric_timer
 arm/arm/gic.c  optionalgic
 arm/arm/gic_fdt.c  optionalgic fdt
-arm/arm/identcpu-v4.c  optional!armv7 !armv6
-arm/arm/identcpu-v6.c  optionalarmv7 | armv6
+arm/arm/identcpu-v6.c  standard
 arm/arm/in_cksum.c optionalinet | inet6
 arm/arm/in_cksum_arm.S optionalinet | inet6
-arm/arm/intr.c optional!intrng
-kern/subr_intr.c   optionalintrng
+kern/subr_intr.c   standard
 arm/arm/locore.S   standardno-obj
-arm/arm/hypervisor-stub.S  optionalarmv7 | armv6
+arm/arm/hypervisor-stub.S  standard
 arm/arm/machdep.c  standard
 arm/arm/machdep_boot.c standard
 arm/arm/machdep_kdb.c  standard
@@ -61,8 +59,7 @@ arm/arm/pl310.c   optionalpl310
 arm/arm/platform.c optionalplatform
 arm/arm/platform_if.m  optionalplatform
 arm/arm/platform_pl310_if.moptionalplatform pl310

svn commit: r368141 - in head/sys/arm: allwinner annapurna/alpine arm freescale/imx include mv versatile

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 08:40:12 2020
New Revision: 368141
URL: https://svnweb.freebsd.org/changeset/base/368141

Log:
  Remove the pre-ARMv6 and pre-INTRNG code.
  ARM has required ARMV6+ and INTRNg for some time now, so remove
  always false #ifdefs and unconditionally do always true #ifdefs.

Deleted:
  head/sys/arm/annapurna/alpine/alpine_common.c
  head/sys/arm/freescale/imx/imx_common.c
  head/sys/arm/versatile/versatile_common.c
Modified:
  head/sys/arm/allwinner/aw_gpio.c
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/annapurna/alpine/files.alpine
  head/sys/arm/arm/bcopyinout.S
  head/sys/arm/arm/bcopyinout_xscale.S
  head/sys/arm/arm/bus_space_base.c
  head/sys/arm/arm/copystr.S
  head/sys/arm/arm/cpuinfo.c
  head/sys/arm/arm/db_interface.c
  head/sys/arm/arm/debug_monitor.c
  head/sys/arm/arm/disassem.c
  head/sys/arm/arm/elf_machdep.c
  head/sys/arm/arm/exception.S
  head/sys/arm/arm/fiq.c
  head/sys/arm/arm/fusu.S
  head/sys/arm/arm/genassym.c
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/machdep_intr.c
  head/sys/arm/arm/machdep_kdb.c
  head/sys/arm/arm/mem.c
  head/sys/arm/arm/minidump_machdep.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/nexus.c
  head/sys/arm/arm/stdatomic.c
  head/sys/arm/arm/sys_machdep.c
  head/sys/arm/arm/vm_machdep.c
  head/sys/arm/freescale/imx/files.imx5
  head/sys/arm/include/_align.h
  head/sys/arm/include/armreg.h
  head/sys/arm/include/asmacros.h
  head/sys/arm/include/atomic-v6.h
  head/sys/arm/include/bus.h
  head/sys/arm/include/bus_dma.h
  head/sys/arm/include/cpu-v6.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/cpuinfo.h
  head/sys/arm/include/db_machdep.h
  head/sys/arm/include/debug_monitor.h
  head/sys/arm/include/fdt.h
  head/sys/arm/include/frame.h
  head/sys/arm/include/intr.h
  head/sys/arm/include/kdb.h
  head/sys/arm/include/machdep.h
  head/sys/arm/include/pcpu.h
  head/sys/arm/include/proc.h
  head/sys/arm/include/sf_buf.h
  head/sys/arm/include/sysarch.h
  head/sys/arm/include/sysreg.h
  head/sys/arm/include/vm.h
  head/sys/arm/mv/gpio.c
  head/sys/arm/mv/mpic.c
  head/sys/arm/mv/mv_common.c
  head/sys/arm/mv/mv_pci.c
  head/sys/arm/versatile/files.versatile

Modified: head/sys/arm/allwinner/aw_gpio.c
==
--- head/sys/arm/allwinner/aw_gpio.cSun Nov 29 01:43:04 2020
(r368140)
+++ head/sys/arm/allwinner/aw_gpio.cSun Nov 29 08:40:12 2020
(r368141)
@@ -62,10 +62,7 @@ __FBSDID("$FreeBSD$");
 #include "opt_soc.h"
 #endif
 
-#ifdef INTRNG
 #include "pic_if.h"
-#endif
-
 #include "gpio_if.h"
 
 #defineAW_GPIO_DEFAULT_CAPS(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | 
\
@@ -257,7 +254,6 @@ struct clk_list {
clk_t   clk;
 };
 
-#ifdef INTRNG
 struct gpio_irqsrc {
struct intr_irqsrc  isrc;
u_int   irq;
@@ -269,7 +265,6 @@ struct gpio_irqsrc {
uint32_toldfunc;
boolenabled;
 };
-#endif
 
 #defineAW_GPIO_MEMRES  0
 #defineAW_GPIO_IRQRES  1
@@ -286,10 +281,8 @@ struct aw_gpio_softc {
struct aw_gpio_conf *conf;
TAILQ_HEAD(, clk_list)  clk_list;
 
-#ifdef INTRNG
struct gpio_irqsrc  *gpio_pic_irqsrc;
int nirqs;
-#endif
 };
 
 static struct resource_spec aw_gpio_res_spec[] = {
@@ -1071,10 +1064,8 @@ aw_gpio_attach(device_t dev)
goto fail;
}
 
-#ifdef INTRNG
aw_gpio_register_isrcs(sc);
intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
-#endif
 
sc->sc_busdev = gpiobus_attach_bus(dev);
if (sc->sc_busdev == NULL)
@@ -1451,7 +1442,6 @@ static device_method_t aw_gpio_methods[] = {
DEVMETHOD(device_attach,aw_gpio_attach),
DEVMETHOD(device_detach,aw_gpio_detach),
 
-#ifdef INTRNG
/* Interrupt controller interface */
DEVMETHOD(pic_disable_intr, aw_gpio_pic_disable_intr),
DEVMETHOD(pic_enable_intr,  aw_gpio_pic_enable_intr),
@@ -1461,7 +1451,6 @@ static device_method_t aw_gpio_methods[] = {
DEVMETHOD(pic_post_filter,  aw_gpio_pic_post_filter),
DEVMETHOD(pic_post_ithread, aw_gpio_pic_post_ithread),
DEVMETHOD(pic_pre_ithread,  aw_gpio_pic_pre_ithread),
-#endif
 
/* GPIO protocol */
DEVMETHOD(gpio_get_bus, aw_gpio_get_bus),

Modified: head/sys/arm/allwinner/files.allwinner
==
--- head/sys/arm/allwinner/files.allwinner  Sun Nov 29 01:43:04 2020
(r368140)
+++ head/sys/arm/allwinner/files.allwinner  Sun Nov 29 08:40:12 2020
(r368141)
@@ -10,7 +10,7 @@ arm/allwinner/aw_if_dwc.c optionaldwc
 arm/allwinner/aw_machdep.c standard
 arm/allwinner/aw_mmc.c optionalmmc | mmccam

svn commit: r368154 - in head/sys: arm/arm arm/include arm/mv conf

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 15:24:00 2020
New Revision: 368154
URL: https://svnweb.freebsd.org/changeset/base/368154

Log:
  Remove remaining fragments of code for older already ceased ARM versions.

Deleted:
  head/sys/arm/arm/cpufunc_asm_arm9.S
  head/sys/arm/arm/cpufunc_asm_armv4.S
  head/sys/arm/arm/cpufunc_asm_armv5_ec.S
  head/sys/arm/arm/cpufunc_asm_sheeva.S
  head/sys/arm/mv/std.mv
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/md_var.h
  head/sys/conf/files.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Nov 29 15:04:39 2020(r368153)
+++ head/sys/arm/arm/cpufunc.c  Sun Nov 29 15:24:00 2020(r368154)
@@ -80,9 +80,6 @@ u_int arm_cache_level;
 u_int  arm_cache_type[14];
 u_int  arm_cache_loc;
 
-#if defined(CPU_ARM9E)
-static void arm10_setup(void);
-#endif
 #ifdef CPU_MV_PJ4B
 static void pj4bv7_setup(void);
 #endif
@@ -93,107 +90,6 @@ static void arm11x6_setup(void);
 static void cortexa_setup(void);
 #endif
 
-#if defined(CPU_ARM9E)
-struct cpu_functions armv5_ec_cpufuncs = {
-   /* CPU functions */
-
-   cpufunc_nullop, /* cpwait   */
-
-   /* MMU functions */
-
-   cpufunc_control,/* control  */
-   armv5_ec_setttb,/* Setttb   */
-
-   /* TLB functions */
-
-   armv4_tlb_flushID,  /* tlb_flushID  */
-   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
-   armv4_tlb_flushD,   /* tlb_flushD   */
-   armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
-
-   /* Cache operations */
-
-   armv5_ec_icache_sync_range, /* icache_sync_range*/
-
-   armv5_ec_dcache_wbinv_all,  /* dcache_wbinv_all */
-   armv5_ec_dcache_wbinv_range,/* dcache_wbinv_range   */
-   armv5_ec_dcache_inv_range,  /* dcache_inv_range */
-   armv5_ec_dcache_wb_range,   /* dcache_wb_range  */
-
-   armv4_idcache_inv_all,  /* idcache_inv_all  */
-   armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all*/
-   armv5_ec_idcache_wbinv_range,   /* idcache_wbinv_range  */
-
-   cpufunc_nullop, /* l2cache_wbinv_all*/
-   (void *)cpufunc_nullop, /* l2cache_wbinv_range  */
-   (void *)cpufunc_nullop, /* l2cache_inv_range*/
-   (void *)cpufunc_nullop, /* l2cache_wb_range */
-   (void *)cpufunc_nullop, /* l2cache_drain_writebuf */
-
-   /* Other functions */
-
-   armv4_drain_writebuf,   /* drain_writebuf   */
-
-   (void *)cpufunc_nullop, /* sleep*/
-
-   /* Soft functions */
-
-   arm9_context_switch,/* context_switch   */
-
-   arm10_setup /* cpu setup*/
-
-};
-
-struct cpu_functions sheeva_cpufuncs = {
-   /* CPU functions */
-
-   cpufunc_nullop, /* cpwait   */
-
-   /* MMU functions */
-
-   cpufunc_control,/* control  */
-   sheeva_setttb,  /* Setttb   */
-
-   /* TLB functions */
-
-   armv4_tlb_flushID,  /* tlb_flushID  */
-   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
-   armv4_tlb_flushD,   /* tlb_flushD   */
-   armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
-
-   /* Cache operations */
-
-   armv5_ec_icache_sync_range, /* icache_sync_range*/
-
-   armv5_ec_dcache_wbinv_all,  /* dcache_wbinv_all */
-   sheeva_dcache_wbinv_range,  /* dcache_wbinv_range   */
-   sheeva_dcache_inv_range,/* dcache_inv_range */
-   sheeva_dcache_wb_range, /* dcache_wb_range  */
-
-   armv4_idcache_inv_all,  /* idcache_inv_all  */
-   armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all*/
-   sheeva_idcache_wbinv_range, /* idcache_wbinv_all*/
-
-   sheeva_l2cache_wbinv_all,   /* l2cache_wbinv_all*/
-   sheeva_l2cache_wbinv_range, /* l2cache_wbinv_range  */
-   sheeva_l2cache_inv_range,   /* l2cache_inv_range*/
-   sheeva_l2cache_wb_range,/* l2cache_wb_range */
-   (void *)cpufunc_nullop, /* l2cache_drain_writebuf */
-
-   /* Other functions */
-
-   armv4_drain_writebuf,   /* drain_writebuf   */
-
-   sheeva_cpu_sleep,   /* sleep*/
-
-   /* Soft functions */
-
-   arm9_context_switch,/* context_switch   */
-
-   arm10_setup /* cpu setup*/
-};
-#endif /* CPU_ARM9E */
-
 #ifdef CPU_MV_PJ4B
 struct cpu_functions pj4bv7_cpufuncs = {
/* Cache operations */
@@ -257,11 +153,6

svn commit: r368161 - in head/sys/arm: arm include

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 18:59:01 2020
New Revision: 368161
URL: https://svnweb.freebsd.org/changeset/base/368161

Log:
  Store MPIDR register in pcpu.
  
  MPIDR represents physical locality of given core and it should be used as
  the only viable/robust connection between cpuid (which have zero relation to
  cores topology) and external description (for example  in FDT).  It can be
  used for determining which interrupt is associated to given per-CPU PMU
  or by scheduler for determining big/little core or cluster topology.
  
  MFC after: 3 weeks

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/include/pcpu.h

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sun Nov 29 18:22:14 2020(r368160)
+++ head/sys/arm/arm/machdep.c  Sun Nov 29 18:59:01 2020(r368161)
@@ -302,6 +302,8 @@ DELAY(int usec)
 void
 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 {
+
+   pcpu->pc_mpidr = 0x;
 }
 
 void
@@ -684,6 +686,7 @@ pcpu0_init(void)
 {
set_curthread();
pcpu_init(pcpup, 0, sizeof(struct pcpu));
+   pcpup->pc_mpidr = cp15_mpidr_get() & 0xFF;
PCPU_SET(curthread, );
 }
 

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Sun Nov 29 18:22:14 2020
(r368160)
+++ head/sys/arm/arm/mp_machdep.c   Sun Nov 29 18:59:01 2020
(r368161)
@@ -162,6 +162,7 @@ init_secondary(int cpu)
;
 
pcpu_init(pc, cpu, sizeof(struct pcpu));
+   pc->pc_mpidr = cp15_mpidr_get() & 0xFF;
dpcpu_init(dpcpu[cpu - 1], cpu);
 #if defined(DDB)
dbg_monitor_init_secondary();

Modified: head/sys/arm/include/pcpu.h
==
--- head/sys/arm/include/pcpu.h Sun Nov 29 18:22:14 2020(r368160)
+++ head/sys/arm/include/pcpu.h Sun Nov 29 18:59:01 2020(r368161)
@@ -65,7 +65,8 @@ struct vmspace;
int pc_bp_harden_kind;  \
uint32_t pc_original_actlr; \
uint64_t pc_clock;  \
-   char __pad[139]
+   uint32_t pc_mpidr;  \
+   char __pad[135]
 
 #ifdef _KERNEL
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Re: svn commit: r368124 - in head/sys: cam cam/ata cam/ctl cam/mmc cam/nvme cam/scsi compat/linprocfs compat/linux conf contrib/openzfs/module/os/freebsd/zfs dev/ahci dev/ata dev/firewire dev/flash de

2020-11-29 Thread Michal Meloun





On 29.11.2020 18:46, Ed Maste wrote:

On Sun, 29 Nov 2020 at 12:36, Konstantin Belousov  wrote:


I think it is reasonable to return to 128KB for 32bit systems.

...

+#ifndef MAXPHYS/* max raw I/O transfer size */
+#ifdef __ILP32__
+#define MAXPHYS(128 * 1024)
+#else
+#define MAXPHYS(1024 * 1024)
+#endif


This seems reasonable to me.


Agree. Please commit it.
Michal
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368153 - head/sys/arm/arm

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 15:04:39 2020
New Revision: 368153
URL: https://svnweb.freebsd.org/changeset/base/368153

Log:
  Remove remaining support of big endian byte order.
  Big endian support was ceased by removing ARMv4 sub architecture.

Modified:
  head/sys/arm/arm/bcopyinout_xscale.S
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/fusu.S
  head/sys/arm/arm/in_cksum_arm.S
  head/sys/arm/arm/support.S
  head/sys/arm/arm/vm_machdep.c

Modified: head/sys/arm/arm/bcopyinout_xscale.S
==
--- head/sys/arm/arm/bcopyinout_xscale.SSun Nov 29 14:21:16 2020
(r368152)
+++ head/sys/arm/arm/bcopyinout_xscale.SSun Nov 29 15:04:39 2020
(r368153)
@@ -298,25 +298,12 @@ ENTRY(copyin)
b   .Lcopyin_bad1
 
 .Lcopyin_bad1_loop16:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #8
-#else
mov r4, ip, lsr #8
-#endif
ldrtr5, [r0], #0x04
pld [r0, #0x018]
ldrtr6, [r0], #0x04
ldrtr7, [r0], #0x04
ldrtip, [r0], #0x04
-#ifdef __ARMEB__
-   orr r4, r4, r5, lsr #24
-   mov r5, r5, lsl #8
-   orr r5, r5, r6, lsr #24
-   mov r6, r6, lsl #8
-   orr r6, r6, r7, lsr #24
-   mov r7, r7, lsl #8
-   orr r7, r7, ip, lsr #24
-#else
orr r4, r4, r5, lsl #24
mov r5, r5, lsr #8
orr r5, r5, r6, lsl #24
@@ -324,7 +311,6 @@ ENTRY(copyin)
orr r6, r6, r7, lsl #24
mov r7, r7, lsr #8
orr r7, r7, ip, lsl #24
-#endif
str r4, [r1], #0x04
str r5, [r1], #0x04
str r6, [r1], #0x04
@@ -341,43 +327,22 @@ ENTRY(copyin)
blt .Lcopyin_l4
 
 .Lcopyin_bad1_loop4:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #8
-#else
mov r4, ip, lsr #8
-#endif
ldrtip, [r0], #0x04
subsr2, r2, #0x04
-#ifdef __ARMEB__
-   orr r4, r4, ip, lsr #24
-#else
orr r4, r4, ip, lsl #24
-#endif
str r4, [r1], #0x04
bge .Lcopyin_bad1_loop4
sub r0, r0, #0x03
b   .Lcopyin_l4
 
 .Lcopyin_bad2_loop16:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #16
-#else
mov r4, ip, lsr #16
-#endif
ldrtr5, [r0], #0x04
pld [r0, #0x018]
ldrtr6, [r0], #0x04
ldrtr7, [r0], #0x04
ldrtip, [r0], #0x04
-#ifdef __ARMEB__
-   orr r4, r4, r5, lsr #16
-   mov r5, r5, lsl #16
-   orr r5, r5, r6, lsr #16
-   mov r6, r6, lsl #16
-   orr r6, r6, r7, lsr #16
-   mov r7, r7, lsl #16
-   orr r7, r7, ip, lsr #16
-#else
orr r4, r4, r5, lsl #16
mov r5, r5, lsr #16
orr r5, r5, r6, lsl #16
@@ -385,7 +350,6 @@ ENTRY(copyin)
orr r6, r6, r7, lsl #16
mov r7, r7, lsr #16
orr r7, r7, ip, lsl #16
-#endif
str r4, [r1], #0x04
str r5, [r1], #0x04
str r6, [r1], #0x04
@@ -402,43 +366,22 @@ ENTRY(copyin)
blt .Lcopyin_l4
 
 .Lcopyin_bad2_loop4:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #16
-#else
mov r4, ip, lsr #16
-#endif
ldrtip, [r0], #0x04
subsr2, r2, #0x04
-#ifdef __ARMEB__
-   orr r4, r4, ip, lsr #16
-#else
orr r4, r4, ip, lsl #16
-#endif
str r4, [r1], #0x04
bge .Lcopyin_bad2_loop4
sub r0, r0, #0x02
b   .Lcopyin_l4
 
 .Lcopyin_bad3_loop16:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #24
-#else
mov r4, ip, lsr #24
-#endif
ldrtr5, [r0], #0x04
pld [r0, #0x018]
ldrtr6, [r0], #0x04
ldrtr7, [r0], #0x04
ldrtip, [r0], #0x04
-#ifdef __ARMEB__
-   orr r4, r4, r5, lsr #8
-   mov r5, r5, lsl #24
-   orr r5, r5, r6, lsr #8
-   mov r6, r6, lsl #24
-   orr r6, r6, r7, lsr #8
-   mov r7, r7, lsl #24
-   orr r7, r7, ip, lsr #8
-#else
orr r4, r4, r5, lsl #8
mov r5, r5, lsr #24
orr r5, r5, r6, lsl #8
@@ -446,7 +389,6 @@ ENTRY(copyin)
orr r6, r6, r7, lsl #8
mov r7, r7, lsr #24
orr r7, r7, ip, lsl #8
-#endif
str r4, [r1], #0x04
str r5, [r1], #0x04
str r6, [r1], #0x04
@@ -463,18 +405,10 @@ ENTRY(copyin)
blt .Lcopyin_l4
 
 .Lcopyin_bad3_loop4:
-#ifdef __ARMEB__
-   mov r4, ip, lsl #24
-#else
mov r4, ip, lsr #24
-#endif
ldrtip, [r0], #0x04
subsr2, r2, #0x04
-#ifdef __ARMEB__
-   orr r4, r4, ip, lsr #8
-#else
orr r4, r4, ip, lsl #8
-#endif
str r4, [r1], #0x04
bge .Lcopyin_bad3_loop4
sub r0, r0, #0x01
@@ -750,25 +684,12 @@ ENTRY(copyout)
b   .Lcopyout_bad1
 
 .Lcopyout_bad1_loop16:
-#ifdef __ARMEB__
-

svn commit: r368155 - head/sys/arm/conf

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 15:39:54 2020
New Revision: 368155
URL: https://svnweb.freebsd.org/changeset/base/368155

Log:
  Remove orphaned configs.

Deleted:
  head/sys/arm/conf/ARNDALE
  head/sys/arm/conf/ARNDALE-OCTA
  head/sys/arm/conf/EA3250.hints
  head/sys/arm/conf/SAM9G20EK.hints
  head/sys/arm/conf/VSATV102
  head/sys/arm/conf/YYHD18
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Re: svn commit: r368124 - in head/sys: cam cam/ata cam/ctl cam/mmc cam/nvme cam/scsi compat/linprocfs compat/linux conf contrib/openzfs/module/os/freebsd/zfs dev/ahci dev/ata dev/firewire dev/flash de

2020-11-29 Thread Michal Meloun


On 28.11.2020 13:12, Konstantin Belousov wrote:

Author: kib
Date: Sat Nov 28 12:12:51 2020
New Revision: 368124
URL: https://svnweb.freebsd.org/changeset/base/368124

Log:
   Make MAXPHYS tunable.  Bump MAXPHYS to 1M.

Unfortunately, bumping MAXPHYS broke arm kernel. The kernel runs out of 
KVA while running 'pbuf' keg init function. This causes that 
keg_alloc_slab() always returns NULL and for cycle in uma_prealloc() 
newer ends (whish should be considered as another bug).

Do you think that MAXPHYS constant can depends on given arch?
128k (or 256k) sounds reasonable for arm32 systems...

Michal


   Replace MAXPHYS by runtime variable maxphys. It is initialized from
   MAXPHYS by default, but can be also adjusted with the tunable kern.maxphys.
   
   Make b_pages[] array in struct buf flexible.  Size b_pages[] for buffer

   cache buffers exactly to atop(maxbcachebuf) (currently it is sized to
   atop(MAXPHYS)), and b_pages[] for pbufs is sized to atop(maxphys) + 1.
   The +1 for pbufs allow several pbuf consumers, among them vmapbuf(),
   to use unaligned buffers still sized to maxphys, esp. when such
   buffers come from userspace (*).  Overall, we save significant amount
   of otherwise wasted memory in b_pages[] for buffer cache buffers,
   while bumping MAXPHYS to desired high value.
   
   Eliminate all direct uses of the MAXPHYS constant in kernel and driver

   sources, except a place which initialize maxphys.  Some random (and
   arguably weird) uses of MAXPHYS, e.g. in linuxolator, are converted
   straight.  Some drivers, which use MAXPHYS to size embeded structures,
   get private MAXPHYS-like constant; their convertion is out of scope
   for this work.
   
   Changes to cam/, dev/ahci, dev/ata, dev/mpr, dev/mpt, dev/mvs,

   dev/siis, where either submitted by, or based on changes by mav.
   
   Suggested by: mav (*)

   Reviewed by: imp, mav, imp, mckusick, scottl (intermediate versions)
   Tested by:   pho
   Sponsored by:The FreeBSD Foundation
   Differential revision:   https://reviews.freebsd.org/D27225

Modified:
   head/sys/cam/ata/ata_da.c
   head/sys/cam/cam_compat.c
   head/sys/cam/cam_periph.c
   head/sys/cam/cam_xpt.c
   head/sys/cam/ctl/ctl_backend_block.c
   head/sys/cam/mmc/mmc_da.c
   head/sys/cam/nvme/nvme_da.c
   head/sys/cam/scsi/scsi_cd.c
   head/sys/cam/scsi/scsi_da.c
   head/sys/cam/scsi/scsi_pass.c
   head/sys/cam/scsi/scsi_sa.c
   head/sys/cam/scsi/scsi_sg.c
   head/sys/cam/scsi/scsi_target.c
   head/sys/compat/linprocfs/linprocfs.c
   head/sys/compat/linux/linux_ioctl.c
   head/sys/conf/options
   head/sys/contrib/openzfs/module/os/freebsd/zfs/vdev_geom.c
   head/sys/contrib/openzfs/module/os/freebsd/zfs/zvol_os.c
   head/sys/dev/ahci/ahci.c
   head/sys/dev/ahci/ahci.h
   head/sys/dev/ahci/ahciem.c
   head/sys/dev/ata/ata-all.c
   head/sys/dev/ata/ata-all.h
   head/sys/dev/ata/ata-dma.c
   head/sys/dev/firewire/sbp.c
   head/sys/dev/flash/cqspi.c
   head/sys/dev/isci/scil/sci_controller_constants.h
   head/sys/dev/iscsi/iscsi.c
   head/sys/dev/md/md.c
   head/sys/dev/mfi/mfi.c
   head/sys/dev/mpr/mpr.c
   head/sys/dev/mps/mps.c
   head/sys/dev/mpt/mpt.c
   head/sys/dev/mpt/mpt.h
   head/sys/dev/mrsas/mrsas.c
   head/sys/dev/mvs/mvs.c
   head/sys/dev/mvs/mvs.h
   head/sys/dev/nvme/nvme.h
   head/sys/dev/nvme/nvme_ctrlr.c
   head/sys/dev/pms/freebsd/driver/ini/src/agdef.h
   head/sys/dev/pms/freebsd/driver/ini/src/agtiapi.c
   head/sys/dev/sdhci/sdhci.c
   head/sys/dev/siis/siis.c
   head/sys/dev/siis/siis.h
   head/sys/dev/sym/sym_conf.h
   head/sys/dev/usb/storage/umass.c
   head/sys/dev/virtio/block/virtio_blk.c
   head/sys/dev/virtio/scsi/virtio_scsi.c
   head/sys/dev/xen/blkback/blkback.c
   head/sys/dev/xen/blkfront/blkfront.c
   head/sys/fs/cd9660/cd9660_vfsops.c
   head/sys/fs/ext2fs/ext2_vfsops.c
   head/sys/fs/fuse/fuse_vfsops.c
   head/sys/fs/msdosfs/msdosfs_vfsops.c
   head/sys/fs/udf/udf_vfsops.c
   head/sys/geom/cache/g_cache.c
   head/sys/geom/eli/g_eli_integrity.c
   head/sys/geom/geom_dev.c
   head/sys/geom/geom_io.c
   head/sys/geom/journal/g_journal.c
   head/sys/geom/journal/g_journal.h
   head/sys/geom/mirror/g_mirror.c
   head/sys/geom/nop/g_nop.c
   head/sys/geom/part/g_part_apm.c
   head/sys/geom/part/g_part_gpt.c
   head/sys/geom/part/g_part_ldm.c
   head/sys/geom/raid/md_ddf.c
   head/sys/geom/raid/md_promise.c
   head/sys/geom/raid3/g_raid3.c
   head/sys/geom/shsec/g_shsec.c
   head/sys/geom/stripe/g_stripe.c
   head/sys/geom/uzip/g_uzip.c
   head/sys/geom/vinum/geom_vinum_var.h
   head/sys/geom/virstor/g_virstor.c
   head/sys/geom/virstor/g_virstor.h
   head/sys/kern/kern_mib.c
   head/sys/kern/kern_physio.c
   head/sys/kern/kern_sendfile.c
   head/sys/kern/subr_param.c
   head/sys/kern/vfs_aio.c
   head/sys/kern/vfs_bio.c
   head/sys/kern/vfs_cluster.c
   head/sys/kern/vfs_default.c
   head/sys/mips/ingenic/jz4780_mmc.c
   head/sys/net/if.c
   head/sys/powerpc/mambo/mambo_disk.c
   head/sys/powerpc/mpc85xx/fsl_sata.c

svn commit: r368158 - head/sys/arm/arm

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 16:44:22 2020
New Revision: 368158
URL: https://svnweb.freebsd.org/changeset/base/368158

Log:
  _ARM_ARCH_5E is always defined, we not support older CPUs.

Modified:
  head/sys/arm/arm/bcopy_page.S
  head/sys/arm/arm/bcopyinout.S
  head/sys/arm/arm/in_cksum_arm.S
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/support.S

Modified: head/sys/arm/arm/bcopy_page.S
==
--- head/sys/arm/arm/bcopy_page.S   Sun Nov 29 16:29:40 2020
(r368157)
+++ head/sys/arm/arm/bcopy_page.S   Sun Nov 29 16:44:22 2020
(r368158)
@@ -44,147 +44,8 @@ __FBSDID("$FreeBSD$");
 
 #include "assym.inc"
 
-#ifndef _ARM_ARCH_5E
 
-/* #define BIG_LOOPS */
-
 /*
- * bcopy_page(src, dest)
- *
- * Optimised copy page routine.
- *
- * On entry:
- *   r0 - src address
- *   r1 - dest address
- *
- * Requires:
- *   number of bytes per page (PAGE_SIZE) is a multiple of 512 (BIG_LOOPS), 128
- *   otherwise.
- */
-
-#defineCHUNK_SIZE  32
-
-#definePREFETCH_FIRST_CHUNK/* nothing */
-#definePREFETCH_NEXT_CHUNK /* nothing */
-
-#ifndef COPY_CHUNK
-#defineCOPY_CHUNK \
-   PREFETCH_NEXT_CHUNK ; \
-   ldmia   r0!, {r3-r8,ip,lr} ; \
-   stmia   r1!, {r3-r8,ip,lr}
-#endif /* ! COPY_CHUNK */
-
-#ifndef SAVE_REGS
-#defineSAVE_REGS   stmfd   sp!, {r4-r8, lr}; _SAVE({r4-r8, lr})
-#defineRESTORE_REGSldmfd   sp!, {r4-r8, pc}
-#endif
-
-ENTRY(bcopy_page)
-   PREFETCH_FIRST_CHUNK
-   SAVE_REGS
-#ifdef BIG_LOOPS
-   mov r2, #(PAGE_SIZE >> 9)
-#else
-   mov r2, #(PAGE_SIZE >> 7)
-#endif
-
-1:
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-
-#ifdef BIG_LOOPS
-   /* There is little point making the loop any larger; unless we are
-  running with the cache off, the load/store overheads will
-  completely dominate this loop.  */
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-   COPY_CHUNK
-#endif
-   subsr2, r2, #1
-   bne 1b
-
-   RESTORE_REGS/* ...and return. */
-END(bcopy_page)
-
-/*
- * bzero_page(dest)
- *
- * Optimised zero page routine.
- *
- * On entry:
- *   r0 - dest address
- *
- * Requires:
- *   number of bytes per page (PAGE_SIZE) is a multiple of 512 (BIG_LOOPS), 128
- *   otherwise
- */
-
-ENTRY(bzero_page)
-   stmfd   sp!, {r4-r8, lr}
-   _SAVE({r4-r8, lr})
-#ifdef BIG_LOOPS
-   mov r2, #(PAGE_SIZE >> 9)
-#else
-   mov r2, #(PAGE_SIZE >> 7)
-#endif
-   mov r3, #0
-   mov r4, #0
-   mov r5, #0
-   mov r6, #0
-   mov r7, #0
-   mov r8, #0
-   mov ip, #0
-   mov lr, #0
-
-1:
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-
-#ifdef BIG_LOOPS
-   /* There is little point making the loop any larger; unless we are
-  running with the cache off, the load/store overheads will
-  completely dominate this loop.  */
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-   stmia   r0!, {r3-r8,ip,lr}
-
-#endif
-
-   subsr2, r2, #1
-   bne 1b
-
-   ldmfd   sp!, {r4-r8, pc}
-END(bzero_page)
-
-#else  /* _ARM_ARCH_5E */
-
-/*
  * armv5e version of bcopy_page
  */
 ENTRY(bcopy_page)
@@ -279,4 +140,3 @@ ENTRY(bzero_page)
bne 1b
RET
 END(bzero_page)
-#endif /* _ARM_ARCH_5E */

Modified: head/sys/arm/arm/bcopyinout.S
==
--- head/sys/arm/arm/bcopyinout.S   Sun Nov 29 16:29:40 2020
(r368157)
+++ head/sys/arm/arm/bcopyinout.S   Sun Nov 29 16:44:22 2020
(r368158)
@@ -47,510 +47,7 @@
.word   _C_LABEL(_min_memcpy_size)
 
 __FBSDID("$FreeBSD$");
-#ifdef _ARM_ARCH_5E
 #include 
-#else
-
-   .text
-   .align  2
-
-#define GET_PCB(tmp) \
-   mrc p15, 0, tmp, c13, c0, 4; \
-   add tmp, tmp, #(TD_PCB)
-
-#define SAVE_REGS  stmfd   sp!, {r4-r11}; _SAVE({r4-r11})
-#define RESTORE_REGS   ldmfd   sp!, {r4-r11}
-
-#if defined(_ARM_ARCH_5E)
-#define HELLOCPP #
-#define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
-#else
-#define PREFETCH(rx,o)
-#endif
-
-/*
- * r0 = user space address
- * r1 = kernel space address
- * r2 = length
- *
- * Copies bytes from user space to kernel space
- *
- * We save/restore r4-r11:
- *

svn commit: r368159 - in head/sys: arm/conf conf

2020-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 17:42:32 2020
New Revision: 368159
URL: https://svnweb.freebsd.org/changeset/base/368159

Log:
  Remove unused options.
  
  Marvell files and their related SOC_MV_ options should be cleaned up
  in another pass.

Modified:
  head/sys/arm/conf/NOTES
  head/sys/arm/conf/std.armv6
  head/sys/arm/conf/std.armv7
  head/sys/conf/options.arm

Modified: head/sys/arm/conf/NOTES
==
--- head/sys/arm/conf/NOTES Sun Nov 29 16:44:22 2020(r368158)
+++ head/sys/arm/conf/NOTES Sun Nov 29 17:42:32 2020(r368159)
@@ -9,7 +9,6 @@ makeoptions CONF_CFLAGS+="-march=armv7a"
 
 # Add options for armv7 that are not in sys/conf/NOTES...
 
-optionsARM_L2_PIPT # Only L2 PIPT is supported
 optionsFDT # Flattened device tree support
 optionsFREEBSD_BOOT_LOADER # Process metadata passed from loader(8)
 optionsINTRNG  # Include INTRNG framework

Modified: head/sys/arm/conf/std.armv6
==
--- head/sys/arm/conf/std.armv6 Sun Nov 29 16:44:22 2020(r368158)
+++ head/sys/arm/conf/std.armv6 Sun Nov 29 17:42:32 2020(r368159)
@@ -3,7 +3,6 @@
 # $FreeBSD$
 
 optionsHZ=1000
-optionsARM_L2_PIPT # Only L2 PIPT is supported
 optionsINTRNG  # All arm systems use INTRNG these days
 optionsPREEMPTION  # Enable kernel thread preemption
 optionsVIMAGE  # Subsystem virtualization, e.g. VNET

Modified: head/sys/arm/conf/std.armv7
==
--- head/sys/arm/conf/std.armv7 Sun Nov 29 16:44:22 2020(r368158)
+++ head/sys/arm/conf/std.armv7 Sun Nov 29 17:42:32 2020(r368159)
@@ -3,7 +3,6 @@
 # $FreeBSD$
 
 optionsHZ=1000
-optionsARM_L2_PIPT # Only L2 PIPT is supported
 optionsINTRNG  # All arm systems use INTRNG these days
 optionsPREEMPTION  # Enable kernel thread preemption
 optionsVIMAGE  # Subsystem virtualization, e.g. VNET

Modified: head/sys/conf/options.arm
==
--- head/sys/conf/options.arm   Sun Nov 29 16:44:22 2020(r368158)
+++ head/sys/conf/options.arm   Sun Nov 29 17:42:32 2020(r368159)
@@ -1,13 +1,7 @@
 #$FreeBSD$
 ARMV6  opt_global.h
 ARMV7  opt_global.h
-ARM_CACHE_LOCK_ENABLE  opt_global.h
-ARM_KERN_DIRECTMAP opt_vm.h
-ARM_L2_PIPTopt_global.h
-ARM_MANY_BOARD opt_global.h
-ARM_WANT_TP_ADDRESSopt_global.h
 CPSW_ETHERSWITCH   opt_cpsw.h
-CPU_ARM9E  opt_global.h
 CPU_ARM1176opt_global.h
 CPU_CORTEXAopt_global.h
 CPU_KRAIT  opt_global.h
@@ -23,7 +17,6 @@ FREEBSD_BOOT_LOADER   opt_global.h
 KERNBASE   opt_global.h
 KERNVIRTADDR   opt_global.h
 LINUX_BOOT_ABI opt_global.h
-LOADERRAMADDR  opt_global.h
 LOCORE_MAP_MB  opt_locore.h
 NKPT2PGopt_pmap.h
 PHYSADDR   opt_global.h
@@ -31,7 +24,6 @@ PLATFORM  opt_global.h
 SOCDEV_PA  opt_global.h
 SOCDEV_VA  opt_global.h
 PV_STATS   opt_pmap.h
-QEMU_WORKAROUNDS   opt_global.h
 SOC_ALLWINNER_A10  opt_global.h
 SOC_ALLWINNER_A13  opt_global.h
 SOC_ALLWINNER_A20  opt_global.h
@@ -56,13 +48,6 @@ SOC_MV_KIRKWOOD  opt_global.h
 SOC_MV_ORION   opt_global.h
 SOC_OMAP3  opt_global.h
 SOC_OMAP4  opt_global.h
-SOC_ROCKCHIP_RK3188opt_global.h
 SOC_TI_AM335X  opt_global.h
-SOC_TEGRA2 opt_global.h
-XSCALE_CACHE_READ_WRITE_ALLOCATE   opt_global.h
-VERBOSE_INIT_ARM   opt_global.h
 VM_MAXUSER_ADDRESS opt_global.h
-GFB_DEBUG  opt_gfb.h
-GFB_NO_FONT_LOADINGopt_gfb.h
-GFB_NO_MODE_CHANGE opt_gfb.h
 VFPopt_global.h
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368204 - head/sys/arm/arm

2020-12-01 Thread Michal Meloun

Author: mmel
Date: Tue Dec  1 09:18:18 2020
New Revision: 368204
URL: https://svnweb.freebsd.org/changeset/base/368204

Log:
  Remove duplicated SV_ASLR from the elf flags.
  
  Reported by:  lattera

Modified:
  head/sys/arm/arm/elf_machdep.c

Modified: head/sys/arm/arm/elf_machdep.c
==
--- head/sys/arm/arm/elf_machdep.c  Tue Dec  1 08:52:13 2020
(r368203)
+++ head/sys/arm/arm/elf_machdep.c  Tue Dec  1 09:18:18 2020
(r368204)
@@ -86,7 +86,7 @@ struct sysentvec elf32_freebsd_sysvec = {
.sv_maxssiz = NULL,
.sv_flags   =
  SV_ASLR | SV_SHP | SV_TIMEKEEP | SV_RNG_SEED_VER |
- SV_ABI_FREEBSD | SV_ILP32 | SV_ASLR,
+ SV_ABI_FREEBSD | SV_ILP32,
.sv_set_syscall_retval = cpu_set_syscall_retval,
.sv_fetch_syscall_args = cpu_fetch_syscall_args,
.sv_syscallnames = syscallnames,
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368203 - head/sys/dev/nvme

2020-12-01 Thread Michal Meloun

Author: mmel
Date: Tue Dec  1 08:52:13 2020
New Revision: 368203
URL: https://svnweb.freebsd.org/changeset/base/368203

Log:
  Always use the __unused attribute even for potentially unused parameters.
  
  Requested by: ian, imp
  MFC with: r368167

Modified:
  head/sys/dev/nvme/nvme.h

Modified: head/sys/dev/nvme/nvme.h
==
--- head/sys/dev/nvme/nvme.hTue Dec  1 03:07:26 2020(r368202)
+++ head/sys/dev/nvme/nvme.hTue Dec  1 08:52:13 2020(r368203)
@@ -1728,15 +1728,9 @@ extern int nvme_use_nvd;
 
 #endif /* _KERNEL */
 
-#if _BYTE_ORDER != _LITTLE_ENDIAN
-#define MODIF
-#else
-#define MODIF __unused
-#endif
-
 /* Endianess conversion functions for NVMe structs */
 static inline
-void   nvme_completion_swapbytes(struct nvme_completion *s MODIF)
+void   nvme_completion_swapbytes(struct nvme_completion *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1750,7 +1744,7 @@ void  nvme_completion_swapbytes(struct 
nvme_completion 
 }
 
 static inline
-void   nvme_power_state_swapbytes(struct nvme_power_state *s MODIF)
+void   nvme_power_state_swapbytes(struct nvme_power_state *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1763,7 +1757,7 @@ void  nvme_power_state_swapbytes(struct 
nvme_power_stat
 }
 
 static inline
-void   nvme_controller_data_swapbytes(struct nvme_controller_data *s MODIF)
+void   nvme_controller_data_swapbytes(struct nvme_controller_data *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1815,7 +1809,7 @@ void  nvme_controller_data_swapbytes(struct 
nvme_contro
 }
 
 static inline
-void   nvme_namespace_data_swapbytes(struct nvme_namespace_data *s MODIF)
+void   nvme_namespace_data_swapbytes(struct nvme_namespace_data *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1845,7 +1839,7 @@ void  nvme_namespace_data_swapbytes(struct 
nvme_namespa
 
 static inline
 void   nvme_error_information_entry_swapbytes(
-struct nvme_error_information_entry *s MODIF)
+struct nvme_error_information_entry *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1862,7 +1856,7 @@ void  nvme_error_information_entry_swapbytes(
 }
 
 static inline
-void   nvme_le128toh(void *p MODIF)
+void   nvme_le128toh(void *p __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
/* Swap 16 bytes in place */
@@ -1879,7 +1873,7 @@ void  nvme_le128toh(void *p MODIF)
 
 static inline
 void   nvme_health_information_page_swapbytes(
-struct nvme_health_information_page *s MODIF)
+struct nvme_health_information_page *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1907,7 +1901,7 @@ void  nvme_health_information_page_swapbytes(
 }
 
 static inline
-void   nvme_firmware_page_swapbytes(struct nvme_firmware_page *s MODIF)
+void   nvme_firmware_page_swapbytes(struct nvme_firmware_page *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1918,7 +1912,7 @@ void  nvme_firmware_page_swapbytes(struct 
nvme_firmware
 }
 
 static inline
-void   nvme_ns_list_swapbytes(struct nvme_ns_list *s MODIF)
+void   nvme_ns_list_swapbytes(struct nvme_ns_list *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1930,7 +1924,7 @@ void  nvme_ns_list_swapbytes(struct nvme_ns_list *s 
MOD
 
 static inline
 void   nvme_command_effects_page_swapbytes(
-struct nvme_command_effects_page *s MODIF)
+struct nvme_command_effects_page *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
int i;
@@ -1944,7 +1938,7 @@ void  nvme_command_effects_page_swapbytes(
 
 static inline
 void   nvme_res_notification_page_swapbytes(
-struct nvme_res_notification_page *s MODIF)
+struct nvme_res_notification_page *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
s->log_page_count = le64toh(s->log_page_count);
@@ -1954,7 +1948,7 @@ void  nvme_res_notification_page_swapbytes(
 
 static inline
 void   nvme_sanitize_status_page_swapbytes(
-struct nvme_sanitize_status_page *s MODIF)
+struct nvme_sanitize_status_page *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
s->sprog = le16toh(s->sprog);
@@ -1970,7 +1964,7 @@ void  nvme_sanitize_status_page_swapbytes(
 }
 
 static inline
-void   intel_log_temp_stats_swapbytes(struct intel_log_temp_stats *s  MODIF)
+void   intel_log_temp_stats_swapbytes(struct intel_log_temp_stats *s __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
 
@@ -1987,8 +1981,8 @@ void  intel_log_temp_stats_swapbytes(struct 
intel_log_t
 }
 
 static inline
-void   nvme_resv_status_swapbytes(struct nvme_resv_status *s MODIF,
-size_t size MODIF)
+void   nvme_resv_status_swapbytes(struct nvme_resv_status *s __unused,
+size_t size __unused)
 {
 #if _BYTE_ORDER != _LITTLE_ENDIAN
u_int i, n;
@@ -2005,8 +1999,8 @@ void  nvme_resv_status_swapbytes(struct 
nvme_resv_statu
 }
 
 static inline
-void   nvme_resv_status_ext_swapbytes(struct

svn commit: r368273 - head/sys/arm/arm

2020-12-02 Thread Michal Meloun

Author: mmel
Date: Wed Dec  2 08:14:56 2020
New Revision: 368273
URL: https://svnweb.freebsd.org/changeset/base/368273

Log:
  Fix r368153. Wrong branch of #ifdef __ARMEB__ was deleted.

Modified:
  head/sys/arm/arm/support.S

Modified: head/sys/arm/arm/support.S
==
--- head/sys/arm/arm/support.S  Wed Dec  2 00:53:03 2020(r368272)
+++ head/sys/arm/arm/support.S  Wed Dec  2 08:14:56 2020(r368273)
@@ -1213,10 +1213,10 @@ ENTRY(memcpy)
  */
ldrhr2, [r1]/* BE:r2 = ..01  LE:r2 = ..10 */
ldrhr3, [r1, #0x02] /* LE:r3 = ..23  LE:r3 = ..32 */
-   mov r1, r2, lsr #8  /* r1 = ...0 */
-   strbr1, [r0]
-   mov r2, r2, lsl #8  /* r2 = .01. */
-   orr r2, r2, r3, lsr #8  /* r2 = .012 */
+   strbr2, [r0]
+   mov r2, r2, lsr #8  /* r2 = ...1 */
+   orr r2, r2, r3, lsl #8  /* r2 = .321 */
+   mov r3, r3, lsr #8  /* r3 = ...3 */
strhr2, [r0, #0x01]
strbr3, [r0, #0x03]
RET
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368279 - head/sys/dev/nvme

2020-12-02 Thread Michal Meloun

Author: mmel
Date: Wed Dec  2 16:54:24 2020
New Revision: 368279
URL: https://svnweb.freebsd.org/changeset/base/368279

Log:
  NVME: Multiple busdma related fixes.
  - in nvme_qpair_process_completions() do dma sync before completion buffer
is used.
  - in nvme_qpair_submit_tracker(), don't do explicit wmb() also for arm
and arm64. Bus_dmamap_sync() on these architectures is sufficient to ensure
that all CPU stores are visible to external (including DMA) observers.
  - Allocate completion buffer as BUS_DMA_COHERENT. On not-DMA coherent systems,
buffers continuously owned (and accessed) by DMA must be allocated with this
flag. Note that BUS_DMA_COHERENT flag is no-op on DMA coherent systems
(or coherent buses in mixed systems).
  
  MFC after:4 weeks
  Reviewed by:  mav, imp
  Differential Revision: https://reviews.freebsd.org/D27446

Modified:
  head/sys/dev/nvme/nvme_qpair.c

Modified: head/sys/dev/nvme/nvme_qpair.c
==
--- head/sys/dev/nvme/nvme_qpair.c  Wed Dec  2 16:46:45 2020
(r368278)
+++ head/sys/dev/nvme/nvme_qpair.c  Wed Dec  2 16:54:24 2020
(r368279)
@@ -547,6 +547,8 @@ nvme_qpair_process_completions(struct nvme_qpair *qpai
if (!qpair->is_enabled)
return (false);
 
+   bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
+   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
/*
 * A panic can stop the CPU this routine is running on at any point.  If
 * we're called during a panic, complete the sq_head wrap protocol for
@@ -580,8 +582,6 @@ nvme_qpair_process_completions(struct nvme_qpair *qpai
}
}
 
-   bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
-   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
while (1) {
cpl = qpair->cpl[qpair->cq_head];
 
@@ -722,7 +722,7 @@ nvme_qpair_construct(struct nvme_qpair *qpair,
bus_dma_tag_set_domain(qpair->dma_tag, qpair->domain);
 
if (bus_dmamem_alloc(qpair->dma_tag, (void **),
-   BUS_DMA_NOWAIT, >queuemem_map)) {
+BUS_DMA_COHERENT | BUS_DMA_NOWAIT, >queuemem_map)) {
nvme_printf(ctrlr, "failed to alloc qpair memory\n");
goto out;
}
@@ -982,7 +982,7 @@ nvme_qpair_submit_tracker(struct nvme_qpair *qpair, st
 
bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-#ifndef __powerpc__
+#if !defined( __powerpc__) && !defined( __aarch64__)  && !defined( __arm__)
/*
 * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but
 * no other archs do.
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368633 - head/sys/arm64/arm64

2020-12-14 Thread Michal Meloun

Author: mmel
Date: Mon Dec 14 11:57:43 2020
New Revision: 368633
URL: https://svnweb.freebsd.org/changeset/base/368633

Log:
  Verify (and fix) the context_id argument passed to the mpentry () by PSCI.
  
  Some older PSCI implementations corrupt (or do not pass) the context_id
  argument to newly started secondary cores. Although the ideal solution to this
  problem is u-boot update, we can find the correct value for the argument 
(cpuid)
  by comparing of real core mpidr register with the value stored in pcu->mpidr.
  
  MFC after:2 weeks

Modified:
  head/sys/arm64/arm64/mp_machdep.c

Modified: head/sys/arm64/arm64/mp_machdep.c
==
--- head/sys/arm64/arm64/mp_machdep.c   Mon Dec 14 11:56:16 2020
(r368632)
+++ head/sys/arm64/arm64/mp_machdep.c   Mon Dec 14 11:57:43 2020
(r368633)
@@ -206,6 +206,21 @@ init_secondary(uint64_t cpu)
 {
struct pcpu *pcpup;
pmap_t pmap0;
+   u_int mpidr;
+
+   /*
+* Verify that the value passed in 'cpu' argument (aka context_id) is
+* valid. Some older U-Boot based PSCI implementations are buggy,
+* they can pass random value in it.
+*/
+   mpidr = READ_SPECIALREG(mpidr_el1) & CPU_AFF_MASK;
+   if  (cpu >= MAXCPU || __pcpu[cpu].pc_mpidr != mpidr) {
+   for (cpu = 0; cpu < mp_maxid; cpu++)
+   if (__pcpu[cpu].pc_mpidr == mpidr)
+   break;
+   if ( cpu >= MAXCPU)
+   panic("MPIDR for this CPU is not in pcpu table");
+   }
 
pcpup = &__pcpu[cpu];
/*
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368634 - head/sys/arm/arm

2020-12-14 Thread Michal Meloun

Author: mmel
Date: Mon Dec 14 13:10:19 2020
New Revision: 368634
URL: https://svnweb.freebsd.org/changeset/base/368634

Log:
  Finish implementation of ARM PMU interrupts.
  The ARM PMU may use single per-core interrupt or may use multiple generic
  interrupts, one per core. In this case, special attention must be paid to
  the correct identification of the physical location of the core, its order
  in the external database (FDT) and the associated cpuid.
  
  Also keep in mind that a SoC can have multiple different PMUs
  (usually one per cluster)

Modified:
  head/sys/arm/arm/pmu.c

Modified: head/sys/arm/arm/pmu.c
==
--- head/sys/arm/arm/pmu.c  Mon Dec 14 11:57:43 2020(r368633)
+++ head/sys/arm/arm/pmu.c  Mon Dec 14 13:10:19 2020(r368634)
@@ -60,33 +60,19 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#ifdef notyet
 #defineMAX_RLEN8
-#else
-#defineMAX_RLEN1
-#endif
 
+struct pmu_intr {
+   struct resource *res;
+   void*ih;
+   int cpuid;
+};
+
 struct pmu_softc {
-   struct resource *res[MAX_RLEN];
device_tdev;
-   void*ih[MAX_RLEN];
+   struct pmu_intr irq[MAX_RLEN];
 };
 
-static struct resource_spec pmu_spec[] = {
-   { SYS_RES_IRQ,  0,  RF_ACTIVE },
-   /* We don't currently handle pmu events, other than on cpu 0 */
-#ifdef notyet
-   { SYS_RES_IRQ,  1,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  2,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  3,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  4,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  5,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  6,  RF_ACTIVE | RF_OPTIONAL },
-   { SYS_RES_IRQ,  7,  RF_ACTIVE | RF_OPTIONAL },
-#endif
-   { -1, 0 }
-};
-
 /* CCNT */
 #if __ARM_ARCH > 6
 int pmu_attched = 0;
@@ -131,34 +117,163 @@ pmu_intr(void *arg)
 }
 
 static int
+pmu_parse_affinity(struct pmu_softc *sc, struct pmu_intr *irq, phandle_t xref,
+uint32_t mpidr)
+{
+   struct pcpu *pcpu;
+   int i, err;
+
+
+   if (xref  != 0) {
+   err = OF_getencprop(OF_node_from_xref(xref), "reg", ,
+   sizeof(mpidr));
+   if (err < 0) {
+   device_printf(sc->dev, "missing 'reg' property\n");
+   return (ENXIO);
+   }
+   }
+
+   for (i = 0; i < MAXCPU; i++) {
+   pcpu = pcpu_find(i);
+   if (pcpu != NULL && pcpu->pc_mpidr == mpidr) {
+   irq->cpuid = i;
+   return (0);
+   }
+   }
+
+   device_printf(sc->dev, "Cannot find CPU with MPIDR: 0x%08X\n", mpidr);
+   return (ENXIO);
+}
+
+static int
+pmu_parse_intr(struct pmu_softc *sc)
+{
+   bool has_affinity;
+   phandle_t node, *cpus;
+   int rid, err, ncpus, i;
+
+
+   node = ofw_bus_get_node(sc->dev);
+   has_affinity = OF_hasprop(node, "interrupt-affinity");
+
+   for (i = 0; i < MAX_RLEN; i++)
+   sc->irq[i].cpuid = -1;
+
+   cpus = NULL;
+   if (has_affinity) {
+   ncpus = OF_getencprop_alloc_multi(node, "interrupt-affinity",
+   sizeof(*cpus), (void **));
+   if (ncpus < 0) {
+   device_printf(sc->dev,
+  "Cannot read interrupt affinity property\n");
+   return (ENXIO);
+   }
+   }
+
+   /* Process first interrupt */
+   rid = 0;
+   sc->irq[0].res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, ,
+   RF_ACTIVE | RF_SHAREABLE);
+
+   if (sc->irq[0].res == NULL) {
+   device_printf(sc->dev, "Cannot get interrupt\n");
+   err = ENXIO;
+   goto done;
+   }
+
+   /* Check if PMU have one per-CPU interrupt */
+   if (intr_is_per_cpu(sc->irq[0].res)) {
+   if (has_affinity) {
+   device_printf(sc->dev,
+   "Per CPU interupt have declared affinity\n");
+   err = ENXIO;
+   goto done;
+   }
+   return (0);
+   }
+
+   /*
+* PMU with set of generic interrupts (one per core)
+* Each one must be binded to exact core.
+*/
+   err = pmu_parse_affinity(sc, sc->irq + 0, has_affinity ? cpus[0]: 0,
+   0);
+   if (err != 0) {
+   device_printf(sc->dev, "Cannot parse affinity for CPUid: 0\n");
+   goto done;
+   }
+
+   for (i = 1; i < MAX_RLEN; i++) {
+   rid = i;
+   sc->irq[i].res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
+   , RF_ACTIVE | RF_SHAREABLE);
+

svn commit: r368635 - in head/sys/arm: arm include

2020-12-14 Thread Michal Meloun

Author: mmel
Date: Mon Dec 14 14:00:54 2020
New Revision: 368635
URL: https://svnweb.freebsd.org/changeset/base/368635

Log:
  Remove unused functions and variables in cpufunc.[ch].

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm.S
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/machdep.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Mon Dec 14 13:10:19 2020(r368634)
+++ head/sys/arm/arm/cpufunc.c  Mon Dec 14 14:00:54 2020(r368635)
@@ -62,24 +62,10 @@ __FBSDID("$FreeBSD$");
 #include 
 
 /* PRIMARY CACHE VARIABLES */
-intarm_picache_size;
-intarm_picache_line_size;
-intarm_picache_ways;
 
-intarm_pdcache_size;   /* and unified */
-intarm_pdcache_line_size;
-intarm_pdcache_ways;
-
-intarm_pcache_type;
-intarm_pcache_unified;
-
 intarm_dcache_align;
 intarm_dcache_align_mask;
 
-u_int  arm_cache_level;
-u_int  arm_cache_type[14];
-u_int  arm_cache_loc;
-
 #ifdef CPU_MV_PJ4B
 static void pj4bv7_setup(void);
 #endif
@@ -155,16 +141,10 @@ u_int cputype;
 
 static void get_cachetype_cp15(void);
 
-/* Additional cache information local to this file.  Log2 of some of the
-   above numbers.  */
-static int arm_dcache_l2_nsets;
-static int arm_dcache_l2_assoc;
-static int arm_dcache_l2_linesize;
-
 static void
 get_cachetype_cp15(void)
 {
-   u_int ctype, isize, dsize, cpuid;
+   u_int ctype, dsize, cpuid;
u_int clevel, csize, i, sel;
u_int multiplier;
u_char type;
@@ -184,8 +164,6 @@ get_cachetype_cp15(void)
if (CPU_CT_FORMAT(ctype) == CPU_CT_ARMV7) {
__asm __volatile("mrc p15, 1, %0, c0, c0, 1"
: "=r" (clevel));
-   arm_cache_level = clevel;
-   arm_cache_loc = CPU_CLIDR_LOC(arm_cache_level);
i = 0;
while ((type = (clevel & 0x7)) && i < 7) {
if (type == CACHE_DCACHE || type == CACHE_UNI_CACHE ||
@@ -195,7 +173,6 @@ get_cachetype_cp15(void)
: : "r" (sel));
__asm __volatile("mrc p15, 1, %0, c0, c0, 0"
: "=r" (csize));
-   arm_cache_type[sel] = csize;
arm_dcache_align = 1 <<
(CPUV7_CT_xSIZE_LEN(csize) + 4);
arm_dcache_align_mask = arm_dcache_align - 1;
@@ -206,57 +183,22 @@ get_cachetype_cp15(void)
: : "r" (sel));
__asm __volatile("mrc p15, 1, %0, c0, c0, 0"
: "=r" (csize));
-   arm_cache_type[sel] = csize;
}
i++;
clevel >>= 3;
}
} else {
-   if ((ctype & CPU_CT_S) == 0)
-   arm_pcache_unified = 1;
-
/*
 * If you want to know how this code works, go read the ARM ARM.
 */
 
-   arm_pcache_type = CPU_CT_CTYPE(ctype);
-
-   if (arm_pcache_unified == 0) {
-   isize = CPU_CT_ISIZE(ctype);
-   multiplier = (isize & CPU_CT_xSIZE_M) ? 3 : 2;
-   arm_picache_line_size = 1U << (CPU_CT_xSIZE_LEN(isize) 
+ 3);
-   if (CPU_CT_xSIZE_ASSOC(isize) == 0) {
-   if (isize & CPU_CT_xSIZE_M)
-   arm_picache_line_size = 0; /* not 
present */
-   else
-   arm_picache_ways = 1;
-   } else {
-   arm_picache_ways = multiplier <<
-   (CPU_CT_xSIZE_ASSOC(isize) - 1);
-   }
-   arm_picache_size = multiplier << 
(CPU_CT_xSIZE_SIZE(isize) + 8);
-   }
-
dsize = CPU_CT_DSIZE(ctype);
multiplier = (dsize & CPU_CT_xSIZE_M) ? 3 : 2;
-   arm_pdcache_line_size = 1U << (CPU_CT_xSIZE_LEN(dsize) + 3);
+   arm_dcache_align = 1U << (CPU_CT_xSIZE_LEN(dsize) + 3);
if (CPU_CT_xSIZE_ASSOC(dsize) == 0) {
if (dsize & CPU_CT_xSIZE_M)
-   arm_pdcache_line_size = 0; /* not present */
-   else
-   arm_pdcache_ways = 1;
-   } else {
-   arm_pdcache_ways = multiplier <<
-   (CPU_CT_xSIZE_ASSOC(dsize) - 1);
+   arm_dcache_align = 0; /* not present */
}
-   arm_pdcache_size = multiplier << (CPU_CT_xSIZE_SIZE(dsize) + 8);
-
-

svn commit: r368698 - head/sys/dev/e1000

2020-12-16 Thread Michal Meloun

Author: mmel
Date: Wed Dec 16 14:39:24 2020
New Revision: 368698
URL: https://svnweb.freebsd.org/changeset/base/368698

Log:
  Use the standard method for localizing of MSI-X table bar.
  
  Current way, hardcoded value plus heuristic is not conform to the PCI(e)
  specification and it fails on systems where MSI-X bar is not initialized by
  BIOS/ACPI (many arm or arm64 systems for example).
  Instead, use the standard PCI(e) capability for determining of
  MSIX table bar address.
  
  MFC after: 3 weeks
  Differential Revision: https://reviews.freebsd.org/D27265

Modified:
  head/sys/dev/e1000/if_em.c
  head/sys/dev/e1000/if_em.h

Modified: head/sys/dev/e1000/if_em.c
==
--- head/sys/dev/e1000/if_em.c  Wed Dec 16 14:36:57 2020(r368697)
+++ head/sys/dev/e1000/if_em.c  Wed Dec 16 14:39:24 2020(r368698)
@@ -847,9 +847,7 @@ em_if_attach_pre(if_ctx_t ctx)
** use a different BAR, so we need to keep
** track of which is used.
*/
-   scctx->isc_msix_bar = PCIR_BAR(EM_MSIX_BAR);
-   if (pci_read_config(dev, scctx->isc_msix_bar, 4) == 0)
-   scctx->isc_msix_bar += 4;
+   scctx->isc_msix_bar =  pci_msix_table_bar(dev);
} else if (adapter->hw.mac.type >= em_mac_min) {
scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]* 
sizeof(struct e1000_tx_desc), EM_DBA_ALIGN);
scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * 
sizeof(union e1000_rx_desc_extended), EM_DBA_ALIGN);
@@ -883,7 +881,7 @@ em_if_attach_pre(if_ctx_t ctx)
 * that it shall give MSI at least a try with other devices.
 */
if (adapter->hw.mac.type == e1000_82574) {
-   scctx->isc_msix_bar = PCIR_BAR(EM_MSIX_BAR);
+   scctx->isc_msix_bar = pci_msix_table_bar(dev);;
} else {
scctx->isc_msix_bar = -1;
scctx->isc_disable_msix = 1;

Modified: head/sys/dev/e1000/if_em.h
==
--- head/sys/dev/e1000/if_em.h  Wed Dec 16 14:36:57 2020(r368697)
+++ head/sys/dev/e1000/if_em.h  Wed Dec 16 14:39:24 2020(r368698)
@@ -316,7 +316,6 @@
 #define EM_BAR_MEM_TYPE_MASK   0x0006
 #define EM_BAR_MEM_TYPE_32BIT  0x
 #define EM_BAR_MEM_TYPE_64BIT  0x0004
-#define EM_MSIX_BAR3   /* On 82575 */
 
 /* More backward compatibility */
 #if __FreeBSD_version < 90
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r368697 - head/sys/arm64/arm64

2020-12-16 Thread Michal Meloun

Author: mmel
Date: Wed Dec 16 14:36:57 2020
New Revision: 368697
URL: https://svnweb.freebsd.org/changeset/base/368697

Log:
  Allocate right number of pages for the bounced buffers crossing the page.
  
  One of the disadvantages of our current busdma code is the fact that
  we process the bounced buffer in a page-by-page manner. This means that
  the short (subpage) buffer allocated across page boundaries is bounced
  to 2 separate pages.
  
  This suboptimal behavior is consistent across all platforms and can be
  related to (probably unimplementable or incompatible with bouncing)
  BUS_DMA_KEEP_PG_OFFSET flag.
  
  Therefore, allocate one additional page to be fully comply with this
  requirement.
  
  Discused with:markj
  PR:   251018

Modified:
  head/sys/arm64/arm64/busdma_bounce.c

Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cWed Dec 16 14:01:04 2020
(r368696)
+++ head/sys/arm64/arm64/busdma_bounce.cWed Dec 16 14:36:57 2020
(r368697)
@@ -297,6 +297,12 @@ bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_si
 
if ((flags & BUS_DMA_ALLOCNOW) != 0) {
struct bounce_zone *bz;
+   /*
+* Round size up to a full page, and add one more page because
+* there can always be one more boundary crossing than the
+* number of pages in a transfer.
+*/
+   maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE;
 
/* Must bounce */
if ((error = alloc_bounce_zone(newtag)) != 0) {
@@ -308,7 +314,7 @@ bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_si
if (ptoa(bz->total_bpages) < maxsize) {
int pages;
 
-   pages = atop(round_page(maxsize)) - bz->total_bpages;
+   pages = atop(maxsize) + 1 - bz->total_bpages;
 
/* Add pages to our bounce pool */
if (alloc_bounce_pages(newtag, pages) < pages)
@@ -436,8 +442,10 @@ bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags
bz = dmat->bounce_zone;
 
/*
-* Attempt to add pages to our pool on a per-instance
-* basis up to a sane limit.
+* Attempt to add pages to our pool on a per-instancebasis up to a sane
+* limit. Even if the tag isn't subject of bouncing due to alignment
+* and boundary constraints, it could still auto-bounce due to
+* cacheline alignment, which requires at most two bounce pages.
 */
if (dmat->common.alignment > 1)
maxpages = MAX_BPAGES;
@@ -446,9 +454,9 @@ bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags
atop(dmat->common.lowaddr));
if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0 ||
(bz->map_count > 0 && bz->total_bpages < maxpages)) {
-   pages = MAX(atop(dmat->common.maxsize), 1);
+   pages = atop(roundup2(dmat->common.maxsize, PAGE_SIZE)) + 1;
pages = MIN(maxpages - bz->total_bpages, pages);
-   pages = MAX(pages, 1);
+   pages = MAX(pages, 2);
if (alloc_bounce_pages(dmat, pages) < pages)
error = ENOMEM;
if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0) {
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Re: svn commit: r368700 - head/sys/dev/e1000

2020-12-16 Thread Michal Meloun





On 16.12.2020 15:48, Jessica Clarke wrote:

Author: jrtc27
Date: Wed Dec 16 14:48:46 2020
New Revision: 368700
URL: https://svnweb.freebsd.org/changeset/base/368700

Log:
   Fix whitespace in r368698
   
   MFC with:	r368698


I just started to be ashamed :(
Thanks for fixing the bugs created by my tangled fingers.
Michal


Modified:
   head/sys/dev/e1000/if_em.c

Modified: head/sys/dev/e1000/if_em.c
==
--- head/sys/dev/e1000/if_em.c  Wed Dec 16 14:47:49 2020(r368699)
+++ head/sys/dev/e1000/if_em.c  Wed Dec 16 14:48:46 2020(r368700)
@@ -847,7 +847,7 @@ em_if_attach_pre(if_ctx_t ctx)
** use a different BAR, so we need to keep
** track of which is used.
*/
-   scctx->isc_msix_bar =  pci_msix_table_bar(dev);
+   scctx->isc_msix_bar = pci_msix_table_bar(dev);
} else if (adapter->hw.mac.type >= em_mac_min) {
scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]* 
sizeof(struct e1000_tx_desc), EM_DBA_ALIGN);
scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * 
sizeof(union e1000_rx_desc_extended), EM_DBA_ALIGN);


___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r367865 - head/sys/kern

2020-11-20 Thread Michal Meloun

Author: mmel
Date: Fri Nov 20 09:05:36 2020
New Revision: 367865
URL: https://svnweb.freebsd.org/changeset/base/367865

Log:
  Also pass interrupt binding request to non-root interrupt controllers.
  There are message based controllers that can bind interrupts even if they are
  not implemented as root controllers (such as the ITS subblock of GIC).
  
  MFC after:3 weeks

Modified:
  head/sys/kern/subr_intr.c

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Fri Nov 20 08:07:29 2020(r367864)
+++ head/sys/kern/subr_intr.c   Fri Nov 20 09:05:36 2020(r367865)
@@ -588,9 +588,6 @@ intr_isrc_assign_cpu(void *arg, int cpu)
struct intr_irqsrc *isrc = arg;
int error;
 
-   if (isrc->isrc_dev != intr_irq_root_dev)
-   return (EINVAL);
-
mtx_lock(_table_lock);
if (cpu == NOCPU) {
CPU_ZERO(>isrc_cpu);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r367447 - in head/sys: kern sys

2020-11-07 Thread Michal Meloun

Author: mmel
Date: Sat Nov  7 14:58:01 2020
New Revision: 367447
URL: https://svnweb.freebsd.org/changeset/base/367447

Log:
  Add a method to determine whether given interrupt is per CPU or not.
  
  MFC after:2 weeks

Modified:
  head/sys/kern/subr_intr.c
  head/sys/sys/intr.h

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Sat Nov  7 13:16:11 2020(r367446)
+++ head/sys/kern/subr_intr.c   Sat Nov  7 14:58:01 2020(r367447)
@@ -946,6 +946,21 @@ intr_resolve_irq(device_t dev, intptr_t xref, struct i
}
 }
 
+bool
+intr_is_per_cpu(struct resource *res)
+{
+   u_int res_id;
+   struct intr_irqsrc *isrc;
+
+   res_id = (u_int)rman_get_start(res);
+   isrc = intr_map_get_isrc(res_id);
+
+   if (isrc == NULL)
+   panic("Attempt to get isrc for non-active resource id: %u\n",
+   res_id);
+   return ((isrc->isrc_flags & INTR_ISRCF_PPI) != 0);
+}
+
 int
 intr_activate_irq(device_t dev, struct resource *res)
 {

Modified: head/sys/sys/intr.h
==
--- head/sys/sys/intr.h Sat Nov  7 13:16:11 2020(r367446)
+++ head/sys/sys/intr.h Sat Nov  7 14:58:01 2020(r367447)
@@ -115,6 +115,7 @@ int intr_pic_deregister(device_t, intptr_t);
 int intr_pic_claim_root(device_t, intptr_t, intr_irq_filter_t *, void *, 
u_int);
 struct intr_pic *intr_pic_add_handler(device_t, struct intr_pic *,
 intr_child_irq_filter_t *, void *, uintptr_t, uintptr_t);
+bool intr_is_per_cpu(struct resource *);
 
 extern device_t intr_irq_root_dev;
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r367268 - head/sys/arm64/arm64

2020-11-02 Thread Michal Meloun

Author: mmel
Date: Mon Nov  2 08:26:19 2020
New Revision: 367268
URL: https://svnweb.freebsd.org/changeset/base/367268

Log:
  Improve loading of multipage aligned buffers.
  
  The multipage alignment requirements is incompatible with many aspects
  of actual busdma code. Multi-page alignment requests are incompatible
  with many aspects of current busdma code. Mainly with partially bounced
  buffer segments and per-page loop in bus_dmamap_load_buffer(). Because
  proper implementation would be a major restructuring of the code, add
  the fix only for already known uses and do KASSERT for all other cases.
  
  For this reason, bus_dmamap_load_buffer () should take the memory allocated
  by bus_dmam_alloc () as one segment bypassing per page segmentation. We can
  do this because it is guaranteed that the memory is physically continuous.
  
  Reviewed by:  bz
  Tested by:imp, mv, daniel.engberg.lists_pyret.net, kjopek_gmail.com
  Differential Revision: https://reviews.freebsd.org/D26735

Modified:
  head/sys/arm64/arm64/busdma_bounce.c

Modified: head/sys/arm64/arm64/busdma_bounce.c
==
--- head/sys/arm64/arm64/busdma_bounce.cMon Nov  2 06:16:11 2020
(r367267)
+++ head/sys/arm64/arm64/busdma_bounce.cMon Nov  2 08:26:19 2020
(r367268)
@@ -501,13 +501,6 @@ static int
 bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
 bus_dmamap_t *mapp)
 {
-   /*
-* XXX ARM64TODO:
-* This bus_dma implementation requires IO-Coherent architecutre.
-* If IO-Coherency is not guaranteed, the BUS_DMA_COHERENT flag has
-* to be implented using non-cacheable memory.
-*/
-
vm_memattr_t attr;
int mflags;
 
@@ -830,7 +823,19 @@ bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dm
sgsize = MIN(buflen, dmat->common.maxsegsz);
if (map->pagesneeded != 0 &&
must_bounce(dmat, map, curaddr, sgsize)) {
-   sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
+   /*
+* The attempt to split a physically continuous buffer
+* seems very controversial, it's unclear whether we
+* can do this in all cases. Also, memory for bounced
+* buffers is allocated as pages, so we cannot
+* guarantee multipage alignment.
+*/
+   KASSERT(dmat->common.alignment <= PAGE_SIZE,
+   ("bounced buffer cannot have alignment bigger "
+   "than PAGE_SIZE: %lu", dmat->common.alignment));
+   sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
+   sgsize = roundup2(sgsize, dmat->common.alignment);
+   sgsize = MIN(sgsize, dmat->common.maxsegsz);
curaddr = add_bounce_page(dmat, map, 0, curaddr,
sgsize);
} else if ((map->flags & DMAMAP_COHERENT) == 0) {
@@ -843,11 +848,11 @@ bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dm
sl++;
sl->vaddr = 0;
sl->paddr = curaddr;
-   sl->datacount = sgsize;
sl->pages = PHYS_TO_VM_PAGE(curaddr);
KASSERT(sl->pages != NULL,
("%s: page at PA:0x%08lx is not in "
"vm_page_array", __func__, curaddr));
+   sl->datacount = sgsize;
} else
sl->datacount += sgsize;
}
@@ -880,6 +885,11 @@ bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_
vm_offset_t kvaddr, vaddr, sl_vend;
int error;
 
+   KASSERT((map->flags & DMAMAP_FROM_DMAMEM) != 0 ||
+   dmat->common.alignment <= PAGE_SIZE,
+   ("loading user buffer with alignment bigger than PAGE_SIZE is not "
+   "supported"));
+
if (segs == NULL)
segs = dmat->segments;
 
@@ -895,6 +905,11 @@ bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_
}
}
 
+   /*
+* XXX Optimally we should parse input buffer for physically
+* continuous segments first and then pass these segment into
+* load loop.
+*/
sl = map->slist + map->sync_count - 1;
vaddr = (vm_offset_t)buf;
sl_pend = 0;
@@ -916,15 +931,25 @@ bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_
 * Compute the segment size, and adjust counts.
 */
max_sgsize = MIN(buflen, dmat->common.maxsegsz);
-   sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
+   if ((map->flags &

svn commit: r290647 - head/sys/arm/arm

2015-11-10 Thread Michal Meloun

Author: mmel
Date: Tue Nov 10 11:45:41 2015
New Revision: 290647
URL: https://svnweb.freebsd.org/changeset/base/290647

Log:
  ARM: Improve robustness of locore_v6.S and fix errors.
  - boot page table is not allocated in data section, so must be
cleared before use
  - map only one section (1 MB) for SOCDEV mapping (*)
  - DSB must be used for ensuring of finishing TLB operations
  - Invalidate BTB when appropriate
  
  PR:   198360
  Reported by:  Daisuke Aoyama  (*)
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/locore-v6.S

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.STue Nov 10 11:28:02 2015
(r290646)
+++ head/sys/arm/arm/locore-v6.STue Nov 10 11:45:41 2015
(r290647)
@@ -142,9 +142,11 @@ ASENTRY_NP(_start)
orr r7, #CPU_CONTROL_AFLT_ENABLE
orr r7, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r7)
+   DSB
ISB
bl  dcache_inv_poc_all
mcr CP15_ICIALLU
+   DSB
ISB
 
/*
@@ -155,6 +157,14 @@ ASENTRY_NP(_start)
adr r0, Lpagetable
bl  translate_va_to_pa
 
+   /* Clear boot page table */
+   mov r1, r0
+   mov r2, L1_TABLE_SIZE
+   mov r3,#0
+1: str r3, [r1], #4
+   subsr2, #4
+   bgt 1b
+
/*
 * Map PA == VA
 */
@@ -174,9 +184,10 @@ ASENTRY_NP(_start)
bl  build_pagetables
 
 #if defined(SOCDEV_PA) && defined(SOCDEV_VA)
-   /* Create the custom map used for early_printf(). */
+   /* Create the custom map (1MB) used for early_printf(). */
ldr r1, =SOCDEV_PA
ldr r2, =SOCDEV_VA
+   mov r3, #1
bl  build_pagetables
 #endif
bl  init_mmu
@@ -300,7 +311,9 @@ ASENTRY_NP(init_mmu)
ISB
mcr CP15_TLBIALL/* Flush TLB */
mcr CP15_BPIALL /* Flush Branch predictor */
+   DSB
ISB
+
mov pc, lr
 END(init_mmu)
 
@@ -328,6 +341,7 @@ ASENTRY_NP(reinit_mmu)
bl  dcache_inv_pou_all
 #endif
mcr CP15_ICIALLU
+   DSB
ISB
 
/* Set auxiliary register */
@@ -336,6 +350,7 @@ ASENTRY_NP(reinit_mmu)
eor r8, r8, r6  /* Set bits */
teq r7, r8
mcrne   CP15_ACTLR(r8)
+   DSB
ISB
 
/* Enable caches. */
@@ -350,8 +365,8 @@ ASENTRY_NP(reinit_mmu)
DSB
ISB
 
-   /* Flush all TLBs */
-   mcr CP15_TLBIALL
+   mcr CP15_TLBIALL/* Flush TLB */
+   mcr CP15_BPIALL /* Flush Branch predictor */
DSB
ISB
 
@@ -362,6 +377,7 @@ ASENTRY_NP(reinit_mmu)
bl  dcache_inv_pou_all
 #endif
mcr CP15_ICIALLU
+   DSB
ISB
 
pop {r4-r11, pc}
@@ -453,11 +469,13 @@ ASENTRY_NP(mpentry)
orr r0, #CPU_CONTROL_AFLT_ENABLE
orr r0, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r0)
+   DSB
ISB
 
/* Invalidate L1 cache I+D cache */
bl  dcache_inv_pou_all
mcr CP15_ICIALLU
+   DSB
ISB
 
/* Find the delta between VA and PA */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r290648 - head/sys/arm/include

2015-11-10 Thread Michal Meloun

Author: mmel
Date: Tue Nov 10 12:02:41 2015
New Revision: 290648
URL: https://svnweb.freebsd.org/changeset/base/290648

Log:
  ARM: Remove trailing whitespace from sys/arm/include
  No functional changes.
  
  Approved by:kib (mentor)

Modified:
  head/sys/arm/include/_stdint.h
  head/sys/arm/include/armreg.h
  head/sys/arm/include/asm.h
  head/sys/arm/include/atags.h
  head/sys/arm/include/atomic-v4.h
  head/sys/arm/include/board.h
  head/sys/arm/include/bus.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/devmap.h
  head/sys/arm/include/disassem.h
  head/sys/arm/include/endian.h
  head/sys/arm/include/pcb.h
  head/sys/arm/include/pcpu.h
  head/sys/arm/include/physmem.h
  head/sys/arm/include/pl310.h

Modified: head/sys/arm/include/_stdint.h
==
--- head/sys/arm/include/_stdint.h  Tue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/_stdint.h  Tue Nov 10 12:02:41 2015
(r290648)
@@ -139,7 +139,7 @@
  * 7.18.3  Limits of other integer types
  */
 /* Limits of ptrdiff_t. */
-#definePTRDIFF_MIN INT32_MIN   
+#definePTRDIFF_MIN INT32_MIN
 #definePTRDIFF_MAX INT32_MAX
 
 /* Limits of sig_atomic_t. */

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Tue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/armreg.h   Tue Nov 10 12:02:41 2015
(r290648)
@@ -285,7 +285,7 @@
* in r0 steppings. See errata
* 364296.
*/
-/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */   
+/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */
 #defineARM1176_AUXCTL_PHD  0x1000 /* inst. prefetch halting 
disable */
 #defineARM1176_AUXCTL_BFD  0x2000 /* branch folding disable */
 #defineARM1176_AUXCTL_FSD  0x4000 /* force speculative ops 
disable */

Modified: head/sys/arm/include/asm.h
==
--- head/sys/arm/include/asm.h  Tue Nov 10 11:45:41 2015(r290647)
+++ head/sys/arm/include/asm.h  Tue Nov 10 12:02:41 2015(r290648)
@@ -167,7 +167,7 @@
 #else
 #define __FBSDID(s) /* nothing */
 #endif
-   
+
 
 #defineWEAK_ALIAS(alias,sym)   
\
.weak alias;\

Modified: head/sys/arm/include/atags.h
==
--- head/sys/arm/include/atags.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/atags.hTue Nov 10 12:02:41 2015
(r290648)
@@ -64,7 +64,7 @@ struct arm_lbabi_core
uint32_t pagesize;
uint32_t rootdev;
 };
-   
+
 /*
  * ATAG_MEM data -- Can be more than one to describe different
  * banks.
@@ -75,7 +75,7 @@ struct arm_lbabi_mem32
uint32_t start; /* start of physical memory */
 };
 
-/* 
+/*
  * ATAG_INITRD2 - Compressed ramdisk image details
  */
 struct arm_lbabi_initrd
@@ -92,7 +92,7 @@ struct arm_lbabi_serial_number
uint32_t low;
uint32_t high;
 };
-   
+
 /*
  * ATAG_REVISION - board revision
  */
@@ -100,7 +100,7 @@ struct arm_lbabi_revision
 {
uint32_t rev;
 };
-   
+
 /*
  * ATAG_CMDLINE - Command line from uboot
  */
@@ -109,7 +109,7 @@ struct arm_lbabi_command_line
char command[1];/* Minimum command length */
 };
 
-struct arm_lbabi_tag 
+struct arm_lbabi_tag
 {
struct arm_lbabi_header tag_hdr;
union {

Modified: head/sys/arm/include/atomic-v4.h
==
--- head/sys/arm/include/atomic-v4.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/atomic-v4.hTue Nov 10 12:02:41 2015
(r290648)
@@ -116,7 +116,7 @@ static __inline u_int32_t
 atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile 
u_int32_t newval)
 {
int ret;
-   
+
__with_interrupts_disabled(
 {
if (*p == cmpval) {
@@ -133,7 +133,7 @@ static __inline u_int64_t
 atomic_cmpset_64(volatile u_int64_t *p, volatile u_int64_t cmpval, volatile 
u_int64_t newval)
 {
int ret;
-   
+
__with_interrupts_disabled(
 {
if (*p == cmpval) {

Modified: head/sys/arm/include/board.h
==
--- head/sys/arm/include/board.hTue Nov 10 11:45:41 2015
(r290647)
+++ head/sys/arm/include/board.hTue Nov 10 12:02:41 2015
(r290648)
@@ -37,7 +37,7 @@ struct arm_board {

svn commit: r290661 - head/sys/arm/include

2015-11-10 Thread Michal Meloun

Author: mmel
Date: Tue Nov 10 13:47:28 2015
New Revision: 290661
URL: https://svnweb.freebsd.org/changeset/base/290661

Log:
  ARM: Refactor interrupt_enable/disable/restore.
  Allow manipulation with PSR_A bit on ARMv6+.
  Remove declaration of unused functions.
  
  This effectively enables asynchronous aborts on early bootstrap stage,
  which previously was not enabled due to an error in enable_interrupts().
  
  PR:   201434
  Reported by:  Gregory Soutade 
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Nov 10 13:32:05 2015
(r290660)
+++ head/sys/arm/include/cpufunc.h  Tue Nov 10 13:47:28 2015
(r290661)
@@ -47,6 +47,7 @@
 #ifdef _KERNEL
 
 #include 
+#include 
 #include 
 #include  /* For in[bwl] and out[bwl] */
 
@@ -520,45 +521,54 @@ void  xscalec3_context_switch (void);
 /*
  * Macros for manipulating CPU interrupts
  */
-static __inline u_int32_t __set_cpsr_c(u_int bic, u_int eor) 
__attribute__((__unused__));
+#if __ARM_ARCH < 6
+#define__ARM_INTR_BITS (PSR_I | PSR_F)
+#else
+#define__ARM_INTR_BITS (PSR_I | PSR_F | PSR_A)
+#endif
 
-static __inline u_int32_t
-__set_cpsr_c(u_int bic, u_int eor)
+static __inline uint32_t
+__set_cpsr(uint32_t bic, uint32_t eor)
 {
-   u_int32_t   tmp, ret;
+   uint32_ttmp, ret;
 
__asm __volatile(
-   "mrs %0, cpsr\n"/* Get the CPSR */
-   "bic %1, %0, %2\n"  /* Clear bits */
-   "eor %1, %1, %3\n"  /* XOR bits */
-   "msr cpsr_c, %1\n"  /* Set the control field of CPSR */
+   "mrs %0, cpsr\n"/* Get the CPSR */
+   "bic %1, %0, %2\n"  /* Clear bits */
+   "eor %1, %1, %3\n"  /* XOR bits */
+   "msr cpsr_xc, %1\n" /* Set the CPSR */
: "=" (ret), "=" (tmp)
: "r" (bic), "r" (eor) : "memory");
 
return ret;
 }
 
-#defineARM_CPSR_F32(1 << 6)/* FIQ disable */
-#defineARM_CPSR_I32(1 << 7)/* IRQ disable */
+static __inline uint32_t
+disable_interrupts(uint32_t mask)
+{
 
-#define disable_interrupts(mask)   \
-   (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32),   \
- (mask) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
-
-#define enable_interrupts(mask)
\
-   (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32), 0))
-
-#define restore_interrupts(old_cpsr)   \
-   (__set_cpsr_c((ARM_CPSR_I32 | ARM_CPSR_F32),\
- (old_cpsr) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
+   return (__set_cpsr(mask & __ARM_INTR_BITS, mask & __ARM_INTR_BITS));
+}
+
+static __inline uint32_t
+enable_interrupts(uint32_t mask)
+{
+
+   return (__set_cpsr(mask & __ARM_INTR_BITS, 0));
+}
+
+static __inline uint32_t
+restore_interrupts(uint32_t old_cpsr)
+{
+
+   return (__set_cpsr(__ARM_INTR_BITS, old_cpsr & __ARM_INTR_BITS));
+}
 
 static __inline register_t
 intr_disable(void)
 {
-   register_t s;
 
-   s = disable_interrupts(ARM_CPSR_I32 | ARM_CPSR_F32);
-   return (s);
+   return (disable_interrupts(PSR_I | PSR_F));
 }
 
 static __inline void
@@ -567,10 +577,7 @@ intr_restore(register_t s)
 
restore_interrupts(s);
 }
-
-/* Functions to manipulate the CPSR. */
-u_int  SetCPSR(u_int bic, u_int eor);
-u_int  GetCPSR(void);
+#undef __ARM_INTR_BITS
 
 /*
  * Functions to manipulate cpu r13
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r290234 - head/share/misc

2015-11-01 Thread Michal Meloun

Author: mmel
Date: Sun Nov  1 16:54:55 2015
New Revision: 290234
URL: https://svnweb.freebsd.org/changeset/base/290234

Log:
  Install myself as src committer.
  
  Approved by:  kib (mentor)
  > Description of fields to fill in above: 76 columns --|
  > PR:   If a GNATS PR is affected by the change.
  > Submitted by: If someone else sent in the change.
  > Reviewed by:  If someone else reviewed your modification.
  > Approved by:  If you needed approval for this commit.
  > Obtained from:If the change is from a third party.
  > MFC after:N [day[s]|week[s]|month[s]].  Request a reminder 
email.
  > MFH:  Ports tree branch name.  Request approval for 
merge.
  > Relnotes: Set to 'yes' for mention in release notes.
  > Security: Vulnerability reference (one per line) or 
description.
  > Sponsored by: If the change was sponsored by an organization.
  > Differential Revision:https://reviews.freebsd.org/D### (*full* phabric 
URL needed).
  > Empty fields above will be automatically removed.
  
  Mshare/misc/committers-src.dot

Modified:
  head/share/misc/committers-src.dot

Modified: head/share/misc/committers-src.dot
==
--- head/share/misc/committers-src.dot  Sun Nov  1 12:00:55 2015
(r290233)
+++ head/share/misc/committers-src.dot  Sun Nov  1 16:54:55 2015
(r290234)
@@ -235,6 +235,7 @@ melifaro [label="Alexander V. Chernikov\
 mjacob [label="Matt Jacob\nmja...@freebsd.org\n1997/08/13"]
 mjg [label="Mateusz Guzik\n...@freebsd.org\n2012/06/04"]
 mlaier [label="Max Laier\nmla...@freebsd.org\n2004/02/10"]
+mmel [label="Michal Meloun\nm...@freebsd.org\n2015/11/01"]
 monthadar [label="Monthadar Al Jaberi\nmontha...@freebsd.org\n2012/04/02"]
 mp [label="Mark Peek\n...@freebsd.org\n2001/07/27"]
 mr [label="Michael Reifenberger\n...@freebsd.org\n2001/09/30"]
@@ -572,6 +573,7 @@ kib -> jlh
 kib -> jpaetzel
 kib -> lulf
 kib -> melifaro
+kib -> mmel
 kib -> pho
 kib -> pluknet
 kib -> rdivacky
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Re: svn commit: r289759 - in head/sys/arm: arm include

2015-11-01 Thread Michal Meloun

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

Dne 01.11.2015 v 14:01 Jason Harmening napsal(a):
> 
> 
> On Sat, Oct 31, 2015 at 4:55 AM, Jason Harmening 
> >
> wrote:
> 
> 
> 
> On 10/31/15 03:21, Ganbold Tsagaankhuu wrote:
>> On Fri, Oct 23, 2015 at 12:38 AM, Jason A. Harmening
> >
>> wrote:
>> 
>>> Author: jah Date: Thu Oct 22 16:38:01 2015 New Revision:
>>> 289759 URL: https://svnweb.freebsd.org/changeset/base/289759
>>> 
>>> Log: Use pmap_quick* functions in armv6 busdma, for bounce
>>> buffers
> and cache
>>> maintenance.  This makes it safe to sync buffers that have no
>>> VA
> mapping
>>> associated with the busdma map, but may have other mappings,
> possibly on
>>> different CPUs.  This also makes it safe to sync unmapped
>>> bounce
> buffers in
>>> non-sleepable thread contexts.
>>> 
>>> Similar to r286787 for x86, this treats userspace buffers the
> same as
>>> unmapped buffers and no longer borrows the UVA for sync
>>> operations.
>>> 
>>> Submitted by: Svatopluk Kraus  > (earlier
>>> revision) Tested by:Svatopluk Kraus Differential Revision:
>>> https://reviews.freebsd.org/D3869
>> 
>> 
>> 
>> It seems I can't boot Odroid C1 with this change.
>> 
>> http://pastebin.ca/3227678
>> 
>> r289758 works for me.
>> 
>> Am I missing something?
>> 
>> thanks,
>> 
>> Ganbold
>> 
>> 
> 
> Hmmm, the fault address of 0x20 and the fact that this is
> happening during mi_startup() make me wonder if the per-cpu
> pageframes used by pmap_quick* haven't been initialized yet.
> 
> I wonder if changing the order of qpages_init in 
> sys/arm/arm/pmap-v6[-new].c to something other than SI_ORDER_ANY 
> would help?
> 
> It seems like we'd want SI_ORDER_FOURTH or SI_ORDER_MIDDLE, since 
> mp_start() is SI_ORDER_THIRD.
> 
> It would be nice to know what's calling bus_dmamap_sync() in this
> case. I can't figure that out, but maybe that's because I haven't
> had coffee yet.
> 
> 
> Can you build the kernel with 'options VERBOSE_SYSINIT' ? That will
> add some spew to the boot log, but it should confirm whether this
> is a sysinit ordering issue.
> 

The problem is already identified.
ARM uses VM_PHYSSEG_SPARSE memory. This means that not all used memory
is backed by vm_page_array, i.e kernel code, data, bss sections and
initial CPU stacks are outside of this array.
Unfortunately, some drivers (MMC for example) initiates DMA transfer
to buffers on initial stack, (statically allocated buffers in bss or
data section is second example). I have prepared (idea quality) patch,
and I can confirm that works (for Ganbold).
See: https://gist.github.com/strejda/d5ca3ed202427a2e0557

Michal

-BEGIN PGP SIGNATURE-
Version: GnuPG v2

iQEcBAEBCAAGBQJWNhRJAAoJEGkesmtexaqq4g8H/imNISydjQC667Xh3Xe+wp3g
2yL3y1vijJwoIjIwhXC8UdFY1cTh4h7eReVPA6emreo2IFWPADWXbtHjJP50x/Sy
SVT3vteQu2Z8EOrPdUxbVJQFs/ZA2wLHWKsKQruuFQzdyE+zd52G/L77nodmU4+O
Zrq3NACqGp9/VPNQtwlMx347wE4V/a6QHYE2jh+s9rp1zkt/MhoTZWDmgNMRn1KR
eiIfXf48l2m6TsRMTdJlroa5Vaxv8QWfx7aqO6/5XSu1MyGuxbeD51iJkNsUYO42
nzP+nodx5xonyPgtLbqWPwFpTM8//ipLCBWF2w0VYws/N4FcCNChbxS0fLL3Fho=
=PfNh
-END PGP SIGNATURE-
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

Re: svn commit: r290234 - head/share/misc

2015-11-02 Thread Michal Meloun

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

Dne 02.11.2015 v 11:37 Gleb Smirnoff napsal(a):
> On Mon, Nov 02, 2015 at 07:13:46AM +, Alexey Dokuchaev wrote: 
> A> On Sun, Nov 01, 2015 at 04:54:55PM +0000, Michal Meloun wrote: 
> A> > New Revision: 290234 A> > URL:
> https://svnweb.freebsd.org/changeset/base/290234 A> > A> > Log: A>
> >   Install myself as src committer. A> > A> >   Approved by: kib
> (mentor) A> >   > Description of fields to fill in above:
> 76 columns --| A> >   [ garbage omitteed ] A> A> Here is a small
> advice: do not rely on "svn ci" calling your $EDITOR for A> you,
> compose the message yourself first and then do "svn ci -F
> $logfile". A> For one-liners, "svn ci -m message" works even
> better.
> 
> Alternatively: rely on $EDITOR, but don't trust the line:
> 
> --This line, and those below, will be ignored--
> 
> Finalize your message manually.
> 
> P.S. Not that there is bugs in the svn, but you can have touched
> the line.
> 

I'm sorry to all, it’s my bug.
Commit using editor (but using git) is standard practice here @work.
So I automatically select same workflow for FreeBSD.
Anyway, I already got hit from kib@, so I'll use a file for commit log
next time.

But i'm pretty sure that i have not touched template.
I only deleted all prepared unfilled lines (for PR:, MFC: ...)
and then i paste commit message.
And, ironically, only

- --This line, and those below, will be ignored--

line has been omitted from real commit log.

Michal




-BEGIN PGP SIGNATURE-
Version: GnuPG v2

iQEcBAEBCAAGBQJWN01GAAoJEGkesmtexaqqGvEIAICYBFTeblZZ+C3Y82JqN97h
fnFHNG0wyJEhj9a4jDBWyAJldU4kesa2XHw2I8dGIUB9Iz+Vp0nnib5WIvhWPL7S
t1NdQDyy9MELAXx0v4wNnyDexl+YYM9nEGvQokesFV/V0vI+6WctjMM8S8tnRs1e
hVu80ZgbvJOTTV6OuNl9/Cjo4oPeh3IWZMlLuYP95pV4vzlgoF6CPimrdki8gVMX
dW/9DUIJd1bX73LYoCtwfM0WZEFFbbgrpBO8DJbSWEmx1hJUQmk5mYE8jUYDk9Ot
8wxE+3n1g5ovZUQGREiR5s+3xu7MJ8PSroLIM69kJUvER0pAedXkDphYm/l8v8g=
=s8VI
-END PGP SIGNATURE-
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291018 - head/sys/arm/arm

2015-11-18 Thread Michal Meloun

Author: mmel
Date: Wed Nov 18 16:07:01 2015
New Revision: 291018
URL: https://svnweb.freebsd.org/changeset/base/291018

Log:
  ARM: Fix dma_dcache_sync() for early allocated memory.
  Drivers can request DMA to buffers that are not in memory represented
  in the vm page arrays. Because of this, store KVA of already mapped
  buffer to synclist and use it in dma_dcache_sync().
  
  Reviewed by:  jah
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4120

Modified:
  head/sys/arm/arm/busdma_machdep-v6.c

Modified: head/sys/arm/arm/busdma_machdep-v6.c
==
--- head/sys/arm/arm/busdma_machdep-v6.cWed Nov 18 15:12:24 2015
(r291017)
+++ head/sys/arm/arm/busdma_machdep-v6.cWed Nov 18 16:07:01 2015
(r291018)
@@ -117,8 +117,8 @@ struct bounce_page {
 
 struct sync_list {
vm_offset_t vaddr;  /* kva of client data */
+   bus_addr_t  paddr;  /* physical address */
vm_page_t   pages;  /* starting page of client data */
-   vm_offset_t dataoffs;   /* page offset of client data */
bus_size_t  datacount;  /* client data count */
 };
 
@@ -1076,17 +1076,19 @@ _bus_dmamap_load_phys(bus_dma_tag_t dmat
sgsize);
} else {
if (map->sync_count > 0)
-   sl_end = VM_PAGE_TO_PHYS(sl->pages) +
-   sl->dataoffs + sl->datacount;
+   sl_end = sl->paddr + sl->datacount;
 
if (map->sync_count == 0 || curaddr != sl_end) {
if (++map->sync_count > dmat->nsegments)
break;
sl++;
sl->vaddr = 0;
+   sl->paddr = curaddr;
sl->datacount = sgsize;
sl->pages = PHYS_TO_VM_PAGE(curaddr);
-   sl->dataoffs = curaddr & PAGE_MASK;
+   KASSERT(sl->pages != NULL,
+   ("%s: page at PA:0x%08lx is not in "
+   "vm_page_array", __func__, curaddr));
} else
sl->datacount += sgsize;
}
@@ -1188,8 +1190,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dm
sgsize);
} else {
if (map->sync_count > 0) {
-   sl_pend = VM_PAGE_TO_PHYS(sl->pages) +
-   sl->dataoffs + sl->datacount;
+   sl_pend = sl->paddr + sl->datacount;
sl_vend = sl->vaddr + sl->datacount;
}
 
@@ -1201,9 +1202,17 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dm
goto cleanup;
sl++;
sl->vaddr = kvaddr;
+   sl->paddr = curaddr;
+   if (kvaddr != 0) {
+   sl->pages = NULL;
+   } else {
+   sl->pages = PHYS_TO_VM_PAGE(curaddr);
+   KASSERT(sl->pages != NULL,
+   ("%s: page at PA:0x%08lx is not "
+   "in vm_page_array", __func__,
+   curaddr));
+   }
sl->datacount = sgsize;
-   sl->pages = PHYS_TO_VM_PAGE(curaddr);
-   sl->dataoffs = curaddr & PAGE_MASK;
} else
sl->datacount += sgsize;
}
@@ -1299,10 +1308,10 @@ dma_dcache_sync(struct sync_list *sl, bu
vm_offset_t va, tempva;
bus_size_t size;
 
-   offset = sl->dataoffs;
+   offset = sl->paddr & PAGE_MASK;
m = sl->pages;
size = sl->datacount;
-   pa = VM_PAGE_TO_PHYS(m) | offset;
+   pa = sl->paddr;
 
for ( ; size != 0; size -= len, pa += len, offset = 0, ++m) {
tempva = 0;
@@ -1310,13 +1319,13 @@ dma_dcache_sync(struct sync_list *sl, bu
len = min(PAGE_SIZE - offset, size);
tempva = pmap_quick_enter_page(m);
va = tempva | offset;
+   KASSERT(pa == (VM_PAGE_TO_PHYS(m) | offset),
+   ("unexpected vm_page_t phys: 0x%08x != 0x%08x",
+   VM_PAGE_TO_PHYS(m) | offset, pa));
} else {
len = sl->datacount;

svn commit: r291648 - head/sys/dev/ofw

2015-12-02 Thread Michal Meloun

Author: mmel
Date: Wed Dec  2 14:21:16 2015
New Revision: 291648
URL: https://svnweb.freebsd.org/changeset/base/291648

Log:
  OFW: Move code for searching interrupt parent into separate function.
  It can be used by interrupt controller drivers.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/ofw/ofw_bus_subr.c
  head/sys/dev/ofw/ofw_bus_subr.h

Modified: head/sys/dev/ofw/ofw_bus_subr.c
==
--- head/sys/dev/ofw/ofw_bus_subr.c Wed Dec  2 12:58:20 2015
(r291647)
+++ head/sys/dev/ofw/ofw_bus_subr.c Wed Dec  2 14:21:16 2015
(r291648)
@@ -430,6 +430,27 @@ ofw_bus_reg_to_rl(device_t dev, phandle_
return (0);
 }
 
+/*
+ * Get interrupt parent for given node.
+ * Returns 0 if interrupt parent doesn't exist.
+ */
+phandle_t
+ofw_bus_find_iparent(phandle_t node)
+{
+   phandle_t iparent;
+
+   if (OF_searchencprop(node, "interrupt-parent", ,
+   sizeof(iparent)) == -1) {
+   for (iparent = node; iparent != 0;
+   iparent = OF_parent(iparent)) {
+   if (OF_hasprop(iparent, "interrupt-controller"))
+   break;
+   }
+   iparent = OF_xref_from_node(iparent);
+   }
+   return (iparent);
+}
+
 int
 ofw_bus_intr_to_rl(device_t dev, phandle_t node,
 struct resource_list *rl, int *rlen)
@@ -442,18 +463,11 @@ ofw_bus_intr_to_rl(device_t dev, phandle
nintr = OF_getencprop_alloc(node, "interrupts",  sizeof(*intr),
(void **));
if (nintr > 0) {
-   if (OF_searchencprop(node, "interrupt-parent", ,
-   sizeof(iparent)) == -1) {
-   for (iparent = node; iparent != 0;
-   iparent = OF_parent(iparent)) {
-   if (OF_hasprop(iparent, "interrupt-controller"))
-   break;
-   }
-   if (iparent == 0) {
-   device_printf(dev, "No interrupt-parent found, "
-   "assuming direct parent\n");
-   iparent = OF_parent(node);
-   }
+   iparent = ofw_bus_find_iparent(node);
+   if (iparent == 0) {
+   device_printf(dev, "No interrupt-parent found, "
+   "assuming direct parent\n");
+   iparent = OF_parent(node);
iparent = OF_xref_from_node(iparent);
}
if (OF_searchencprop(OF_node_from_xref(iparent), 

Modified: head/sys/dev/ofw/ofw_bus_subr.h
==
--- head/sys/dev/ofw/ofw_bus_subr.h Wed Dec  2 12:58:20 2015
(r291647)
+++ head/sys/dev/ofw/ofw_bus_subr.h Wed Dec  2 14:21:16 2015
(r291648)
@@ -82,7 +82,7 @@ const char *ofw_bus_get_status(device_t 
 int ofw_bus_status_okay(device_t dev);
 
 /* Helper to get node's interrupt parent */
-void   ofw_bus_find_iparent(phandle_t);
+phandle_t ofw_bus_find_iparent(phandle_t);
 
 /* Helper routine for checking compat prop */
 int ofw_bus_is_compatible(device_t, const char *);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291650 - head/sys/arm/include

2015-12-02 Thread Michal Meloun

Author: mmel
Date: Wed Dec  2 14:24:14 2015
New Revision: 291650
URL: https://svnweb.freebsd.org/changeset/base/291650

Log:
  ARM: Define PCI_RES_BUS resource for platforms having NEW_PCIB enabled.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/resource.h

Modified: head/sys/arm/include/resource.h
==
--- head/sys/arm/include/resource.h Wed Dec  2 14:22:58 2015
(r291649)
+++ head/sys/arm/include/resource.h Wed Dec  2 14:24:14 2015
(r291650)
@@ -42,5 +42,8 @@
 #defineSYS_RES_MEMORY  3   /* i/o memory */
 #defineSYS_RES_IOPORT  4   /* i/o ports */
 #defineSYS_RES_GPIO5   /* general purpose i/o */
+#ifdef NEW_PCIB
+#define PCI_RES_BUS6   /* PCI bus numbers */
+#endif
 
 #endif /* !_MACHINE_RESOURCE_H_ */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291649 - head/sys/arm/arm

2015-12-02 Thread Michal Meloun

Author: mmel
Date: Wed Dec  2 14:22:58 2015
New Revision: 291649
URL: https://svnweb.freebsd.org/changeset/base/291649

Log:
  ARM: Fix of detection of root interrupt controller.
  This fixes detection of root interrupt controller for cases,
  when interrupt parent is not defined at all or it's not defined directly
  in controller node.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Wed Dec  2 14:21:16 2015(r291648)
+++ head/sys/arm/arm/gic.c  Wed Dec  2 14:22:58 2015(r291649)
@@ -461,9 +461,13 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
 
-   i = OF_getencprop(ofw_bus_get_node(dev), "interrupt-parent",
-   , sizeof(pxref));
-   if (i > 0 && xref == pxref) {
+   /*
+* Controller is root if:
+* - doesn't have interrupt parent
+* - his interrupt parent is this controller
+*/
+   pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev));
+   if (pxref == 0 || xref == pxref) {
if (arm_pic_claim_root(dev, xref, arm_gic_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
device_printf(dev, "could not set PIC as a root\n");
@@ -471,6 +475,12 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
} else {
+   if (sc->gic_res[2] == NULL) {
+   device_printf(dev,
+   "not root PIC must have defined interrupt\n");
+   arm_pic_unregister(dev, xref);
+   goto cleanup;
+   }
if (bus_setup_intr(dev, sc->gic_res[2], INTR_TYPE_CLK,
arm_gic_intr, NULL, sc, >gic_intrhand)) {
device_printf(dev, "could not setup irq handler\n");
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r292156 - head/sys/dev/ofw

2015-12-13 Thread Michal Meloun

Author: mmel
Date: Sun Dec 13 08:17:49 2015
New Revision: 292156
URL: https://svnweb.freebsd.org/changeset/base/292156

Log:
  OFW: Add helper functions for parsing xref based lists.
  By using this functions, we can parse a list of tuples, each of them holds
  xref and variable number of values.
  This kind of list is used in DT for clocks, gpios, resets ...
  
  Discussed with:   ian, nwhitehorn
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4316

Modified:
  head/sys/dev/ofw/ofw_bus_subr.c
  head/sys/dev/ofw/ofw_bus_subr.h

Modified: head/sys/dev/ofw/ofw_bus_subr.c
==
--- head/sys/dev/ofw/ofw_bus_subr.c Sun Dec 13 07:39:49 2015
(r292155)
+++ head/sys/dev/ofw/ofw_bus_subr.c Sun Dec 13 08:17:49 2015
(r292156)
@@ -607,3 +607,134 @@ ofw_bus_find_child_device_by_phandle(dev
 
return (retval);
 }
+
+/*
+ * Parse property that contain list of xrefs and values
+ * (like standard "clocks" and "resets" properties)
+ * Input arguments:
+ *  node - consumers device node
+ *  list_name  - name of parsed list - "clocks"
+ *  cells_name - name of size property - "#clock-cells"
+ * Output arguments:
+ *  producer - handle of producer
+ *  ncells   - number of cells in result
+ *  cells- array of decoded cells
+ */
+int
+ofw_bus_parse_xref_list_alloc(phandle_t node, const char *list_name,
+const char *cells_name, int idx, phandle_t *producer, int *ncells,
+pcell_t **cells)
+{
+   phandle_t pnode;
+   phandle_t *elems;
+   uint32_t  pcells;
+   int rv, i, j, nelems, cnt;
+
+   elems = NULL;
+   nelems = OF_getencprop_alloc(node, list_name,  sizeof(*elems),
+   (void **));
+   if (nelems <= 0)
+   return (ENOENT);
+   rv = ENOENT;
+   for (i = 0, cnt = 0; i < nelems; i += pcells, cnt++) {
+   pnode = elems[i++];
+   if (OF_getencprop(OF_node_from_xref(pnode),
+   cells_name, , sizeof(pcells)) == -1) {
+   printf("Missing %s property\n", cells_name);
+   rv = ENOENT;
+   break;
+   }
+
+   if ((i + pcells) > nelems) {
+   printf("Invalid %s property value <%d>\n", cells_name,
+   pcells);
+   rv = ERANGE;
+   break;
+   }
+   if (cnt == idx) {
+   *cells= malloc(pcells * sizeof(**cells), M_OFWPROP,
+   M_WAITOK);
+   *producer = pnode;
+   *ncells = pcells;
+   for (j = 0; j < pcells; j++)
+   (*cells)[j] = elems[i + j];
+   rv = 0;
+   break;
+   }
+   }
+   if (elems != NULL)
+   free(elems, M_OFWPROP);
+   return (rv);
+}
+
+/*
+ * Find index of string in string list property (case sensitive).
+ */
+int
+ofw_bus_find_string_index(phandle_t node, const char *list_name,
+const char *name, int *idx)
+{
+   char *elems;
+   int rv, i, cnt, nelems;
+
+   elems = NULL;
+   nelems = OF_getprop_alloc(node, list_name, 1, (void **));
+   if (nelems <= 0)
+   return (ENOENT);
+
+   rv = ENOENT;
+   for (i = 0, cnt = 0; i < nelems; cnt++) {
+   if (strcmp(elems + i, name) == 0) {
+   *idx = cnt;
+   rv = 0;
+   break;
+   }
+   i += strlen(elems + i) + 1;
+   }
+
+   if (elems != NULL)
+   free(elems, M_OFWPROP);
+   return (rv);
+}
+
+/*
+ * Create zero terminated array of strings from string list property.
+ */
+int
+ofw_bus_string_list_to_array(phandle_t node, const char *list_name,
+   const char ***array)
+{
+   char *elems, *tptr;
+   int i, cnt, nelems, len;
+
+   elems = NULL;
+   nelems = OF_getprop_alloc(node, list_name, 1, (void **));
+   if (nelems <= 0)
+   return (nelems);
+
+   /* Count number of strings. */
+   for (i = 0, cnt = 0; i < nelems; cnt++)
+   i += strlen(elems + i) + 1;
+
+   /* Allocate space for arrays and all strings. */
+   *array = malloc((cnt + 1) * sizeof(char *) + nelems, M_OFWPROP,
+   M_WAITOK);
+
+   /* Get address of first string. */
+   tptr = (char *)(*array + cnt);
+
+   /* Copy strings. */
+   memcpy(tptr, elems, nelems);
+   free(elems, M_OFWPROP);
+
+   /* Fill string pointers. */
+   for (i = 0, cnt = 0; i < nelems; cnt++) {
+   len = strlen(tptr + i) + 1;
+   *array[cnt] = tptr;
+   i += len;
+   tptr += len;
+   }
+   *array[cnt] = 0;
+
+   return (cnt);
+}

Modified: head/sys/dev/ofw/ofw_bus_subr.h

svn commit: r292157 - head/sys/dev/ofw

2015-12-13 Thread Michal Meloun

Author: mmel
Date: Sun Dec 13 08:23:45 2015
New Revision: 292157
URL: https://svnweb.freebsd.org/changeset/base/292157

Log:
  OFW_IICBUS: Register ofw_iicbus node.
  The iicbus can be referenced from other nodes in DT.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/ofw/ofw_iicbus.c

Modified: head/sys/dev/ofw/ofw_iicbus.c
==
--- head/sys/dev/ofw/ofw_iicbus.c   Sun Dec 13 08:17:49 2015
(r292156)
+++ head/sys/dev/ofw/ofw_iicbus.c   Sun Dec 13 08:23:45 2015
(r292157)
@@ -190,6 +190,8 @@ ofw_iicbus_attach(device_t dev)
device_set_ivars(childdev, dinfo);
}
 
+   /* Register bus */
+   OF_device_register_xref(OF_xref_from_node(node), dev);
return (bus_generic_attach(dev));
 }
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r292159 - head/sys/dev/fdt

2015-12-13 Thread Michal Meloun

Author: mmel
Date: Sun Dec 13 09:05:55 2015
New Revision: 292159
URL: https://svnweb.freebsd.org/changeset/base/292159

Log:
  SIMPLEBUS: Don't panic if child device doesn't have devinfo set.
  Strictly speaking, missing devinfo is error which can be caused
  by instantiating child using device_add_child() instead of
  BUS_ADD_CHILD(). However, we can tolerate it.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/dev/fdt/simplebus.c

Modified: head/sys/dev/fdt/simplebus.c
==
--- head/sys/dev/fdt/simplebus.cSun Dec 13 08:27:14 2015
(r292158)
+++ head/sys/dev/fdt/simplebus.cSun Dec 13 09:05:55 2015
(r292159)
@@ -304,6 +304,8 @@ simplebus_get_devinfo(device_t bus __unu
 struct simplebus_devinfo *ndi;
 
 ndi = device_get_ivars(child);
+   if (ndi == NULL)
+   return (NULL);
 return (>obdinfo);
 }
 
@@ -313,6 +315,8 @@ simplebus_get_resource_list(device_t bus
struct simplebus_devinfo *ndi;
 
ndi = device_get_ivars(child);
+   if (ndi == NULL)
+   return (NULL);
return (>rl);
 }
 
@@ -380,6 +384,8 @@ simplebus_print_res(struct simplebus_dev
 {
int rv;
 
+   if (di == NULL)
+   return (0);
rv = 0;
rv += resource_list_print_type(>rl, "mem", SYS_RES_MEMORY, "%#lx");
rv += resource_list_print_type(>rl, "irq", SYS_RES_IRQ, "%ld");
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r292260 - in head/sys/arm: arm include

2015-12-15 Thread Michal Meloun

Author: mmel
Date: Tue Dec 15 12:52:45 2015
New Revision: 292260
URL: https://svnweb.freebsd.org/changeset/base/292260

Log:
  ARM: Remove outdated katelib.h.
  
  Approved by:  kib (mentor)

Deleted:
  head/sys/arm/include/katelib.h
Modified:
  head/sys/arm/arm/trap.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/trap.c
==
--- head/sys/arm/arm/trap.c Tue Dec 15 12:51:58 2015(r292259)
+++ head/sys/arm/arm/trap.c Tue Dec 15 12:52:45 2015(r292260)
@@ -109,6 +109,8 @@ __FBSDID("$FreeBSD$");
 #include 
 #endif
 
+#define ReadWord(a)(*((volatile unsigned int *)(a)))
+
 extern char fusubailout[];
 
 #ifdef DEBUG

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Dec 15 12:51:58 2015
(r292259)
+++ head/sys/arm/include/cpufunc.h  Tue Dec 15 12:52:45 2015
(r292260)
@@ -49,7 +49,6 @@
 #include 
 #include 
 #include 
-#include  /* For in[bwl] and out[bwl] */
 
 static __inline void
 breakpoint(void)
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r292259 - head/sys/arm/conf

2015-12-15 Thread Michal Meloun

Author: mmel
Date: Tue Dec 15 12:51:58 2015
New Revision: 292259
URL: https://svnweb.freebsd.org/changeset/base/292259

Log:
  ARM: option PPC_PROBE_CHIPSET is applicable only for x86. Don't enable it
  for ARM LINT config.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/conf/NOTES

Modified: head/sys/arm/conf/NOTES
==
--- head/sys/arm/conf/NOTES Tue Dec 15 11:20:20 2015(r292258)
+++ head/sys/arm/conf/NOTES Tue Dec 15 12:51:58 2015(r292259)
@@ -58,6 +58,7 @@ nooptions SMP
 nooptions  MAXCPU
 
 nooptions  COMPAT_FREEBSD4
+nooption   PPC_PROBE_CHIPSET
 
 nodevice   fdc
 nodevice   sym
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291424 - head/sys/arm/arm

2015-11-28 Thread Michal Meloun

Author: mmel
Date: Sat Nov 28 12:09:36 2015
New Revision: 291424
URL: https://svnweb.freebsd.org/changeset/base/291424

Log:
  ARM: Cumulative fixes for GIC
   - fix detection of interrupt root controller
   - allow (but warn) unsupported configuration bits
   - dont send EOI for spurious interrupts
   - print more informations for spurious interrupts
   - use device_printf() where appropriate
  
  Reviewed by:  ian (earlier version)
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Sat Nov 28 09:50:52 2015(r291423)
+++ head/sys/arm/arm/gic.c  Sat Nov 28 12:09:36 2015(r291424)
@@ -68,6 +68,8 @@ __FBSDID("$FreeBSD$");
 #include "pic_if.h"
 #endif
 
+#define GIC_DEBUG_SPURIOUS
+
 /* We are using GICv2 register naming */
 
 /* Distributor Registers */
@@ -135,6 +137,9 @@ struct arm_gic_softc {
uint8_t ver;
struct mtx  mutex;
uint32_tnirqs;
+#ifdef GIC_DEBUG_SPURIOUS
+   uint32_tlast_irq[MAXCPU];
+#endif
 };
 
 static struct resource_spec arm_gic_spec[] = {
@@ -287,7 +292,7 @@ arm_gic_init_secondary(device_t dev)
 }
 #endif /* ARM_INTRNG */
 #endif /* SMP */
- 
+
 #ifndef ARM_INTRNG
 int
 gic_decode_fdt(phandle_t iparent, pcell_t *intr, int *interrupt,
@@ -335,11 +340,10 @@ gic_decode_fdt(phandle_t iparent, pcell_
 */
if (fdt32_to_cpu(intr[2]) & 0x0a) {
printf("unsupported trigger/polarity configuration "
-   "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
-   return (ENOTSUP);
+   "0x%02x\n", fdt32_to_cpu(intr[2]) & 0x0f);
}
*pol  = INTR_POLARITY_CONFORM;
-   if (fdt32_to_cpu(intr[2]) & 0x01)
+   if (fdt32_to_cpu(intr[2]) & 0x03)
*trig = INTR_TRIGGER_EDGE;
else
*trig = INTR_TRIGGER_LEVEL;
@@ -367,6 +371,7 @@ arm_gic_attach(device_t dev)
int i;
uint32_ticciidr;
 #ifdef ARM_INTRNG
+   phandle_t   pxref;
intptr_txref = gic_xref(dev);
 #endif
 
@@ -456,7 +461,9 @@ arm_gic_attach(device_t dev)
goto cleanup;
}
 
-   if (sc->gic_res[2] == NULL) {
+   i = OF_getencprop(ofw_bus_get_node(dev), "interrupt-parent",
+   , sizeof(pxref));
+   if (i > 0 && xref == pxref) {
if (arm_pic_claim_root(dev, xref, arm_gic_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
device_printf(dev, "could not set PIC as a root\n");
@@ -472,6 +479,7 @@ arm_gic_attach(device_t dev)
}
}
 
+   OF_device_register_xref(xref, dev);
return (0);
 
 cleanup:
@@ -516,8 +524,11 @@ arm_gic_intr(void *arg)
 */
 
if (irq >= sc->nirqs) {
-   device_printf(sc->gic_dev, "Spurious interrupt detected\n");
-   gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
+#ifdef GIC_DEBUG_SPURIOUS
+   device_printf(sc->gic_dev,
+   "Spurious interrupt detected: last irq: %d on CPU%d\n",
+   sc->last_irq[PCPU_GET(cpuid)], PCPU_GET(cpuid));
+#endif
return (FILTER_HANDLED);
}
 
@@ -542,12 +553,16 @@ dispatch_irq:
arm_ipi_dispatch(isrc, tf);
goto next_irq;
 #else
-   printf("SGI %u on UP system detected\n", irq - GIC_FIRST_SGI);
+   device_printf(sc->gic_dev, "SGI %u on UP system detected\n",
+   irq - GIC_FIRST_SGI);
gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
goto next_irq;
 #endif
}
 
+#ifdef GIC_DEBUG_SPURIOUS
+   sc->last_irq[PCPU_GET(cpuid)] = irq;
+#endif
if (isrc->isrc_trig == INTR_TRIGGER_EDGE)
gic_c_write_4(sc, GICC_EOIR, irq_active_reg);
 
@@ -729,12 +744,12 @@ gic_map_fdt(struct arm_gic_softc *sc, st
 */
tripol = isrc->isrc_cells[2];
if (tripol & 0x0a) {
-   printf("unsupported trigger/polarity configuration "
-   "0x%2x\n", tripol & 0x0f);
-   return (ENOTSUP);
+   device_printf(sc->gic_dev,
+  "unsupported trigger/polarity configuration "
+  "0x%02x\n",  tripol & 0x0f);
}
pol = INTR_POLARITY_CONFORM;
-   if (tripol & 0x01)
+   if (tripol & 0x03)
trig = INTR_TRIGGER_EDGE;
else
trig = INTR_TRIGGER_LEVEL;
@@ -911,7 +926,8 @@ arm_gic_next_irq(struct arm_gic_softc *s
 
if (active_irq == 0x3FF) {
if (last_irq ==

svn commit: r291426 - head/sys/arm/include

2015-11-28 Thread Michal Meloun

Author: mmel
Date: Sat Nov 28 12:12:28 2015
New Revision: 291426
URL: https://svnweb.freebsd.org/changeset/base/291426

Log:
  ARM: Implement atomic_swap_int(9). It's used in DRM2 code.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/include/atomic-v4.h
  head/sys/arm/include/atomic-v6.h
  head/sys/arm/include/atomic.h

Modified: head/sys/arm/include/atomic-v4.h
==
--- head/sys/arm/include/atomic-v4.hSat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic-v4.hSat Nov 28 12:12:28 2015
(r291426)
@@ -363,6 +363,13 @@ atomic_readandclear_32(volatile u_int32_
return (__swp(0, p));
 }
 
+static __inline uint32_t
+atomic_swap_32(volatile u_int32_t *p, u_int32_t v)
+{
+
+   return (__swp(v, p));
+}
+
 #define atomic_cmpset_rel_32   atomic_cmpset_32
 #define atomic_cmpset_acq_32   atomic_cmpset_32
 #define atomic_set_rel_32  atomic_set_32

Modified: head/sys/arm/include/atomic-v6.h
==
--- head/sys/arm/include/atomic-v6.hSat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic-v6.hSat Nov 28 12:12:28 2015
(r291426)
@@ -641,6 +641,25 @@ atomic_testandset_64(volatile uint64_t *
return (atomic_testandset_32(p32, v));
 }
 
+static __inline uint32_t
+atomic_swap_32(volatile uint32_t *p, uint32_t v)
+{
+   uint32_t ret, exflag;
+
+   __asm __volatile(
+   "1: ldrex   %[ret], [%[ptr]]\n"
+   "   strex   %[exf], %[val], [%[ptr]]\n"
+   "   teq %[exf], #0  \n"
+   "   it  ne  \n"
+   "   bne 1b  \n"
+   : [ret] "=r"  (ret),
+ [exf] "=" (exflag)
+   : [val] "r"  (v),
+ [ptr] "r"  (p)
+   : "cc", "memory");
+   return (ret);
+}
+
 #undef ATOMIC_ACQ_REL
 #undef ATOMIC_ACQ_REL_LONG
 

Modified: head/sys/arm/include/atomic.h
==
--- head/sys/arm/include/atomic.h   Sat Nov 28 12:11:44 2015
(r291425)
+++ head/sys/arm/include/atomic.h   Sat Nov 28 12:12:28 2015
(r291426)
@@ -109,5 +109,6 @@ atomic_store_long(volatile u_long *dst, 
 #define atomic_readandclear_intatomic_readandclear_32
 #define atomic_load_acq_intatomic_load_acq_32
 #define atomic_store_rel_int   atomic_store_rel_32
+#define atomic_swap_intatomic_swap_32
 
 #endif /* _MACHINE_ATOMIC_H_ */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291425 - in head/sys/arm: arm include

2015-11-28 Thread Michal Meloun

Author: mmel
Date: Sat Nov 28 12:11:44 2015
New Revision: 291425
URL: https://svnweb.freebsd.org/changeset/base/291425

Log:
  ARM: Add support for new KRAIT 300 CPU revision.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/armreg.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sat Nov 28 12:09:36 2015(r291424)
+++ head/sys/arm/arm/cpufunc.c  Sat Nov 28 12:11:44 2015(r291425)
@@ -910,7 +910,8 @@ set_cpufuncs()
cputype == CPU_ID_CORTEXA15R1 ||
cputype == CPU_ID_CORTEXA15R2 ||
cputype == CPU_ID_CORTEXA15R3 ||
-   cputype == CPU_ID_KRAIT ) {
+   cputype == CPU_ID_KRAIT300R0 ||
+   cputype == CPU_ID_KRAIT300R1 ) {
cpufuncs = cortexa_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
get_cachetype_cp15();

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Sat Nov 28 12:09:36 2015(r291424)
+++ head/sys/arm/arm/identcpu.c Sat Nov 28 12:11:44 2015(r291425)
@@ -197,7 +197,9 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA15R3,   CPU_CLASS_CORTEXA,  "Cortex A15-r3",
  generic_steppings },
-   { CPU_ID_KRAIT, CPU_CLASS_KRAIT,"Krait",
+   { CPU_ID_KRAIT300R0,CPU_CLASS_KRAIT,"Krait 300-r0",
+ generic_steppings },
+   { CPU_ID_KRAIT300R1,CPU_CLASS_KRAIT,"Krait 300-r1",
  generic_steppings },
 
{ CPU_ID_80200, CPU_CLASS_XSCALE,   "i80200",

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Sat Nov 28 12:09:36 2015
(r291424)
+++ head/sys/arm/include/armreg.h   Sat Nov 28 12:11:44 2015
(r291425)
@@ -139,7 +139,9 @@
 #define CPU_ID_CORTEXA15R1 0x411fc0f0
 #define CPU_ID_CORTEXA15R2 0x412fc0f0
 #define CPU_ID_CORTEXA15R3 0x413fc0f0
-#defineCPU_ID_KRAIT0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
+#defineCPU_ID_KRAIT300R0   0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
+#defineCPU_ID_KRAIT300R1   0x511f06f0
+
 #defineCPU_ID_TI925T   0x54029250
 #define CPU_ID_MV88FR131   0x56251310 /* Marvell Feroceon 88FR131 Core */
 #define CPU_ID_MV88FR331   0x56153310 /* Marvell Feroceon 88FR331 Core */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291427 - head/sys/dev/ahci

2015-11-28 Thread Michal Meloun

Author: mmel
Date: Sat Nov 28 14:30:42 2015
New Revision: 291427
URL: https://svnweb.freebsd.org/changeset/base/291427

Log:
  AHCI: Use bus_dmamap_sync(9) when accessing DMA buffers.
  
  Reviewed by:  mav
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4240

Modified:
  head/sys/dev/ahci/ahci.c

Modified: head/sys/dev/ahci/ahci.c
==
--- head/sys/dev/ahci/ahci.cSat Nov 28 12:12:28 2015(r291426)
+++ head/sys/dev/ahci/ahci.cSat Nov 28 14:30:42 2015(r291427)
@@ -1606,10 +1606,15 @@ ahci_execute_transaction(struct ahci_slo
if ((ch->quirks & AHCI_Q_NOBSYRES) == 0 &&
(ch->quirks & AHCI_Q_ATI_PMP_BUG) == 0 &&
softreset == 2 && et == AHCI_ERR_NONE) {
-   while ((val = fis[2]) & ATA_S_BUSY) {
-   DELAY(10);
-   if (count++ >= timeout)
+   for ( ; count < timeout; count++) {
+   bus_dmamap_sync(ch->dma.rfis_tag,
+   ch->dma.rfis_map, BUS_DMASYNC_POSTREAD);
+   val = fis[2];
+   bus_dmamap_sync(ch->dma.rfis_tag,
+   ch->dma.rfis_map, BUS_DMASYNC_PREREAD);
+   if ((val & ATA_S_BUSY) == 0)
break;
+   DELAY(10);
}
}
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291444 - head/sys/dev/ahci

2015-11-29 Thread Michal Meloun

Author: mmel
Date: Sun Nov 29 11:28:04 2015
New Revision: 291444
URL: https://svnweb.freebsd.org/changeset/base/291444

Log:
  AHCI: Fix AHCI driver for ARM.
  On ARM, we must ensure proper interdevice write ordering.
  The AHCI interrupt status register must be updated in HW before
  registers in interrupt controller.
  Unfortunately, only way how we can do it is readback.
  
  Discussed with:   mav
  Approved by:  kib (mentor)
  Differential Revision: https://reviews.freebsd.org/D4240

Modified:
  head/sys/dev/ahci/ahci.c
  head/sys/dev/ahci/ahci.h

Modified: head/sys/dev/ahci/ahci.c
==
--- head/sys/dev/ahci/ahci.cSun Nov 29 07:20:30 2015(r291443)
+++ head/sys/dev/ahci/ahci.cSun Nov 29 11:28:04 2015(r291444)
@@ -483,6 +483,7 @@ ahci_intr(void *data)
/* AHCI declares level triggered IS. */
if (!(ctlr->quirks & AHCI_Q_EDGEIS))
ATA_OUTL(ctlr->r_mem, AHCI_IS, is);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 /*
@@ -501,6 +502,7 @@ ahci_intr_one(void *data)
ctlr->interrupt[unit].function(arg);
/* AHCI declares level triggered IS. */
ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 static void
@@ -516,6 +518,7 @@ ahci_intr_one_edge(void *data)
ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
if ((arg = ctlr->interrupt[unit].argument))
ctlr->interrupt[unit].function(arg);
+   ATA_RBL(ctlr->r_mem, AHCI_IS);
 }
 
 struct resource *

Modified: head/sys/dev/ahci/ahci.h
==
--- head/sys/dev/ahci/ahci.hSun Nov 29 07:20:30 2015(r291443)
+++ head/sys/dev/ahci/ahci.hSun Nov 29 11:28:04 2015(r291444)
@@ -562,6 +562,20 @@ enum ahci_err_type {
 #define ATA_OUTSL_STRM(res, offset, addr, count) \
bus_write_multi_stream_4((res), (offset), (addr), (count))
 
+/*
+ * On some platforms, we must ensure proper interdevice write ordering.
+ * The AHCI interrupt status register must be updated in HW before
+ * registers in interrupt controller.
+ * Unfortunately, only way how we can do it is readback.
+ *
+ * Currently, only ARM is known to have this issue.
+ */
+#if defined(__arm__)
+#define ATA_RBL(res, offset) \
+   bus_read_4((res), (offset))
+#else
+#define ATA_RBL(res, offset)
+#endif
 
 #define AHCI_Q_NOFORCE 0x0001
 #define AHCI_Q_NOPMP   0x0002
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r291492 - in head/sys/arm: arm include

2015-11-30 Thread Michal Meloun

Author: mmel
Date: Mon Nov 30 17:09:25 2015
New Revision: 291492
URL: https://svnweb.freebsd.org/changeset/base/291492

Log:
  ARM: create new memory attribute for writethrough cacheable memory.
  - add new TEX class for WT cacheable memory
  - export new TEX class to kernel as VM_MEMATTR_WT attribute
  - add new aliases VM_MEMATTR_WRITE_COMBINING and
VM_MEMATTR_WRITE_BACK, it's used in DRM code
  
  Note:
   Only Cortex A8 supports WT caching in HW. On rest of Cortex CPUs,
   WT requests is treated as uncacheable.
  
  Approved by:  kib (mentor)

Modified:
  head/sys/arm/arm/pmap-v6-new.c
  head/sys/arm/include/pte-v6.h
  head/sys/arm/include/vm.h

Modified: head/sys/arm/arm/pmap-v6-new.c
==
--- head/sys/arm/arm/pmap-v6-new.c  Mon Nov 30 16:34:13 2015
(r291491)
+++ head/sys/arm/arm/pmap-v6-new.c  Mon Nov 30 17:09:25 2015
(r291492)
@@ -388,14 +388,14 @@ pmap_debug(int level)
 
 static uint32_t tex_class[8] = {
 /* type  inner cache outer cache */
-   TEX(PRRR_MEM, NMRR_WB_WA, NMRR_WB_WA, 0),  /* 0 - ATTR_WB_WA */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 1 - ATTR_NOCACHE */
-   TEX(PRRR_DEV, NMRR_NC,NMRR_NC,0),  /* 2 - ATTR_DEVICE */
-   TEX(PRRR_SO,  NMRR_NC,NMRR_NC,0),  /* 3 - ATTR_SO*/
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 4 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 5 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 6 - NOT USED YET */
-   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 7 - NOT USED YET */
+   TEX(PRRR_MEM, NMRR_WB_WA, NMRR_WB_WA, 0),  /* 0 - ATTR_WB_WA*/
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 1 - ATTR_NOCACHE  */
+   TEX(PRRR_DEV, NMRR_NC,NMRR_NC,0),  /* 2 - ATTR_DEVICE   */
+   TEX(PRRR_SO,  NMRR_NC,NMRR_NC,0),  /* 3 - ATTR_SO   */
+   TEX(PRRR_MEM, NMRR_WT,NMRR_WT,0),  /* 4 - ATTR_WT   */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 5 - NOT USED YET  */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 6 - NOT USED YET  */
+   TEX(PRRR_MEM, NMRR_NC,NMRR_NC,0),  /* 7 - NOT USED YET  */
 };
 #undef TEX
 

Modified: head/sys/arm/include/pte-v6.h
==
--- head/sys/arm/include/pte-v6.h   Mon Nov 30 16:34:13 2015
(r291491)
+++ head/sys/arm/include/pte-v6.h   Mon Nov 30 17:09:25 2015
(r291492)
@@ -196,6 +196,7 @@
 #definePTE2_ATTR_NOCACHE   TEX2_CLASS_1
 #definePTE2_ATTR_DEVICETEX2_CLASS_2
 #definePTE2_ATTR_SOTEX2_CLASS_3
+#definePTE2_ATTR_WTTEX2_CLASS_4
 /*
  * Software defined bits for L1descriptors
  *  - L1_AP0 isused as page accessed bit

Modified: head/sys/arm/include/vm.h
==
--- head/sys/arm/include/vm.h   Mon Nov 30 16:34:13 2015(r291491)
+++ head/sys/arm/include/vm.h   Mon Nov 30 17:09:25 2015(r291492)
@@ -32,14 +32,16 @@
 #ifdef ARM_NEW_PMAP
 #include 
 
-#define VM_MEMATTR_WB_WA   ((vm_memattr_t)PTE2_ATTR_WB_WA)
-#define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
-#define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
-#define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
-
-#define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
-#define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO /*name is misused by DMA */
+#define VM_MEMATTR_WB_WA   ((vm_memattr_t)PTE2_ATTR_WB_WA)
+#define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
+#define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
+#define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
+#define VM_MEMATTR_WT  ((vm_memattr_t)PTE2_ATTR_WT)
 
+#define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
+#define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO   /* misused by DMA */
+#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WT   /* for DRM */
+#define VM_MEMATTR_WRITE_BACK  VM_MEMATTR_WB_WA/* for DRM */
 
 #else
 /* Memory attribute configuration. */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r301539 - in head/sys: dev/gpio kern sys

2016-06-06 Thread Michal Meloun

Author: mmel
Date: Tue Jun  7 05:08:24 2016
New Revision: 301539
URL: https://svnweb.freebsd.org/changeset/base/301539

Log:
  INTRNG: As follow up of r301451, implement mapping and configuration
  of gpio pin interrupts by new way.
  
  Note: This removes last consumer of intr_ddata machinery and we remove it
  in separate commit.

Modified:
  head/sys/dev/gpio/gpiobus.c
  head/sys/dev/gpio/gpiobusvar.h
  head/sys/kern/subr_intr.c
  head/sys/sys/intr.h

Modified: head/sys/dev/gpio/gpiobus.c
==
--- head/sys/dev/gpio/gpiobus.c Tue Jun  7 04:51:50 2016(r301538)
+++ head/sys/dev/gpio/gpiobus.c Tue Jun  7 05:08:24 2016(r301539)
@@ -79,22 +79,47 @@ static int gpiobus_pin_toggle(device_t, 
  * data will be moved into struct resource.
  */
 #ifdef INTRNG
+static void
+gpio_destruct_map_data(struct intr_map_data *map_data)
+{
+
+   KASSERT(map_data->type == INTR_MAP_DATA_GPIO,
+   ("%s: bad map_data type %d", __func__, map_data->type));
+
+   free(map_data, M_DEVBUF);
+}
+
 struct resource *
 gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags,
 gpio_pin_t pin, uint32_t intr_mode)
 {
-   u_int irqnum;
-
-   /*
-* Allocate new fictitious interrupt number and store configuration
-* into it.
-*/
-   irqnum = intr_gpio_map_irq(pin->dev, pin->pin, pin->flags, intr_mode);
-   if (irqnum == INTR_IRQ_INVALID)
+   int rv;
+   u_int irq;
+   struct intr_map_data_gpio *gpio_data;
+   struct resource *res;
+
+   gpio_data = malloc(sizeof(*gpio_data), M_DEVBUF, M_WAITOK | M_ZERO);
+   gpio_data->hdr.type = INTR_MAP_DATA_GPIO;
+   gpio_data->hdr.destruct = gpio_destruct_map_data;
+   gpio_data->gpio_pin_num = pin->pin;
+   gpio_data->gpio_pin_flags = pin->flags;
+   gpio_data->gpio_intr_mode = intr_mode;
+
+   rv = intr_map_irq(pin->dev, 0, (struct intr_map_data *)gpio_data,
+   );
+   if (rv != 0) {
+   gpio_destruct_map_data((struct intr_map_data *)gpio_data);
return (NULL);
+   }
 
-   return (bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid,
-   irqnum, irqnum, 1, alloc_flags));
+   res = bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid, irq, irq, 1,
+   alloc_flags);
+   if (res == NULL) {
+   gpio_destruct_map_data((struct intr_map_data *)gpio_data);
+   return (NULL);
+   }
+   rman_set_virtual(res, gpio_data);
+   return (res);
 }
 #else
 struct resource *

Modified: head/sys/dev/gpio/gpiobusvar.h
==
--- head/sys/dev/gpio/gpiobusvar.h  Tue Jun  7 04:51:50 2016
(r301538)
+++ head/sys/dev/gpio/gpiobusvar.h  Tue Jun  7 05:08:24 2016
(r301539)
@@ -70,6 +70,13 @@ struct gpiobus_pin_data
char*name;  /* pin name. */
 };
 
+struct intr_map_data_gpio {
+   struct intr_map_datahdr;
+   u_int   gpio_pin_num;
+   u_int   gpio_pin_flags;
+   u_int   gpio_intr_mode;
+};
+
 struct gpiobus_softc
 {
struct mtx  sc_mtx; /* bus mutex */

Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c   Tue Jun  7 04:51:50 2016(r301538)
+++ head/sys/kern/subr_intr.c   Tue Jun  7 05:08:24 2016(r301539)
@@ -147,7 +147,9 @@ struct intr_dev_data {
 };
 
 static struct intr_dev_data *intr_ddata_tab[2 * NIRQ];
+#if 0
 static u_int intr_ddata_first_unused;
+#endif
 
 #define IRQ_DDATA_BASE 1
 CTASSERT(IRQ_DDATA_BASE > nitems(irq_sources));
@@ -534,6 +536,7 @@ intr_isrc_init_on_cpu(struct intr_irqsrc
 }
 #endif
 
+#if 0
 static struct intr_dev_data *
 intr_ddata_alloc(u_int extsize)
 {
@@ -556,6 +559,7 @@ intr_ddata_alloc(u_int extsize)
ddata->idd_data = (struct intr_map_data *)((uintptr_t)ddata + size);
return (ddata);
 }
+#endif
 
 static struct intr_irqsrc *
 intr_ddata_lookup(u_int irq, struct intr_map_data **datap)
@@ -620,30 +624,6 @@ intr_acpi_map_irq(device_t dev, u_int ir
 }
 #endif
 
-/*
- *  Store GPIO interrupt decription in framework and return unique interrupt
- *  number (resource handle) associated with it.
- */
-u_int
-intr_gpio_map_irq(device_t dev, u_int pin_num, u_int pin_flags, u_int 
intr_mode)
-{
-   struct intr_dev_data *ddata;
-   struct intr_map_data_gpio *dag;
-
-   ddata = intr_ddata_alloc(sizeof(struct intr_map_data_gpio));
-   if (ddata == NULL)
-   return (INTR_IRQ_INVALID);  /* no space left */
-
-   ddata->idd_dev = dev;
-   ddata->idd_data->type = INTR_MAP_DATA_GPIO;
-
-   dag = (struct intr_map_data_gpio *)ddata->idd_data;
-   dag->gpio_pin_num = pin_num;
-   dag->gpio_pin_flags = pin_flags;
-

svn commit: r300951 - head/sys/arm/arm

2016-05-29 Thread Michal Meloun

Author: mmel
Date: Sun May 29 07:39:56 2016
New Revision: 300951
URL: https://svnweb.freebsd.org/changeset/base/300951

Log:
  ARM GIC: Allow to setup interrupt without configuration data.
  In some cases, like for PCI devices, only interrupt numbers are enumerated
  from HW. In this case, use INTR_foo_CONFORM as level and trigger values.

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==
--- head/sys/arm/arm/gic.c  Sun May 29 07:29:35 2016(r300950)
+++ head/sys/arm/arm/gic.c  Sun May 29 07:39:56 2016(r300951)
@@ -1128,8 +1128,11 @@ arm_gic_setup_intr(device_t dev, struct 
 
if (gi->gi_irq != irq)
return (EINVAL);
-   } else
-   return (ENOTSUP);
+   } else {
+   irq = gi->gi_irq;
+   pol = INTR_POLARITY_CONFORM;
+   trig = INTR_TRIGGER_CONFORM;
+   }
 
/* Compare config if this is not first setup. */
if (isrc->isrc_handlers != 0) {
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295252 - in head/sys/arm: arm include

2016-02-04 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 12:11:18 2016
New Revision: 295252
URL: https://svnweb.freebsd.org/changeset/base/295252

Log:
  ARM: Don't use ugly (and hidden) global variable, control register is
  readable at any time.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Thu Feb  4 12:06:06 2016(r295251)
+++ head/sys/arm/arm/cpufunc.c  Thu Feb  4 12:11:18 2016(r295252)
@@ -88,8 +88,6 @@ u_int arm_cache_level;
 u_int  arm_cache_type[14];
 u_int  arm_cache_loc;
 
-int ctrl;
-
 #ifdef CPU_ARM9
 struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
@@ -889,7 +887,6 @@ arm9_setup(void)
 
/* Set the control register */
cpu_control(cpuctrlmask, cpuctrl);
-   ctrl = cpuctrl;
 
 }
 #endif /* CPU_ARM9 */
@@ -928,7 +925,6 @@ arm10_setup(void)
cpuctrl |= CPU_CONTROL_VECRELOC;
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 
/* And again. */
@@ -1032,7 +1028,6 @@ arm11x6_setup(void)
cp15_cpacr_set(0x0fff);
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(~cpuctrl_wax, cpuctrl);
 
tmp = cp15_actlr_get();
@@ -1074,7 +1069,6 @@ pj4bv7_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 
/* And again. */
@@ -1120,7 +1114,6 @@ cortexa_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(cpuctrlmask, cpuctrl);
 
/* And again. */
@@ -1167,7 +1160,6 @@ fa526_setup(void)
cpu_idcache_wbinv_all();
 
/* Set the control register */
-   ctrl = cpuctrl;
cpu_control(0x, cpuctrl);
 }
 #endif /* CPU_FA526 */
@@ -1221,7 +1213,6 @@ xscale_setup(void)
 * Set the control register.  Note that bits 6:3 must always
 * be set to 1.
 */
-   ctrl = cpuctrl;
 /* cpu_control(cpuctrlmask, cpuctrl);*/
cpu_control(0x, cpuctrl);
 

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Thu Feb  4 12:06:06 2016(r295251)
+++ head/sys/arm/arm/identcpu.c Thu Feb  4 12:11:18 2016(r295252)
@@ -321,7 +321,6 @@ print_enadis(int enadis, char *s)
printf(" %s %sabled", s, (enadis == 0) ? "dis" : "en");
 }
 
-extern int ctrl;
 enum cpu_class cpu_class = CPU_CLASS_NONE;
 
 u_int cpu_pfr(int num)
@@ -388,9 +387,10 @@ void
 identify_arm_cpu(void)
 {
u_int cpuid, reg, size, sets, ways;
-   u_int8_t type, linesize;
+   u_int8_t type, linesize, ctrl;
int i;
 
+   ctrl = cpu_get_control();
cpuid = cpu_ident();
 
if (cpuid == 0) {

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Thu Feb  4 12:06:06 2016
(r295251)
+++ head/sys/arm/include/cpufunc.h  Thu Feb  4 12:11:18 2016
(r295252)
@@ -202,6 +202,7 @@ u_int   cpufunc_control (u_int clear, u_i
 void   cpu_domains (u_int domains);
 u_int  cpu_faultstatus (void);
 u_int  cpu_faultaddress(void);
+u_int  cpu_get_control (void);
 u_int  cpu_pfr (int);
 
 #if defined(CPU_FA526)
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295348 - head/sys/cddl/dev/fbt/arm

2016-02-06 Thread Michal Meloun

Author: mmel
Date: Sat Feb  6 11:16:15 2016
New Revision: 295348
URL: https://svnweb.freebsd.org/changeset/base/295348

Log:
  ARM: Rename remaining ARMv4 specific function in DTrace code.
  I missed it in r295319.
  
  Pointed by: tuexen

Modified:
  head/sys/cddl/dev/fbt/arm/fbt_isa.c

Modified: head/sys/cddl/dev/fbt/arm/fbt_isa.c
==
--- head/sys/cddl/dev/fbt/arm/fbt_isa.c Sat Feb  6 09:01:03 2016
(r295347)
+++ head/sys/cddl/dev/fbt/arm/fbt_isa.c Sat Feb  6 11:16:15 2016
(r295348)
@@ -83,7 +83,7 @@ fbt_patch_tracepoint(fbt_probe_t *fbt, f
 {
 
*fbt->fbtp_patchpoint = val;
-   cpu_icache_sync_range((vm_offset_t)fbt->fbtp_patchpoint, sizeof(val));
+   icache_sync((vm_offset_t)fbt->fbtp_patchpoint, sizeof(val));
 }
 
 int
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295319 - in head/sys: arm/allwinner/a20 arm/altera/socfpga arm/amlogic/aml8726 arm/arm arm/broadcom/bcm2835 arm/freescale/imx arm/include arm/mv/armada38x arm/mv/armadaxp arm/rockchip ...

2016-02-05 Thread Michal Meloun

Author: mmel
Date: Fri Feb  5 14:57:41 2016
New Revision: 295319
URL: https://svnweb.freebsd.org/changeset/base/295319

Log:
  ARM: Use new ARMv6 naming conventions for cache and TLB functions
  in all but ARMv4 specific files.
  Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
  in L2 cache functions if ARM_L2_PIPT is defined.

Modified:
  head/sys/arm/allwinner/a20/a20_mp.c
  head/sys/arm/altera/socfpga/socfpga_mp.c
  head/sys/arm/amlogic/aml8726/aml8726_mp.c
  head/sys/arm/arm/db_interface.c
  head/sys/arm/arm/dump_machdep.c
  head/sys/arm/arm/fiq.c
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/minidump_machdep.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/sys_machdep.c
  head/sys/arm/broadcom/bcm2835/bcm2836_mp.c
  head/sys/arm/freescale/imx/imx6_mp.c
  head/sys/arm/include/cpu-v4.h
  head/sys/arm/include/cpu-v6.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/kdb.h
  head/sys/arm/mv/armada38x/pmsu.c
  head/sys/arm/mv/armadaxp/armadaxp_mp.c
  head/sys/arm/rockchip/rk30xx_mp.c
  head/sys/arm/samsung/exynos/exynos5_mp.c
  head/sys/arm/ti/omap4/omap4_mp.c
  head/sys/arm/xilinx/zy7_mp.c
  head/sys/contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c

Modified: head/sys/arm/allwinner/a20/a20_mp.c
==
--- head/sys/arm/allwinner/a20/a20_mp.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/allwinner/a20/a20_mp.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -101,8 +102,7 @@ platform_mp_start_ap(void)
) != 0)
panic("Couldn't map the CPUCFG\n");
 
-   cpu_idcache_wbinv_all();
-   cpu_l2cache_wbinv_all();
+   dcache_wbinv_poc_all();
 
bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_P_REG0,
pmap_kextract((vm_offset_t)mpentry));

Modified: head/sys/arm/altera/socfpga/socfpga_mp.c
==
--- head/sys/arm/altera/socfpga/socfpga_mp.cFri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/altera/socfpga/socfpga_mp.cFri Feb  5 14:57:41 2016
(r295319)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -162,8 +163,7 @@ platform_mp_start_ap(void)
bus_space_write_region_4(fdtbus_bs_tag, ram, 0,
(uint32_t *)_trampoline, 8);
 
-   cpu_idcache_wbinv_all();
-   cpu_l2cache_wbinv_all();
+   dcache_wbinv_poc_all();
 
/* Put CPU1 out from reset */
bus_space_write_4(fdtbus_bs_tag, rst, MPUMODRST, 0);

Modified: head/sys/arm/amlogic/aml8726/aml8726_mp.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_mp.c   Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/amlogic/aml8726/aml8726_mp.c   Fri Feb  5 14:57:41 2016
(r295319)
@@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -485,7 +486,7 @@ platform_mp_start_ap(void)
value |= AML_SCU_CONTROL_ENABLE;
SCU_WRITE_4(AML_SCU_CONTROL_REG, value);
SCU_BARRIER(AML_SCU_CONTROL_REG);
-   cpu_idcache_wbinv_all();
+   dcache_wbinv_poc_all();
 
/* Set the boot address and power on each AP. */
paddr = pmap_kextract((vm_offset_t)mpentry);

Modified: head/sys/arm/arm/db_interface.c
==
--- head/sys/arm/arm/db_interface.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/arm/db_interface.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
 #include "opt_ddb.h"
 
 #include 
+#include 
 #include 
 #include 
 #include  /* just for boothowto */
@@ -53,9 +54,9 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
@@ -63,7 +64,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
-#include 
+
 
 static int nil = 0;
 
@@ -245,11 +246,10 @@ db_write_bytes(vm_offset_t addr, size_t 
}
 
/* make sure the caches and memory are in sync */
-   cpu_icache_sync_range(addr, size);
+   icache_sync(addr, size);
 
/* In case the current page tables have been modified ... */
-   cpu_tlb_flushID();
-   cpu_cpwait();
+   tlb_flush_all();
return (0);
 }
 

Modified: head/sys/arm/arm/dump_machdep.c
==
--- head/sys/arm/arm/dump_machdep.c Fri Feb  5 14:16:42 2016
(r295318)
+++ head/sys/arm/arm/dump_machdep.c Fri Feb  5 14:57:41 2016
(r295319)
@@ -59,8 +59,7 @@ dumpsys_wbinv_all(void)
 * have already been stopped, and their flush/invalidate was done as
 * part of stopping.
 */
-

Re: svn commit: r295254 - head/sys/arm/arm

2016-02-04 Thread Michal Meloun

Yep, I'm ready to review your patch.
Allow me one question in forward.
How this patch affects JTAG based debugging of kernel? Mainly if I start
kernel under JTAG debugger, with active breakpoints (or watchpoints).

Michal

Dne 04.02.2016 v 14:41 Zbigniew Bodek napsal(a):
> Hello Michal,
> 
> I have a fix for that that I will send for review soon (I need to test
> in on some other platforms):
> https://people.freebsd.org/~zbb/arm/other/0001-Fix-debug_monitor-code-for-older-ARMs-ARM11.patch
> <https://people.freebsd.org/%7Ezbb/arm/other/0001-Fix-debug_monitor-code-for-older-ARMs-ARM11.patch>
> 
> If you don't mind I will add you to the review on Phabricator.
> 
> Best regards
> zbb
> 
> 2016-02-04 14:32 GMT+01:00 Michal Meloun <m...@freebsd.org
> <mailto:m...@freebsd.org>>:
> 
> Author: mmel
> Date: Thu Feb  4 13:32:29 2016
> New Revision: 295254
> URL: https://svnweb.freebsd.org/changeset/base/295254
> 
> Log:
>   ARM: RPI-B kernel was broken by r294740. Make it functional again.
> 
> Modified:
>   head/sys/arm/arm/debug_monitor.c
> 
> Modified: head/sys/arm/arm/debug_monitor.c
> 
> ==
> --- head/sys/arm/arm/debug_monitor.cThu Feb  4 12:49:28 2016   
> (r295253)
> +++ head/sys/arm/arm/debug_monitor.cThu Feb  4 13:32:29 2016   
> (r295254)
> @@ -845,8 +845,10 @@ dbg_arch_supported(void)
>  {
> 
> switch (dbg_model) {
> +#ifdef not_yet
> case ID_DFR0_CP_DEBUG_M_V6:
> case ID_DFR0_CP_DEBUG_M_V6_1:
> +#endif
> case ID_DFR0_CP_DEBUG_M_V7:
> case ID_DFR0_CP_DEBUG_M_V7_1:   /* fall through */
> return (TRUE);
> ___
> svn-src-...@freebsd.org <mailto:svn-src-...@freebsd.org> mailing list
> https://lists.freebsd.org/mailman/listinfo/svn-src-all
> To unsubscribe, send any mail to
> "svn-src-all-unsubscr...@freebsd.org
> <mailto:svn-src-all-unsubscr...@freebsd.org>"
> 
> 

___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295254 - head/sys/arm/arm

2016-02-04 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 13:32:29 2016
New Revision: 295254
URL: https://svnweb.freebsd.org/changeset/base/295254

Log:
  ARM: RPI-B kernel was broken by r294740. Make it functional again.

Modified:
  head/sys/arm/arm/debug_monitor.c

Modified: head/sys/arm/arm/debug_monitor.c
==
--- head/sys/arm/arm/debug_monitor.cThu Feb  4 12:49:28 2016
(r295253)
+++ head/sys/arm/arm/debug_monitor.cThu Feb  4 13:32:29 2016
(r295254)
@@ -845,8 +845,10 @@ dbg_arch_supported(void)
 {
 
switch (dbg_model) {
+#ifdef not_yet
case ID_DFR0_CP_DEBUG_M_V6:
case ID_DFR0_CP_DEBUG_M_V6_1:
+#endif
case ID_DFR0_CP_DEBUG_M_V7:
case ID_DFR0_CP_DEBUG_M_V7_1:   /* fall through */
return (TRUE);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295259 - head/sys/arm/arm

2016-02-04 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 14:32:48 2016
New Revision: 295259
URL: https://svnweb.freebsd.org/changeset/base/295259

Log:
  ARM: For ARMv6/v7, code in locore.S initializes SCTLR and ACTRL registers.
  Don't duplicate this initialization in cpu_setup().

Modified:
  head/sys/arm/arm/cpufunc.c

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Thu Feb  4 14:30:46 2016(r295258)
+++ head/sys/arm/arm/cpufunc.c  Thu Feb  4 14:32:48 2016(r295259)
@@ -966,47 +966,12 @@ cpu_scc_setup_ccnt(void)
 void
 arm11x6_setup(void)
 {
-   int cpuctrl, cpuctrl_wax;
uint32_t auxctrl, auxctrl_wax;
uint32_t tmp, tmp2;
-   uint32_t sbz=0;
uint32_t cpuid;
 
cpuid = cpu_ident();
 
-   cpuctrl =
-   CPU_CONTROL_MMU_ENABLE  |
-   CPU_CONTROL_DC_ENABLE   |
-   CPU_CONTROL_WBUF_ENABLE |
-   CPU_CONTROL_32BP_ENABLE |
-   CPU_CONTROL_32BD_ENABLE |
-   CPU_CONTROL_LABT_ENABLE |
-   CPU_CONTROL_SYST_ENABLE |
-   CPU_CONTROL_IC_ENABLE   |
-   CPU_CONTROL_UNAL_ENABLE;
-
-   /*
-* "write as existing" bits
-* inverse of this is mask
-*/
-   cpuctrl_wax =
-   (3 << 30) | /* SBZ */
-   (1 << 29) | /* FA */
-   (1 << 28) | /* TR */
-   (3 << 26) | /* SBZ */
-   (3 << 19) | /* SBZ */
-   (1 << 17);  /* SBZ */
-
-   cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
-   cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
-
-#ifdef __ARMEB__
-   cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-
auxctrl = 0;
auxctrl_wax = ~0;
 
@@ -1018,18 +983,6 @@ arm11x6_setup(void)
auxctrl_wax = ~ARM1176_AUXCTL_PHD;
}
 
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Now really make sure they are clean.  */
-   __asm volatile ("mcr\tp15, 0, %0, c7, c7, 0" : : "r"(sbz));
-
-   /* Allow detection code to find the VFP if it's fitted.  */
-   cp15_cpacr_set(0x0fff);
-
-   /* Set the control register */
-   cpu_control(~cpuctrl_wax, cpuctrl);
-
tmp = cp15_actlr_get();
tmp2 = tmp;
tmp &= auxctrl_wax;
@@ -1037,9 +990,6 @@ arm11x6_setup(void)
if (tmp != tmp2)
cp15_actlr_set(tmp);
 
-   /* And again. */
-   cpu_idcache_wbinv_all();
-
cpu_scc_setup_ccnt();
 }
 #endif  /* CPU_ARM1176 */
@@ -1048,32 +998,8 @@ arm11x6_setup(void)
 void
 pj4bv7_setup(void)
 {
-   int cpuctrl;
 
pj4b_config();
-
-   cpuctrl = CPU_CONTROL_MMU_ENABLE;
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
-   cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-   cpuctrl |= CPU_CONTROL_DC_ENABLE;
-   cpuctrl |= (0xf << 3);
-   cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
-   cpuctrl |= CPU_CONTROL_IC_ENABLE;
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-   cpuctrl |= (0x5 << 16) | (1 < 22);
-   cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
-
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Set the control register */
-   cpu_control(0x, cpuctrl);
-
-   /* And again. */
-   cpu_idcache_wbinv_all();
-
cpu_scc_setup_ccnt();
 }
 #endif /* CPU_MV_PJ4B */
@@ -1083,44 +1009,6 @@ pj4bv7_setup(void)
 void
 cortexa_setup(void)
 {
-   int cpuctrl, cpuctrlmask;
-
-   cpuctrlmask = CPU_CONTROL_MMU_ENABLE | /* MMU enable [0] */
-   CPU_CONTROL_AFLT_ENABLE |/* Alignment fault[1] */
-   CPU_CONTROL_DC_ENABLE |  /* DCache enable  [2] */
-   CPU_CONTROL_BPRD_ENABLE |/* Branch prediction [11] */
-   CPU_CONTROL_IC_ENABLE |  /* ICache enable [12] */
-   CPU_CONTROL_VECRELOC;/* Vector relocation [13] */
-
-   cpuctrl = CPU_CONTROL_MMU_ENABLE |
-   CPU_CONTROL_IC_ENABLE |
-   CPU_CONTROL_DC_ENABLE |
-   CPU_CONTROL_BPRD_ENABLE;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
-   cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
-   /* Switch to big endian */
-#ifdef __ARMEB__
-   cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
-   /* Check if the vector page is at the high address (0x) */
-   if (vector_page == ARM_VECTORS_HIGH)
-   cpuctrl |= CPU_CONTROL_VECRELOC;
-
-   /* Clear out the cache */
-   cpu_idcache_wbinv_all();
-
-   /* Set the control register */
-   cpu_control(cpuctrlmask, cpuctrl);
-
-   /* And again. */
-   cpu_idcache_wbinv_all();
-#if defined(SMP) && !defined(ARM_NEW_PMAP)
-   armv7_auxctrl((1 << 6) | (1 << 0), (1 << 6) | (1 << 0)); /* Enable SMP 
+ TLB broadcasting  */
-#endif
 
cpu_scc_setup_ccnt();
 }

svn commit: r295267 - head/sys/arm/arm

2016-02-04 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 17:01:38 2016
New Revision: 295267
URL: https://svnweb.freebsd.org/changeset/base/295267

Log:
  Replace broken implementation of fuswintr() and suswintr() by functions
  which return -1 as well as on tier 1 archs. Remove block_userspace_access
  used only in these implementations.
  
  (1) These functions may be called in interrupt context and pcb_onfault
  can be already set in this time. Thus, prior pcb_onfault must be saved
  and restored afterwards.
  
  (2) The check that an abort came either from nested interrupt or while
  in critical section or holding not sleepable lock must be avoided for
  this case.
  
  These functions are called only for profiling reason, so there will be
  only small gain by making the code more complex.

Modified:
  head/sys/arm/arm/cpufunc_asm_xscale.S
  head/sys/arm/arm/cpufunc_asm_xscale_c3.S
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/arm/fusu.S
  head/sys/arm/arm/trap-v6.c
  head/sys/arm/arm/trap.c

Modified: head/sys/arm/arm/cpufunc_asm_xscale.S
==
--- head/sys/arm/arm/cpufunc_asm_xscale.S   Thu Feb  4 16:38:24 2016
(r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale.S   Thu Feb  4 17:01:38 2016
(r295267)
@@ -80,9 +80,6 @@ __FBSDID("$FreeBSD$");
  */
 #defineDCACHE_SIZE 0x8000
 
-.Lblock_userspace_access:
-   .word   _C_LABEL(block_userspace_access)
-
 /*
  * CPWAIT -- Canonical method to wait for CP15 update.
  * From: Intel 80200 manual, section 2.3.3.
@@ -137,11 +134,6 @@ ENTRY(xscale_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
-   ldr r3, .Lblock_userspace_access
-   ldr r2, [r3]
-   orr r1, r2, #1
-   str r1, [r3]
 #endif
stmfd   sp!, {r0-r3, lr}
bl  _C_LABEL(xscale_cache_cleanID)
@@ -165,8 +157,6 @@ ENTRY(xscale_setttb)
 
 #ifdef CACHE_CLEAN_BLOCK_INTR
msr cpsr_fsxc, r3
-#else
-   str r2, [r3]
 #endif
RET
 END(xscale_setttb)
@@ -273,14 +263,9 @@ _C_LABEL(xscale_minidata_clean_size):
 #defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
msr cpsr_fsxc, r3
 #else
-#defineXSCALE_CACHE_CLEAN_BLOCK
\
-   ldr r3, .Lblock_userspace_access;   \
-   ldr ip, [r3];   \
-   orr r0, ip, #1  ;   \
-   str r0, [r3]
+#defineXSCALE_CACHE_CLEAN_BLOCK
 
-#defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
-   str ip, [r3]
+#defineXSCALE_CACHE_CLEAN_UNBLOCK
 #endif /* CACHE_CLEAN_BLOCK_INTR */
 
 #defineXSCALE_CACHE_CLEAN_PROLOGUE 
\

Modified: head/sys/arm/arm/cpufunc_asm_xscale_c3.S
==
--- head/sys/arm/arm/cpufunc_asm_xscale_c3.SThu Feb  4 16:38:24 2016
(r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale_c3.SThu Feb  4 17:01:38 2016
(r295267)
@@ -82,9 +82,6 @@ __FBSDID("$FreeBSD$");
  */
 #defineDCACHE_SIZE 0x8000
 
-.Lblock_userspace_access:
-   .word   _C_LABEL(block_userspace_access)
-
 /*
  * CPWAIT -- Canonical method to wait for CP15 update.
  * From: Intel 80200 manual, section 2.3.3.
@@ -130,16 +127,8 @@ __FBSDID("$FreeBSD$");
msr cpsr_fsxc, r4   ;   \
ldmfd   sp!, {r4}
 #else
-#defineXSCALE_CACHE_CLEAN_BLOCK
\
-   stmfd   sp!, {r4}   ;   \
-   ldr r4, .Lblock_userspace_access;   \
-   ldr ip, [r4];   \
-   orr r0, ip, #1  ;   \
-   str r0, [r4]
-
-#defineXSCALE_CACHE_CLEAN_UNBLOCK  
\
-   str ip, [r3];   \
-   ldmfd   sp!, {r4}
+#defineXSCALE_CACHE_CLEAN_BLOCK
+#defineXSCALE_CACHE_CLEAN_UNBLOCK
 #endif /* CACHE_CLEAN_BLOCK_INTR */
 
 
@@ -352,11 +341,6 @@ ENTRY(xscalec3_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
-   ldr r3, .Lblock_userspace_access
-   ldr r2, [r3]
-   orr r1, r2, #1
-   str r1, [r3]
 #endif
stmfd   sp!, {r0-r3, lr}
bl  _C_LABEL(xscalec3_cache_cleanID)

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Thu Feb  4 16:38:24 2016
(r295266)
+++

svn commit: r295256 - head/sys/arm/arm

2016-02-04 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 14:02:42 2016
New Revision: 295256
URL: https://svnweb.freebsd.org/changeset/base/295256

Log:
  ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP
  for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
  This bit have no effect until unaligned access is enabled.

Modified:
  head/sys/arm/arm/locore-v6.S

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.SThu Feb  4 13:35:40 2016
(r295255)
+++ head/sys/arm/arm/locore-v6.SThu Feb  4 14:02:42 2016
(r295256)
@@ -132,9 +132,9 @@ ASENTRY_NP(_start)
bic r7, #CPU_CONTROL_DC_ENABLE
bic r7, #CPU_CONTROL_MMU_ENABLE
bic r7, #CPU_CONTROL_IC_ENABLE
-   bic r7, #CPU_CONTROL_UNAL_ENABLE
bic r7, #CPU_CONTROL_BPRD_ENABLE
bic r7, #CPU_CONTROL_SW_ENABLE
+   orr r7, #CPU_CONTROL_UNAL_ENABLE
orr r7, #CPU_CONTROL_AFLT_ENABLE
orr r7, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r7)
@@ -456,9 +456,9 @@ ASENTRY_NP(mpentry)
bic r0, #CPU_CONTROL_MMU_ENABLE
bic r0, #CPU_CONTROL_DC_ENABLE
bic r0, #CPU_CONTROL_IC_ENABLE
-   bic r0, #CPU_CONTROL_UNAL_ENABLE
bic r0, #CPU_CONTROL_BPRD_ENABLE
bic r0, #CPU_CONTROL_SW_ENABLE
+   orr r0, #CPU_CONTROL_UNAL_ENABLE
orr r0, #CPU_CONTROL_AFLT_ENABLE
orr r0, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r0)
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295557 - head/sys/dev/uart

2016-02-11 Thread Michal Meloun

Author: mmel
Date: Fri Feb 12 05:14:58 2016
New Revision: 295557
URL: https://svnweb.freebsd.org/changeset/base/295557

Log:
  UART: Fix spurious interrupts generated by ns8250 and lpc drivers:
   - don't enable transmitter empty interrupt before filling TX FIFO.
   - add missing uart_barrier() call in interrupt service routine

Modified:
  head/sys/dev/uart/uart_dev_lpc.c
  head/sys/dev/uart/uart_dev_ns8250.c

Modified: head/sys/dev/uart/uart_dev_lpc.c
==
--- head/sys/dev/uart/uart_dev_lpc.cFri Feb 12 02:53:44 2016
(r295556)
+++ head/sys/dev/uart/uart_dev_lpc.cFri Feb 12 05:14:58 2016
(r295557)
@@ -659,6 +659,7 @@ lpc_ns8250_bus_ipend(struct uart_softc *
if (iir & IIR_TXRDY) {
ipend |= SER_INT_TXIDLE;
uart_setreg(bas, REG_IER, lpc_ns8250->ier);
+   uart_barrier(bas);
} else
ipend |= SER_INT_SIGCHG;
}
@@ -892,12 +893,12 @@ lpc_ns8250_bus_transmit(struct uart_soft
uart_lock(sc->sc_hwmtx);
while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
;
-   uart_setreg(bas, REG_IER, lpc_ns8250->ier | IER_ETXRDY);
-   uart_barrier(bas);
for (i = 0; i < sc->sc_txdatasz; i++) {
uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
uart_barrier(bas);
}
+   uart_setreg(bas, REG_IER, lpc_ns8250->ier | IER_ETXRDY);
+   uart_barrier(bas);
sc->sc_txbusy = 1;
uart_unlock(sc->sc_hwmtx);
return (0);

Modified: head/sys/dev/uart/uart_dev_ns8250.c
==
--- head/sys/dev/uart/uart_dev_ns8250.c Fri Feb 12 02:53:44 2016
(r295556)
+++ head/sys/dev/uart/uart_dev_ns8250.c Fri Feb 12 05:14:58 2016
(r295557)
@@ -708,6 +708,7 @@ ns8250_bus_ipend(struct uart_softc *sc)
if (iir & IIR_TXRDY) {
ipend |= SER_INT_TXIDLE;
uart_setreg(bas, REG_IER, ns8250->ier);
+   uart_barrier(bas);
} else
ipend |= SER_INT_SIGCHG;
}
@@ -979,12 +980,12 @@ ns8250_bus_transmit(struct uart_softc *s
uart_lock(sc->sc_hwmtx);
while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
;
-   uart_setreg(bas, REG_IER, ns8250->ier | IER_ETXRDY);
-   uart_barrier(bas);
for (i = 0; i < sc->sc_txdatasz; i++) {
uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
uart_barrier(bas);
}
+   uart_setreg(bas, REG_IER, ns8250->ier | IER_ETXRDY);
+   uart_barrier(bas);
if (broken_txfifo)
ns8250_drain(bas, UART_DRAIN_TRANSMITTER);
else
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295037 - in head/sys: arm/arm conf

2016-01-29 Thread Michal Meloun

Author: mmel
Date: Fri Jan 29 11:00:33 2016
New Revision: 295037
URL: https://svnweb.freebsd.org/changeset/base/295037

Log:
  ARM: After removal of old pmap-v6 code, rename pmap-v6-new.c to pmap-v6.c.

Added:
  head/sys/arm/arm/pmap-v6.c
 - copied unchanged from r295036, head/sys/arm/arm/pmap-v6-new.c
Deleted:
  head/sys/arm/arm/pmap-v6-new.c
Modified:
  head/sys/conf/files.arm

Copied: head/sys/arm/arm/pmap-v6.c (from r295036, 
head/sys/arm/arm/pmap-v6-new.c)
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/arm/pmap-v6.c  Fri Jan 29 11:00:33 2016(r295037, copy 
of r295036, head/sys/arm/arm/pmap-v6-new.c)
@@ -0,0 +1,6634 @@
+/*-
+ * Copyright (c) 1991 Regents of the University of California.
+ * Copyright (c) 1994 John S. Dyson
+ * Copyright (c) 1994 David Greenman
+ * Copyright (c) 2005-2010 Alan L. Cox <a...@cs.rice.edu>
+ * Copyright (c) 2014 Svatopluk Kraus <onw...@gmail.com>
+ * Copyright (c) 2014 Michal Meloun <mel...@miracle.cz>
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and William Jolitz of UUNET Technologies Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *may be used to endorse or promote products derived from this software
+ *without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from:   @(#)pmap.c  7.7 (Berkeley)  5/12/91
+ */
+/*-
+ * Copyright (c) 2003 Networks Associates Technology, Inc.
+ * All rights reserved.
+ *
+ * This software was developed for the FreeBSD Project by Jake Burkholder,
+ * Safeport Network Services, and Network Associates Laboratories, the
+ * Security Research Division of Network Associates, Inc. under
+ * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
+ * CHATS research program.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+/*
+ * Manages physical address maps.
+ *
+ * Since the information managed by this module is
+ * also stored by the logical address mapping module,
+ * this module may throw away valid virtual-to-physical
+ * mappings at almost any time.  However, invalidations
+ * of vir

svn commit: r295036 - in head/sys: arm/arm arm/conf arm/include conf

2016-01-29 Thread Michal Meloun

Author: mmel
Date: Fri Jan 29 10:31:54 2016
New Revision: 295036
URL: https://svnweb.freebsd.org/changeset/base/295036

Log:
  ARM: remove old pmap-v6 code. The new pmap-v6 is mature enough, and
  dual implementation is showstopper for major cleanup.
  
  This patch only removes old code from tree. Cleanups will follow asap.

Deleted:
  head/sys/arm/arm/pmap-v6.c
Modified:
  head/sys/arm/arm/genassym.c
  head/sys/arm/arm/locore-v6.S
  head/sys/arm/arm/machdep.c
  head/sys/arm/arm/mem.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/swtch.S
  head/sys/arm/arm/trap-v6.c
  head/sys/arm/conf/std.armv6
  head/sys/arm/include/machdep.h
  head/sys/arm/include/pmap.h
  head/sys/arm/include/pte.h
  head/sys/arm/include/sf_buf.h
  head/sys/arm/include/vm.h
  head/sys/conf/files.arm
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/genassym.c
==
--- head/sys/arm/arm/genassym.c Fri Jan 29 09:16:08 2016(r295035)
+++ head/sys/arm/arm/genassym.c Fri Jan 29 10:31:54 2016(r295036)
@@ -61,16 +61,16 @@ __FBSDID("$FreeBSD$");
 
 ASSYM(KERNBASE, KERNBASE);
 ASSYM(PCB_NOALIGNFLT, PCB_NOALIGNFLT);
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
 #endif
 ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
 #endif
 ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
 ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
 ASSYM(PCB_PL1VEC, offsetof(struct pcb, pcb_pl1vec));
 #endif

Modified: head/sys/arm/arm/locore-v6.S
==
--- head/sys/arm/arm/locore-v6.SFri Jan 29 09:16:08 2016
(r295035)
+++ head/sys/arm/arm/locore-v6.SFri Jan 29 10:31:54 2016
(r295036)
@@ -30,6 +30,7 @@
 
 #include "assym.s"
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -39,11 +40,6 @@
 
 __FBSDID("$FreeBSD$");
 
-#ifndef ARM_NEW_PMAP
-#definePTE1_OFFSET L1_S_OFFSET
-#definePTE1_SHIFT  L1_S_SHIFT
-#definePTE1_SIZE   L1_S_SIZE
-#endif
 
 #if __ARM_ARCH >= 7
 #if defined(__ARM_ARCH_7VE__) || defined(__clang__)
@@ -287,7 +283,6 @@ ASENTRY_NP(init_mmu)
mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
mcr CP15_DACR(r0)
 
-#ifdef ARM_NEW_PMAP
/*
 * Set TEX remap registers
 *  - All is set to uncacheable memory
@@ -296,7 +291,6 @@ ASENTRY_NP(init_mmu)
mcr CP15_PRRR(r0)
mov r0, #0
mcr CP15_NMRR(r0)
-#endif
mcr CP15_TLBIALL/* Flush TLB */
DSB
ISB
@@ -305,9 +299,7 @@ ASENTRY_NP(init_mmu)
mrc CP15_SCTLR(r0)
orr r0, r0, #CPU_CONTROL_MMU_ENABLE
orr r0, r0, #CPU_CONTROL_V6_EXTPAGE
-#ifdef ARM_NEW_PMAP
orr r0, r0, #CPU_CONTROL_TR_ENABLE
-#endif
orr r0, r0, #CPU_CONTROL_AF_ENABLE
mcr CP15_SCTLR(r0)
DSB
@@ -398,23 +390,11 @@ END(reinit_mmu)
  * Addresses must be 1MiB aligned
  */
 build_device_pagetables:
-#if defined(ARM_NEW_PMAP)
ldr r4, =PTE1_V|PTE1_A|PTE1_AP_KRW|TEX1_CLASS_0
-#elif defined(SMP)
-   ldr r4, =(L1_TYPE_S|L1_S_AP(AP_KRW)|L1_SHARED)
-#else
-   ldr r4, =(L1_TYPE_S|L1_S_AP(AP_KRW))
-#endif
b   1f
 build_pagetables:
/* Set the required page attributed */
-#if defined(ARM_NEW_PMAP)
ldr r4, =PTE1_V|PTE1_A|PTE1_AP_KRW|TEX1_CLASS_0
-#elif defined(SMP)
-   ldr r4, =(L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)|L1_SHARED)
-#else
-   ldr r4, =(L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-#endif
 1:
orr r1, r4
 

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Fri Jan 29 09:16:08 2016(r295035)
+++ head/sys/arm/arm/machdep.c  Fri Jan 29 10:31:54 2016(r295036)
@@ -199,7 +199,7 @@ static char *loader_envp;
 
 vm_paddr_t pmap_pa;
 
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 vm_offset_t systempage;
 vm_offset_t irqstack;
 vm_offset_t undstack;
@@ -456,7 +456,7 @@ cpu_startup(void *dummy)
pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
USPACE_SVC_STACK_TOP;
pmap_set_pcb_pagedir(pmap_kernel(), pcb);
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH  < 6
vector_page_setprot(VM_PROT_READ);
pmap_postinit();
 #endif
@@ -1283,7 +1283,7 @@ arm_predict_branch(void *cookie, u_int i
}
 }
 
-#ifdef ARM_NEW_PMAP
+#if __ARM_ARCH >= 6
 void
 set_stackptrs(int cpu)
 {
@@ -1447,7 +1447,7 @@ print_kenv(void)
debugf(" %x %s\n", (uint32_t)cp, cp);
 }
 
-#ifndef ARM_NEW_PMAP
+#if __ARM_ARCH < 6
 void *
 initarm(struct arm_boot_params *abp)
 {
@@ -1717,7 +1717,7 @@

svn commit: r295097 - head/sys/arm/arm

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 16:55:52 2016
New Revision: 295097
URL: https://svnweb.freebsd.org/changeset/base/295097

Log:
  ARM: Fix END() symbol for cpu_ident function. I forgot to rename it
  in r295096.

Modified:
  head/sys/arm/arm/cpufunc_asm.S

Modified: head/sys/arm/arm/cpufunc_asm.S
==
--- head/sys/arm/arm/cpufunc_asm.S  Sun Jan 31 16:34:06 2016
(r295096)
+++ head/sys/arm/arm/cpufunc_asm.S  Sun Jan 31 16:55:52 2016
(r295097)
@@ -65,7 +65,7 @@ END(cpufunc_nullop)
 ENTRY(cpu_ident)
mrc p15, 0, r0, c0, c0, 0
RET
-END(cpufunc_id)
+END(cpu_ident)
 
 ENTRY(cpu_get_control)
mrc p15, 0, r0, c1, c0, 0
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295122 - in head/sys/arm: arm include

2016-02-01 Thread Michal Meloun

Author: mmel
Date: Mon Feb  1 13:13:53 2016
New Revision: 295122
URL: https://svnweb.freebsd.org/changeset/base/295122

Log:
  ARM: Remove never used cpu_tlb_flushI and cpu_tlb_flushI_SE() functions
  and their implementations.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_arm10.S
  head/sys/arm/arm/cpufunc_asm_arm11.S
  head/sys/arm/arm/cpufunc_asm_armv4.S
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Mon Feb  1 08:06:17 2016(r295121)
+++ head/sys/arm/arm/cpufunc.c  Mon Feb  1 13:13:53 2016(r295122)
@@ -116,8 +116,6 @@ struct cpu_functions arm9_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -171,8 +169,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   arm10_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -280,8 +276,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
armv7_tlb_flushID,  /* tlb_flushID  */
armv7_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv7_tlb_flushID,  /* tlb_flushI   */
-   armv7_tlb_flushID_SE,   /* tlb_flushI_SE*/
armv7_tlb_flushID,  /* tlb_flushD   */
armv7_tlb_flushID_SE,   /* tlb_flushD_SE*/
 
@@ -336,8 +330,6 @@ struct cpu_functions xscale_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
xscale_tlb_flushID_SE,  /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -392,8 +384,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
armv4_tlb_flushID,  /* tlb_flushID  */
xscale_tlb_flushID_SE,  /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   (void *)armv4_tlb_flushI,   /* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -447,8 +437,6 @@ struct cpu_functions fa526_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
fa526_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   fa526_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -502,8 +490,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
arm11_tlb_flushID,  /* tlb_flushID  */
arm11_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   arm11_tlb_flushI,   /* tlb_flushI   */
-   arm11_tlb_flushI_SE,/* tlb_flushI_SE*/
arm11_tlb_flushD,   /* tlb_flushD   */
arm11_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -561,8 +547,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
armv7_tlb_flushID,  /* tlb_flushID  */
armv7_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv7_tlb_flushID,  /* tlb_flushI   */
-   armv7_tlb_flushID_SE,   /* tlb_flushI_SE*/
armv7_tlb_flushID,  /* tlb_flushD   */
armv7_tlb_flushID_SE,   /* tlb_flushD_SE*/
 

Modified: head/sys/arm/arm/cpufunc_asm_arm10.S
==
--- head/sys/arm/arm/cpufunc_asm_arm10.SMon Feb  1 08:06:17 2016
(r295121)
+++ head/sys/arm/arm/cpufunc_asm_arm10.SMon Feb  1 13:13:53 2016
(r295122)
@@ -44,11 +44,6 @@ ENTRY(arm10_tlb_flushID_SE)
bx  lr
 END(arm10_tlb_flushID_SE)
 
-ENTRY(arm10_tlb_flushI_SE)
-   mcr p15, 0, r0, c8, c5, 1   /* flush I tlb single entry */
-   bx  lr

svn commit: r295201 - head/sys/arm/xscale/i8134x

2016-02-03 Thread Michal Meloun

Author: mmel
Date: Wed Feb  3 10:39:29 2016
New Revision: 295201
URL: https://svnweb.freebsd.org/changeset/base/295201

Log:
  ARM: Remove C++ comments erroneously committed  in r295200.

Modified:
  head/sys/arm/xscale/i8134x/i80321reg.h

Modified: head/sys/arm/xscale/i8134x/i80321reg.h
==
--- head/sys/arm/xscale/i8134x/i80321reg.h  Wed Feb  3 09:15:44 2016
(r295200)
+++ head/sys/arm/xscale/i8134x/i80321reg.h  Wed Feb  3 10:39:29 2016
(r295201)
@@ -331,12 +331,12 @@
 #defineICU_INT_bit26   26
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_SSP 25  /* SSP serial port */
+#defineICU_INT_SSP 25  /* SSP serial port */
 
 #defineICU_INT_MUE 24  /* msg unit error */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_AAUE23  /* AAU error */
+#defineICU_INT_AAUE23  /* AAU error */
 
 #defineICU_INT_bit22   22
 #defineICU_INT_DMA1E   21  /* DMA Ch 1 error */
@@ -355,8 +355,8 @@
 #defineICU_INT_CPPM8   /* core processor PMU */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_AAU_EOC 7   /* AAU end-of-chain */
-//#define  ICU_INT_AAU_EOT 6   /* AAU end-of-transfer */
+#defineICU_INT_AAU_EOC 7   /* AAU end-of-chain */
+#defineICU_INT_AAU_EOT 6   /* AAU end-of-transfer */
 
 #defineICU_INT_bit55
 #defineICU_INT_bit44
@@ -366,11 +366,11 @@
 #defineICU_INT_DMA0_EOT0   /* DMA0 end-of-transfer */
 
 /* CPU_XSCALE_80321 */
-//#define  ICU_INT_HWMASK  (0x & \
-// ~((1 << ICU_INT_bit26) | \
-//   (1 << ICU_INT_bit22) | \
-//   (1 << ICU_INT_bit5)  | \
-//   (1 << ICU_INT_bit4)))
+#defineICU_INT_HWMASK  (0x & \
+   ~((1 << ICU_INT_bit26) | \
+ (1 << ICU_INT_bit22) | \
+ (1 << ICU_INT_bit5)  | \
+ (1 << ICU_INT_bit4)))
 
 /*
  * Peripheral Bus Interface Unit
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295198 - head/sys/arm/arm

2016-02-03 Thread Michal Meloun

Author: mmel
Date: Wed Feb  3 08:12:21 2016
New Revision: 295198
URL: https://svnweb.freebsd.org/changeset/base/295198

Log:
  ARM: acle-compat.h is arm specific header, don't include it for aarch64. This
  fixes aarch64 buildkernel.

Modified:
  head/sys/arm/arm/devmap.c

Modified: head/sys/arm/arm/devmap.c
==
--- head/sys/arm/arm/devmap.c   Wed Feb  3 04:02:50 2016(r295197)
+++ head/sys/arm/arm/devmap.c   Wed Feb  3 08:12:21 2016(r295198)
@@ -40,7 +40,9 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#ifdef __arm__
 #include 
+#endif
 #include 
 #include 
 #include 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295200 - in head/sys: arm/arm arm/conf arm/include arm/xscale/i80321 arm/xscale/i8134x conf

2016-02-03 Thread Michal Meloun

Author: mmel
Date: Wed Feb  3 09:15:44 2016
New Revision: 295200
URL: https://svnweb.freebsd.org/changeset/base/295200

Log:
  ARM: Remove support for xscale i80219 and i80321 CPUs. We haven't single
  supported config/board with these CPUs.

Deleted:
  head/sys/arm/xscale/i80321/
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/conf/NOTES
  head/sys/arm/include/cpuconf.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/xscale/i8134x/i80321reg.h
  head/sys/conf/files.arm
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Wed Feb  3 08:59:12 2016(r295199)
+++ head/sys/arm/arm/cpufunc.c  Wed Feb  3 09:15:44 2016(r295200)
@@ -60,18 +60,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219)
-#include 
-#include 
-#endif
-
-/*
- * Some definitions in i81342reg.h clash with i80321reg.h.
- * This only happens for the LINT kernel. As it happens,
- * we don't need anything from i81342reg.h that we already
- * got from somewhere else during a LINT compile.
- */
-#if defined(CPU_XSCALE_81342) && !defined(COMPILING_LINT)
+#if defined(CPU_XSCALE_81342)
 #include 
 #endif
 
@@ -306,9 +295,7 @@ struct cpu_functions pj4bv7_cpufuncs = {
 };
 #endif /* CPU_MV_PJ4B */
 
-#if defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
-  defined(CPU_XSCALE_80219)
+#if defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
 
 struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
@@ -359,8 +346,7 @@ struct cpu_functions xscale_cpufuncs = {
xscale_setup/* cpu setup*/
 };
 #endif
-/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
-   CPU_XSCALE_80219 */
+/* CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
 
 #ifdef CPU_XSCALE_81342
 struct cpu_functions xscalec3_cpufuncs = {
@@ -588,10 +574,10 @@ u_int cpu_reset_needs_v4_MMU_disable; /*
 
 #if defined(CPU_ARM9) ||   \
   defined (CPU_ARM9E) ||   \
-  defined(CPU_ARM1176) || defined(CPU_XSCALE_80321) || \
+  defined(CPU_ARM1176) ||  \
   defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||  \
   defined(CPU_FA526) || defined(CPU_MV_PJ4B) ||\
-  defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
+  defined(CPU_XSCALE_81342) || \
   defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 
 /* Global cache line sizes, use 32 as default */
@@ -829,18 +815,6 @@ set_cpufuncs()
}
 #endif /* CPU_FA526 */
 
-#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219)
-   if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 ||
-   cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0 ||
-   cputype == CPU_ID_80219_400 || cputype == CPU_ID_80219_600) {
-   cpufuncs = xscale_cpufuncs;
-   cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
-   get_cachetype_cp15();
-   pmap_pte_init_xscale();
-   goto out;
-   }
-#endif /* CPU_XSCALE_80321 */
-
 #if defined(CPU_XSCALE_81342)
if (cputype == CPU_ID_81342) {
cpufuncs = xscalec3_cpufuncs;
@@ -1207,9 +1181,8 @@ fa526_setup(void)
 }
 #endif /* CPU_FA526 */
 
-#if defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
-  defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
+#if defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
+  defined(CPU_XSCALE_81342)
 void
 xscale_setup(void)
 {
@@ -1276,5 +1249,4 @@ xscale_setup(void)
__asm __volatile("mcr p15, 0, %0, c1, c0, 1"
: : "r" (auxctl));
 }
-#endif /* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
-  CPU_XSCALE_80219 */
+#endif /* CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Wed Feb  3 08:59:12 2016
(r295199)
+++ head/sys/arm/arm/elf_trampoline.c   Wed Feb  3 09:15:44 2016
(r295200)
@@ -67,9 +67,7 @@ extern void fa526_idcache_wbinv_all(void
 extern void armv5_ec_idcache_wbinv_all(void);
 #elif defined(CPU_ARM1176)
 #define cpu_idcache_wbinv_all  armv6_idcache_wbinv_all
-#elif defined(CPU_XSCALE_80321) || \
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||  \
-  defined(CPU_XSCALE_80219)
+#elif defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
 #define cpu_idcache_wbinv_all  xscale_cache_purgeID
 extern void xscale_cache_purgeID(void);
 #elif defined(CPU_XSCALE_81342)

Modified: head/sys/arm/conf/NOTES
==
--- head/sys/arm/conf/NOTES Wed Feb  3 08:59:12 2016(r295199)
+++

svn commit: r295213 - in head/sys/arm: arm at91 cavium/cns11xx include xscale/i8134x xscale/ixp425 xscale/pxa

2016-02-03 Thread Michal Meloun

Author: mmel
Date: Wed Feb  3 16:44:06 2016
New Revision: 295213
URL: https://svnweb.freebsd.org/changeset/base/295213

Log:
  ARM: Consistently use cpu_setttb() instead of setttb().
  Remove unused #define for drain_writebuf.

Modified:
  head/sys/arm/arm/machdep.c
  head/sys/arm/at91/at91_machdep.c
  head/sys/arm/cavium/cns11xx/econa_machdep.c
  head/sys/arm/include/cpufunc.h
  head/sys/arm/xscale/i8134x/crb_machdep.c
  head/sys/arm/xscale/ixp425/avila_machdep.c
  head/sys/arm/xscale/pxa/pxa_machdep.c

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Wed Feb  3 15:45:13 2016(r295212)
+++ head/sys/arm/arm/machdep.c  Wed Feb  3 16:44:06 2016(r295213)
@@ -1622,7 +1622,7 @@ initarm(struct arm_boot_params *abp)
 
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 
DOMAIN_CLIENT);
pmap_pa = kernel_l1pt.pv_pa;
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
 
@@ -1675,7 +1675,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.
@@ -1867,7 +1867,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/at91/at91_machdep.c
==
--- head/sys/arm/at91/at91_machdep.cWed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/at91/at91_machdep.cWed Feb  3 16:44:06 2016
(r295213)
@@ -566,7 +566,7 @@ initarm(struct arm_boot_params *abp)
 
arm_devmap_bootstrap(l1pagetable, at91_devmap);
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 
DOMAIN_CLIENT);
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
 
@@ -612,7 +612,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/cavium/cns11xx/econa_machdep.c
==
--- head/sys/arm/cavium/cns11xx/econa_machdep.c Wed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/cavium/cns11xx/econa_machdep.c Wed Feb  3 16:44:06 2016
(r295213)
@@ -275,7 +275,7 @@ initarm(struct arm_boot_params *abp)
 
arm_devmap_bootstrap(l1pagetable, econa_devmap);
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
-   setttb(kernel_l1pt.pv_pa);
+   cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
cninit();
@@ -297,7 +297,7 @@ initarm(struct arm_boot_params *abp)
/*
 * We must now clean the cache again
 * Cleaning may be done by reading new data to displace any
-* dirty data in the cache. This will have happened in setttb()
+* dirty data in the cache. This will have happened in cpu_setttb()
 * but since we are boot strapping the addresses used for the read
 * may have just been remapped and thus the cache could be out
 * of sync. A re-clean after the switch will cure this.

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Wed Feb  3 15:45:13 2016
(r295212)
+++ head/sys/arm/include/cpufunc.h  Wed Feb  3 16:44:06 2016
(r295213)
@@ -412,9 +412,6 @@ voidxscalec3_context_switch (void);

svn commit: r295235 - head/sys/arm/arm

2016-02-03 Thread Michal Meloun

Author: mmel
Date: Thu Feb  4 06:39:20 2016
New Revision: 295235
URL: https://svnweb.freebsd.org/changeset/base/295235

Log:
  ARM: Remove unused symbols from genassym.c.

Modified:
  head/sys/arm/arm/genassym.c

Modified: head/sys/arm/arm/genassym.c
==
--- head/sys/arm/arm/genassym.c Thu Feb  4 05:03:35 2016(r295234)
+++ head/sys/arm/arm/genassym.c Thu Feb  4 06:39:20 2016(r295235)
@@ -59,7 +59,6 @@ __FBSDID("$FreeBSD$");
 #include 
 
 ASSYM(KERNBASE, KERNBASE);
-ASSYM(PCB_NOALIGNFLT, PCB_NOALIGNFLT);
 #if __ARM_ARCH >= 6
 ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
 #endif
@@ -67,7 +66,6 @@ ASSYM(PCB_ONFAULT, offsetof(struct pcb, 
 #if __ARM_ARCH < 6
 ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
 #endif
-ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
 ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
 #if __ARM_ARCH < 6
 ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
@@ -93,23 +91,15 @@ ASSYM(M_DATA, offsetof(struct mbuf, m_da
 ASSYM(M_NEXT, offsetof(struct mbuf, m_next));
 ASSYM(IP_SRC, offsetof(struct ip, ip_src));
 ASSYM(IP_DST, offsetof(struct ip, ip_dst));
-ASSYM(CF_SETTTB, offsetof(struct cpu_functions, cf_setttb));
-ASSYM(CF_CONTROL, offsetof(struct cpu_functions, cf_control));
 ASSYM(CF_CONTEXT_SWITCH, offsetof(struct cpu_functions, cf_context_switch));
 ASSYM(CF_DCACHE_WB_RANGE, offsetof(struct cpu_functions, cf_dcache_wb_range));
-ASSYM(CF_L2CACHE_WB_RANGE, offsetof(struct cpu_functions, 
cf_l2cache_wb_range));
 ASSYM(CF_IDCACHE_WBINV_ALL, offsetof(struct cpu_functions, 
cf_idcache_wbinv_all));
 ASSYM(CF_L2CACHE_WBINV_ALL, offsetof(struct cpu_functions, 
cf_l2cache_wbinv_all));
 ASSYM(CF_TLB_FLUSHID_SE, offsetof(struct cpu_functions, cf_tlb_flushID_SE));
 
-ASSYM(V_TRAP, offsetof(struct vmmeter, v_trap));
-ASSYM(V_SOFT, offsetof(struct vmmeter, v_soft));
-ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
-
 ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
 ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
 ASSYM(TD_PROC, offsetof(struct thread, td_proc));
-ASSYM(TD_FRAME, offsetof(struct thread, td_frame));
 ASSYM(TD_MD, offsetof(struct thread, td_md));
 ASSYM(TD_LOCK, offsetof(struct thread, td_lock));
 ASSYM(MD_TP, offsetof(struct mdthread, md_tp));
@@ -146,10 +136,6 @@ ASSYM(PMAP_INCLUDE_PTE_SYNC, 1);
 #endif
 ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
 ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
-ASSYM(P_TRACED, P_TRACED);
-ASSYM(P_SIGEVENT, P_SIGEVENT);
-ASSYM(P_PROFIL, P_PROFIL);
-ASSYM(TRAPFRAMESIZE, sizeof(struct trapframe));
 
 ASSYM(MAXCOMLEN, MAXCOMLEN);
 ASSYM(MAXCPU, MAXCPU);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295066 - in head/sys: arm/arm conf

2016-01-30 Thread Michal Meloun

Author: mmel
Date: Sat Jan 30 08:02:12 2016
New Revision: 295066
URL: https://svnweb.freebsd.org/changeset/base/295066

Log:
  ARM: Split swtch.S into common, ARMv4 and ARMv6 parts. Cleanup them.

Added:
  head/sys/arm/arm/swtch-v4.S
 - copied, changed from r295065, head/sys/arm/arm/swtch.S
  head/sys/arm/arm/swtch-v6.S
 - copied, changed from r295065, head/sys/arm/arm/swtch.S
Modified:
  head/sys/arm/arm/swtch.S
  head/sys/conf/files.arm

Copied and modified: head/sys/arm/arm/swtch-v4.S (from r295065, 
head/sys/arm/arm/swtch.S)
==
--- head/sys/arm/arm/swtch.SSat Jan 30 07:00:36 2016(r295065, copy 
source)
+++ head/sys/arm/arm/swtch-v4.S Sat Jan 30 08:02:12 2016(r295066)
@@ -89,19 +89,9 @@
 
 __FBSDID("$FreeBSD$");
 
-#if __ARM_ARCH >= 6 && defined(SMP)
-#define GET_PCPU(tmp, tmp2) \
-   mrc p15, 0, tmp, c0, c0, 5; \
-   and tmp, tmp, #0xf; \
-   ldr tmp2, .Lcurpcpu+4;  \
-   mul tmp, tmp, tmp2; \
-   ldr tmp2, .Lcurpcpu;\
-   add tmp, tmp, tmp2;
-#else
 
 #define GET_PCPU(tmp, tmp2) \
ldr tmp, .Lcurpcpu
-#endif
 
 #ifdef VFP
.fpu vfp/* allow VFP instructions */
@@ -114,8 +104,6 @@ __FBSDID("$FreeBSD$");
.word   _C_LABEL(blocked_lock)
 
 
-#if __ARM_ARCH < 6
-
 #define DOMAIN_CLIENT  0x01
 
 .Lcpufuncs:
@@ -147,10 +135,8 @@ ENTRY(cpu_throw)
/* Switch to lwp0 context */
 
ldr r9, .Lcpufuncs
-#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && 
!defined(CPU_KRAIT)
mov lr, pc
ldr pc, [r9, #CF_IDCACHE_WBINV_ALL]
-#endif
ldr r0, [r7, #(PCB_PL1VEC)]
ldr r1, [r7, #(PCB_DACR)]
/*
@@ -198,21 +184,16 @@ ENTRY(cpu_throw)
str r7, [r6, #PC_CURPCB]
/* We have a new curthread now so make a note it */
str r5, [r6, #PC_CURTHREAD]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r5, c13, c0, 4
-#endif
+
/* Set the new tp */
ldr r6, [r5, #(TD_MD + MD_TP)]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r6, c13, c0, 3
-#else
ldr r4, =ARM_TP_ADDRESS
str r6, [r4]
ldr r6, [r5, #(TD_MD + MD_RAS_START)]
str r6, [r4, #4] /* ARM_RAS_START */
ldr r6, [r5, #(TD_MD + MD_RAS_END)]
str r6, [r4, #8] /* ARM_RAS_END */
-#endif
+
/* Restore all the saved registers and exit */
add r3, r7, #PCB_R4
ldmia   r3, {r4-r12, sp, pc}
@@ -245,9 +226,6 @@ ENTRY(cpu_switch)
/* We have a new curthread now so make a note it */
GET_PCPU(r7, r2)
str r1, [r7, #PC_CURTHREAD]
-#if __ARM_ARCH >= 6
-   mcr p15, 0, r1, c13, c0, 4
-#endif
 
/* Hook in a new pcb */
ldr r2, [r1, #TD_PCB]
@@ -259,14 +237,6 @@ ENTRY(cpu_switch)
ldr r2, [r0, #(TD_PCB)]
mov r4, r0 /* Save the old thread. */
 
-#if __ARM_ARCH >= 6
-   /*
-* Set new tp.  No need to store the old one first, userland can't
-* change it directly on armv6.
-*/
-   ldr r9, [r1, #(TD_MD + MD_TP)]
-   mcr p15, 0, r9, c13, c0, 3
-#else
/* Store the old tp; userland can change it on armv4. */
ldr r3, =ARM_TP_ADDRESS
ldr r9, [r3]
@@ -283,7 +253,6 @@ ENTRY(cpu_switch)
str r9, [r3, #4]
ldr r9, [r1, #(TD_MD + MD_RAS_END)]
str r9, [r3, #8]
-#endif
 
/* Get the user structure for the new process in r9 */
ldr r9, [r1, #(TD_PCB)]
@@ -327,7 +296,6 @@ ENTRY(cpu_switch)
cmpeq   r0, r5  /* Same DACR? */
beq .Lcs_context_switched   /* yes! */
 
-#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && 
!defined(CPU_KRAIT)
/*
 * Definately need to flush the cache.
 */
@@ -335,7 +303,7 @@ ENTRY(cpu_switch)
ldr r1, .Lcpufuncs
mov lr, pc
ldr pc, [r1, #CF_IDCACHE_WBINV_ALL]
-#endif
+
 .Lcs_cache_purge_skipped:
/* rem: r6 = lock */
/* rem: r9 = new PCB */
@@ -399,14 +367,6 @@ ENTRY(cpu_switch)
 
/* Release the old thread */
str r6, [r4, #TD_LOCK]
-#if defined(SCHED_ULE) && defined(SMP)
-   ldr r6, .Lblocked_lock
-   GET_CURTHREAD_PTR(r3)
-1:
-   ldr r4, [r3, #TD_LOCK]
-   cmp r4, r6
-   beq 1b
-#endif
 
/* XXXSCW: Safe to re-enable FIQs here */
 
@@ -418,404 +378,4 @@ ENTRY(cpu_switch)
 END(cpu_switch)
 
 
-#else /* __ARM_ARCH < 6 */
-#include 
-
-ENTRY(cpu_context_switch) /* QQQ: What about macro instead of function?
*/
-   DSB
-   mcr CP15_TTBR0(r0)  /* set the new TTB */
-   ISB
-   mov r0, #(CPU_ASID_KERNEL)
-   mcr CP15_TLBIASID(r0)   /* flush not global TLBs */
-   /*
-   * Flush entire Branch Target Cache

svn commit: r295067 - head/sys/dev/usb/controller

2016-01-30 Thread Michal Meloun

Author: mmel
Date: Sat Jan 30 08:27:09 2016
New Revision: 295067
URL: https://svnweb.freebsd.org/changeset/base/295067

Log:
  EHCI: Correct address of EHCI_USBMODE_LPM register is 0xC8, not 0xA8.

Modified:
  head/sys/dev/usb/controller/ehcireg.h

Modified: head/sys/dev/usb/controller/ehcireg.h
==
--- head/sys/dev/usb/controller/ehcireg.h   Sat Jan 30 08:02:12 2016
(r295066)
+++ head/sys/dev/usb/controller/ehcireg.h   Sat Jan 30 08:27:09 2016
(r295067)
@@ -167,7 +167,7 @@
  * bits are equal
  */
 #defineEHCI_USBMODE_NOLPM  0x68/* RW USB Device mode reg (no 
LPM) */
-#defineEHCI_USBMODE_LPM0xA8/* RW USB Device mode reg (LPM) 
*/
+#defineEHCI_USBMODE_LPM0xC8/* RW USB Device mode reg (LPM) 
*/
 #defineEHCI_UM_CM  0x0003  /* R/WO Controller Mode 
*/
 #defineEHCI_UM_CM_IDLE 0x0 /* Idle */
 #defineEHCI_UM_CM_HOST 0x3 /* Host Controller */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295068 - head/sys/arm/arm

2016-01-30 Thread Michal Meloun

Author: mmel
Date: Sat Jan 30 10:10:29 2016
New Revision: 295068
URL: https://svnweb.freebsd.org/changeset/base/295068

Log:
  ARM: Don't misuse ARM_TP_ADDRESS as ARMv4 / ARMv6 selector.

Modified:
  head/sys/arm/arm/machdep.c

Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c  Sat Jan 30 08:27:09 2016(r295067)
+++ head/sys/arm/arm/machdep.c  Sat Jan 30 10:10:29 2016(r295068)
@@ -427,11 +427,9 @@ cpu_startup(void *dummy)
 {
struct pcb *pcb = thread0.td_pcb;
const unsigned int mbyte = 1024 * 1024;
-#ifdef ARM_TP_ADDRESS
-#ifndef ARM_CACHE_LOCK_ENABLE
+#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
vm_page_t m;
 #endif
-#endif
 
identify_arm_cpu();
 
@@ -456,11 +454,9 @@ cpu_startup(void *dummy)
pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
USPACE_SVC_STACK_TOP;
pmap_set_pcb_pagedir(kernel_pmap, pcb);
-#if __ARM_ARCH  < 6
+#if __ARM_ARCH < 6
vector_page_setprot(VM_PROT_READ);
pmap_postinit();
-#endif
-#ifdef ARM_TP_ADDRESS
 #ifdef ARM_CACHE_LOCK_ENABLE
pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
arm_lock_cache_line(ARM_TP_ADDRESS);
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295073 - in head/sys/arm: arm include

2016-01-30 Thread Michal Meloun

Author: mmel
Date: Sat Jan 30 13:11:13 2016
New Revision: 295073
URL: https://svnweb.freebsd.org/changeset/base/295073

Log:
  ARM: Remove TLB IPI.
  We don't support SMP on ARMv6. All ARMv7 multicore cpus already uses
  hardware broadcast for TLB and cache operations.

Modified:
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/smp.h

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Sat Jan 30 12:58:38 2016
(r295072)
+++ head/sys/arm/arm/mp_machdep.c   Sat Jan 30 13:11:13 2016
(r295073)
@@ -341,13 +341,6 @@ ipi_hardclock(void *arg)
critical_exit();
 }
 
-static void
-ipi_tlb(void *dummy __unused)
-{
-
-   CTR1(KTR_SMP, "%s: IPI_TLB", __func__);
-   cpufuncs.cf_tlb_flushID();
-}
 #else
 static int
 ipi_handler(void *arg)
@@ -413,10 +406,6 @@ ipi_handler(void *arg)
CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
hardclockintr();
break;
-   case IPI_TLB:
-   CTR1(KTR_SMP, "%s: IPI_TLB", __func__);
-   cpufuncs.cf_tlb_flushID();
-   break;
default:
panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu);
}
@@ -446,7 +435,6 @@ release_aps(void *dummy __unused)
intr_ipi_set_handler(IPI_STOP, "stop", ipi_stop, NULL, 0);
intr_ipi_set_handler(IPI_PREEMPT, "preempt", ipi_preempt, NULL, 0);
intr_ipi_set_handler(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL, 
0);
-   intr_ipi_set_handler(IPI_TLB, "tlb", ipi_tlb, NULL, 0);
 
 #else
 #ifdef IPI_IRQ_START
@@ -538,10 +526,3 @@ ipi_selected(cpuset_t cpus, u_int ipi)
platform_ipi_send(cpus, ipi);
 }
 
-void
-tlb_broadcast(int ipi)
-{
-
-   if (smp_started)
-   ipi_all_but_self(ipi);
-}

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Sat Jan 30 12:58:38 2016
(r295072)
+++ head/sys/arm/include/cpufunc.h  Sat Jan 30 13:11:13 2016
(r295073)
@@ -184,8 +184,6 @@ extern u_int cputype;
 #define cpu_faultstatus()  cpufuncs.cf_faultstatus()
 #define cpu_faultaddress() cpufuncs.cf_faultaddress()
 
-#ifndef SMP
-
 #definecpu_tlb_flushID()   cpufuncs.cf_tlb_flushID()
 #definecpu_tlb_flushID_SE(e)   cpufuncs.cf_tlb_flushID_SE(e)
 #definecpu_tlb_flushI()cpufuncs.cf_tlb_flushI()
@@ -193,51 +191,6 @@ extern u_int cputype;
 #definecpu_tlb_flushD()cpufuncs.cf_tlb_flushD()
 #definecpu_tlb_flushD_SE(e)cpufuncs.cf_tlb_flushD_SE(e)
 
-#else
-void tlb_broadcast(int);
-
-#if defined(CPU_CORTEXA) || defined(CPU_MV_PJ4B) || defined(CPU_KRAIT)
-#define TLB_BROADCAST  /* No need to explicitely send an IPI */
-#else
-#define TLB_BROADCAST  tlb_broadcast(7)
-#endif
-
-#definecpu_tlb_flushID() do { \
-   cpufuncs.cf_tlb_flushID(); \
-   TLB_BROADCAST; \
-} while(0)
-
-#definecpu_tlb_flushID_SE(e) do { \
-   cpufuncs.cf_tlb_flushID_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushI() do { \
-   cpufuncs.cf_tlb_flushI(); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushI_SE(e) do { \
-   cpufuncs.cf_tlb_flushI_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushD() do { \
-   cpufuncs.cf_tlb_flushD(); \
-   TLB_BROADCAST; \
-} while(0)
-
-
-#definecpu_tlb_flushD_SE(e) do { \
-   cpufuncs.cf_tlb_flushD_SE(e); \
-   TLB_BROADCAST; \
-} while(0)
-
-#endif
-
 #definecpu_icache_sync_all()   cpufuncs.cf_icache_sync_all()
 #definecpu_icache_sync_range(a, s) cpufuncs.cf_icache_sync_range((a), 
(s))
 

Modified: head/sys/arm/include/smp.h
==
--- head/sys/arm/include/smp.h  Sat Jan 30 12:58:38 2016(r295072)
+++ head/sys/arm/include/smp.h  Sat Jan 30 13:11:13 2016(r295073)
@@ -14,8 +14,8 @@ enum {
IPI_STOP,
IPI_STOP_HARD = IPI_STOP, /* These are synonyms on arm. */
IPI_HARDCLOCK,
-   IPI_TLB,
-   IPI_CACHE,
+   IPI_TLB,/* Not used now, but keep it reserved. */
+   IPI_CACHE,  /* Not used now, but keep it reserved. */
INTR_IPI_COUNT
 };
 #else
@@ -25,8 +25,8 @@ enum {
 #define IPI_STOP   4
 #define IPI_STOP_HARD  4
 #define IPI_HARDCLOCK  6
-#define IPI_TLB7
-#define IPI_CACHE  8
+#define IPI_TLB7   /* Not used now, but keep it reserved. 
*/
+#define IPI_CACHE  8   /* Not used now, but keep it reserved. */
 #endif /* INTRNG */
 
 void   init_secondary(int cpu);
___

svn commit: r295071 - head/sys/arm/arm

2016-01-30 Thread Michal Meloun

Author: mmel
Date: Sat Jan 30 12:23:28 2016
New Revision: 295071
URL: https://svnweb.freebsd.org/changeset/base/295071

Log:
  ARM: Cleanup mp_machdep.c. SMP is supported only on ARMv6 and later.

Modified:
  head/sys/arm/arm/mp_machdep.c

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Sat Jan 30 11:10:22 2016
(r295070)
+++ head/sys/arm/arm/mp_machdep.c   Sat Jan 30 12:23:28 2016
(r295071)
@@ -156,7 +156,6 @@ init_secondary(int cpu)
 #ifndef ARM_INTRNG
int start = 0, end = 0;
 #endif
-#if __ARM_ARCH >= 6
uint32_t actlr_mask, actlr_set;
 
pmap_set_tex();
@@ -168,11 +167,6 @@ init_secondary(int cpu)
set_stackptrs(cpu);
 
enable_interrupts(PSR_A);
-#else /* __ARM_ARCH >= 6 */
-   cpu_setup();
-   setttb(pmap_pa);
-   cpu_tlb_flushID();
-#endif /* __ARM_ARCH >= 6 */
pc = &__pcpu[cpu];
 
/*
@@ -184,10 +178,6 @@ init_secondary(int cpu)
 
pcpu_init(pc, cpu, sizeof(struct pcpu));
dpcpu_init(dpcpu[cpu - 1], cpu);
-#if __ARM_ARCH < 6
-   /* Provide stack pointers for other processor modes. */
-   set_stackptrs(cpu);
-#endif
/* Signal our startup to BSP */
atomic_add_rel_32(_naps, 1);
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295090 - head/sys/arm/arm

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 08:53:53 2016
New Revision: 295090
URL: https://svnweb.freebsd.org/changeset/base/295090

Log:
  ARM: Convert spaces to tabs, fix formatting.
  Not a functional change.

Modified:
  head/sys/arm/arm/swtch-v4.S
  head/sys/arm/arm/swtch-v6.S

Modified: head/sys/arm/arm/swtch-v4.S
==
--- head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:06:22 2016(r295089)
+++ head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:53:53 2016(r295090)
@@ -98,7 +98,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 .Lcurpcpu:
-   .word   _C_LABEL(__pcpu)
+   .word   _C_LABEL(__pcpu)
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 
@@ -129,7 +129,7 @@ ENTRY(cpu_throw)
 #endif
 
GET_PCPU(r7, r9)
-   ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */
+   ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */
 
/* Switch to lwp0 context */
 
@@ -275,25 +275,25 @@ ENTRY(cpu_switch)
/* rem: r2 = old PCB */
/* rem: r9 = new PCB */
 
-   ldr r5, [r9, #(PCB_DACR)]   /* r5 = new DACR */
+   ldr r5, [r9, #(PCB_DACR)]   /* r5 = new DACR */
mov r2, #DOMAIN_CLIENT
-   cmp r5, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
-   beq .Lcs_context_switched/* Yup. Don't flush cache */
-   mrc p15, 0, r0, c3, c0, 0   /* r0 = old DACR */
+   cmp r5, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
+   beq .Lcs_context_switched   /* Yup. Don't flush cache */
+   mrc p15, 0, r0, c3, c0, 0   /* r0 = old DACR */
/*
-* Get the new L1 table pointer into r11.  If we're switching to
+* Get the new L1 table pointer into r11. If we're switching to
 * an LWP with the same address space as the outgoing one, we can
 * skip the cache purge and the TTB load.
 *
 * To avoid data dep stalls that would happen anyway, we try
 * and get some useful work done in the mean time.
 */
-   mrc p15, 0, r10, c2, c0, 0  /* r10 = old L1 */
-   ldr r11, [r9, #(PCB_PAGEDIR)]   /* r11 = new L1 */
+   mrc p15, 0, r10, c2, c0, 0  /* r10 = old L1 */
+   ldr r11, [r9, #(PCB_PAGEDIR)] /* r11 = new L1 */
 
-   teq r10, r11/* Same L1? */
-   cmpeq   r0, r5  /* Same DACR? */
-   beq .Lcs_context_switched   /* yes! */
+   teq r10, r11/* Same L1? */
+   cmpeq   r0, r5  /* Same DACR? */
+   beq .Lcs_context_switched   /* yes! */
 
/*
 * Definately need to flush the cache.
@@ -375,6 +375,3 @@ ENTRY(cpu_switch)
add r3, r9, #PCB_R4
ldmia   r3, {r4-r12, sp, pc}
 END(cpu_switch)
-
-
-

Modified: head/sys/arm/arm/swtch-v6.S
==
--- head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:06:22 2016(r295089)
+++ head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:53:53 2016(r295090)
@@ -109,7 +109,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 .Lcurpcpu:
-   .word   _C_LABEL(__pcpu)
+   .word   _C_LABEL(__pcpu)
.word   PCPU_SIZE
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
@@ -134,7 +134,7 @@ ENTRY(cpu_context_switch) /* QQQ: What a
*  it's the only place where standalone predictor flush must be
*  executed in kernel (except self modifying code case).
*/
-   mcr   CP15_BPIALL   /* and flush entire Branch Target Cache */
+   mcr CP15_BPIALL /* flush entire Branch Target Cache */
DSB
mov pc, lr
 END(cpu_context_switch)
@@ -155,9 +155,9 @@ ENTRY(cpu_throw)
bl  _C_LABEL(vfp_discard)   /* VFP without preserving state. */
 #endif
GET_PCPU(r8, r9)/* r8 = current pcpu */
-   ldr r4, [r8, #PC_CPUID] /* r4 = current cpu id */
+   ldr r4, [r8, #PC_CPUID] /* r4 = current cpu id */
 
-   cmp r10, #0 /* old thread? */
+   cmp r10, #0 /* old thread? */
beq 2f  /* no, skip */
 
/* Remove this CPU from the active list. */
@@ -206,7 +206,7 @@ ENTRY(cpu_throw)
 */
 
/* MMU switch to new thread. */
-   ldr r0, [r7, #(PCB_PAGEDIR)]
+   ldr r0, [r7, #(PCB_PAGEDIR)]
 #ifdef INVARIANTS
cmp r0, #0  /* new thread? */
beq badsw4  /* no, panic */
@@ -290,11 +290,11 @@ ENTRY(cpu_switch)
 * it is time to restore them for the new thread. However,
 * some registers are not safe over function call.
 */
-   mov r9, r2  /* r9  = lock */
+   mov r9, r2  /* r9 = lock */
mov r10, r0 /* r10 = oldtd

svn commit: r295091 - head/sys/arm/include

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 09:16:20 2016
New Revision: 295091
URL: https://svnweb.freebsd.org/changeset/base/295091

Log:
  ARM: Rename ARM specific VM_MEMATTR_WT memory attribute to standard one.

Modified:
  head/sys/arm/include/vm.h

Modified: head/sys/arm/include/vm.h
==
--- head/sys/arm/include/vm.h   Sun Jan 31 08:53:53 2016(r295090)
+++ head/sys/arm/include/vm.h   Sun Jan 31 09:16:20 2016(r295091)
@@ -38,13 +38,13 @@
 #define VM_MEMATTR_NOCACHE ((vm_memattr_t)PTE2_ATTR_NOCACHE)
 #define VM_MEMATTR_DEVICE  ((vm_memattr_t)PTE2_ATTR_DEVICE)
 #define VM_MEMATTR_SO  ((vm_memattr_t)PTE2_ATTR_SO)
-#define VM_MEMATTR_WT  ((vm_memattr_t)PTE2_ATTR_WT)
+#define VM_MEMATTR_WRITE_THROUGH   ((vm_memattr_t)PTE2_ATTR_WT)
 
 #define VM_MEMATTR_DEFAULT VM_MEMATTR_WB_WA
 #define VM_MEMATTR_UNCACHEABLE VM_MEMATTR_SO   /* misused by DMA */
 #ifdef _KERNEL
 /* Don't export aliased VM_MEMATTR to userland */
-#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WT   /* for DRM */
+#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WRITE_THROUGH /* for DRM */
 #define VM_MEMATTR_WRITE_BACK  VM_MEMATTR_WB_WA/* for DRM */
 #endif
 #else
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295089 - head/sys/arm/arm

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 08:06:22 2016
New Revision: 295089
URL: https://svnweb.freebsd.org/changeset/base/295089

Log:
  ARM: Next round of cleanup in swtch-v*.S.
   - remove now useless #if __ARM_ARCH conditional
   - use macro for accessing CP15 registers
   - remove unused PCPU_SIZE
  
  Pointed by: kib

Modified:
  head/sys/arm/arm/swtch-v4.S
  head/sys/arm/arm/swtch-v6.S

Modified: head/sys/arm/arm/swtch-v4.S
==
--- head/sys/arm/arm/swtch-v4.S Sun Jan 31 02:23:30 2016(r295088)
+++ head/sys/arm/arm/swtch-v4.S Sun Jan 31 08:06:22 2016(r295089)
@@ -99,7 +99,6 @@ __FBSDID("$FreeBSD$");
 
 .Lcurpcpu:
.word   _C_LABEL(__pcpu)
-   .word   PCPU_SIZE
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 

Modified: head/sys/arm/arm/swtch-v6.S
==
--- head/sys/arm/arm/swtch-v6.S Sun Jan 31 02:23:30 2016(r295088)
+++ head/sys/arm/arm/swtch-v6.S Sun Jan 31 08:06:22 2016(r295089)
@@ -85,13 +85,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 __FBSDID("$FreeBSD$");
 
-#if __ARM_ARCH >= 6 && defined(SMP)
+#if defined(SMP)
 #define GET_PCPU(tmp, tmp2) \
-   mrc p15, 0, tmp, c0, c0, 5; \
+   mrc CP15_MPIDR(tmp);\
and tmp, tmp, #0xf; \
ldr tmp2, .Lcurpcpu+4;  \
mul tmp, tmp, tmp2; \
@@ -113,9 +114,6 @@ __FBSDID("$FreeBSD$");
 .Lblocked_lock:
.word   _C_LABEL(blocked_lock)
 
-
-#include 
-
 ENTRY(cpu_context_switch) /* QQQ: What about macro instead of function?
*/
DSB
mcr CP15_TTBR0(r0)  /* set the new TTB */
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

svn commit: r295149 - in head/sys: arm/arm arm/include conf

2016-02-02 Thread Michal Meloun

Author: mmel
Date: Tue Feb  2 14:53:34 2016
New Revision: 295149
URL: https://svnweb.freebsd.org/changeset/base/295149

Log:
  ARM: All remaining functions in cpufunc_asm_arm10.S are identical with
  functions in cpufunc_asm_arm9.S. Use arm9 variants and remove
  cpufunc_asm_arm10.S completly.

Deleted:
  head/sys/arm/arm/cpufunc_asm_arm10.S
Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/include/cpufunc.h
  head/sys/conf/Makefile.arm
  head/sys/conf/files.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/arm/arm/cpufunc.c  Tue Feb  2 14:53:34 2016(r295149)
@@ -167,7 +167,7 @@ struct cpu_functions armv5_ec_cpufuncs =
/* TLB functions */
 
armv4_tlb_flushID,  /* tlb_flushID  */
-   arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
+   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -199,7 +199,7 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Soft functions */
 
-   arm10_context_switch,   /* context_switch   */
+   arm9_context_switch,/* context_switch   */
 
arm10_setup /* cpu setup*/
 
@@ -218,7 +218,7 @@ struct cpu_functions sheeva_cpufuncs = {
/* TLB functions */
 
armv4_tlb_flushID,  /* tlb_flushID  */
-   arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
+   arm9_tlb_flushID_SE,/* tlb_flushID_SE   */
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 
@@ -250,7 +250,7 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Soft functions */
 
-   arm10_context_switch,   /* context_switch   */
+   arm9_context_switch,/* context_switch   */
 
arm10_setup /* cpu setup*/
 };

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Feb  2 14:16:07 2016
(r295148)
+++ head/sys/arm/include/cpufunc.h  Tue Feb  2 14:53:34 2016
(r295149)
@@ -225,11 +225,13 @@ void  fa526_idcache_wbinv_range(vm_offset
 #endif
 
 
-#ifdef CPU_ARM9
+#if defined(CPU_ARM9) || defined(CPU_ARM9E)
 void   arm9_setttb (u_int);
-
 void   arm9_tlb_flushID_SE (u_int va);
+void   arm9_context_switch (void);
+#endif
 
+#if defined(CPU_ARM9) 
 void   arm9_icache_sync_all(void);
 void   arm9_icache_sync_range  (vm_offset_t, vm_size_t);
 
@@ -241,8 +243,6 @@ voidarm9_dcache_wb_range(vm_offset_t, 
 void   arm9_idcache_wbinv_all  (void);
 void   arm9_idcache_wbinv_range (vm_offset_t, vm_size_t);
 
-void   arm9_context_switch (void);
-
 void   arm9_setup  (void);
 
 extern unsigned arm9_dcache_sets_max;
@@ -252,10 +252,6 @@ extern unsigned arm9_dcache_index_inc;
 #endif
 
 #if defined(CPU_ARM9E)
-void   arm10_tlb_flushID_SE(u_int);
-
-void   arm10_context_switch(void);
-
 void   arm10_setup (void);
 
 u_int  sheeva_control_ext  (u_int, u_int);

Modified: head/sys/conf/Makefile.arm
==
--- head/sys/conf/Makefile.arm  Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/conf/Makefile.arm  Tue Feb  2 14:53:34 2016(r295149)
@@ -68,7 +68,6 @@ SYSTEM_LD_TAIL +=;sed s/" + SIZEOF_HEADE
 
 FILES_CPU_FUNC = \
$S/$M/$M/cpufunc_asm_arm9.S \
-   $S/$M/$M/cpufunc_asm_arm10.S \
$S/$M/$M/cpufunc_asm_xscale.S $S/$M/$M/cpufunc_asm.S \
$S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S \
$S/$M/$M/cpufunc_asm_fa526.S $S/$M/$M/cpufunc_asm_sheeva.S \

Modified: head/sys/conf/files.arm
==
--- head/sys/conf/files.arm Tue Feb  2 14:16:07 2016(r295148)
+++ head/sys/conf/files.arm Tue Feb  2 14:53:34 2016(r295149)
@@ -11,8 +11,7 @@ arm/arm/busdma_machdep-v6.c   optionalar
 arm/arm/copystr.S  standard
 arm/arm/cpufunc.c  standard
 arm/arm/cpufunc_asm.S  standard
-arm/arm/cpufunc_asm_arm9.S optionalcpu_arm9
-arm/arm/cpufunc_asm_arm10.Soptionalcpu_arm9e
+arm/arm/cpufunc_asm_arm9.S optionalcpu_arm9 | cpu_arm9e
 arm/arm/cpufunc_asm_arm11.Soptionalcpu_arm1176
 arm/arm/cpufunc_asm_arm11x6.S  optionalcpu_arm1176
 arm/arm/cpufunc_asm_armv4.Soptionalcpu_arm9 | cpu_arm9e | 
cpu_fa526 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 |

svn commit: r295145 - in head/sys/arm: arm include

2016-02-02 Thread Michal Meloun

Author: mmel
Date: Tue Feb  2 10:50:32 2016
New Revision: 295145
URL: https://svnweb.freebsd.org/changeset/base/295145

Log:
  ARM: Remove last unused function, cpu_flush_prefetchbuf(),
  from cpu_functions table.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_arm11x6.S
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Feb  2 10:39:18 2016(r295144)
+++ head/sys/arm/arm/cpufunc.c  Tue Feb  2 10:50:32 2016(r295145)
@@ -140,7 +140,6 @@ struct cpu_functions arm9_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -194,7 +193,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -246,7 +244,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
sheeva_cpu_sleep,   /* sleep*/
@@ -298,7 +295,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
 
(void *)cpufunc_nullop, /* sleep*/
@@ -352,7 +348,6 @@ struct cpu_functions xscale_cpufuncs = {
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
xscale_cpu_sleep,   /* sleep*/
@@ -406,7 +401,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
xscale_cpu_sleep,   /* sleep*/
@@ -459,7 +453,6 @@ struct cpu_functions fa526_cpufuncs = {
 
/* Other functions */
 
-   fa526_flush_prefetchbuf,/* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
 
fa526_cpu_sleep,/* sleep*/
@@ -513,7 +506,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
/* Other functions */
 
-   arm11x6_flush_prefetchbuf,  /* flush_prefetchbuf*/
arm11_drain_writebuf,   /* drain_writebuf   */
 
arm11x6_sleep,  /* sleep*/
@@ -574,7 +566,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
/* Other functions */
 
-   cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
 
armv7_cpu_sleep,/* sleep*/

Modified: head/sys/arm/arm/cpufunc_asm_arm11x6.S
==
--- head/sys/arm/arm/cpufunc_asm_arm11x6.S  Tue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/arm/cpufunc_asm_arm11x6.S  Tue Feb  2 10:50:32 2016
(r295145)
@@ -138,11 +138,6 @@ ENTRY_NP(arm11x6_icache_sync_all)
RET
 END(arm11x6_icache_sync_all)
 
-ENTRY_NP(arm11x6_flush_prefetchbuf)
-   mcr p15, 0, r0, c7, c5, 4   /* Flush Prefetch Buffer */
-   RET
-END(arm11x6_flush_prefetchbuf)
-
 ENTRY_NP(arm11x6_icache_sync_range)
add r1, r1, r0
sub r1, r1, #1

Modified: head/sys/arm/arm/cpufunc_asm_fa526.S
==
--- head/sys/arm/arm/cpufunc_asm_fa526.STue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/arm/cpufunc_asm_fa526.STue Feb  2 10:50:32 2016
(r295145)
@@ -72,12 +72,6 @@ ENTRY(fa526_cpu_sleep)
mov pc, lr
 END(fa526_cpu_sleep)
 
-ENTRY(fa526_flush_prefetchbuf)
-   mov r0, #0
-   mcr p15, 0, r0, c7, c5, 4   /* Pre-fetch flush */
-   mov pc, lr
-END(fa526_flush_prefetchbuf)
-
 /*
  * Cache functions
  */

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Tue Feb  2 10:39:18 2016
(r295144)
+++ head/sys/arm/include/cpufunc.h  Tue Feb  2 10:50:32 2016
(r295145)
@@ -149,7 +149,6 @@ struct cpu_functions {
 
/* Other functions */
 
-   void(*cf_flush_prefetchbuf) (void);
void

svn commit: r295123 - in head/sys/arm: arm mv/armadaxp ti

2016-02-01 Thread Michal Meloun

Author: mmel
Date: Mon Feb  1 14:28:58 2016
New Revision: 295123
URL: https://svnweb.freebsd.org/changeset/base/295123

Log:
  ARM: Rename remaining instances of cpufunc_id() to cpu_ident(),
  forgotten in r295096.
  Remove tlb_flushI/tlb_flushI_SE functions forgotten in r295122.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/arm/pmap.c
  head/sys/arm/mv/armadaxp/armadaxp.c
  head/sys/arm/mv/armadaxp/armadaxp_mp.c
  head/sys/arm/ti/ti_cpuid.c

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/arm/cpufunc.c  Mon Feb  1 14:28:58 2016(r295123)
@@ -221,8 +221,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
armv4_tlb_flushID,  /* tlb_flushID  */
arm10_tlb_flushID_SE,   /* tlb_flushID_SE   */
-   armv4_tlb_flushI,   /* tlb_flushI   */
-   arm10_tlb_flushI_SE,/* tlb_flushI_SE*/
armv4_tlb_flushD,   /* tlb_flushD   */
armv4_tlb_flushD_SE,/* tlb_flushD_SE*/
 

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/arm/elf_trampoline.c   Mon Feb  1 14:28:58 2016
(r295123)
@@ -49,7 +49,7 @@ void _start(void);
 void __start(void);
 void __startC(void);
 
-extern unsigned int cpufunc_id(void);
+extern unsigned int cpu_ident(void);
 extern void armv6_idcache_wbinv_all(void);
 extern void armv7_idcache_wbinv_all(void);
 extern void do_call(void *, void *, void *, int);
@@ -248,7 +248,7 @@ _startC(void)
 #ifndef KZIP
 #ifdef CPU_ARM9
/* So that idcache_wbinv works; */
-   if ((cpufunc_id() & 0xf000) == 0x9000)
+   if ((cpu_ident() & 0xf000) == 0x9000)
arm9_setup();
 #endif
 #endif
@@ -266,7 +266,7 @@ get_cachetype_cp15()
__asm __volatile("mrc p15, 0, %0, c0, c0, 1"
: "=r" (ctype));
 
-   cpuid = cpufunc_id();
+   cpuid = cpu_ident();
/*
 * ...and thus spake the ARM ARM:
 *
@@ -683,7 +683,7 @@ __start(void)
 
 #ifdef CPU_ARM9
/* So that idcache_wbinv works; */
-   if ((cpufunc_id() & 0xf000) == 0x9000)
+   if ((cpu_ident() & 0xf000) == 0x9000)
arm9_setup();
 #endif
setup_pagetables(pt_addr, (vm_paddr_t)curaddr,

Modified: head/sys/arm/arm/pmap.c
==
--- head/sys/arm/arm/pmap.c Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/arm/pmap.c Mon Feb  1 14:28:58 2016(r295123)
@@ -561,7 +561,7 @@ pmap_pte_init_xscale(void)
{
uint32_t id, type;
 
-   id = cpufunc_id();
+   id = cpu_ident();
type = id & ~(CPU_ID_XSCALE_COREREV_MASK|CPU_ID_REVISION_MASK);
 
if (type == CPU_ID_PXA250 || type == CPU_ID_PXA210) {

Modified: head/sys/arm/mv/armadaxp/armadaxp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp.c Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/mv/armadaxp/armadaxp.c Mon Feb  1 14:28:58 2016
(r295123)
@@ -128,7 +128,7 @@ get_tclk(void)
 {
uint32_t cputype;
 
-   cputype = cpufunc_id();
+   cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
 
if (cputype == CPU_ID_MV88SV584X_V7)

Modified: head/sys/arm/mv/armadaxp/armadaxp_mp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp_mp.c  Mon Feb  1 13:13:53 2016
(r295122)
+++ head/sys/arm/mv/armadaxp/armadaxp_mp.c  Mon Feb  1 14:28:58 2016
(r295123)
@@ -111,7 +111,7 @@ platform_mp_start_ap(void)
 * Initialization procedure depends on core revision,
 * in this step CHIP ID is checked to choose proper procedure
 */
-   cputype = cpufunc_id();
+   cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
 
/*

Modified: head/sys/arm/ti/ti_cpuid.c
==
--- head/sys/arm/ti/ti_cpuid.c  Mon Feb  1 13:13:53 2016(r295122)
+++ head/sys/arm/ti/ti_cpuid.c  Mon Feb  1 14:28:58 2016(r295123)
@@ -120,7 +120,7 @@ omap4_get_revision(void)
 * the ARM cpuid to get the correct revision.
 */
if (revision == 0) {
-   id_code = cpufunc_id();
+   id_code = cpu_ident();
revision = (id_code & 0xf) - 1;
}
 
___
svn-src-head@freebsd.org mailing list

svn commit: r295096 - in head/sys/arm: arm include

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 16:34:06 2016
New Revision: 295096
URL: https://svnweb.freebsd.org/changeset/base/295096

Log:
  ARM: cpufunc_domains, cpufunc_faultstatus and cpufunc_faultaddress
  functions are equal for all ARM variants. Remove them from cpu_functions
  table.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:36:13 2016(r295095)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 16:34:06 2016(r295096)
@@ -105,16 +105,12 @@ int ctrl;
 struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
arm9_setttb,/* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -164,16 +160,12 @@ struct cpu_functions arm9_cpufuncs = {
 struct cpu_functions armv5_ec_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
armv5_ec_setttb,/* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -222,16 +214,12 @@ struct cpu_functions armv5_ec_cpufuncs =
 struct cpu_functions sheeva_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
sheeva_setttb,  /* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -281,16 +269,12 @@ struct cpu_functions sheeva_cpufuncs = {
 struct cpu_functions pj4bv7_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
armv7_drain_writebuf,   /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-   cpufunc_domains,/* Domain   */
armv7_setttb,   /* Setttb   */
-   cpufunc_faultstatus,/* Faultstatus  */
-   cpufunc_faultaddress,   /* Faultaddress */
 
/* TLB functions */
 
@@ -341,16 +325,12 @@ struct cpu_functions pj4bv7_cpufuncs = {
 struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
xscale_cpwait,  /* cpwait   */
 
/* MMU functions */
 
xscale_control, /* control  */
-   cpufunc_domains,/* domain   */
xscale_setttb,  /* setttb   */
-   cpufunc_faultstatus,/* faultstatus  */
-   cpufunc_faultaddress,   /* faultaddress */
 
/* TLB functions */
 
@@ -401,16 +381,12 @@ struct cpu_functions xscale_cpufuncs = {
 struct cpu_functions xscalec3_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
xscale_cpwait,  /* cpwait   */
 
/* MMU functions */
 
xscale_control, /* control  */
-   cpufunc_domains,/* domain   */
xscalec3_setttb,/* setttb   */
-   cpufunc_faultstatus,/* faultstatus  */
-   cpufunc_faultaddress,   /* faultaddress */
 
/* TLB functions */
 
@@ -460,16 +436,12 @@ struct cpu_functions xscalec3_cpufuncs =
 struct cpu_functions fa526_cpufuncs = {
/* CPU functions */
 
-   cpufunc_id, /* id   */
cpufunc_nullop, /* cpwait   */
 
/* MMU functions */
 
cpufunc_control,/* control  */
-

svn commit: r295095 - in head/sys/arm: arm include

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 15:36:13 2016
New Revision: 295095
URL: https://svnweb.freebsd.org/changeset/base/295095

Log:
  ARM: Next round of cpufunc.* cleaning. Nobody uses flush_brnchtgt* functions,
  delete them.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_fa526.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:18:03 2016(r295094)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 15:36:13 2016(r295095)
@@ -148,8 +148,6 @@ struct cpu_functions arm9_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -210,8 +208,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -270,8 +266,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
sheeva_cpu_sleep,   /* sleep*/
 
@@ -330,8 +324,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
(void *)cpufunc_nullop, /* sleep*/
 
@@ -392,8 +384,6 @@ struct cpu_functions xscale_cpufuncs = {
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
xscale_cpu_sleep,   /* sleep*/
 
@@ -454,8 +444,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
xscale_cpu_sleep,   /* sleep*/
 
@@ -515,8 +503,6 @@ struct cpu_functions fa526_cpufuncs = {
 
fa526_flush_prefetchbuf,/* flush_prefetchbuf*/
armv4_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   fa526_flush_brnchtgt_E, /* flush_brnchtgt_E */
 
fa526_cpu_sleep,/* sleep*/
 
@@ -577,8 +563,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
arm11x6_flush_prefetchbuf,  /* flush_prefetchbuf*/
arm11_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
arm11x6_sleep,  /* sleep*/
 
@@ -646,8 +630,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
cpufunc_nullop, /* flush_prefetchbuf*/
armv7_drain_writebuf,   /* drain_writebuf   */
-   cpufunc_nullop, /* flush_brnchtgt_C */
-   (void *)cpufunc_nullop, /* flush_brnchtgt_E */
 
armv7_cpu_sleep,/* sleep*/
 

Modified: head/sys/arm/arm/cpufunc_asm_fa526.S
==
--- head/sys/arm/arm/cpufunc_asm_fa526.SSun Jan 31 15:18:03 2016
(r295094)
+++ head/sys/arm/arm/cpufunc_asm_fa526.SSun Jan 31 15:36:13 2016
(r295095)
@@ -200,12 +200,6 @@ ENTRY(fa526_icache_sync_range)
mov pc, lr
 END(fa526_icache_sync_range)
 
-ENTRY(fa526_flush_brnchtgt_E)
-   mov r0, #0
-   mcr p15, 0, r0, c7, c5, 6   /* invalidate BTB cache */
-   mov pc, lr
-END(fa526_flush_brnchtgt_E)
-
 ENTRY(fa526_context_switch)
/*
 * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.

Modified: head/sys/arm/include/cpufunc.h

svn commit: r295092 - in head/sys/arm: arm include

2016-01-31 Thread Michal Meloun

Author: mmel
Date: Sun Jan 31 13:59:16 2016
New Revision: 295092
URL: https://svnweb.freebsd.org/changeset/base/295092

Log:
  ARM: First round of cpufunc.* cleaning. All abort_fixup functions are
  not currently used or defined. Delete them.

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Sun Jan 31 09:16:20 2016(r295091)
+++ head/sys/arm/arm/cpufunc.c  Sun Jan 31 13:59:16 2016(r295092)
@@ -155,9 +155,6 @@ struct cpu_functions arm9_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm9_context_switch,/* context_switch   */
 
arm9_setup  /* cpu setup*/
@@ -220,9 +217,6 @@ struct cpu_functions armv5_ec_cpufuncs =
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm10_context_switch,   /* context_switch   */
 
arm10_setup /* cpu setup*/
@@ -283,9 +277,6 @@ struct cpu_functions sheeva_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm10_context_switch,   /* context_switch   */
 
arm10_setup /* cpu setup*/
@@ -345,10 +336,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
(void *)cpufunc_nullop, /* sleep*/
 
/* Soft functions */
-
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
armv7_context_switch,   /* context_switch   */
 
pj4bv7_setup/* cpu setup*/
@@ -412,9 +399,6 @@ struct cpu_functions xscale_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
xscale_context_switch,  /* context_switch   */
 
xscale_setup/* cpu setup*/
@@ -477,9 +461,6 @@ struct cpu_functions xscalec3_cpufuncs =
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
xscalec3_context_switch,/* context_switch   */
 
xscale_setup/* cpu setup*/
@@ -541,8 +522,6 @@ struct cpu_functions fa526_cpufuncs = {
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
 
fa526_context_switch,   /* context_switch   */
 
@@ -605,9 +584,6 @@ struct cpu_functions arm1176_cpufuncs = 
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
arm11_context_switch,   /* context_switch   */
 
arm11x6_setup   /* cpu setup*/
@@ -677,9 +653,6 @@ struct cpu_functions cortexa_cpufuncs = 
 
/* Soft functions */
 
-   cpufunc_null_fixup, /* dataabt_fixup*/
-   cpufunc_null_fixup, /* prefetchabt_fixup*/
-
armv7_context_switch,   /* context_switch   */
 
cortexa_setup /* cpu setup*/
@@ -995,27 +968,6 @@ out:
 }
 
 /*
- * Fixup routines for data and prefetch aborts.
- *
- * Several compile time symbols are used
- *
- * DEBUG_FAULT_CORRECTION - Print debugging information during the
- * correction of registers after a fault.
- */
-
-
-/*
- * Null abort fixup routine.
- * For use when no fixup is required.
- */
-int
-cpufunc_null_fixup(arg)
-   void *arg;
-{
-   return(ABORT_FIXUP_OK);
-}
-
-/*
  * CPU Setup code
  */
 

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Sun Jan 31 09:16:20 2016
(r295091)
+++ head/sys/arm/include/cpufunc.h  Sun Jan 31 13:59:16 2016
(r295092)
@@ -164,9 +164,6 @@ struct cpu_functions {
 
/* Soft functions */
 
-   int (*cf_dataabt_fixup) (void *arg);
-   int (*cf_prefetchabt_fixup) (void *arg);
-
void(*cf_context_switch)(void);
 
void(*cf_setup) (void);
@@ -215,12 +212,6 @@ extern u_int cputype;
 
 #define cpu_sleep(m)   cpufuncs.cf_sleep(m)

svn commit: r294989 - in head/sys: arm/freescale/vybrid arm/xilinx dev/usb/controller mips/atheros powerpc/ps3

2016-01-28 Thread Michal Meloun

Author: mmel
Date: Thu Jan 28 14:11:59 2016
New Revision: 294989
URL: https://svnweb.freebsd.org/changeset/base/294989

Log:
  EHCI: Make core reset and port speed reading more generic.
  
  Use driver settable callbacks for handling of:
  - core post reset
  - reading actual port speed
  
  Typically, OTG enabled EHCI cores wants setting of USBMODE register,
  but this register is not defined in EHCI specification and different
  cores can have it on different offset.
  
  Also, for cores with TT extension, actual port speed must be determinable.
  But again, EHCI specification not covers this so this patch provides
  function for two most common variant of speed bits layout.
  
  Reviewed by: hselasky
  Differential Revision: https://reviews.freebsd.org/D5088

Modified:
  head/sys/arm/freescale/vybrid/vf_ehci.c
  head/sys/arm/xilinx/zy7_ehci.c
  head/sys/dev/usb/controller/ehci.c
  head/sys/dev/usb/controller/ehci.h
  head/sys/dev/usb/controller/ehci_ixp4xx.c
  head/sys/dev/usb/controller/ehci_mv.c
  head/sys/dev/usb/controller/ehcireg.h
  head/sys/mips/atheros/ar71xx_ehci.c
  head/sys/powerpc/ps3/ehci_ps3.c

Modified: head/sys/arm/freescale/vybrid/vf_ehci.c
==
--- head/sys/arm/freescale/vybrid/vf_ehci.c Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/arm/freescale/vybrid/vf_ehci.c Thu Jan 28 14:11:59 2016
(r294989)
@@ -169,6 +169,18 @@ static devclass_t ehci_devclass;
 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
 MODULE_DEPEND(ehci, usb, 1, 1, 1);
 
+static void
+vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
+{
+   uint32_t usbmode;
+
+   /* Force HOST mode */
+   usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
+   usbmode &= ~EHCI_UM_CM;
+   usbmode |= EHCI_UM_CM_HOST;
+   EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
+}
+
 /*
  * Public methods
  */
@@ -343,8 +355,10 @@ vybrid_ehci_attach(device_t dev)
reg |= 0x3;
bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
 
-   /* Set flags */
-   sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_NORESTERM;
+   /* Set flags  and callbacks*/
+   sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
+   sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
+   sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
 
err = ehci_init(sc);
if (!err) {

Modified: head/sys/arm/xilinx/zy7_ehci.c
==
--- head/sys/arm/xilinx/zy7_ehci.c  Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/arm/xilinx/zy7_ehci.c  Thu Jan 28 14:11:59 2016
(r294989)
@@ -138,6 +138,18 @@ __FBSDID("$FreeBSD$");
 #define EHCI_REG_OFFSETZY7_USB_CAPLENGTH_HCIVERSION
 #define EHCI_REG_SIZE  0x100
 
+static void
+zy7_ehci_post_reset(struct ehci_softc *ehci_softc)
+{
+   uint32_t usbmode;
+
+   /* Force HOST mode */
+   usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
+   usbmode &= ~EHCI_UM_CM;
+   usbmode |= EHCI_UM_CM_HOST;
+   EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
+}
+
 static int
 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
 {
@@ -275,8 +287,9 @@ zy7_ehci_attach(device_t dev)
}
 
/* Customization. */
-   sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_TT |
-   EHCI_SCFLG_NORESTERM;
+   sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
+   sc->sc_vendor_post_reset = zy7_ehci_post_reset;
+   sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
 
/* Modify FIFO burst threshold from 2 to 8. */
bus_space_write_4(sc->sc_io_tag, bsh,

Modified: head/sys/dev/usb/controller/ehci.c
==
--- head/sys/dev/usb/controller/ehci.c  Thu Jan 28 13:32:00 2016
(r294988)
+++ head/sys/dev/usb/controller/ehci.c  Thu Jan 28 14:11:59 2016
(r294989)
@@ -189,24 +189,8 @@ ehci_reset(ehci_softc_t *sc)
usb_pause_mtx(NULL, hz / 128);
hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
if (!hcr) {
-   if (sc->sc_flags & (EHCI_SCFLG_SETMODE | 
EHCI_SCFLG_BIGEMMIO)) {
-   /*
-* Force USBMODE as requested.  Controllers
-* may have multiple operating modes.
-*/
-   uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
-   if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
-   usbmode = (usbmode &~ EHCI_UM_CM) | 
EHCI_UM_CM_HOST;
-   device_printf(sc->sc_bus.bdev,
-   "set host controller mode\n");
-   }
-

svn commit: r294660 - in head/sys: conf dev/extres dev/extres/clk

2016-01-24 Thread Michal Meloun

Author: mmel
Date: Sun Jan 24 11:00:38 2016
New Revision: 294660
URL: https://svnweb.freebsd.org/changeset/base/294660

Log:
  Add clock framework, a first part of new 'extended resources' family of
  support frameworks(i.e. reset/regulators/phy/tsensors/fuses...).
  
  The clock framework significantly simplifies handling of complex clock
  structures found in modern SoCs. It provides the unified consumers
  interface, holds and manages actual clock topology, frequency and gating.
  
  It's tested on three different ARM boards (Nvidia Tegra TK1, Inforce 6410 and
  Odroid XU2) and on one MIPS board (Creator Ci20) by kan@.
  
  The framework is still far from perfect and probably doesn't have stable
  interface yet, but we want to start testing it on more real boards and
  different architectures.
  
  Reviewed by: ian, kan (earlier version)

Added:
  head/sys/dev/extres/
  head/sys/dev/extres/clk/
  head/sys/dev/extres/clk/clk.c   (contents, props changed)
  head/sys/dev/extres/clk/clk.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_div.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_div.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_fixed.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_fixed.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_gate.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_gate.h   (contents, props changed)
  head/sys/dev/extres/clk/clk_mux.c   (contents, props changed)
  head/sys/dev/extres/clk/clk_mux.h   (contents, props changed)
  head/sys/dev/extres/clk/clkdev_if.m   (contents, props changed)
  head/sys/dev/extres/clk/clknode_if.m   (contents, props changed)
Modified:
  head/sys/conf/files
  head/sys/conf/options

Modified: head/sys/conf/files
==
--- head/sys/conf/files Sun Jan 24 09:24:23 2016(r294659)
+++ head/sys/conf/files Sun Jan 24 11:00:38 2016(r294660)
@@ -1410,6 +1410,13 @@ dev/ex/if_ex.c   optional ex
 dev/ex/if_ex_isa.c optional ex isa
 dev/ex/if_ex_pccard.c  optional ex pccard
 dev/exca/exca.coptional cbb
+dev/extres/clk/clk.c   optional ext_resources clk
+dev/extres/clk/clkdev_if.m optional ext_resources clk
+dev/extres/clk/clknode_if.moptional ext_resources clk
+dev/extres/clk/clk_div.c   optional ext_resources clk
+dev/extres/clk/clk_fixed.c optional ext_resources clk
+dev/extres/clk/clk_gate.c  optional ext_resources clk
+dev/extres/clk/clk_mux.c   optional ext_resources clk
 dev/fatm/if_fatm.c optional fatm pci
 dev/fb/fbd.c   optional fbd | vt
 dev/fb/fb_if.m standard

Modified: head/sys/conf/options
==
--- head/sys/conf/options   Sun Jan 24 09:24:23 2016(r294659)
+++ head/sys/conf/options   Sun Jan 24 11:00:38 2016(r294660)
@@ -90,6 +90,7 @@ COMPAT_LINUXKPI   opt_compat.h
 COMPILING_LINT opt_global.h
 CY_PCI_FASTINTR
 DEADLKRES  opt_watchdog.h
+EXT_RESOURCES  opt_global.h
 DIRECTIO
 FILEMONopt_dontuse.h
 FFCLOCK

Added: head/sys/dev/extres/clk/clk.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/clk/clk.c   Sun Jan 24 11:00:38 2016
(r294660)
@@ -0,0 +1,1261 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include "opt_

svn commit: r294661 - in head/sys: conf dev/extres/hwreset

2016-01-24 Thread Michal Meloun

Author: mmel
Date: Sun Jan 24 11:03:35 2016
New Revision: 294661
URL: https://svnweb.freebsd.org/changeset/base/294661

Log:
  Add reset framework, a second part of new 'extended resources' family of
  support frameworks (i.e. regulators/phy/tsensors/fuses...).
  
  It provides simple unified consumers interface for manipulations with
  on-chip resets.
  
  Reviewed by: ian, imp (paritaly)

Added:
  head/sys/dev/extres/hwreset/
  head/sys/dev/extres/hwreset/hwreset.c   (contents, props changed)
  head/sys/dev/extres/hwreset/hwreset.h   (contents, props changed)
  head/sys/dev/extres/hwreset/hwreset_if.m   (contents, props changed)
Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Sun Jan 24 11:00:38 2016(r294660)
+++ head/sys/conf/files Sun Jan 24 11:03:35 2016(r294661)
@@ -1417,6 +1417,8 @@ dev/extres/clk/clk_div.c  optional ext_re
 dev/extres/clk/clk_fixed.c optional ext_resources clk
 dev/extres/clk/clk_gate.c  optional ext_resources clk
 dev/extres/clk/clk_mux.c   optional ext_resources clk
+dev/extres/hwreset/hwreset.c   optional ext_resources hwreset
+dev/extres/hwreset/hwreset_if.moptional ext_resources hwreset
 dev/fatm/if_fatm.c optional fatm pci
 dev/fb/fbd.c   optional fbd | vt
 dev/fb/fb_if.m standard

Added: head/sys/dev/extres/hwreset/hwreset.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/extres/hwreset/hwreset.c   Sun Jan 24 11:03:35 2016
(r294661)
@@ -0,0 +1,186 @@
+/*-
+ * Copyright 2016 Michal Meloun <m...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_platform.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef FDT
+#include 
+#include 
+#endif
+
+#include 
+
+#include "hwreset_if.h"
+
+struct hwreset {
+   device_t consumer_dev;  /* consumer device*/
+   device_t provider_dev;  /* provider device*/
+   int rst_id; /* reset id */
+};
+
+MALLOC_DEFINE(M_HWRESET, "hwreset", "Reset framework");
+
+int
+hwreset_assert(hwreset_t rst)
+{
+
+   return (HWRESET_ASSERT(rst->provider_dev, rst->rst_id, true));
+}
+
+int
+hwreset_deassert(hwreset_t rst)
+{
+
+   return (HWRESET_ASSERT(rst->provider_dev, rst->rst_id, false));
+}
+
+int
+hwreset_is_asserted(hwreset_t rst, bool *value)
+{
+
+   return (HWRESET_IS_ASSERTED(rst->provider_dev, rst->rst_id, value));
+}
+
+void
+hwreset_release(hwreset_t rst)
+{
+   free(rst, M_HWRESET);
+}
+
+int
+hwreset_get_by_id(device_t consumer_dev, device_t provider_dev, intptr_t id,
+hwreset_t *rst_out)
+{
+   hwreset_t rst;
+
+   /* Create handle */
+   rst = malloc(sizeof(struct hwreset), M_HWRESET,
+   M_WAITOK | M_ZERO);
+   rst->consumer_dev = consumer_dev;
+   rst->provider_dev = provider_dev;
+   rst->rst_id = id;
+   *rst_out = rst;
+   return (0);
+}
+
+#ifdef FDT
+int
+hwreset_default_ofw_map(device_t provider_dev, phandle_t xref, int ncells,
+pcell_t *cells, intptr_t *id)
+{
+   if (ncells == 0)
+   *id = 1;
+   else if (ncells == 1)
+   *id = cells[0];
+   else
+   return  (ERANGE);
+
+   return (0);
+}
+
+int
+hwreset_get_by_ofw_idx(device_t consumer_dev, int idx, hwreset_t *rst)
+{
+   phandle_t cnode, xnode;
+   pcell_t *cells;
+   devi

Re: svn commit: r295557 - head/sys/dev/uart

2016-02-15 Thread Michal Meloun

Dne 13.02.2016 v 1:58 Marius Strobl napsal(a):
> On Sat, Feb 13, 2016 at 06:53:25AM +1100, Bruce Evans wrote:
>> On Fri, 12 Feb 2016, Marius Strobl wrote:
>>
>>> On Fri, Feb 12, 2016 at 05:14:58AM +, Michal Meloun wrote:
>>>> Author: mmel
>>>> Date: Fri Feb 12 05:14:58 2016
>>>> New Revision: 295557
>>>> URL: https://svnweb.freebsd.org/changeset/base/295557
>>>>
>>>> Log:
>>>>   UART: Fix spurious interrupts generated by ns8250 and lpc drivers:
>>>>- don't enable transmitter empty interrupt before filling TX FIFO.
>>>
>>> Are you sure this doesn't create a race that leads to lost TX ready
>>> interrupts? For a single character, the TX FIFO very well may be empty
>>> again at the point in time IER_ETXRDY is enabled now.  With the varying
>>> behavior of 8250/16x50 chips - some of which is documented in sio(4) -
>>
>> That is mostly FUD.  More likely driver bugs than chip bugs.
>>
>> A non-broken xx50 interrupts after you (re)enable tx interrupts, iff
>> the fifo is already empty.  This gives a "spurious" interrupt.  But
>> perhaps depending on this is too fragile.  Normal operation is to keep
>> the tx interrupt enabled and depend on writing to the fifo causing a
>> tx interrupt later.  But it is a more common chip bug for tx interrupts
>> later to not go away when they should (normally by reading the IIR),
>> so some drivers toggle the tx interrupt enable dynamically.
>>
>> An example of a driver bug is only enabling tx interrupts for this.
>> It takes a transition of the interrupt enable bit from off to on to
>> get the interrupt.  Other driver bugs may result in a missing transition
>> because the bit was supposed to be off but is actually on.
>>
>>> I'd expect there are many that no longer generate a TX ready at all
>>> with this change in place. In this case, receiving spurious interrupts
>>> (which ones? IIR_NOPEND? IIR_TXRDY?) with some devices appears to be
>>> the lesser evil.
>>
>> Not many.  Only broken ones.
> 
> In my experience many xx50 are broken, especially the integrated
> on-board ones you still have in workstations and servers today.
> 
>> The "spurious" interrupts are just normal
>> ones from bon-broken chips:
>>
>> - uart first does a potentially-unbounded busy-wait before the doing
>>anything to ensure that the fifo is empty.  This should be unecessary
>>since this function should not be called unless sc_txbusy is 0 and
>>sc_txbusy should be nonzero if the fifo is not empty.  If it is called
>>when the fifo is not emptu, then the worst-case busy-wait is approx.
>>640 seconds for a 128-byte fifo at 2 bps. The 'broken_txfifo case'
>>busy-waits for a long time in normal operation.
>> - enabling the tx interrupt causes one immediately on non-broken uarts
>> - the interrupt handler is normally called immediately.  Then it always
>>blocks on uart_lock()
>> - then the main code fills the fifo and unlocks
>> - then the interrupt handler runs.  It normally finds that the fifo is
>>not empty (since it has just been filled) and does nothing
>> - another tx interrupt occurs later and the interrupt handler runs again.
>>It normally doesn't hit the lock again, and normally finds the fifo
>>empty, so it does something.
> 
> You correctly describe what happens at r295556 with a non-broken xx50.
> That revision causes a spurious interrupt with non-broken xx50 but
> also ensures that the relevant TX interrupt isn't missed with broken
> xx50 that do not issue an interrupt when enabling IER_ETXRDY. Besides,
> as you say, the general approach of dynamically enabling TX interrupts
> works around the common brokenness of these interrupts no longer going
> away when they should.
> 
>> But you are probably correct that a 1-byte write to the fifo often
>> loses the race.  This depends on how fast the hardware moves the byte
>> from the fifo to the tx register.  Actually, since we didn't wait
>> for the tx register to become empty, it will often take a full character
>> time before the move.  After that, I think it might take 1 bit time but
>> no more.
> 
> My concern is that with r295557, when this race is lost no TX interrupt
> is seen at all with broken xx50 that do not trigger an interrupt when
> enabling IER_ETXRDY.
> 
> Marius
> 

No, I’m not sure, nobody can be sure if we talking about ns8250
compatible device(s). Also, all UARTs known to me, generates an
interrupt on TX unmasking (assuming level sensitive interrupt).
Only IIR

svn commit: r297011 - head/sys/arm/nvidia

2016-03-18 Thread Michal Meloun

Author: mmel
Date: Fri Mar 18 07:13:09 2016
New Revision: 297011
URL: https://svnweb.freebsd.org/changeset/base/297011

Log:
  TEGRA: Fix tegra_pcie driver after rman_res_t size change.

Modified:
  head/sys/arm/nvidia/tegra_pcie.c

Modified: head/sys/arm/nvidia/tegra_pcie.c
==
--- head/sys/arm/nvidia/tegra_pcie.cFri Mar 18 04:22:07 2016
(r297010)
+++ head/sys/arm/nvidia/tegra_pcie.cFri Mar 18 07:13:09 2016
(r297011)
@@ -491,7 +491,7 @@ tegra_pcib_alloc_resource(device_t dev, 
struct rman *rm;
struct resource *res;
 
-   debugf("%s: enter %d start %lx end %lx count %lx\n", __func__,
+   debugf("%s: enter %d start %#jx end %#jx count %#jx\n", __func__,
type, start, end, count);
sc = device_get_softc(dev);
 
@@ -513,7 +513,7 @@ tegra_pcib_alloc_resource(device_t dev, 
 
if (bootverbose) {
device_printf(dev,
-   "rman_reserve_resource: start=%#lx, end=%#lx, count=%#lx\n",
+   "rman_reserve_resource: start=%#jx, end=%#jx, count=%#jx\n",
start, end, count);
}
 
@@ -532,7 +532,7 @@ tegra_pcib_alloc_resource(device_t dev, 
 fail:
if (bootverbose) {
device_printf(dev, "%s FAIL: type=%d, rid=%d, "
-   "start=%016lx, end=%016lx, count=%016lx, flags=%x\n",
+   "start=%016jx, end=%016jx, count=%016jx, flags=%x\n",
__func__, type, *rid, start, end, count, flags);
}
 
@@ -565,14 +565,13 @@ tegra_pcib_release_resource(device_t dev
 
 static int
 tegra_pcib_adjust_resource(device_t dev, device_t child, int type,
-   struct resource *res, u_long start, u_long end)
+   struct resource *res, rman_res_t start, rman_res_t 
end)
 {
struct tegra_pcib_softc *sc;
struct rman *rm;
 
sc = device_get_softc(dev);
-   debugf("%s: %d start %lx end %lx \n", __func__,
-   type, start, end);
+   debugf("%s: %d start %jx end %jx \n", __func__, type, start, end);
 
 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
if (type == PCI_RES_BUS)
@@ -609,7 +608,7 @@ tegra_pcib_pcie_activate_resource(device
}
 
if (bootverbose)
-   printf("%s: start %zx, len %ld\n", __func__, start,
+   printf("%s: start %zx, len %jd\n", __func__, start,
rman_get_size(r));
 
p = pmap_mapdev(start, (vm_size_t)rman_get_size(r));
@@ -667,7 +666,7 @@ tegra_pcib_route_interrupt(device_t bus,
struct tegra_pcib_softc *sc;
 
sc = device_get_softc(bus);
-   device_printf(bus, "route pin %d for device %d.%d to %lu\n",
+   device_printf(bus, "route pin %d for device %d.%d to %ju\n",
  pin, pci_get_slot(dev), pci_get_function(dev),
  rman_get_start(sc->irq_res));
 
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"

1 2 3 4 >

1 - 100 of 361 matches

Mail list logo