From: "Theo de Raadt"
Date: Sun, 25 Sep 2022 18:29:12 -0600
> This is not helping.
>
> Please send Scott private replies regarding his diff.
Oh, sorry. I will reply to Scott privately.
--
ASOU Masato
> Masato Asou wrote:
>
>> Hi,
>>
>> I have new AMD laptop. The dmesg is posted below:
>>
This is not helping.
Please send Scott private replies regarding his diff.
Masato Asou wrote:
> Hi,
>
> I have new AMD laptop. The dmesg is posted below:
>
> OpenBSD 7.2 (GENERIC.MP) #2: Mon Sep 26 09:09:17 JST 2022
> a...@hp-obsd.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP
>
Hi,
I have new AMD laptop. The dmesg is posted below:
OpenBSD 7.2 (GENERIC.MP) #2: Mon Sep 26 09:09:17 JST 2022
a...@hp-obsd.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 7844245504 (7480MB)
avail mem = 7589105664 (7237MB)
random: good seed from bootblocks
mpath0 at root
Hi,
The dmesg is posted below:
OpenBSD 7.2 (GENERIC.MP) #2: Mon Sep 26 09:09:29 JST 2022
a...@amd-obsd.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 34256752640 (32669MB)
avail mem = 33201127424 (31663MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0:
Scott Cheloha [2022-09-23, 14:51 -0500]:
> On Fri, Sep 23, 2022 at 10:40:19PM +0300, Timo Myyr?? wrote:
>
>> Scott Cheloha [2022-09-23, 09:16 -0500]:
>>
>> > [...]
>> >
>> > Test results? Clues on reading the configuration space?
>> >
>> > [...]
>>
>> Hi,
>>
>> Here's a dmesg from thinkpad
Scott Cheloha wrote:
> > And it is the wrong time in the release cycle for this.
>
> This doesn't need to make release, I'm just gauging interest and
> testing code.
But you didn't say that in your email.
But Worse, you didn't think that you need to say it.
On Sat, Sep 24, 2022 at 11:06:24AM +1000, Jonathan Gray wrote:
> On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> > Hi,
> >
> > TL;DR:
> >
> > I want to compute the TSC frequency on AMD CPUs using the methods laid
> > out in the AMD manuals instead of calibrating the TSC by hand.
>
On Fri, Sep 23, 2022 at 07:46:55PM -0600, Theo de Raadt wrote:
> > And it is the wrong time in the release cycle for this.
>
> No kidding.
>
> As this makes absolutely no difference for any existing code in 7.2,
> except the strong hazard of accidentally breaking a machine.
It does not need to
On Sat, Sep 24, 2022 at 11:06:24AM +1000, Jonathan Gray wrote:
> On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> > [...]
> >
> > The only missing piece is code to read the configuration space on
> > family 10h-16h CPUs to determine how many boosted P-states we need to
> > skip to
> And it is the wrong time in the release cycle for this.
No kidding.
As this makes absolutely no difference for any existing code in 7.2,
except the strong hazard of accidentally breaking a machine.
On Fri, Sep 23, 2022 at 09:16:25AM -0500, Scott Cheloha wrote:
> Hi,
>
> TL;DR:
>
> I want to compute the TSC frequency on AMD CPUs using the methods laid
> out in the AMD manuals instead of calibrating the TSC by hand.
>
> If you have an AMD CPU with an invariant TSC, please apply this patch,
On Fri, Sep 23, 2022 at 10:40:19PM +0300, Timo Myyr?? wrote:
> Scott Cheloha [2022-09-23, 09:16 -0500]:
>
> > [...]
> >
> > Test results? Clues on reading the configuration space?
> >
> > [...]
>
> Hi,
>
> Here's a dmesg from thinkpad e485:
Thanks for testing.
> Does these timers affect the
Scott Cheloha [2022-09-23, 09:16 -0500]:
> Hi,
>
> TL;DR:
>
> I want to compute the TSC frequency on AMD CPUs using the methods laid
> out in the AMD manuals instead of calibrating the TSC by hand.
>
> If you have an AMD CPU with an invariant TSC, please apply this patch,
> recompile/boot the
Hi,
TL;DR:
I want to compute the TSC frequency on AMD CPUs using the methods laid
out in the AMD manuals instead of calibrating the TSC by hand.
If you have an AMD CPU with an invariant TSC, please apply this patch,
recompile/boot the resulting kernel, and send me the resulting dmesg.
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