ct: Re: [time-nuts] A simple sampling DMTD
> Message-ID:
>
> Content-Type: text/plain; charset="utf-8"
>
> Dear Joe,
>
> Thank you for your mail; always happy with the dialogue.
>
> In a way we have come full circle; the Sherman/Jordens NIST paper was on
Timing Solutions Corp had several products that might be of interest.
Designed around 20 years ago. The TSC5110 was mixer based.
The TSC5120 and successors were A/D based.
The block diagram in the TSC52120A datasheet may be of interest:
Gwinn
> > To: time-nuts@lists.febo.com
> > Subject: Re: [time-nuts] A simple sampling DMTD
> > Message-ID: <20191130122307326859.fc045...@comcast.net>
> > Content-Type: text/plain; charset=us-ascii
> >
> > Re: time-nuts Digest, Vol 184, Issue 40
> > On Fri
.
Luciano
Luciano P. S. Paramithiotti
tim...@timeok.it
www.timeok.it
Da "time-nuts" time-nuts-boun...@lists.febo.com
A time-nuts@lists.febo.com
Cc
Data Fri, 29 May 2020 12:06:41 -0400
Oggetto Re: [time-nuts] A simple sampling DMTD
On Sun, 01 Dec 2019 01:0
p]
>> Message: 6
>> Date: Fri, 29 Nov 2019 20:37:16 +0100
>> From: Gerhard Hoffmann
>> To: time-nuts@lists.febo.com
>> Subject: Re: [time-nuts] A simple sampling DMTD
>> Message-ID:
>> Content-Type: text/plain; charset=utf-8; format=flowed
>>
[sni
It turns out Bobs dumpster was my dumpster by a long path.
I still have the sampling HP54100 1 Ghz scope and it works.
Many other lucky bits to get.
Best regards
Paul
WB8TSL
On Mon, Feb 24, 2020 at 1:43 PM Bob kb8tq via time-nuts <
time-nuts@lists.febo.com> wrote:
> Hi
>
> Yup, welcome to the
Hi
Yup, welcome to the online auction lottery ….. As you may have noted, I’m
struggling a bit with the Phase Station and random (likely my fault) issues.
At the same time, I’m going around in circles about the R FPC-COM2. It’s
a pile of money, but it would replace a lot of questionable gear I
I woke up this morning, check my HP105B, it's absolutely going nuts. Heater
temp down, frequency ALL OVER the place. No output in any of the ports.
Sigh. eBay strikes again!
---
(Mr.) Taka Kamiya
KB4EMF / ex JF2DKG
On Sunday, February 23,
I took over master bedroom for my lab, and I have a gate for dog entry
prevention. All cables are over-head. I need protection from 2 legged and 4
legged variety.
---
(Mr.) Taka Kamiya
KB4EMF / ex JF2DKG
On Monday, February 24, 2020, 10:47:20 AM
Hi
…… looking at the data this morning. It appears that in my case *somebody*
(I’m blaming the dog) must have bumped the setup. There is a very obvious
set of steps in the phase data. The overnight run has no similar steps.
Sometimes
getting everything away from the test is a good thing …..
Hi
Ok, but thats “high pass in the RF section”. You really do not have an audio
high pass
filter the way you would in a more typical DMTD.
If it’s any comfort, I’m sitting here looking at a very different box. It also
has “wobbles”
as you get into parts in 10^-16. That might change a bit if
Dear Bob,
The capacitors are 47n NP0/C0G types (Kemet C0805C473K3GAC7800), picked for
low tempco (and low DF and other non-ideal behavior). I've not spotted any
hysteresis artefacts in these in previous designs, but I haven't measured
their performance in this circuit.
Forgot to mention in the
Hi
What does the temperature coefficient of your “hardware HPF” filter caps look
like?
Are they a type that has significant hysteresis?
Bob
> On Feb 23, 2020, at 3:05 PM, Jan-Derk Bakker via time-nuts
> wrote:
>
> Dear Attila,
>
> Thanks for the heads up.
>
> I am currently using a HPF
Dear Attila,
Thanks for the heads up.
I am currently using a HPF both in hardware (capacitive coupling into the
balun driving the ADC inputs) and in software before the ZCD. This should
counteract the first-order effects of this offset, although second-order
effects (converter nonlinearity et
Hi
Since most mixers also have DC offset issues, it is pretty common to high pass
filter
the signal before you try to hit a limiter. Yes, this can bring in other
issues, but the
net result is commonly a “win”.
Bob
> On Feb 23, 2020, at 2:10 PM, Attila Kinali via time-nuts
> wrote:
>
>
Re: time-nuts Digest, Vol 184, Issue 40
On Fri, 29 Nov 2019 20:37:02 -0500, time-nuts-requ...@lists.febo.com
wrote:
[snip]
> Message: 6
> Date: Fri, 29 Nov 2019 20:37:16 +0100
> From: Gerhard Hoffmann
> To: time-nuts@lists.febo.com
> Subject: Re: [time-nuts] A simple sampling DM
Am 29.11.19 um 11:45 schrieb Jan-Derk Bakker:
In general: as much as I like having it in my toolbox, I don't see how
using an FFT would be the best tool for the job in a zero-crossing detector
for a DMTD, let alone this particular sampling DMTD. For one, this 8-bit
processor doesn't have the
Dear Magnus,
Removing the slope between the two sample end points (or: trimming/adding
the fractional sample part of the period) is the point of the estimator I
posted earlier (
http://lists.febo.com/pipermail/time-nuts_lists.febo.com/2019-November/098450.html
).
In general: as much as I like
Hi,
On 2019-11-28 21:18, Joseph Gwinn wrote:
> JD,
>
> I'll have to think about it, but I will mention that with batch
> processing using window functions, it's common to precede the FFT using
> a simple FIR filter to eliminate the low-frequency energy (due to
> clutter, DC leakage/offset et
6:32 +0100
> From: Jan-Derk Bakker
> To: Discussion of precise time and frequency measurement
>
> Subject: Re: [time-nuts] A simple sampling DMTD
> Message-ID:
>
> Content-Type: text/plain; charset="UTF-8"
>
> Dear Joe,
>
> On Wed, Nov 27,
Dear Joe,
On Wed, Nov 27, 2019 at 7:22 PM Joseph Gwinn wrote:
> > [snip]
> > The 1001-point FIR band pass filter is a good reference to get an idea of
> > the best case performance of the system, but it is computationally
> > infeasible to run on an 8-bit processor. While a cheap comb filter
ncy measurement
>
> Subject: Re: [time-nuts] A simple sampling DMTD
> Message-ID:
>
> Content-Type: text/plain; charset="UTF-8"
>
> [This thread has started about three months ago; first post with design
> considerations is here:
> https://www.mai
[This thread has started about three months ago; first post with design
considerations is here:
https://www.mail-archive.com/time-nuts@lists.febo.com/msg04265.html ]
Dear all,
In the past month I have managed to get the PLL working, and found a
lightweight way to eliminate most if not all of the
Merely selecting every 100th sample throws away the opportunity to reduce the
effective ADC noise by digital filtering before decimation.
Bruce
> On 05 November 2019 at 10:08 Jan-Derk Bakker wrote:
>
>
> Dear Scott,
>
> You are entirely correct, sampling at 100ksps is mathematically the same
JD,
Thanks for your cogent reply. I appreciate it.
Best
Scott
Sent from my iPhone
> On Nov 4, 2019, at 5:03 PM, Jan-Derk Bakker wrote:
>
> Dear Scott,
>
> You are entirely correct, sampling at 100ksps is mathematically the same as
> sampling at 10Msps and then decimating by a factor of
@gmail.com]
> Sent: Monday, November 04, 2019 10:33
> To: Discussion of precise time and frequency measurement
> Subject: Re: [time-nuts] A simple sampling DMTD
>
> Dear Bob,
>
> I understand the general concern: perfect synchronization would potentially
> turn the Dual
Dear Scott,
You are entirely correct, sampling at 100ksps is mathematically the same as
sampling at 10Msps and then decimating by a factor of 100. The reason I'm
doing it in this way is driven by two practical considerations:
- my ADC, the LTC2140 (selected for bandwidth, dynamic range, aperture
...@lists.febo.com] on behalf of Jan-Derk Bakker
[jdbak...@gmail.com]
Sent: Monday, November 04, 2019 10:33
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] A simple sampling DMTD
Dear Bob,
I understand the general concern: perfect synchronization would potentially
turn the Dual
Hello,
(It has been a more few years since I designed / developed DSP for spectrum
analyzers for a major company, thanks for your patience.)
I recall that:
sample @ fs -> decimate (toss samples) by a factor of N
is equivalent to
sample @ fs / N
If we wanted a lower sample
Dear Bob,
I understand the general concern: perfect synchronization would potentially
turn the Dual Mixer Time Difference system into a Single Mixer Time
Difference setup. (Even with perfect synchronization, the dual-channel
architecture would serve to attenuate the common mode component of the
Hi
Yes, it only will be fully correlated well inside the loop bandwidth. The loop
bandwidth
normally used for this sort of thing is >> 1 Hz. By the time you start doing
ADEV, you
are in the correlated region.
Bob
> On Nov 3, 2019, at 3:42 PM, Jan-Derk Bakker wrote:
>
> Hi Bob,
>
>> If you
Dear Attila,
> The test was run for 175k seconds (just over 2 days) in a very much
> > non-temperature controlled attic. The resulting ADEV can be found at
> > http://www.lartmaker.nl/time-nuts/DMTD%20self-noise%20ADEV.pdf ; the
>
> This looks good, but I would still expect the start of the ADEV
Hi Bob,
> If you phase lock the downconversion reference, the VCXO noise that now
is uncorrelated
> between the channels will become correlated. That may make things worse
rather
> than better
Does the impact not depend on the loop bandwidth and VCXO performance? If I
read it correctly, in
On Sun, 3 Nov 2019 01:41:08 +0100
Jan-Derk Bakker wrote:
> The test was run for 175k seconds (just over 2 days) in a very much
> non-temperature controlled attic. The resulting ADEV can be found at
> http://www.lartmaker.nl/time-nuts/DMTD%20self-noise%20ADEV.pdf ; the
This looks good, but I
Hi
> On Nov 2, 2019, at 8:41 PM, Jan-Derk Bakker wrote:
>
> Dear all,
>
> Attila got me thinking with his remark:
>
> I am a bit astonished by the high noise level you have. I would have
>> expected
>> this to yield something below 1ps, judging from what we got from what
>> Nicolas
>>
Dear all,
Attila got me thinking with his remark:
I am a bit astonished by the high noise level you have. I would have
> expected
> this to yield something below 1ps, judging from what we got from what
> Nicolas
> acheived in his work on the sine exitation based TIC[1].
...and I realised that
Dear Attila,
Thank you for your feedback, replies inline:
On Tue, Oct 15, 2019 at 6:01 PM Attila Kinali wrote:
[snip]
> The biggest change I would make, would be to use a higher sampling
> frequency and use an FPGA with a CORDIC as phase detector. Especially
> as your goal is to measure the
Hoi Jan-Derk,
As I am late to the party, I take the liberty to answer a few mails together
On Sun, 1 Sep 2019 02:09:19 +0200
Jan-Derk Bakker wrote:
> I've been working on a design for a (relatively) simple, standalone
> sampling DMTD. Very rough preliminary schematics can be found at
>
Another update: Sampling now works at 100ksps. Samples are passed through a
two-stage CIC filter and are decimated to 2ksps for 200 samples per beat
note period. At system boot I am tuning the on-board VCTCXO (a Taitien
TT-series model) to 10Hz above the reference input and then leave the EFC
Update: last Friday our students have populated a few prototype boards (
http://www.lartmaker.nl/time-nuts/dmtd-proto.jpg), and this weekend I
managed to get some early code running on it.
The good: Noise performance matches the datasheet (1.19LSB_RMS given,
1.21LSB_RMS measured). The 1/f corner
n it be used with Timelab?
>
> We are waiting for your new ones.
>
> Luciano
>
>
> Da "time-nuts" time-nuts-boun...@lists.febo.com
> A "Discussion of precise time and frequency measurement"
> time-nuts@lists.febo.com
> Cc
> Data Sat, 14
.
Luciano
Da "time-nuts" time-nuts-boun...@lists.febo.com
A "Discussion of precise time and frequency measurement"
time-nuts@lists.febo.com
Cc
Data Sat, 14 Sep 2019 14:25:48 +0200
Oggetto Re: [time-nuts] A simple sampling DMTD
Update: I have finished routing
Update: I have finished routing the board (placement diagram at
http://www.lartmaker.nl/time-nuts/DMTD%20rev1.00%20assembly.pdf ) and
ordered a few prototype PCBs.
After the earlier discussions on the list I've grown sufficiently concerned
about the impact of 1/f converter noise that I have added
43 matches
Mail list logo
