Hi Marek,
On 03/21/2017 12:33 AM, Marek Vasut wrote:
On 03/20/2017 05:01 PM, Simon Glass wrote:
Hi Marek,
On 20 March 2017 at 06:24, Marek Vasut wrote:
On 03/20/2017 02:53 AM, Eddie Cai wrote:
2017-03-17 5:26 GMT+08:00 Marek Vasut :
On 03/15/2017 08:56 AM,
On Saturday 18 March 2017 08:04 PM, Tom Rini wrote:
>>> And can we not move towards the "normal" method of SPL loading
>>> the u-boot.img (or FIT) from? I guess the current architecture here is
>>> confusing me.
>> This has been same for all k2 platforms. I guess we have single image so
>> that
On Monday 20 March 2017 02:06 PM, Lukasz Majewski wrote:
> Hi Lokesh,
>
>>
>>
>> On Saturday 18 March 2017 12:03 AM, Dan Murphy wrote:
>>> Simon
>>>
>>> On 03/17/2017 01:24 PM, Simon Glass wrote:
+ML
Hi Dan,
On 17 March 2017 at 12:16, Dan Murphy wrote:
On Monday 20 March 2017 11:49 PM, Tom Rini wrote:
> Calls to IS_ENABLED() on a non-y/n option will always be false, even
> when set. We can correct this by adding a new bool value that is set
> based on the conditions required for SPL_STACK_R_MALLOC_SIMPLE_LEN to be
> set instead.
>
> Fixes:
On Tue, Mar 21, 2017 at 7:13 AM, Rick Altherr wrote:
> +Joel
>
> On Mon, Mar 20, 2017 at 10:52 AM, Maxim Sloyko wrote:
>> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>>> So this applies to a lot of parts of the series here. What
On Fri, Mar 17, 2017 at 10:05:40PM -0700, Alexandru Gagniuc wrote:
> spl_mmc.c calls mmc_initialize(). This symbol is provided in
> drivers/mmc/mmc.c when CONFIG_GENERIC_MMC is enabled.
>
> Signed-off-by: Alexandru Gagniuc
> ---
> common/spl/Kconfig | 1 +
> 1 file
21.03.2017, 06:01, "Jernej Skrabec" :
> This series implements support for HDMI output. This is done using
> DM video framework and sharing the HDMI controller code with RK3288.
>
> Patch 1 splits out RK3288 HDMI code in a way that it is appropriate
> for sharing with
On Mon, Mar 20, 2017 at 12:48 PM, Tom Rini wrote:
>
> On Mon, Mar 20, 2017 at 10:52:12AM -0700, Maxim Sloyko wrote:
> > On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
> >
> > > On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > > > On
Designware HDMI controller and phy are used in other SoCs as well. Split
out platform independent code.
DW HDMI has 8 bit registers but they can be represented as 32 bit
registers as well. Add support to select access mode.
EDID reading code use reading by blocks which is not supported by other
Because DE2 driver is enabled by default, it is nice to disable it on
all boards which don't have any video output. List of such boards is
also much shorter.
Signed-off-by: Jernej Skrabec
---
Changes in v2:
- invert logic (disable instead of enable)
From: Icenowy Zheng
The A64 uses the AXP803 as its PMIC.
Signed-off-by: Icenowy Zheng
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Makefile | 3 +
arch/arm/mach-sunxi/pmic_bus.c | 6 +-
arch/arm/mach-sunxi/rsb.c
This commit adds support for HDMI output.
Signed-off-by: Jernej Skrabec
Reviewed-by: Simon Glass
---
Changes in v2:
- add reviewed by tag
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 8 +
arch/arm/include/asm/arch-sunxi/display2.h | 124
Video driver for older Allwinner SoCs uses cfb console framework which
in turn uses struct ctfb_res_modes to hold timing informations. However,
DM video framework uses different structure - struct display_timing.
It makes more sense to convert lcdc to use new timing structure because
all new
This is needed for HDMI, which will be added later.
Signed-off-by: Jernej Skrabec
Reviewed-by: Simon Glass
---
Changes in v2:
- add reviewed by tag
- constant style fix
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 54 +++
TCON unit has similar layout and functionality also on newer SoCs. This
commit splits out TCON code for easier reuse later.
Signed-off-by: Jernej Skrabec
---
Changes in v2:
- lcdc conversion to use struct display_timing is done in a new patch
- fix issue with
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to
This patch removes:
- CONFIG_CMD_MEM: enabled by default
- CONFIG_DESIGNWARE_ETH : not being used anywhere.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
include/configs/stm32f746-disco.h | 2 --
1 file changed, 2
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746-disco.dts | 90
arch/arm/dts/stm32f746.dtsi | 86 --
2 files changed, 90
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.
To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
include/configs/stm32f746-disco.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/stm32f746-disco.h
b/include/configs/stm32f746-disco.h
index 3bea513..b6ad8d2 100644
---
This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
drivers/gpio/Kconfig| 9 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/stm32f7_gpio.c | 189
This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746.dtsi| 1 +
board/st/stm32f746-disco/stm32f746-disco.c | 2 --
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746-disco.dts | 10
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
board/st/stm32f746-disco/stm32f746-disco.c | 113 +--
configs/stm32f746-disco_defconfig | 2 +
drivers/ram/Kconfig| 8 ++
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746-disco.dts | 12 +
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
board/st/stm32f746-disco/stm32f746-disco.c | 42 +-
drivers/ram/stm32_sdram.c | 1 -
include/configs/stm32f746-disco.h | 6 +
3
Also added DT binding doc for stm32 fmc(flexible memory controller).
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746-disco.dts | 7
arch/arm/dts/stm32f746.dtsi | 56
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
board/st/stm32f746-disco/stm32f746-disco.c | 89
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746-disco.dts | 10 +++
drivers/ram/stm32_sdram.c| 144 +++
include/dt-bindings/memory/stm32-sdram.h | 34
3
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
arch/arm/dts/stm32f746.dtsi | 1 +
drivers/spi/stm32_qspi.c| 16 +++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi
Signed-off-by: Vikas Manocha
cc: Christophe KERELLO
---
drivers/ram/stm32_sdram.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 13f8964..67be61f
This patchset :
- adds stm32 sdram driver based on DM
- adds stm32 gpio driver based on DM
- uses clock & pin control drivers to replace board specific
configurations from code
- corrects sdram parameters as per correct sdram part
- adds support
+Joel
On Mon, Mar 20, 2017 at 10:52 AM, Maxim Sloyko wrote:
>
>
> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>>
>> On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
>> > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini
On Mon, Mar 20, 2017 at 10:52:12AM -0700, Maxim Sloyko wrote:
> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>
> > On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> > >
> > > > On
1;4601;0c
On Mon, Mar 20, 2017 at 08:19:14AM +0100, Florent Jacquet wrote:
> On 13/03/2017 09:42, Florent Jacquet wrote:
> > On 06/03/2017 13:19, Florent Jacquet wrote:
> >> On 16/02/2017 19:32, Maxime Ripard wrote:
> >>> On Thu, Feb 16, 2017 at 11:46:42AM +0100, Florent Jacquet wrote:
> This
On Tuesday 21 March 2017 12:22 AM, Maxime Ripard wrote:
Hi,
On Mon, Mar 13, 2017 at 12:37:36AM +, André Przywara wrote:
On 03/03/17 14:32, Maxime Ripard wrote:
If we depend on the ARCH_SUNXI configuration option, the boards that do not
have NAND support enabled (with the associated
Hi,
On Mon, Mar 13, 2017 at 12:37:36AM +, André Przywara wrote:
> On 03/03/17 14:32, Maxime Ripard wrote:
> > If we depend on the ARCH_SUNXI configuration option, the boards that do not
> > have NAND support enabled (with the associated options) will not compile
> > anymore.
> >
> > Depend
- The catch-all i.MX6 job has been exceeding the time limit again so
split this up further. We now have an i.MX6 job and an
everything-else job.
- The logic we use to say "Freescale and AArch64" can be more clearly
expressed with '&' rather than excluding various other things, so
clear
Calls to IS_ENABLED() on a non-y/n option will always be false, even
when set. We can correct this by adding a new bool value that is set
based on the conditions required for SPL_STACK_R_MALLOC_SIMPLE_LEN to be
set instead.
Fixes: 340f418acd11 ("spl: Add spl_early_init()")
Reported-by: Lokesh
On 20/03/2017 01:51, Peng Fan wrote:
> Ping.. any comments?
>
They are fine - I had just to rebase the last one on current TOT, and
this is the reason I left outside of my PR. I merged them in my local
branch, I will test the build again and then push them.
Best regards,
Stefano
--
On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
> On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> >
> > > On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > > > Add
On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
>
> > On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > > Add support for clocks needed by MACs to ast2500 clock driver.
> > > The clocks are
On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > Add support for clocks needed by MACs to ast2500 clock driver.
> > The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
> > PCLK_MAC2 for MAC1
On 03/20/2017 05:01 PM, Simon Glass wrote:
> Hi Marek,
>
> On 20 March 2017 at 06:24, Marek Vasut wrote:
>> On 03/20/2017 02:53 AM, Eddie Cai wrote:
>>> 2017-03-17 5:26 GMT+08:00 Marek Vasut :
>>>
On 03/15/2017 08:56 AM, Eddie Cai wrote:
> rockusb is a
On Sat, Mar 4, 2017 at 8:17 AM, Peng Fan wrote:
> Add driver model support for mxc spi driver.
> Most functions are restructured to be reused by DM and non-DM.
> Tested on mx6slevk board.
>
> Signed-off-by: Peng Fan
> Cc: Jagan Teki
> cc:
Hi Marek,
On 20 March 2017 at 06:24, Marek Vasut wrote:
> On 03/20/2017 02:53 AM, Eddie Cai wrote:
>> 2017-03-17 5:26 GMT+08:00 Marek Vasut :
>>
>>> On 03/15/2017 08:56 AM, Eddie Cai wrote:
rockusb is a protocol run between host pc and device. it help people
The Xenon SDHCI driver just missed the integration of this patch:
git ID 6d0e34bf
mmc: sdhci: Distinguish between base clock and maximum peripheral frequency
With this patch applied, the SDHCI subsystem complains now with this warning
while probing:
sdhci_setup_cfg: Hardware doesn't specify
On 03/20/2017 02:53 AM, Eddie Cai wrote:
> 2017-03-17 5:26 GMT+08:00 Marek Vasut :
>
>> On 03/15/2017 08:56 AM, Eddie Cai wrote:
>>> rockusb is a protocol run between host pc and device. it help people get
>> device
>>> info, flash image to device. this patch implement rockusb on
On Mon, Mar 20, 2017 at 10:04:55AM +0200, Tuomas Tynkkynen wrote:
> The Raspberry Pi device tree files since Linux v4.9 have a "ethernet"
> alias pointing to the on-board Ethernet device node. However,
> U-Boot's fdt_fixup_ethernet() only looks at ethernet aliases ending
> in digits.
>
> As the
On Mon, Mar 20, 2017 at 10:58:57AM +0530, Lokesh Vutla wrote:
> Hi Simon,
>
> On Wednesday 15 March 2017 08:13 PM, Simon Glass wrote:
> > From: Eddie Cai
> >
> > At present malloc_base/_limit/_ptr are not initialised in spl_init() when
> > we call spl_init() in
From: Patrice Chotard
Signed-off-by: Patrice Chotard
---
board/st/stih410-b2260/board.c | 8
1 file changed, 8 insertions(+)
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 363c016..590e8f0 100644
---
Hi Marek
On 03/17/2017 05:42 PM, Marek Vasut wrote:
> On 03/17/2017 05:25 PM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> This patch adds the ST glue logic to manage the DWC3 HC
>> on STiH407 SoC family. It configures the internal glue
>> logic and syscfg
Hi Marek
On 03/17/2017 05:42 PM, Marek Vasut wrote:
> On 03/17/2017 05:25 PM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>
> Just squash all the config patches into a single patch please ...
Ok sure
>
>> Signed-off-by: Patrice Chotard
On Sun, 2017-03-19 at 20:30 -0600, Simon Glass wrote:
> Hi Andy,
>
> On 15 March 2017 at 12:42, Andy Shevchenko
> wrote:
> > From: Felipe Balbi
> >
> > Intel MID platforms have few microcontrollers inside SoC, one of
> > them
> >
On Sun, 2017-03-19 at 20:30 -0600, Simon Glass wrote:
> Hi Andy,
>
> On 15 March 2017 at 12:25, Andy Shevchenko
> wrote:
> > On some systems SDHCI controllers may be powered off and it's
> > required
> > to bring them on before accessing.
> >
> > SDHCI generic
The new function dm_remove_devices_flags() is intented for driver specific
last-stage cleanup operations before the OS is started. This patch adds
this functionality and hooks it into the common device_remove()
function.
Drivers wanting to use this feature for some last-stage removal calls,
need
This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.
This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.
Signed-off-by: Stefan Roese
This patch adds a call to dm_remove_devices_flags() to
announce_and_cleanup() so that drivers that have one of the removal flags
set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may do some
last-stage cleanup before the OS is started.
Signed-off-by: Stefan Roese
Add a test for the correct device removal. Currently two different ways
for device removal are supported:
- Normal device removal via the device_remove() API
- Removal via selective device driver flags (DM_FLAG_ACTIVE_DMA)
This new test "remove_active_dma" adds tests cases for those both ways
of
The ARMCLK starts at 24MHz on the rk3188 which makes u-boot startup
unnecessary slow. We can easily switch to 600MHz without involving
the pmic and thus do this in the SPL to also make the rc4-decoding
of the U-Boot image faster.
Some smaller fixes also turned up while adding the ARMCLK-support.
The rock board uses the already existing act8846 as pmic, so enable the
driver and needed pmic options for it.
Signed-off-by: Heiko Stuebner
---
configs/rock_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index
Right now we're setting the wrong value of 0 as base in the ram_info struct,
which is obviously wrong for the rk3188. So instead set the correct value
we already have in CONFIG_SYS_SDRAM_BASE.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-rockchip/rk3188/sdram_rk3188.c | 2 +-
The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole
startup take a lot of time. We therefore want to at least move to the safe
600MHz value we can use with default pmic settings.
This is also the freqency the proprietary sdram-init leaves the cpu at.
For boards that have
The armclk starts in slow mode (24MHz) on the rk3188, which results in U-Boot
startup taking a lot of time (U-Boot itself, but also the rc4 decoding done
in the bootrom).
With default pmic settings we can always reach a safe frequency of 600MHz
which is also the frequency the proprietary loader
The rk3066/rk3188 introduced new i2c IP blocks but kept the old ones
around just in case. The default also points to these old controllers.
The "new" blocks proved stable and nobody ever used the old ones anywhere,
not in the kernel and not in U-Boot, so to be able to reuse the already
existing
There was still a static ram value set in the rk3188-board from the
time where we didn't have actual sdram init code.
Now the sdram init leaves the ram information in SYS_REG2 and we can
decode it similarly to the rk3288.
Right now we have two duplicates of that code, which is still ok and
The Cortex-A9 socs rk3066 and rk3188 share the IP but have their own
compatible values, so add them to make the i2c on these platforms accessible.
Signed-off-by: Heiko Stuebner
---
drivers/i2c/rk_i2c.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/i2c/rk_i2c.c
In the beginning, we did SPL -> TPL -> U-Boot, but after clarification
of the real ordering swapped SPL and TPL.
It seems some renames were forgotten and may confuse future readers, so
also swap these to reflect the actual ordering.
Signed-off-by: Heiko Stuebner
---
Hi Simon,
On 03/19/17 20:59, Simon Glass wrote:
> At present we have a lot of ad-hoc init functions related to boards, for
> example board_early_init_f(), board_misc_init_f() and dram_init().
>
> There are used in different ways by different boards as useful hooks to
> do the required init and
On Wed, Feb 01, 2017 at 11:39:14AM +0100, Jean-Jacques Hiblot wrote:
> To keep a consistent MMC device mapping in SPL and in u-boot, let's
> register the MMC controllers the same way in u-boot and in the SPL.
> In terms of boot time, it doesn't hurt to register more controllers than
> needed
Am Montag, 20. März 2017, 14:47:16 CET schrieb Kever Yang:
> Rockchip spl driver needs using spl_early_init().
>
> Fixes: b3d2861e (spl: Remove overwrite of relocated malloc limit)
> Signed-off-by: Kever Yang
Reviewed-by: Heiko Stuebner
on
Hi Marek
On 03/17/2017 05:38 PM, Marek Vasut wrote:
> On 03/17/2017 05:25 PM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> This is the generic phy driver for the picoPHY ports
>> used by USB2 and USB3 Host controllers available on
>> STiH407 SoC families.
On 17/03/2017 17:20, Simon Glass wrote:
On 16 February 2017 at 13:43, Simon Glass wrote:
On 14 February 2017 at 03:20, Jean-Jacques Hiblot wrote:
On 14/02/2017 06:23, Simon Glass wrote:
Hi,
On 13 February 2017 at 08:17, Jean-Jacques Hiblot
It is sometimes convenient to know how many and/or which resources are
currently loaded into a TPG, e.g. to test is a flush operation succeeded.
Hence, we add a command that lists the resources of a given type currently
loaded into the TPM.
Signed-off-by: Mario Six
---
If we want to load a key into a TPM, we need to know the designated parent
key's handle, so that the TPM is able to insert the key at the correct place in
the key hierarchy.
However, if we want to load a key whose designated parent key we also
previously loaded ourselves, we first need to
Commit 7690be35de ("lib: tpm: Add command to flush resources") added a command
to flush resources from a TPM.
However, a previous development version was accidentially used to generate the
patch, resulting in a non-functional command.
This patch fixes the flush command.
Signed-off-by: Mario Six
This series fixes the tpm flush command, which is currently broken, adds a
command to list resources, and a command to load TPM keys via their parent's
SHA1 hash.
Mario Six (3):
tpm: Add function to load keys via their parent's SHA1 hash
cmd: tpm: Fix flush command
lib: tpm: Add command to
Hi Marek
On 03/17/2017 05:41 PM, Marek Vasut wrote:
> On 03/17/2017 05:25 PM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> Add support for on-chip ohci controller available
>> on STMicrolectronics SoCs.
>> Ohci support will be then available on both type A
Hi Marek
On 03/17/2017 05:40 PM, Marek Vasut wrote:
> On 03/17/2017 05:25 PM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> Add support for on-chip ehci controller available
>> on STMicrolectronics SoCs.
>> ehci support will be then available on both type A
Hi Eddie,
> 2017-03-16 15:05 GMT+08:00 Kever Yang :
>
> > Hi Eddie,
> >
> > I recommend you to use ums framework instead of fastboot,
> > because ums have dual-buffer which improve performance.
> >
> I will try to add dual buffer support in next version
If of
Hi Lokesh,
>
>
> On Saturday 18 March 2017 12:03 AM, Dan Murphy wrote:
> > Simon
> >
> > On 03/17/2017 01:24 PM, Simon Glass wrote:
> >> +ML
> >>
> >> Hi Dan,
> >>
> >> On 17 March 2017 at 12:16, Dan Murphy wrote:
> >>> Simon
> >>>
> >>> I wanted to drop you a note to see if
Hi Simon
2017-03-20 10:30 GMT+08:00 Simon Glass :
> Hi Eddie.
>
> On 15 March 2017 at 01:56, Eddie Cai wrote:
> > this patch enable rockusb support on rk3288 based device.
> >
> > Signed-off-by: Eddie Cai
> > ---
> >
Hi Simon
2017-03-20 10:29 GMT+08:00 Simon Glass :
> Hi Eddie,
>
> On 15 March 2017 at 01:56, Eddie Cai wrote:
> >
> > this patch add rockusb command. the usage is
> > rockusb []
> > e.g. rockusb 0 mmc 0
> >
> > Signed-off-by: Eddie Cai
The Raspberry Pi device tree files since Linux v4.9 have a "ethernet"
alias pointing to the on-board Ethernet device node. However,
U-Boot's fdt_fixup_ethernet() only looks at ethernet aliases ending
in digits.
As the spec doesn't mandate that aliases must end in numbers and there
have been much
On 03/19/17 20:59, Simon Glass wrote:
> Add a uclass to handle board init. This allows drivers to be provided to
> perform the various phases of init. Functions are provided to call all
> devices that can handle a particular phase.
>
> Signed-off-by: Simon Glass
> ---
>
>
On Fri, Mar 17, 2017 at 8:28 PM, Marek Vasut wrote:
> On 03/17/2017 01:25 PM, Ley Foon Tan wrote:
>> Hi Marek
>
> Hi!
>
>> On Fri, Mar 17, 2017 at 5:56 AM, Marek Vasut wrote:
>>> On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
This is the 2nd version of patchset to
On Mon, Mar 20, 2017 at 08:19:14AM +0100, Florent Jacquet wrote:
> On 13/03/2017 09:42, Florent Jacquet wrote:
> > On 06/03/2017 13:19, Florent Jacquet wrote:
> >> On 16/02/2017 19:32, Maxime Ripard wrote:
> >>> On Thu, Feb 16, 2017 at 11:46:42AM +0100, Florent Jacquet wrote:
> This enables
2017-03-16 15:05 GMT+08:00 Kever Yang :
> Hi Eddie,
>
> I recommend you to use ums framework instead of fastboot, because
> ums have dual-buffer which improve performance.
>
I will try to add dual buffer support in next version
>
> Thanks,
> - Kever
>
> On
On 13/03/2017 09:42, Florent Jacquet wrote:
> On 06/03/2017 13:19, Florent Jacquet wrote:
>> On 16/02/2017 19:32, Maxime Ripard wrote:
>>> On Thu, Feb 16, 2017 at 11:46:42AM +0100, Florent Jacquet wrote:
This enables the support for the Allwinner A23 Evaluation Board (EVB),
that already
On Sun, Mar 12, 2017 at 02:21:35PM -0600, Simon Glass wrote:
> Hi,
>
> On 3 March 2017 at 03:52, Dr. Philipp Tomsich
> wrote:
> > Hi Simon,
> >
> > On 03 Mar 2017, at 05:52, Simon Glass wrote:
> >
> > Hi Philipp,
> >
> > On 22 February
Rockchip spl driver needs using spl_early_init().
Fixes: b3d2861e (spl: Remove overwrite of relocated malloc limit)
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3188-board-spl.c | 4 ++--
arch/arm/mach-rockchip/rk3399-board-spl.c | 4 ++--
2 files changed,
ATF(ARM Trust Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at:
SPL is consider as BL2 in ATF, it needs to load other part of ATF binary
like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to prepare the
parameter for BL31 which including entry and image information for
This patch needs work with some patch for SPL support multi
binary in FIT which is from Andre.
The entry point of bl31 and bl33 is still using hard code because we
still can not get them from the FIT image information.
Changes in v1:
- license update
- split out as separate patch
Kever Yang
Hello Robert,
Am 15.03.2017 um 09:02 schrieb Robert P. J. Day:
to build cross_tools, i ran:
$ make sandbox_defconfig
$ make cross_tools
and while it appeared to work, i got:
... snip ...
LDFLAGS="" python ./lib/libfdt/setup.py \
"-Wall -Wstrict-prototypes -O2
Hello Maxim,
Am 16.03.2017 um 22:36 schrieb Maxim Sloyko:
Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko
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