On 4/18/2023 7:37 AM, Heinrich Schuchardt wrote:
Avoid a buffer overflow if assigned-clock-rates has less than two elements.
Fixes: 98bcdf16356c ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Peng Fan
---
On 18:32-20230328, Jayesh Choudhary wrote:
> Some firewalls enabled by ROM are still left on. So some
> address space is inaccessible to the bootloader. For example,
> in OSPI boot mode we get an exception and the system hangs.
> Therefore, disable all the firewalls left on by the ROM.
>
>
On Tue, 18 Apr 2023 at 00:15, Chris Morgan wrote:
>
> On Mon, Apr 17, 2023 at 06:13:18PM +0530, Sughosh Ganu wrote:
> > On Thu, 13 Apr 2023 at 19:43, Chris Morgan wrote:
> > >
> > > From: Chris Morgan
> > >
> > > Add a node for the trng found on RK3588 SoCs.
> > >
> > > Changes in V3:
> > > -
On 2023/4/18 11:07, Dominique Martinet wrote:
Qu Wenruo wrote on Tue, Apr 18, 2023 at 10:53:41AM +0800:
I have a feeling the loop could just be updated to go to the end
`while (cur < end)` as it doesn't seem to care about the end
alignment... Should I update v2 to do that instead?
Yeah, it
On 2023/4/18 10:41, Dominique Martinet wrote:
Qu Wenruo wrote on Tue, Apr 18, 2023 at 10:02:00AM +0800:
/* Read the tailing unaligned part*/
Can we remove this part completely?
IIRC if we read until the target end, the unaligned end part can be
completely removed then.
The "Read
On 2023/4/18 10:05, Dominique Martinet wrote:
Qu Wenruo wrote on Tue, Apr 18, 2023 at 09:58:37AM +0800:
The subject can be changed to "btrfs: fix offset when reading compressed
extents".
The original one is a little too generic.
Ok.
btrfs_file_read()
-> btrfs_read_extent_reg
On 2023/4/18 10:05, Dominique Martinet wrote:
Qu Wenruo wrote on Tue, Apr 18, 2023 at 09:58:37AM +0800:
The subject can be changed to "btrfs: fix offset when reading compressed
extents".
The original one is a little too generic.
Ok.
btrfs_file_read()
-> btrfs_read_extent_reg
On 2023/4/18 09:17, Dominique Martinet wrote:
From: Dominique Martinet
btfs_file_read's truncate path has a comment noting '>0 means no extent'
and bailing out immediately, but the buffer has not been written so
probably needs zeroing out.
This is a theorical fix only and hasn't been
On 2023/4/18 09:17, Dominique Martinet wrote:
From: Dominique Martinet
btrfs_file_read main 'aligned read' loop would limit the last read to
the aligned end even if the data is present in the extent: there is no
reason not to read the data that we know will be presented correctly.
If that
On 2023/4/18 09:17, Dominique Martinet wrote:
From: Dominique Martinet
The subject can be changed to "btrfs: fix offset when reading compressed
extents".
The original one is a little too generic.
btrfs_read_extent_reg correctly computed the extent offset in the
BTRFS_COMPRESS_NONE
On Mon, Apr 17, 2023 at 10:22:24AM -0400, Raymond Mao wrote:
> On Thu, 13 Apr 2023 at 04:19, AKASHI Takahiro
> wrote:
>
> > On Fri, Apr 07, 2023 at 12:13:36PM +0200, Heinrich Schuchardt wrote:
> > > On 4/5/23 02:06, Raymond Mao wrote:
> > > > Changes for complying to EFI spec §3.5.1.1
> > > >
If serdes type is invalid, we cannot assume that it is a valid index
for serdes_type_to_str[].
Fixes: edb470253346 ("arm: mvebu: Add Armada 38x SERDES / PHY init code from
Marvell bin_hdr")
Signed-off-by: Heinrich Schuchardt
---
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c | 4 ++--
1
Avoid a buffer overflow if assigned-clock-rates has less than two elements.
Fixes: 98bcdf16356c ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt
---
arch/arm/mach-imx/imx8m/soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hi Bin,
On Thu, 13 Apr 2023 at 04:06, Bin Meng wrote:
>
> On Mon, Apr 10, 2023 at 3:25 PM Rick Chen wrote:
> >
> > > From: Simon Glass
> > > Sent: Monday, April 03, 2023 4:28 AM
> > > To: U-Boot Mailing List
> > > Cc: Sean Anderson ; Bin Meng ;
> > > Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi
On 4/17/23 22:48, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 10:33:18PM +0200, Marek Vasut wrote:
On 4/17/23 20:22, Ralph Siemsen wrote:
Perhaps we could change Kconfig to select CPG also for gen2. I can
make this patch, but how to test that this does not introduce any new
problems? Might
On 4/17/23 22:44, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 10:30:26PM +0200, Marek Vasut wrote:
I mean, if you drop 'CLK' and 'CLK_RENESAS' from this list, do they
still get selected because 'CLK_R8A06G032' is in this list ? If yes,
then drop them from this list, else keep them.
If I
On Mon, Apr 17, 2023 at 10:34:08PM +0200, Marek Vasut wrote:
On 4/17/23 22:29, Ralph Siemsen wrote:
Indeed it does, see below. I did however want to document how to call
mkimage manually, since it took me a while to work out the right
arguments (especially using -n for the config file).
Then
On Mon, Apr 17, 2023 at 10:33:18PM +0200, Marek Vasut wrote:
On 4/17/23 20:22, Ralph Siemsen wrote:
Perhaps we could change Kconfig to select CPG also for gen2. I can
make this patch, but how to test that this does not introduce any new
problems? Might there be an autobuilder for R-Car
On Mon, Apr 17, 2023 at 10:30:26PM +0200, Marek Vasut wrote:
I mean, if you drop 'CLK' and 'CLK_RENESAS' from this list, do they
still get selected because 'CLK_R8A06G032' is in this list ? If yes,
then drop them from this list, else keep them.
If I drop the first two, I get some kconfig
On 4/17/23 22:29, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:28:05PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
RZ/N1
+ - Schneider rzn1-snarc board
+
+Building
+
+
+NOTE: the following information is for the rzn1 board only.
Maybe this should be in a
On Mon, Apr 17, 2023 at 07:32:30PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
+#define FUNCCTRL 0x00
+#define FUNCCTRL_MASKSDLOFS (0x18 << 16)
+#define FUNCCTRL_DVDDQ_1_5V (1 << 8)
+#define FUNCCTRL_RESET_N (1 << 0)
+#define DLLCTRL
On 4/17/23 20:22, Ralph Siemsen wrote:
Hi Marek,
On Mon, Apr 17, 2023 at 07:02:34PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 8f82a7aa3e..a0d8c10bdb 100644
--- a/drivers/clk/renesas/Makefile
0)
>
> are available in the Git repository at:
>
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
> tags/u-boot-nand-20230417
>
> for you to fetch changes up to 156968211ef0e155a198a2fe9e94187a91186ab9:
>
> colibri-imx6ull: specify MTD partiti
On 4/17/23 20:57, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:15:07PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
+++ b/arch/arm/Kconfig
@@ -1031,6 +1031,21 @@ config ARCH_RMOBILE
imply SYS_THUMB_BUILD
imply ARCH_MISC_INIT if DISPLAY_CPUINFO
+config
On Mon, Apr 17, 2023 at 07:28:05PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
RZ/N1
+- Schneider rzn1-snarc board
+
+Building
+
+
+NOTE: the following information is for the rzn1 board only.
Maybe this should be in a separate document , some rzn1 specific
On 4/17/23 22:17, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:23:46PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
+ spkgimage.o \
Maybe just call the file renesas_spkgimage.o so its clear which
SoC/vendor this file is associtated with.
Okay, will do.
On 4/17/23 21:45, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:18:46PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
diff --git a/board/schneider/rzn1-snarc/ddr_timing.c
b/board/schneider/rzn1-snarc/ddr_timing.c
new file mode 100644
index 00..8bc3fe7be4
---
On 4/17/23 20:33, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:12:31PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
This is taken from Linux kernel 5.17, and contains just bare minimum
functionality: CPU, UART and system timer.
Why Linux 5.17 and not e.g. 6.2 or 6.1 LTS
On 4/17/23 20:26, Ralph Siemsen wrote:
On Mon, Apr 17, 2023 at 07:04:15PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
Commit 2564fce7eea3 ("sunxi: move Cortex SMPEN setting into start.S")
added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For
platforms not using
On Mon, Apr 17, 2023 at 07:23:46PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
+ spkgimage.o \
Maybe just call the file renesas_spkgimage.o so its clear which
SoC/vendor this file is associtated with.
Okay, will do.
+static struct spkg_file
On Mon, Apr 17, 2023 at 07:18:46PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
diff --git a/board/schneider/rzn1-snarc/ddr_timing.c
b/board/schneider/rzn1-snarc/ddr_timing.c
new file mode 100644
index 00..8bc3fe7be4
--- /dev/null
+++
A RK3568 device tree pmic node can reference the I2S1_MCLKOUT_TX clock
in assigned-clocks, add dummy support to set parent of this clock to the
rk3568 cru driver.
Fixes probe of pmic driver and missing regulators on affected boards,
rk3568-evb and rk3568-rock-3a.
Signed-off-by: Jonas Karlman
The GPIO V2 controller on RK3568 and RK3588 works very similar to
prior generation, main difference is the use of a write mask in the
upper 16 bits and register address offset have changed.
GPIO_VER_ID is a new register at 0x0078 that is used to determine when
the driver should use new or old
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.
Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman
Sync the sdmmc node from linux-next, include required nodes in SPL and
imply Kconfig options required for functional sdmmc clk in SPL and
U-Boot proper.
This make it possible for both SPL and U-Boot proper to configure sdmmc
clocks. In SPL, before TF-A is loaded, scru regs is configured, in
Booting from sdmmc on RK3588 currently works because of a workaround in
the device tree, clocks are reordered so that the driver use ciu-sample
instead of ciu, and the BootRom initializes sdmmc clocks before SPL is
loaded into DRAM.
The sdmmc clocks are normally controlled by TF-A using SCMI.
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.
drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:88:
Add fdtoverlay_addr_r, kernel_comp_addr_r and imply use of
OF_LIBFDT_OVERLAY on RK3568 and RK3588 to support fdtoverlay
and kernel compression.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
---
v3:
- No change
v2:
- Drop parts that convert to use bootstd
- Collect r-b tag
The TF-A blobs used to boot RK3568 and RK3588 boards is based on atf
v2.3. Mainline atf v2.3 contains an issue that could lead to a crash
when it fails to parse the fdt blob being passed as the platform param.
An issue that was fixed in atf v2.4.
The vendor TF-A seem to suffer from a similar
Running U-Boot from a SD-card on ROCK 5 Model B fails to load atf using
DMA and prints debug_uart messages.
U-Boot SPL 2023.04-rc3 (Mar 12 2023 - 00:30:16 +)
Trying to boot from MMC1
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ...
There is no support to initialize DRAM on RK3588 SoCs using U-Boot TPL
and instead an external TPL binary must be used to generate a bootable
u-boot-rockchip.bin image.
Enable ROCKCHIP_EXTERNAL_TPL by default for RK3588, add build steps for
RK3588 to documentation and clean up CONFIG_BINMAN_FDT
This re-send series contains fixes for RK3568 and RK3588 that never made
it into v2023.04 and is needed to generate a bootable rockchip-u-boot.bin
image for RK3568 and RK3588.
I have folded all my pending fixes into this series. Some have r-b tags
others seem to have been missed :-)
Patch 1
On Mon, Apr 17, 2023 at 07:15:07PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
+++ b/arch/arm/Kconfig
@@ -1031,6 +1031,21 @@ config ARCH_RMOBILE
imply SYS_THUMB_BUILD
imply ARCH_MISC_INIT if DISPLAY_CPUINFO
+config ARCH_RZN1
+ bool "Reneasa
On Mon, Apr 17, 2023 at 07:12:31PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
This is taken from Linux kernel 5.17, and contains just bare minimum
functionality: CPU, UART and system timer.
Why Linux 5.17 and not e.g. 6.2 or 6.1 LTS ?
It was the current version at the
On Mon, Apr 17, 2023 at 07:07:57PM +0200, Marek Vasut wrote:
R-Car , not RCAR .
Ack, will fix in next version (including in some commit msg)
+static int r9a06g032_clk_probe(struct udevice *dev)
+{
+ struct r9a06g032_priv *priv = dev_get_priv(dev);
+ int err;
+
+
On Mon, Apr 17, 2023 at 07:04:15PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
Commit 2564fce7eea3 ("sunxi: move Cortex SMPEN setting into start.S")
added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For
platforms not using SPL boot, add the corresponding non-SPL
Hi Marek,
On Mon, Apr 17, 2023 at 07:02:34PM +0200, Marek Vasut wrote:
On 3/8/23 21:26, Ralph Siemsen wrote:
diff --git a/drivers/clk/renesas/Makefile
b/drivers/clk/renesas/Makefile
index 8f82a7aa3e..a0d8c10bdb 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@
On 2023-04-17 19:58, John Keeping wrote:
> On Mon, Apr 17, 2023 at 05:39:24PM +, Jonas Karlman wrote:
>> On 2023-04-17 18:09, John Keeping wrote:
>>> Update rk3399 to match the pattern in the other device-specific
>>> implementations to ensure the previous address is cleared when reading
>>>
On Mon, Apr 17, 2023 at 05:39:24PM +, Jonas Karlman wrote:
> On 2023-04-17 18:09, John Keeping wrote:
> > Update rk3399 to match the pattern in the other device-specific
> > implementations to ensure the previous address is cleared when reading
> > multiple blocks.
>
> Does this fix a real
Hi John,
On 2023-04-17 18:09, John Keeping wrote:
> Update rk3399 to match the pattern in the other device-specific
> implementations to ensure the previous address is cleared when reading
> multiple blocks.
Does this fix a real issue for you?
Compared to the other device-specific
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
+#define FUNCCTRL 0x00
+#define FUNCCTRL_MASKSDLOFS (0x18 << 16)
+#define FUNCCTRL_DVDDQ_1_5V (1 << 8)
+#define FUNCCTRL_RESET_N (1 << 0)
+#define DLLCTRL0x04
+#define DLLCTRL_ASDLLOCK (1 << 26)
+#define
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
diff --git a/tools/Makefile b/tools/Makefile
index e13effbb66..1d7abcb916 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -125,6 +125,7 @@ dumpimage-mkimage-objs := aisimage.o \
stm32image.o \
On 3/8/23 21:26, Ralph Siemsen wrote:
Collect the list of currerently
Typo, curr... .
supported Renesas boards.
For the RZ/N1 board, add details about booting and flashing.
[...]
+Renesas boards
+--
+
+Renesas is a SoC solutions provider for industrial applications.
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
diff --git a/board/schneider/rzn1-snarc/ddr_timing.c
b/board/schneider/rzn1-snarc/ddr_timing.c
new file mode 100644
index 00..8bc3fe7be4
--- /dev/null
+++ b/board/schneider/rzn1-snarc/ddr_timing.c
@@ -0,0 +1,140 @@
+//
On 3/8/23 21:26, Ralph Siemsen wrote:
[...]
+++ b/arch/arm/Kconfig
@@ -1031,6 +1031,21 @@ config ARCH_RMOBILE
imply SYS_THUMB_BUILD
imply ARCH_MISC_INIT if DISPLAY_CPUINFO
+config ARCH_RZN1
+ bool "Reneasa RZ/N1 SoC"
+ select CLK
+ select CLK_RENESAS
+
On 3/8/23 21:26, Ralph Siemsen wrote:
This is taken from Linux kernel 5.17, and contains just bare minimum
functionality: CPU, UART and system timer.
Why Linux 5.17 and not e.g. 6.2 or 6.1 LTS ?
Additional functionality (from newer kernel versions) will be added
later. Note that the Linux
On 3/8/23 21:26, Ralph Siemsen wrote:
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.
This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.
Signed-off-by: Ralph Siemsen
Reviewed-by: Marek Vasut
On 3/8/23 21:26, Ralph Siemsen wrote:
Clock driver for the Renesas RZ/N1 SoC family. This is based on
Linux kernel 6.2.y drivers/clk/renesas/r9a06g032-clocks.c as found in
commit 02693e11611e ("clk: renesas: r9a06g032: Repair grave increment error"),
with the following additional patch series
On 3/8/23 21:26, Ralph Siemsen wrote:
Commit 2564fce7eea3 ("sunxi: move Cortex SMPEN setting into start.S")
added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For
platforms not using SPL boot, add the corresponding non-SPL config,
so that CONFIG_IS_ENABLED(ARMV7_SET_CORTEX_SMPEN) works
On 3/8/23 21:26, Ralph Siemsen wrote:
Allow CONFIG_CLK_RENESAS to be set without bringing in RCAR-GEN2/3 code.
CONFIG_RENESAS is used in drivers/clk/Makefile to control recursion into
the drivers/clk/renesas subdirectory. It also controls compilation of
renesas-cpg-mssr.c support code for the
On 4/17/23 18:56, Patrice Chotard wrote:
In case USB hub regulator is shared, unexpected behavior occurs.
On stm32mp135f-dk, stm32mp157c-ev1 and stm32mp157x-dkx, regulator
v3v3 is shared between several IP/devices (USB, panel, ethernet phy,
camera, ...).
Running command "usb stop", v3v3
In case USB hub regulator is shared, unexpected behavior occurs.
On stm32mp135f-dk, stm32mp157c-ev1 and stm32mp157x-dkx, regulator
v3v3 is shared between several IP/devices (USB, panel, ethernet phy,
camera, ...).
Running command "usb stop", v3v3 regulator is switched off and
the splashscreen
Update rk3399 to match the pattern in the other device-specific
implementations to ensure the previous address is cleared when reading
multiple blocks.
Signed-off-by: John Keeping
---
drivers/misc/rockchip-efuse.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Hi Simon,
> Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [A].
>
> FF-A describes interfaces (ABIs) that standardize communication
> between the Secure World and Normal World. These interfaces enable a pair of
> software sandboxes to communicate with each other. A sandbox
Hi,
On 3/16/23 08:03, Patrice Chotard wrote:
With some USB device, the current usb_pgood_delay value is not long
enough to ensure a correct detection.
Signed-off-by: Patrice Chotard
---
include/configs/stm32mp13_st_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi,
On 3/16/23 08:03, Patrice Chotard wrote:
Add usb_pgood_delay to ensure a correct detection of USB devices.
Signed-off-by: Patrice Chotard
---
include/configs/stm32mp15_st_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/stm32mp15_st_common.h
Hi,
On 4/3/23 08:04, Patrice Chotard wrote:
Currently, in stm32_qspi_claim_bus(), QSPI_CR and QSPI_DCR registers
are saved in stm32_ospi_flash struct on first flash memory initialization
and restored on each flash accesses.
As the logic of spi-uclass.c changed since 'commit 741280e9accd
("spi:
Only last commit (actual Nexus 7 bring up) is
specific to Nexus 7, 3 commits before it are
common for all devices in interest. I assume
they all can be set in one patchset.
Though, I have some concerns about if I am
able to get perfect timing of merge. You see,
HTC One X and LG P895/P880
-0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-amlogic.git
tags/u-boot-amlogic-20230417
for you to fetch changes up to 411d6af8b6a278effbaf1d02aa51280b2f5f8008:
doc: boards: amlogic: add documentation for Beelink GT1 Ultimate (2023-04-17
11
This patchset is specific to the Nexus 7, IIUC. If the new devices also fall
under that umbrella, then I see no problem with adding them here. But if they
don't, maybe an ancillary patchset on top of this one would be better.
Note that I still can't build with your latest (v3) patchset -
On Mon, 17 Apr 2023 at 09:29, Michal Simek wrote:
>
>
>
> On 4/17/23 15:48, Jassi Brar wrote:
> > On Mon, 17 Apr 2023 at 01:38, Michal Simek wrote:
> >> On 4/14/23 17:02, Jassi Brar wrote:
> >
> >>> +
> >>> +/* This will dynamically allocate the fwu_mdata */
> >>> +#define
On Mon, Apr 17, 2023 at 12:15:24AM +0200, Marek Vasut wrote:
> The following changes since commit 12c1e5782401abca1a8cff578d1911a9ca7d2e7d:
>
> Merge branch 'master' of
> https://source.denx.de/u-boot/custodians/u-boot-marvell (2023-04-14 10:50:55
> -0400)
>
> are available in the Git
On Mon, Apr 17, 2023 at 12:14:39AM +0200, Marek Vasut wrote:
> The following changes since commit 12c1e5782401abca1a8cff578d1911a9ca7d2e7d:
>
> Merge branch 'master' of
> https://source.denx.de/u-boot/custodians/u-boot-marvell (2023-04-14 10:50:55
> -0400)
>
> are available in the Git
On Sun, Apr 16, 2023 at 10:55:56PM +0200, Angelo Dureghello wrote:
> The following changes since commit 12c1e5782401abca1a8cff578d1911a9ca7d2e7d:
>
> Merge branch 'master' of
> https://source.denx.de/u-boot/custodians/u-boot-marvell (2023-04-14 10:50:55
> -0400)
>
> are available in the Git
On Thu, 13 Apr 2023 at 04:19, AKASHI Takahiro
wrote:
> On Fri, Apr 07, 2023 at 12:13:36PM +0200, Heinrich Schuchardt wrote:
> > On 4/5/23 02:06, Raymond Mao wrote:
> > > Changes for complying to EFI spec §3.5.1.1
> > > 'Removable Media Boot Behavior'.
> > > Boot variables can be automatically
From: Algapally Santosh Sagar
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.
To avoid this, support is added to fetch the
From: Algapally Santosh Sagar
The DEFAULT_ENV_IS_RW is moved to the Kconfig for easier configuration.
Hence, the CONFIG_DEFAULT_ENV_IS_RW config is added to the defconfig files
to allow enabling them for armada boards.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Venkatesh Yadav
From: Algapally Santosh Sagar
In this patch series
-Fetch baudrate from the dtb and update
-Add CONFIG_DEFAULT_ENV_IS_RW config for armada boards
Changes in v2:
- Changed to #ifdef from #if CONFIG_IS_ENABLED to enable patching in
spl.
- Added SPL_ENV_SUPPORT dependency in SERIAL_DT_BAUD
On 4/17/23 15:48, Jassi Brar wrote:
On Mon, 17 Apr 2023 at 01:38, Michal Simek wrote:
On 4/14/23 17:02, Jassi Brar wrote:
+
+/* This will dynamically allocate the fwu_mdata */
+#define CONFIG_FWU_NUM_BANKS 0
+#define CONFIG_FWU_NUM_IMAGES_PER_BANK 0
These two are
On Mon, 17 Apr 2023 at 01:38, Michal Simek wrote:
> On 4/14/23 17:02, Jassi Brar wrote:
> > +
> > +/* This will dynamically allocate the fwu_mdata */
> > +#define CONFIG_FWU_NUM_BANKS 0
> > +#define CONFIG_FWU_NUM_IMAGES_PER_BANK 0
>
> These two are
On 14:45-20230417, Roger Quadros wrote:
[...]
> >>> _pmx0 {
> >>> main_mmc1_pins_default: main-mmc1-pins-default {
> >>> + /* XXX: Kernel-Upstream: TODO: Upstream (pull changes) */
> >>
> >> Do we really want to sprinkle these comme
Hi Andre,
sorry for the mess - I've reformatted my last mail properly to be
readable below.
kind regards
Ludwig
---
Hi Andre,
thanks for your immediate feedback!
Somehow I didn't receive your response via the mailing list, I just
grabbed it from the mailing list archive [1].
Maybe
On Thu, 13 Apr 2023 at 19:43, Chris Morgan wrote:
>
> From: Chris Morgan
>
> Add a node for the trng found on RK3588 SoCs.
>
> Changes in V3:
> - Added Reviewed-By tag.
>
> Changes in V2:
> - None
>
> Signed-off-by: Chris Morgan
> Reviewed-by: Kever Yang
> ---
>
Hi Andre,
thanks for your immediate feedback!
Somehow I didn't receive your response via the mailing list, I just
grabbed it from the mailing list archive [1].
Maybe because my post was still beeing moderated while you responded.
[1]
On 17/04/2023 14:12, Nishanth Menon wrote:
> On 13:42-20230417, Roger Quadros wrote:
>>
>>
>> On 14/04/2023 10:57, Nishanth Menon wrote:
>>> Fix the pinmux pull polarity.
>>>
>>> This is a pending upstream kernel updates as of v6.3-rc6.
>>
On 13:42-20230417, Roger Quadros wrote:
>
>
> On 14/04/2023 10:57, Nishanth Menon wrote:
> > Fix the pinmux pull polarity.
> >
> > This is a pending upstream kernel updates as of v6.3-rc6.
> >
> > Signed-off-by: Nishanth Menon
> > ---
> > Se
Hi Eugen,
On 2023-04-17 11:19, Eugen Hristev wrote:
> From: Jon Lin
>
> Add support for max_link_speed specified in the PCI DT binding.
>
> Signed-off-by: Jon Lin
> [eugen.hris...@collabora.com: port to latest API, set default correctly,
> align to 80 chars]
> Signed-off-by: Eugen Hristev
>
On 14/04/2023 10:57, Nishanth Menon wrote:
> Fix the pinmux pull polarity.
>
> This is a pending upstream kernel updates as of v6.3-rc6.
>
> Signed-off-by: Nishanth Menon
> ---
> Sent to kernel.org
> https://lore.kernel.org/linux-devicetree/20230414073328.381336-1...@ti.com/
Link to actual
On 3/31/23 16:44, Stefan Herbrechtsmeier wrote:
From: Stefan Herbrechtsmeier
This reverts commit e09784728689de7949d4cdd559a9590e0bfcc702. The
commit wrongly divides the dummy bytes by dummy bus width to calculate
the dummy bytes. The framework already converts the dummy cycles to the
On 4/3/23 15:34, Stefan Herbrechtsmeier wrote:
From: Stefan Herbrechtsmeier
Mask the expected and show the unexpected warning "No permission to
change config object" for NODE_OCM_BANK_0 because this node is used to
detect if further zynqmp_pmufw_node function calls should be skipped.
Add pinctrl driver in SPL. Do not remove pinctrl properties for SPL dtb.
Signed-off-by: Eugen Hristev
---
Changes in v2,v3:
- no change
configs/rock5b-rk3588_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/rock5b-rk3588_defconfig
To be able to initialize the pinctrl correctly at SPL level and read
u-boot proper from SD-Card, the pinctrl must be initialized.
Signed-off-by: Eugen Hristev
---
Changes in v3:
- change to bootph-all props.
Changes in v2:
- add u-boot,dm-spl to pull up nodes, to also setup the pull control
-flash.git
tags/u-boot-nand-20230417
for you to fetch changes up to 156968211ef0e155a198a2fe9e94187a91186ab9:
colibri-imx6ull: specify MTD partitions on command line (2023-04-16
14:19:27 +0200)
Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/16019
Hi Jit,
On Fri, Oct 21, 2022 at 5:24 AM Jagan Teki wrote:
>
> On Mon, Sep 5, 2022 at 7:41 PM Jit Loon Lim wrote:
> >
> > From: Tien Fong Chee
> >
> > Add configuration option to compile the entire NAND framework into
> > U-Boot SPL. This is required by some drivers, like the Denali NAND,
> >
> From: Francesco Dolcini
> Disable fdt_fixup_mtdparts() and pass MTD partition on the command
> line. Dynamically editing the fdt with a static partitions configuration
> is not required and there is no advantages compared to using the command
> line. This change should prevent boot failures as
On Tue, Feb 07, 2023 at 11:38:45AM -0700, Simon Glass wrote:
Hi Simon,
> Hi,
>
> On Tue, 7 Feb 2023 at 09:30, Tom Rini wrote:
> >
> > On Mon, Feb 06, 2023 at 09:02:38PM -0700, Simon Glass wrote:
> > > On Mon, 16 Jan 2023 at 10:28, wrote:
> > > >
> > > > From: Abdellatif El Khlifi
> > > >
> >
On Mon, Feb 06, 2023 at 09:02:40PM -0700, Simon Glass wrote:
> Hi,
>
> On Mon, 16 Jan 2023 at 10:29, wrote:
> >
> > From: Abdellatif El Khlifi
> >
> > provide a test for NVM XIP devices
> >
> > The test case allows to make sure of the following:
> >
> > - The NVM XIP QSPI devices are probed
> >
> Disable fdt_fixup_mtdparts() and pass MTD partition on the command
> line. Dynamically editing the fdt with a static partitions configuration
> is not required and there is no advantages compared to using the command
> line. This change should prevent boot failures as the one in [0].
>
> Cc:
From: Jon Lin
Add support for rk3588 phy variant.
The PHY clock is fixed at 100MHz.
Signed-off-by: Jon Lin
[kever.y...@rock-chips.com: update pcie pll parameters]
Co-developed-by: Kever Yang
Signed-off-by: Kever Yang
[eugen.hris...@collabora.com: squashed, tidy up]
Signed-off-by: Eugen
From: Joseph Chen
Add the node for pciE 2x1l 2 device together with the corresponding
combphy.
Signed-off-by: Joseph Chen
[eugen.hris...@collabora.com: moved to -u-boot.dtsi, minor
adaptations]
Signed-off-by: Eugen Hristev
---
arch/arm/dts/rk3588s-u-boot.dtsi | 73
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