On 10/01/2019 18:40, Jagan Teki wrote:
> Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
> commit 679294497be31596e1c9c61507746d72b6b05f26
> Author: Rodrigo Exterckötter Tjäder
> Date: Wed Sep 26 19:48:24 2018 +
> arm64: dts: allwinner: a64: a64-olinuxino: set the PHY
On 10/01/2019 18:40, Jagan Teki wrote:
> Add initial clock driver for Allwinner H6.
>
> - Implement UART bus clocks via ccu_clk_gate table for
> H6, so it can accessed in common clk enable and disable
> functions from clk_sunxi.c
> - Implement UART bus resets via ccu_reset table for H6,
>
On 10/01/2019 18:40, Jagan Teki wrote:
> Implement UART clocks for all Allwinner SoC
> clock drivers via ccu clock gate table.
>
> Signed-off-by: Jagan Teki
Compared against each manual:
Reviewed-by: Andre Przywara
Thanks,
Andre
> ---
> drivers/clk/sunxi/clk_a10.c | 9 +
>
On 10/01/2019 18:40, Jagan Teki wrote:
> Implement UART resets for all relevant Allwinner SoC
> clock drivers via ccu reset table.
>
> Signed-off-by: Jagan Teki
Compared against each manual:
Reviewed-by: Andre Przywara
Cheers,
Andre.
> ---
> drivers/clk/sunxi/clk_a23.c | 6 ++
>
On 31/12/2018 16:59, Jagan Teki wrote:
> Add common reset driver for all Allwinner SoC's.
>
> Since CLK and RESET share common DT compatible, it is CLK driver
> job is to bind the reset driver. So add CLK bind call on respective
> SoC driver by passing ccu map descriptor so-that reset deassert,
>
On 08/01/2019 19:12, Jagan Teki wrote:
> On Tue, Jan 8, 2019 at 5:09 PM Andre Przywara wrote:
>>
>> On Tue, 8 Jan 2019 16:27:14 +0530
>> Jagan Teki wrote:
>>
>> Hi,
>>
>>> On Mon, Jan 7, 2019 at 6:35 AM André Przywara
>>> wrote:
>
On 09/01/2019 03:44, Tom Rini wrote:
> On Mon, Dec 17, 2018 at 10:05:45AM +, Andre Przywara wrote:
>
>> Commit d0851c893706 ("blk: Call part_init() in the post_probe() method")
>> removed the call to part_init() in mmc.c, as this is done by the DM_MMC
>> framework.
>> However Allwinner is
On 06/01/2019 19:22, Jagan Teki wrote:
> On Sun, Jan 6, 2019 at 6:49 PM André Przywara wrote:
>>
>> On 31/12/2018 16:59, Jagan Teki wrote:
>>
>> Hi Jagan,
>>
>> many thanks for picking this up, I was about to come back to this
>> myself. I am looking a
On 31/12/2018 16:59, Jagan Teki wrote:
> Clock control unit comprises of parent clocks, gates, multiplexers,
> dividers, multipliers, pre/post dividers and flags etc.
>
> So, the U-Boot implementation of ccu has divided into gates and tree.
> gates are generic clock configuration of
On 31/12/2018 16:59, Jagan Teki wrote:
Hi Jagan,
many thanks for picking this up, I was about to come back to this
myself. I am looking at the pinctrl part at the moment, so good you are
working on the clocks!
TL;DR: I am good with the first patches, but would like to drop the last
five 5
On 05/01/2019 18:41, Manivannan Sadhasivam wrote:
> On Thu, Jan 03, 2019 at 06:56:20PM +0530, Amit Singh Tomar wrote:
>> This patch adds .dtsi file(sync with Linux 4.20) and required binding
>> for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores.
>>
>> Signed-off-by: Amit Singh Tomar
>>
On 03/01/2019 13:26, Amit Singh Tomar wrote:
Hi,
> The Cubieboard is a single board computer containing a
> Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
>
> This patch adds respective defconfig alongwith device tree(sync with
> Linux 4.20).
>
> Signed-off-by: Amit Singh Tomar
> ---
>
On 05/01/2019 18:27, Manivannan Sadhasivam wrote:
Hi,
> On Thu, Jan 03, 2019 at 06:56:17PM +0530, Amit Singh Tomar wrote:
>> This adds memory regions needed to setup MMU for actions
>> S900 and S700 SoCs.
>>
>> Signed-off-by: Amit Singh Tomar
>> ---
>> arch/arm/mach-owl/Makefile | 1 +
>>
On 05/01/2019 18:20, Manivannan Sadhasivam wrote:
> On Thu, Jan 03, 2019 at 06:56:22PM +0530, Amit Singh Tomar wrote:
>> UART controller present on S700 is compatible with existing
>> S900 UART, this patch simply adds a proper compatible string
>> so that S900 uart driver can be reused for S700.
On 03/01/2019 13:26, Amit Singh Tomar wrote:
> Bubblegum board now gets driven from common owl framework, so
> let's remove the respected board files.
I think this patch could be split and merged into other patches, mostly 1/8.
> Signed-off-by: Amit Singh Tomar
> ---
>
On 03/01/2019 13:26, Amit Singh Tomar wrote:
> This adds common arch owl support that drives both s700
> and s900, 64-bits SoCs from Actions Semiconductor.
Nice cleanup.
>
> Signed-off-by: Amit Singh Tomar
> ---
> arch/arm/Kconfig | 2 --
> arch/arm/mach-owl/Kconfig | 31
On 31/12/2018 11:27, Michael Trimarchi wrote:
> Hi
>
> On Mon, Dec 31, 2018 at 11:34:51AM +0100, Olliver Schinagl wrote:
>> Hey André,
>>
>> On 31-12-2018 00:23, André Przywara wrote:
>>> On 29/12/2018 22:10, Olliver Schinagl wrote:
>>>
>>&g
On 29/12/2018 22:10, Olliver Schinagl wrote:
Hi Olliver,
> Luckily we have had no problem with this on our boards, but its sad to
> see this patch reverted due to the buggy ddr implementation ...
This whole SPL is quite a sensitive construct, so moving things around
can have interesting
On 19/12/2018 00:51, André Przywara wrote:
> On 18/12/2018 12:06, Jagan Teki wrote:
>> On Tue, Dec 18, 2018 at 4:09 PM wrote:
>>>
>>> From: Karl Palsson
>>>
>>> This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1
>>>
>>>
On 18/12/2018 12:06, Jagan Teki wrote:
> On Tue, Dec 18, 2018 at 4:09 PM wrote:
>>
>> From: Karl Palsson
>>
>> This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1
>>
>> This causes DRAM init failures on (at least)
>> * allwinner h3 nanopi-duo2
>> * allwinner h2+ orangepi zero v1.1
>>
>>
On 05/12/2018 15:46, Maxime Ripard wrote:
Hi,
> On Wed, Dec 05, 2018 at 02:27:57PM +0200, Stefan Mavrodiev wrote:
>> Current driver doesn't check if the destination pointer is NULL.
>> This cause the data from the FIFO to be stored inside the internal
>> SDRAM ( address 0 ).
>>
>> The patch add
On 11/3/18 8:19 PM, Vasily Khoruzhick wrote:
> On Sat, Nov 3, 2018 at 1:18 PM Vasily Khoruzhick wrote:
>>
>> Video is supposed to work, but you need ATF from Andre to enable LCD power:
>>
>> https://github.com/apritzel/arm-trusted-firmware/
>
> You need "allwinner" branch from this repo.
I
On 10/25/18 10:23 AM, Icenowy Zheng wrote:
> Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
> has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
> accessible.
>
> Add a Kconfig option for the maximum accessible DRAM.
>
> For A80 it should be a much higher value
On 10/25/18 10:23 AM, Icenowy Zheng wrote:
> The Pine A64 Plus/non-Plus model detection code is now built on all
> 64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
> use.
>
> Disable them when the board is Pine A64 by adding a Kconfig option that
> is only selected on Pine
On 10/25/18 10:23 AM, Icenowy Zheng wrote:
> All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
> external DRAM, however the size of DRAM part in the MMU translation
> table is still 2GiB.
>
> Change the size of DRAM part in MMU table to 3GiB.
>
> Signed-off-by: Icenowy Zheng
On 10/25/18 10:23 AM, Icenowy Zheng wrote:
Hi Icenowy,
thanks for picking this up, resending and adapting this!
> This series tries to solve three issues we currently have on
> Allwinner boards:
> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
> - The DRAM sizing routine
On 10/22/18 2:26 AM, Icenowy Zheng wrote:
> 在 2018-05-17四的 09:16 +0100,Andre Przywara写道:
>> This series tries to solve three issues we currently have on
>> Allwinner boards:
>> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
>> - The DRAM sizing routine steps through all
On 10/17/18 6:09 AM, Vasily Khoruzhick wrote:
Hi,
> Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
> bridge from Analogix.
>
> Signed-off-by: Vasily Khoruzhick
> ---
> arch/arm/dts/Makefile
On 10/17/18 6:09 AM, Vasily Khoruzhick wrote:
> Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
> two groups of pinmuxes on PL bank, so it's called R_I2C.
>
> Add support for this I2C controller and the pinmux which doesn't conflict
> with RSB.
>
> Signed-off-by: Vasily
On 10/17/18 6:09 AM, Vasily Khoruzhick wrote:
> Both GPIOs are optional, so we shouldn't fail if any is missing. Without
> this fix reset is not deasserted when sleep GPIO is missing.
>
> Signed-off-by: Vasily Khoruzhick
That looks much better now, thanks.
One small thing:
> ---
>
On 10/17/18 6:09 AM, Vasily Khoruzhick wrote:
> A64 supports automatic delay calibration and Linux driver uses it
> instead of hardcoded delays. Add support for it to u-boot driver.
>
> Fixes eMMC instability on Pinebook
>
> Signed-off-by: Vasily Khoruzhick
> ---
>
On 10/17/18 4:40 PM, Vasily Khoruzhick wrote:
> On Wednesday, October 17, 2018 8:18:41 AM PDT Andre Przywara wrote:
>> On Tue, 16 Oct 2018 22:09:30 -0700
>> Vasily Khoruzhick wrote:
>>
>> Hi,
>>
>>> Updates the device tree file from the the Linux tree as of v4.19-rc4,
>>
>>> exactly Linux commit:
On 9/30/18 12:45 AM, Vagrant Cascadian wrote:
(CC:ing Anatolij)
> From: Vasily Khoruzhick
>
> If there's no sleep or reset GPIOs, video_bridge_set_active() returns
> -ENOENT. Don't fail in this case, since these GPIOs are optional.
Are really *both* optional?
If yes, you should apply the same
On 9/30/18 12:45 AM, Vagrant Cascadian wrote:
> From: Vasily Khoruzhick
>
> Sleep gpio is optional, so it's possible to have reset gpio, but no sleep
> gpio.
> We shouldn't fail early in case of missing sleep gpio, otherwise we won't
> deassert reset.
>
> Signed-off-by: Vasily Khoruzhick
>
On 9/30/18 12:45 AM, Vagrant Cascadian wrote:
> From: Vasily Khoruzhick
>
> A64 supports automatic delay calibration and Linux driver uses it
> instead of hardcoded delays. Add support for it to u-boot driver.
So technically that should be derived from the node's compatible string,
like we do
On 07/04/2018 01:25 AM, Vasily Khoruzhick wrote:
> On Tue, Jul 3, 2018 at 2:22 PM, André Przywara wrote:
>
>>> Adding a few more people to the list. It looks like b62cdbddedc3 was in
>>> response to fef73766d9ad. So, this close to the release, what do we
>>&
On 07/03/2018 09:59 PM, Alexander Graf wrote:
>
>
>> Am 03.07.2018 um 22:51 schrieb Andreas Färber :
>>
>>> Am 03.07.2018 um 01:08 schrieb Andreas Färber:
Am 02.07.2018 um 10:01 schrieb Jagan Teki:
> On Wed, Jun 27, 2018 at 6:12 AM, Andre Przywara
> wrote:
> At the moment we
On 07/03/2018 03:52 PM, Tom Rini wrote:
> On Tue, Jul 03, 2018 at 06:06:37PM +0530, Jagan Teki wrote:
>> On Tue, Jul 3, 2018 at 3:10 AM, Tom Rini wrote:
>>> On Mon, Jul 02, 2018 at 11:27:58PM +0200, Marek Vasut wrote:
On 07/02/2018 10:53 PM, Jagan Teki wrote:
> During usb shutdown or
Hi,
On 06/29/2018 11:18 AM, Emmanuel Vadot wrote:
> On 2018-06-28 16:37, Andre Przywara wrote:
>> Hi,
>>
>> On 28/06/18 15:27, Jagan Teki wrote:
>>> On Wed, Jun 27, 2018 at 6:12 AM, Andre Przywara
>>> wrote:
At the moment we have the workaround for the Freescale arch timer
erratum
Hi,
On 06/26/2018 04:09 PM, Peter Robinson wrote:
>> On 26/06/18 15:52, Alexander Graf wrote:
>>> On 06/26/2018 04:39 PM, Andre Przywara wrote:
Hi Guillaume,
On 26/06/18 15:18, guillaume.gar...@free.fr wrote:
> Hi Andre,
>
> You are the maintainer of Pine64 in U-Boot,
On 06/20/2018 06:16 PM, Paul Kocialkowski wrote:
> Hi,
>
> Le mercredi 20 juin 2018 à 17:12 +0100, Andre Przywara a écrit :
>> On 20/06/18 16:24, Paul Kocialkowski wrote:
>>> Regarding the DDR firmware: I would like to start a discussion with NXP
>>> and Synopsys about making the firmware free
On 03/04/18 15:13, Siarhei Siamashka wrote:
Hi Siarhei,
thanks for chiming in!
> On Tue, 3 Apr 2018 13:43:43 +0100
> Andre Przywara wrote:
>> On 03/04/18 12:51, Icenowy Zheng wrote:
I guess we'd need to find another way (put some information in an
SRAM
On 02/04/18 13:47, Mark Kettenis wrote:
Hi,
>> From: =?UTF-8?Q?Andr=c3=a9_Przywara?=
>> Date: Mon, 2 Apr 2018 12:51:50 +0100
>>
>> On 02/04/18 12:20, Mark Kettenis wrote:
>>
>>
>>
This feature make U-Boot to have full Linux dts inside, Can't we
implement
On 02/04/18 12:20, Mark Kettenis wrote:
>> This feature make U-Boot to have full Linux dts inside, Can't we
>> implement automatic-boot-of-os distro to grab Linux dtb during
>> commands stage like other distro does? Because this make few
>> development struggles for U-Boot project like (few
On 02/04/18 08:40, Jagan Teki wrote:
Hi Jagan,
> On Thu, Mar 29, 2018 at 2:49 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 29/03/18 09:51, Jagan Teki wrote:
>>> Hi Andre,
>>>
>>> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara
>>> wrote:
A
Hi,
On 02/04/18 03:30, Simon Glass wrote:
>
> Hi Andre,
>
> On 2 April 2018 at 09:43, André Przywara <andre.przyw...@arm.com> wrote:
>> Hi,
>>
>> On 01/04/18 14:19, Tom Rini wrote:
>>> On Tue, Mar 27, 2018 at 11:34:19PM +0530, Jagan Teki wr
Hi,
On 01/04/18 14:19, Tom Rini wrote:
> On Tue, Mar 27, 2018 at 11:34:19PM +0530, Jagan Teki wrote:
>> On Mon, Sep 4, 2017 at 9:57 PM, wrote:
>>> Hi Tom,
>>>
>>> On 7 August 2017 at 09:39, Tom Rini wrote:
On Sat, Aug 05, 2017 at 03:45:53PM -0600,
On 30/03/18 05:25, Chen-Yu Tsai wrote:
>> OK. So meanwhile I have something almost(TM) working:
>> - drivers/clk/sunxi/clk-a64.c, which is a UCLASS_CLK implementation of
>> the clock IDs from allwinner,sun50i-a64-ccu that we need: CLK_BUS_UARTx,
>> CLK_BUS_MMCx, CLK_MMCx. Their
On 27/03/18 18:58, Jagan Teki wrote:
> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara <andre.przyw...@arm.com>
> wrote:
>> On 23/03/18 18:14, Jagan Teki wrote:
>>> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara <andre.przyw...@arm.com>
>>> wrote:
On 23/03/18 18:14, Jagan Teki wrote:
> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara
> wrote:
>> Update the .dts files for the various boards with an Allwinner A64 SoC.
>> This is as of v4.15-rc9, exactly Linux commit:
>>
>> {
>> pinctrl-names =
On 21/03/18 19:08, Jagan Teki wrote:
> On Thu, Mar 22, 2018 at 12:33 AM, André Przywara <andre.przyw...@arm.com>
> wrote:
>> Hi,
>>
>> On 21/03/18 18:40, Jagan Teki wrote:
>>> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara <andre.przyw...@arm.com>
Hi,
On 21/03/18 18:40, Jagan Teki wrote:
> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara
> wrote:
>> As we are running into issues where the final U-Boot FIT image file is
>> exceeding our size limit, add a hint to the README.sunxi64 file
>> to point out the
Hi,
On 06/03/18 21:38, Tuomas Tynkkynen wrote:
> We're going to need this logic for 64-bit builds as well, so move it
> out from under arch/arm/cpu/armv7.
>
> Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Andre Przywara
Thanks!
Andre.
> ---
>
Hi,
On 06/03/18 21:38, Tuomas Tynkkynen wrote:
> In README.sunxi64 we tell the user how to optionally create
> u-boot-sunxi-with-spl.bin by manually running cat. Instead, have the
> build system create the file automatically just like it does for 32-bit
> sunxi boards.
>
> Signed-off-by: Tuomas
Hi,
On 06/03/18 21:38, Tuomas Tynkkynen wrote:
> For some reason we seem to have documented how to build
> u-boot-sunxi-with-spl.bin manually with cat but not have a build system
> rule for it. Let's fix this to have the file built by default just like
> it is on 32-bit sunxi boards.
Ah, thanks
Hi,
thanks for picking this up!
(CC:ing Icenowy, who was engaged in a Linux fix for this issue last year
[2][3]. It's Chinese New Year though, so not sure how quickly she will
answer).
On 14/02/18 23:02, kev...@freebsd.org wrote:
> The Pine64 has a known issue on gigabit links (see [1]); some
On 12/02/18 15:47, Tom Rini wrote:
> On Mon, Feb 12, 2018 at 01:25:21AM +, Andre Przywara wrote:
>
>> The current master fails to build some Allwinner H5 boards, due to
>> exceeding the U-Boot proper size limit we currently have still in place.
>> This affects:
>> - nanopi_neo2_defconfig
>> -
Hi,
On 11/02/18 09:53, Jun Nie wrote:
> Build ymodem and s_record only on need to shrink
> spl image size.
>
> Signed-off-by: Jun Nie
> ---
> common/Makefile | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/common/Makefile b/common/Makefile
>
On 09/02/18 15:58, Samuel Holland wrote:
> On 02/08/18 19:30, Andre Przywara wrote:
>> The U-Boot driver for the sun8i-emac was using some preliminary DT
>> binding. Now since Linux got its own driver in v4.15 and our driver
>> can now cope with both bindings, let's convert the DT nodes used for
On 07/02/18 19:35, Icenowy Zheng wrote:
Hi,
> As 4GiB capacity is above the range of 32-bit unsigned integer, raise
> the return type of sunxi_dram_init() to unsigned long long, thus it can
> hold 4GiB capacity (or maybe more on A80).
> Some controllers that are possible to use 4GiB+ memory
On 07/02/18 19:35, Icenowy Zheng wrote:
Hi,
> Some Allwinner SoCs can use 3GiB DRAM (part of 4GiB or larger module).
>
> As the common get_ram_size function cannot detect non-pow-of-2 memory,
> add special detect code into the DRAM size code in main U-Boot.
The original get_ram_size() function
On 07/02/18 19:35, Icenowy Zheng wrote:
> Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
> has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
> accessible.
>
> Add a Kconfig option for the maximum accessible DRAM.
That looks fine to me, but have you checked
On 07/02/18 19:35, Icenowy Zheng wrote:
Hi,
> All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
> external DRAM, however the size of DRAM part in the MMU translation
> table is still 2GiB.
>
> Change the size of DRAM part in MMU table to 3GiB.
This is needed for the (new)
On 27/01/18 15:20, Jun Nie wrote:
> Support fuse cmd to read/write fuse. Power supply for fuse
> should be ready, name is VDD_EFUSE in some schematic.
Mmh, in general I am not sure it is a good idea to expose this so easily
to the user. I guess a clueless user can easily brick his board by
typing
On 23/01/18 22:46, Kyle Evans wrote:
> On Tue, Jan 23, 2018 at 4:18 PM, Samuel Holland wrote:
>> These nodes were previously in an unused file specific to the Pine64.
>> Move them to the base SoC device tree for use by other boards. Require
>> individual boards to enable the
Hi,
On 21/12/17 12:40, Maxime Ripard wrote:
> The MMC environment offset is getting very close to the end of the U-Boot
> binary now. Since we want to make sure this will not overflow, add a size
> limit in the board for arm64. arm32 has already that limit enforced in our
> custom image
On 19/12/17 15:36, Maxime Ripard wrote:
> On Tue, Dec 19, 2017 at 02:27:57PM +, Andre Przywara wrote:
> Removing those options make the u-boot.itb binary size going from
> 516kB to 478kB, making it functional again *and* allowing us to enable
> the DT overlays that seem way more
On 19/12/17 15:24, Maxime Ripard wrote:
> On Tue, Dec 19, 2017 at 02:41:17PM +0100, Mark Kettenis wrote:
>>> Date: Tue, 19 Dec 2017 14:12:02 +0100
>>> From: Maxime Ripard
>>>
>>> On Tue, Dec 05, 2017 at 10:28:20AM +, Andre Przywara wrote:
So even though
Hi,
On 05/12/17 15:56, Maxime Ripard wrote:
> The partitions variable is especially useful to create a partition table
> from U-Boot, either directly from the U-Boot shell, or through flashing
> tools like fastboot and its oem format command.
>
> This is especially useful on devices with an eMMC
Hi Maxime,
On 28/11/17 10:34, Maxime Ripard wrote:
> The partitions variable is especially useful to create a partition table
> from U-Boot, either directly from the U-Boot shell, or through flashing
> tools like fastboot and its oem format command.
>
> This is especially useful on devices with
On 28/11/17 10:34, Maxime Ripard wrote:
> Now that more and more devices are built using eMMC, providing a way to
> easily flash the system without too much hassle seems like a right thing to
> do.
>
> Since fastboot is the most deployed tool to do that these days, we can just
> rely on it to
On 28/11/17 10:34, Maxime Ripard wrote:
> The SPL must be located at 8kB (16 sectors) offset. That's right in the
> middle of the GPT, so we need to define a smaller amount of partitions to
> accomodate for that location.
>
> Signed-off-by: Maxime Ripard
The
On 28/11/17 10:34, Maxime Ripard wrote:
> On some SoCs, the SPL needs to be located right in the middle of the GPT
> partition entries.
>
> One way to work around that is to create partition entries for a smaller
> number of partitions to accomodate with where the SPL will be. Create a
> Kconfig
On 26/11/17 00:15, Dr. Philipp Tomsich wrote:
>
>> On 26 Nov 2017, at 01:06, André Przywara <andre.przyw...@arm.com> wrote:
>>
>> On 25/11/17 23:35, Dr. Philipp Tomsich wrote:
>>> Jagan,
>>>
>>> I resolved this by introducing a new K
On 25/11/17 23:35, Dr. Philipp Tomsich wrote:
> Jagan,
>
> I resolved this by introducing a new Kconfig that affects what functionality
> is included in spl_fit.c; however, this leaves an uneasy feeling, as we now
> start to have different logic in our SPL stage.
Thanks for taking care. Is that
On 08/11/17 19:59, Jagan Teki wrote:
> Hi,
>
> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
> able to fit new features like falcon. I knew the limit about 32K but
> page[1] stating that we can use approximately 192 KiB of contiguous
> SRAM.
We are not really sure about
On 24/10/17 03:31, Masahiro Yamada wrote:
Hi,
> 2017-10-24 11:03 GMT+09:00 Lokesh Vutla :
>>
>>
>> On Tuesday 24 October 2017 02:04 AM, Tom Rini wrote:
>>> On Mon, Oct 23, 2017 at 11:08:57AM +0530, Lokesh Vutla wrote:
On Tuesday 17 October 2017 02:43 AM, Tom
On 20/10/17 13:16, Maxime Ripard wrote:
> We start to get to the limit of our main U-Boot binary size (with some
> boards even crossing it). Enable its build using thumb2 to get some extra
> room.
>
> Suggested-by: Siarhei Siamashka
> Signed-off-by: Maxime Ripard
Hi Maxime,
On 19/10/17 15:04, Maxime Ripard wrote:
> The final one that has been implemented would be to just build U-Boot
> using thumb2 to push back the issue until hopefully I'm no longer
> maintainer or the switch to the env filesystem would have been done.
>
> I've also added a patch
Hi,
sorry Simon for dropping the ball earlier. I will try to answer both
Jagan's and your concern below.
On 16/10/17 21:59, Jagan Teki wrote:
> On Mon, Oct 9, 2017 at 10:15 AM, Simon Glass wrote:
>> Hi Andre,
>>
>> On 4 October 2017 at 17:24, Andre Przywara
On 19/09/17 06:04, Vasily Khoruzhick wrote:
> This is a eDP bridge similar to ANX9804, it allows to connect eDP panels
> to the chips that can output only parallel signal
Have you tried using the existing driver?
Icenowy did this some months ago[1], and she got away with quite a small
patch to
Hi Vasily,
On 19/09/17 06:04, Vasily Khoruzhick wrote:
> This header will be used in anx6345 driver
In this case it shouldn't live in a generic include directory, as it
only contains private driver internals which are of no further use for
the rest of U-Boot. So you should move it into
On 11/08/17 12:16, Jagan Teki wrote:
Hi,
> On Thu, Jun 29, 2017 at 3:56 PM, Icenowy Zheng wrote:
>>
>>
>> 于 2017年6月29日 GMT+08:00 下午6:10:31, Andre Przywara 写到:
>>> The sunxi GPIO driver is missing some compatible strings for recent
>>> SoCs. While most
On 06/07/17 10:23, Alexander Graf wrote:
Hi,
> On 07/06/2017 11:14 AM, Andre Przywara wrote:
>> The UEFI spec allows an EFI system partition (ESP, with the bootloader or
>> kernel EFI apps on it) to reside on a disk using a "legacy" MBR
>> partitioning scheme.
>> But in contrast to actual legacy
On 28/08/17 17:21, Chakra D wrote:
Hi,
> I'm trying to build ITB image for sunxi banana Pi M64 image in
> Buildroot. I'm facing issues with ITB format Uboot build.
>
> As per the readme file "board/sunxi/README.sunxi64", we need to build
> the bl31.bin image before uboot and pass the path of
On 19/07/17 18:01, Andre Przywara wrote:
Hi Andreas,
> On 19/07/17 17:58, Andreas Färber wrote:
>> Hi,
>>
>> Am 19.07.2017 um 18:50 schrieb Andre Przywara:
>>> On 19/07/17 17:37, Kostya Porotchkin wrote:
I probably have to build and try the SATA image as the next step.
>>>
>>> Yeah, that
On 07/07/17 04:58, Simon Glass wrote:
Hi Simon,
> On 2 July 2017 at 18:59, Andre Przywara wrote:
>> In some bindings a property points to multiple nodes, using a list of
>> phandles. A prominent example are UART pinctrl nodes, which use one node
>> to contain the RX/TX
On 21/07/17 09:00, Alison Wang wrote:
Hi,
> 855873: An eviction might overtake a cache clean operation
> Workaround: The erratum can be avoided by upgrading cache clean by
> address operations to cache clean and invalidate operations. For
> Cortex-A53 r0p3 and later release, this can be achieved
On 02/07/17 15:17, Maxime Ripard wrote:
Hi,
> On Wed, Jun 07, 2017 at 03:06:55PM +0100, Marc Zyngier wrote:
>>> If that is so fundamentally broken that this is the only benefit, I
>>> guess we might as well use some old-style SMP ops.
>>
>> Broken, for sure. Which is why I'm asking about the
On 09/06/17 19:48, york sun wrote:
Hi York,
> On 05/19/2017 02:56 AM, Andre Przywara wrote:
>> Hi York,
>>
>> On 16/05/17 16:54, york sun wrote:
>>> On 05/15/2017 10:42 PM, Lokesh Vutla wrote:
+ Andre
On Monday 15 May 2017 09:31 PM, York Sun wrote:
> This patch set adds
On 08/06/17 18:43, Jagan Teki wrote:
Hi Jagan,
> From: Jagan Teki
>
> NanoPi A64 is a new board of high performance with low cost
> designed by FriendlyElec., using the Allwinner A64 SOC.
>
> Nanopi A64 features
> - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz
Hi,
On 26/04/17 15:50, Icenowy Zheng wrote:
> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM
> chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card
> detect pin of the MicroSD slot is broken, however, it doesn't matter as
> the design of SoPine didn't allow
On 02/06/17 19:34, Jagan Teki wrote:
> On Wed, Apr 26, 2017 at 8:19 PM, Icenowy Zheng wrote:
>> This patchset contains several works on the sunxi DesignWare DRAM
>> controllers.
>>
>> The 1st patch made an option for H3-like DRAM controllers
>> (DesignWare ones), which can ease
On 03/06/17 00:59, André Przywara wrote:
> Hi,
>
> On 02/06/17 19:32, Jagan Teki wrote:
>> On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng <icen...@aosc.io> wrote:
>>> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM
>>> chip, an AXP
Hi,
On 02/06/17 19:32, Jagan Teki wrote:
> On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng wrote:
>> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM
>> chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card
>> detect pin of the MicroSD slot is
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki
>
> Orangepi Zero Plus 2 is an open-source single-board computer
> using the Allwinner h5 SOC.
>
> H5 Orangepi Zero Plus 2 has
> - Quad-core Cortex-A53
> - 512MB DDR3
> - Debug TTL UART
> - HDMI
> - Wifi + BT
>
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki
>
> The Allwinner H5 SoC is pin-compatible to the H3 SoC,
> but uses Cortex-A53 cores instead.
>
> So move the shared cpu based and peripherals nodes into
> sun50i-h5.dtsi so, that it can shared among the
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki
>
> Orangepi Win/WinPlus is an open-source single-board computer
> using the Allwinner A64 SOC.
>
> A64 Orangepi Win/WinPlus has
> - A64 Quad-core Cortex-A53 64bit
> - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM
> - Debug
On 23/05/17 01:18, Tom Rini wrote:
> On Tue, May 23, 2017 at 12:51:50AM +0100, André Przywara wrote:
>> On 22/05/17 20:40, Tom Rini wrote:
>>> In situations like an autobuilder we are likely to not have bl31.bin
>>> present and thus would fail to build and propagate the
On 22/05/17 20:40, Tom Rini wrote:
> In situations like an autobuilder we are likely to not have bl31.bin
> present and thus would fail to build and propagate the error upwards.
> Instead, print a big warning to stderr so that human will see that
> something is wrong but complete the build.
Yeah,
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