> It means "no-1-8-v", which is read from DT is not coming in to effect.
> So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
> clear UHS speeds based on no-1-8-v from device tree.
>
> Hence revert the functionality related to no-1-8-v only, rest is fine
> in the patch.
Remove duplicated stdio print message.
It's already displayed in common/console.c.
Loading Environment from MMC... OK
In:serial
Out: serial
Err: serial
Model: Odroid XU3/XU4/HC1/HC2 based on Exynos5422
Type: xu3
In:serial
Out: serial
Err: serial
Signed-off-by: Jaehoon
r.
>
> This also adds mmc_send_cmd_retry, which retries on error every time
> (instead of if a quirk is activated).
>
> Signed-off-by: Sean Anderson
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
> drivers/mmc/mmc.c | 141 +++-
ies on error.
>
> This also adds mmc_send_cmd_retry, which retries on error every time
> (instead of if a quirk is activated).>
> Signed-off-by: Sean Anderson
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
> drivers/mmc/mmc.c | 141 +++-
If reset DT property is not present, -ENOENT is returned.
But it's not really error.
Signed-off-by: Jaehoon Chung
---
drivers/usb/gadget/dwc2_udc_otg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c
b/drivers/usb/gadget/dwc2_udc_
}
> +#endif
> +void sdhci_set_control_reg(struct sdhci_host *host)
this function is called as callback function in sdhci_set_ios().
it's strange... set_control_reg callback is for host specific control register.
I think that it doesn't need to assign to callback.
Best Regar
n about rd_len.
This patch fixed wrong calculation address position when check
condition.
In addition, it needs to check one more condition about overlapping
entire area.
Fixes: commit fbde7589ce30 ("common: bootm: add checks to verify if ramdisk /
fdtimage overlaps OS image")
Signed-off-
On 10/20/20 8:47 PM, Tero Kristo wrote:
> On 20/10/2020 14:07, Jaehoon Chung wrote:
>> Dear Tero,
>>
>> On 6/12/20 9:41 PM, Tero Kristo wrote:
>>> These cases are typically fatal and are difficult to debug for random
>>> users. Add checks for detecting
return 1;
> + }
Because of hit this condition...So doesn't boot...
I think that it needs to change the below conditions..
images.rd_start < start + size or images.rd_start < start + size - 1.
images.rd_end > start or image.rd_end - 1 >= start
If i misunderstood somethin
On 10/20/20 12:20 PM, Y.b. Lu wrote:
> Hi Jaehoon,
>
>> -Original Message-----
>> From: Jaehoon Chung
>> Sent: Tuesday, October 20, 2020 5:52 AM
>> To: Y.b. Lu ; u-boot@lists.denx.de; Peng Fan
>>
>> Subject: Re: [PATCH 2/2] mmc: fsl_esdhc:
Dear Yangbo,
On 10/16/20 12:13 PM, Yangbo Lu wrote:
> The initial clock setting should be through sysctl register only,
> while the mmc_set_clock() will call mmc_set_ios() introduce other
> configurations like bus width, mode, and so on.
>
> Signed-off-by: Yangbo Lu
Reviewed-by
make sure delay chain
> locked for HS400.
>
> Fixes: db8f93672b42 ("mmc: fsl_esdhc: support eMMC HS400 mode")
> Signed-off-by: Yangbo Lu
Reviewed-by: Jaehoon Chung
Just added minor comments.
> ---
> drivers/mmc/fsl_esdhc.c | 28 +---
>
upport more than 4GB
> file as thor 5.0")
> Reported-by: Junghoon Kim
> Signed-off-by: Seung-Woo Kim
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/usb/gadget/f_thor.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> d
On 9/11/20 8:46 PM, Patrick DELAUNAY wrote:
> Hi Jaehoon
>
>> From: Jaehoon Chung
>> Sent: vendredi 11 septembre 2020 09:50
>>
>> On 9/10/20 6:54 AM, Alexandru Gagniuc wrote:
>>> mmc_of_parse() can populate the 'f_max' and 'host_caps' fi
fg->host_caps |= MMC_MODE_4BIT;
> - break;
> - case 1:
> - break;
> - default:
> - pr_err("invalid \"bus-width\" property, force to 1\n");
> - }
> + cfg->f_max = 5200;
cfg->f_max can be also removed?
Best Regards,
Jaehoon Chung
> + mmc_of_parse(dev, cfg);
>
> upriv->mmc = &plat->mmc;
>
>
Hi,
On 9/1/20 5:57 PM, Yangbo Lu wrote:
> This patch-set is to support eMMC HS200 and HS400 speed modes for
> eSDHC, and enable them on LX2160ARDB board.
looks good to me.
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
>
> CI build link
> https://travis-ci.org/github
On 9/7/20 12:19 PM, Y.b. Lu wrote:
> Hi Jaehoon and Peng,
>
> Any comments on the v4 patch-set?
Will check. Thanks!
Best Regards,
Jaehoon Chung
> Thank you.
>
> Best regards,
> Yangbo Lu
>
>> -Original Message-
>> From: Yangbo Lu
>> Sent: T
Hi,
CC'd Peng.
On 8/22/20 11:37 AM, John Robertson wrote:
> Refresh driver code, remove obsolete DT props and set the max clock
> rate from the source clock 'base_clk'.
>
> Card detect is also broken. The fix implemented for erratum #15
> documented in Microchip ref. DS8736D only needs to be
select_hs400(struct mmc *mmc)
> /* Set back to HS */
> mmc_set_card_speed(mmc, MMC_HS, true);
>
> + mmc_hs400_prepare_ddr(mmc);
not need to get the return value? you have defined mmc_hs400_prepare_ddr() as
int return type.
Best Regards,
Jaehoon Chung
> +
>
On 7/23/20 1:30 PM, Yangbo Lu wrote:
> For DM_MMC, the controller re-initialization is needed to
> clear old configuration for mmc rescan.
>
> Signed-off-by: Yangbo Lu
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> Changes for v2:
> - N
if needed */
> + mmc->hs400_tuning = 1;
> err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
> + mmc->hs400_tuning = 0;
It seems that it's fsl_esdhc specific flag. Is it need to set to 0?
Best Regards,
Jaehoon Chung
> if (err) {
>
On 7/23/20 1:30 PM, Yangbo Lu wrote:
> Add a reinit() callback for mmc rescan.
>
> Signed-off-by: Yangbo Lu
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> Changes for v2:
> - None.
> Changes for v3:
> - None.
> ---
> drivers/mmc/
Hi Yangbo,
On 8/18/20 1:35 PM, Y.b. Lu wrote:
> Any commets on the v3 patch-set.
> Thanks!
Sorry for late. I will test with your patch on my target. Today, i will reply
about your patch.
Best Regards,
Jaehoon Chung
>
> Best regards,
> Yangbo Lu
>
>> -Original Mess
Hi,
Split the patches. And add commit-msg, plz.
Best Regards,
Jaehoon Chung
On 7/25/20 9:05 PM, hyyoxhk wrote:
> Signed-off-by: hyyoxhk
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/exynos4412-itop-elite.dts | 403 ++
> arch/arm/mach
ur tree [1]. However, already
>> 4d6da10ce611 exposes the problem.
>>
>> What could cause this?
>
> Where the timeout happen in driver?
>
> Did you try enlarge the timeout value?
how about adding SDHCI_QUIRK_WAIT_SEND_CMD?
And as Peng's comment, It needs to fi
On 7/20/20 1:15 AM, Simon Glass wrote:
> This file should not include common.h and dm.h so remove them. Also move
> the inclusion of this file to after the normal includes.
>
> Signed-off-by: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
TW, the test was applied two more patches to fix stability issue. Let me
> send out v2 patch-set with them.
> Thanks.
Thanks for sharing result. I will check your patch-v2.
Best Regards,
Jaehoon Chung
>
> log ==
> NOTICE: BL2: v1.5(release):LSDK-20.04
e the msm_sdhci driver is not parsing the host_caps from DT, not
> all of the cababilities are parsed properly. This results in the MMC
> interfaces to be broken.
>
> Hence, fix this by adding a call to 'mmc_of_parse' during driver probe.
>
> Signed-off-by: Manivanna
Hi Yangbo,
On 7/16/20 11:29 AM, Yangbo Lu wrote:
> This patch-set is to support eMMC HS200 and HS400 speed modes for
> eSDHC, and enable them on LX2160ARDB board.
Is there any result about performance?
Best Regards,
Jaehoon Chung
>
> CI build link
> https://travis-ci.org/gith
quot;input"))
> + flags = GPIOD_IS_IN;
> + else
> + flags = GPIOD_IS_OUT;
> +
> + priv->active_delay = 100;
> + dev_read_u32(dev, "active-delay-ms", &priv->active_delay);
How about using dev_read_u32_default() instead of d
pacitor maybe slow
>> + * discharging (VREFBUF is HiZ at reset by default).
>> + * So force active discharge (HiZ=0) for 1ms before enabling.
>> + */
>> +clrbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ);
>> +udelay(1000);
>> +}
>> +
>> +clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
>> +enable ? STM32_ENVR : 0);
>> if (!enable)
>> return 0;
>>
>
> Reviewed-by: Patrice Chotard
Reviewed-by: Jaehoon Chung
>
> Thanks
>
On 6/24/20 10:36 AM, Peng Fan wrote:
> All:
>
>> Subject: Re: [PATCH v4] mmc: sdhci: Fix HISPD bit handling
>>
>> On 6/22/20 6:26 PM, Jagan Teki wrote:
>>> On Mon, Jun 22, 2020 at 2:54 PM Jaehoon Chung
>> wrote:
>>>>
>>>> Hi Pen
On 6/22/20 6:26 PM, Jagan Teki wrote:
> On Mon, Jun 22, 2020 at 2:54 PM Jaehoon Chung wrote:
>>
>> Hi Peng,
>>
>> On 6/22/20 10:49 AM, Peng Fan wrote:
>>> Jaehoon,
>>>
>>>> Subject: [PATCH v4] mmc: sdhci: Fix HISPD bit handling
>>
; SDHCI_QUIRK_NO_HISPD_BIT) ||
>> (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE))
>> -ctrl &= ~SDHCI_CTRL_HISPD;
>> +no_hispd_bit = true;
No. ctrl variable is set to bit[2] of HOST_CONTROL register.
But Some samsung SoCs a
board_mmc_init() and related entries now that we should be
> using DM_MMC, add PINCTRL so that things work as expected.
>
> Signed-off-by: Martyn Welch
Reviewed-by: Jaehoon Chung
> ---
>
> Changes in v2:
> - Removed now redundant mmc header.
>
&
int on)
>>
>> #endif
>>
>> -#ifdef CONFIG_FSL_ESDHC_IMX
>> -static struct fsl_esdhc_cfg usdhc_cfg[2] = {
>> -{USDHC3_BASE_ADDR},
>> -{USDHC4_BASE_ADDR},
>> -};
>> -
>> -int board_mmc_getcd(struct mmc *mmc)
I'm not sure..
efernece,
> => gpt write mmc 0 $partitions
> Writing GPT: mmc write failed
> ** Can't write to device 0 **
> ** Can't write to device 0 **
> error!
>
> Cc: Robin Murphy
> Cc: Kever Yang
> Cc: Peng Fan
> Reviewed-by: Jaehoon Chung
> Tested-by: Marc Zy
On 6/10/20 6:18 PM, Ashok Reddy Soma wrote:
> Hi Faiz,
>
>> -Original Message-
>> From: Faiz Abbas
>> Sent: Wednesday, May 27, 2020 12:28 PM
>> To: Jaehoon Chung ; Michal Simek
>> ; u-boot@lists.denx.de; git
>> Cc: Ashok Reddy Soma ; Heinrich
write issue observed in
>> rk3399 sdhci controller.
>>
>> Bug log for refernece,
>> => gpt write mmc 0 $partitions
>> Writing GPT: mmc write failed
>> ** Can't write to device 0 **
>> ** Can't write to device 0 **
>> error!
>>
>>
On 6/5/20 6:45 PM, Michal Simek wrote:
> s/booot/boot/g
>
> The first ase is booot instead of boot and second u-booot instead of
> u-boot.
>
> Signed-off-by: Michal Simek
Reviewed-by: Jaehoon Chung
> ---
>
> board/freescale/p1010rdb/README.P101
Hi,
On 6/8/20 10:16 PM, Michal Simek wrote:
> On 27. 05. 20 8:44, Jaehoon Chung wrote:
>> Hi
>>
>> On 5/22/20 7:44 PM, Michal Simek wrote:
>>> From: Ashok Reddy Soma
>>>
>>> This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.
&g
On 5/30/20 2:22 AM, Marek Vasut wrote:
> Add Kconfig entry for the PFUZE PMIC, SPL variant.
>
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Jaehoon Chung
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
> ---
> drivers/power/pmic/Kc
On 5/22/20 7:44 PM, Michal Simek wrote:
> From: Ashok Reddy Soma
>
> Define timing macro's for all the available speeds of mmc. This is
> done similar to linux. Replace other macro's used in zynq_sdhci.c
> with these new macro's.
Even though it's similar to linux, does it need to add new macro?
Hi
On 5/22/20 7:44 PM, Michal Simek wrote:
> From: Ashok Reddy Soma
>
> This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.
>
> This is partial revert of the above commit.
>
> mmc_of_parse() is reading no-1-8-v from device tree and if set,
> it is clearing the UHS speed capabilities
; => gpt write mmc 0 $partitions
> Writing GPT: mmc write failed
> ** Can't write to device 0 **
> ** Can't write to device 0 **
> error!
>
> Cc: Kever Yang
> Cc: Peng Fan
> Signed-off-by: Jagan Teki
Reviewed-by: Jaehoon Chung
> ---
> drivers/mmc
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Jaehoon Chung
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
> ---
> drivers/mmc/fsl_esdhc_imx.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/
c_dev
> in probe.
>
> Fixes: 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200")
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Jaehoon Chung
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
> ---
> drivers/mmc/fsl_esdhc_imx.c
7 +716,7 @@ static int mmc_complete_op_cond(struct mmc
>> *mmc)
>> int err;
>>
>> mmc->op_cond_pending = 0;
>> -if (!(mmc->ocr & OCR_BUSY)) {
>> +if (mmc->ocr & OCR_BUSY) {
>
> When card not go out busy, it means card n
On 5/15/20 7:14 PM, Seung-Woo Kim wrote:
> On build with 32 bit, there is a warning for int-to-pointer-cast.
> Fix the int to pointer cast by using uintptr_t.
Could you share in more detail? I didn't see any warning with gcc 9.2 / 8.3 /
7.4 /6.5.
Best Regards,
Jaehoon Chung
>
T;
> - (&plat->cfg)->host_caps &= ~MMC_MODE_4BIT;
> - }
> + if (host->buswidth == 1)
> + (&plat->cfg)->host_caps &= ~(MMC_MODE_8BIT | MMC_MODE_4BIT);
>
> host->mmc = &plat->mmc;
> host->mmc->priv = &priv->host;
> @@ -164,7 +154,7 @@ static int ca_dwmmc_bind(struct udevice *dev)
> }
>
> static const struct udevice_id ca_dwmmc_ids[] = {
> - { .compatible = "snps,dw-cortina" },
> + { .compatible = "cortina,ca-mmc" },
Well, i didn't know entire history why changed from "snps,dw-cortina" to
"cortina,ca-mmc".
is there any special reason?
Best Regards,
Jaehoon Chung
> { }
> };
>
>
by: Corentin Labbe
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> Changes since v1:
> - added fix for rpi_4_32b_defconfig
>
> configs/rpi_4_32b_defconfig | 2 +-
> configs/rpi_4_defconfig | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
&g
Hi,
On 3/30/20 1:19 PM, Jaehoon Chung wrote:
> Hi Matthias,
>
> On 3/27/20 10:12 PM, Matthias Brugger wrote:
>> Hi Jaehoon,
>>
>> On 27/03/2020 05:08, Jaehoon Chung wrote:
>>> Enable SDHCI_SDMA configuration.
>>>
>>> Signed-off-by: Jae
mode).
>> Fix this by calling mmc_of_parse. This function also checks for the
>> "no-1-8-v" and "max-frequency" entries. Remove the handling of those
>> nodes from this driver.
>>
>> Signed-off-by: Benedikt Grassl
Reviewed-by: Jaehoon Chu
On 4/8/20 11:33 PM, Simon Glass wrote:
> This function does not modify the device to change it to use const *, so
> that callers with a const udevice * can call it without a cast.
>
> Signed-off-by: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
.
>
> I will have a closer look at your suggestions and give you feedback ASAP.
I don't know that you had received reviews about other patches.
If you want to apply new chip, then i think you need to implement drivers based
on DM.
>
>
> Regards
> Stefan Bosch
>
>
int arasan_sdhci_probe(struct udevice *dev)
> host->mmc->dev = dev;
> host->mmc->priv = host;
>
> - ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
> + ret = sdhci_setup_cfg(&plat->cfg, host,
> + CONFIG_ZYNQ_SDHCI_MAX_FREQ,
>
On 4/8/20 3:41 PM, Michal Simek wrote:
> On 08. 04. 20 0:38, Jaehoon Chung wrote:
>> On 4/6/20 11:35 PM, Benedikt Grassl wrote:
>>> Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
>>> is not evaluated. This results in the bus
ing.
>
> Signed-off-by: Benedikt Grassl
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/zynq_sdhci.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index da3ff53da1..f
On 4/6/20 7:55 PM, Marek Vasut wrote:
> On 4/6/20 4:58 AM, Jaehoon Chung wrote:
>> On 4/4/20 7:45 PM, Marek Vasut wrote:
>>> Add extended version of the bounce_buffer_start(), which permits passing in
>>> a custom alignment checker function for the buffer. This is usef
ALIGN,
> + if (!addr_is_aligned(state)) {
how about checking condition whether addr_is_aligned function is present or not
at here?
Best Regards,
Jaehoon Chung
> + state->bounce_buffer = memalign(alignment,
> state->len_
parate patches. "Add devicetree...", " Convert to DM_MMC".
It's just my opinion.
Best Regards,
Jaehoon Chung
> Signed-off-by: Sinan Akman
> Cc: mario@gdsys.cc
> ---
> arch/powerpc/dts/Makefile | 1 +
> arch/powerpc/dts/mpc8379erdb.
> + debug(" 'nexell,sample_dly' missing/invalid!\n");
> + return -EINVAL;
> + }
> + priv->s_delay = val;
> +
> + val = dev_read_u32_default(dev, "nexell,sample_shift", -1);
> + if (val < 0)
On 4/2/20 3:08 PM, Rayagonda Kokatanur wrote:
> On Thu, Apr 2, 2020 at 11:32 AM Jaehoon Chung wrote:
>>
>> Hi Rayagonda,
>>
>> On 3/31/20 2:34 PM, Rayagonda Kokatanur wrote:
>>> This patch series adds following,
>>> -Fix possible memory leak in pr
missed something, let me know, plz.
Best Regards,
Jaehoon Chung
>
> ---
>
> Changes in v4:
> - Rename DT compatible name
> - Remove uneccessary if-statement to support 8-bit buswidth
> - Remove redundant error msg
> - Use symbolic constants in switch statement
>
&g
ORT_EMMC_RPMB.
> Add the missing dependency.
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> cmd/Kconfig | 26 +++---
> 1 file changed, 15 insertions(+), 11 deletions(-)
>
> diff --git a/cmd/Kcon
uestion..Is there the using target with iproc_sdhci?
I didn't find whre SDHCI_IRPOC is eanble
Best Regards,
Jaehoon Chung
>
> drivers/mmc/iproc_sdhci.c | 22 +-
> 1 file changed, 13 insertions(+), 9 deletions(-)
>
Hz SD-clock (CAR
> clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on
> T210 when the requested clock is <= 400KHz. Note that as far as I can
> tell, the other requests for clocks in the Tegra MMC driver result in
> valid SD clocks.
>
> Signed-off-by: Tom War
#x27;s being done in CBoot,
> but it gets reset when the SDMMC1 HW is soft-reset during SD driver
> init, so needs to be repeated here. Also set autocal and tap/trim for
> SDMMC3, although no T210 boards use it for SD-card at this time.
>
> Signed-off-by: Tom Warren
Reviewed-by: Ja
On 4/1/20 3:05 PM, Heinrich Schuchardt wrote:
> On 4/1/20 5:04 AM, Jaehoon Chung wrote:
>> Hi,
>>
>> On 3/30/20 2:24 PM, Heinrich Schuchardt wrote:
>>> Boot partitions of eMMC devices can be power on or permanently write
>>> protected. Let the 'mm
ret = mmc_send_ext_csd(mmc, ext_csd);
> + if (ret)
> + return;
Is it really needed to call mmc_send_ext_csd() at here.
ext_csd register value was already read somewhere.
Best Regards,
Jaehoon Chung
> + wp = ext_csd[EXT_CSD
On 3/31/20 2:34 PM, Rayagonda Kokatanur wrote:
> From: Bharat Kumar Reddy Gooty
>
> Enable SDHCI_QUIRK_BROKEN_R1B quirk.
Is there any problem or special reason to add this quirks?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Bharat Kumar Reddy Gooty
> Signed-off-by: R
On 3/30/20 4:26 AM, Heinrich Schuchardt wrote:
> %s/a EMMC/an eMMC/g
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> cmd/mmc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/cmd/m
Hi Matthias,
On 3/27/20 10:12 PM, Matthias Brugger wrote:
> Hi Jaehoon,
>
> On 27/03/2020 05:08, Jaehoon Chung wrote:
>> Enable SDHCI_SDMA configuration.
>>
>> Signed-off-by: Jaehoon Chung
>> Reviewed-by: Peng Fan
>> Reviewed-by: Minkyu Kang
>
Use phys2bus macro when dma address is accessed.
Some targets need to use pyhs2bus macro. (e.g, RPI4)
After applied it, SDMA mode can be used.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
drivers/mmc/sdhci.c | 6 --
1 file changed, 4 insertions(+), 2
Enable SDHCI_SDMA configuration.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index
n rpi4_defconfig for 64bit
Changelog on V3
- Rebased on latest u-boot-mmc
Changelog on V2
- Keep printf message instead of debug
- Add Peng's Reviewed-by tag
Jaehoon Chung (3):
mmc: sdhci: use phys2bus macro when dma address is accessed
mmc: sdhci: not return error when SDMA is not s
If Host controller doesn't support SDMA, it doesn't need to return
error. Because it can be worked with PIO mode.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
drivers/mmc/sdhci.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
di
On 3/26/20 1:09 AM, Matthias Brugger wrote:
>
>
> On 24/03/2020 23:58, Jaehoon Chung wrote:
>> Enable SDHCI_SDMA configuration.
>>
>> Signed-off-by: Jaehoon Chung
>> Reviewed-by: Peng Fan
>> Reviewed-by: Minkyu Kang
>> ---
>> configs/rpi_4_
Use phys2bus macro when dma address is accessed.
Some targets need to use pyhs2bus macro. (e.g, RPI4)
After applied it, SDMA mode can be used.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
drivers/mmc/sdhci.c | 6 --
1 file changed, 4 insertions(+), 2
est u-boot-mmc
Changelog on V2
- Keep printf message instead of debug
- Add Peng's Reviewed-by tag
Jaehoon Chung (3):
mmc: sdhci: use phys2bus macro when dma address is accessed
mmc: sdhci: not return error when SDMA is not supported
configs: rpi_4_32b_defconfig: enable SDHCI_SDMA config
If Host controller doesn't support SDMA, it doesn't need to return
error. Because it can be worked with PIO mode.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
drivers/mmc/sdhci.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
di
Enable SDHCI_SDMA configuration.
Signed-off-by: Jaehoon Chung
Reviewed-by: Peng Fan
Reviewed-by: Minkyu Kang
---
configs/rpi_4_32b_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index 72cda5d949..7189914606 100644
--- a
nts.
And Is there patch v3 or v2? Subject is v2..but change log is v3.
What is correct version?
Best Regards,
Jaehoon Chung
>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Add I2C controller
> - Add LED controller
> - Add SPI NAND and NOR controller
>
>
gt;>>> Hi
>>>>
>>>> Is there any comment or plan to apply?
>>>
>>> Sorry, I missed this patchset. Will pick it up.
>
> This patchset could not be applied on master, would you rebase?
Sure, i will resend after rebase on latest.
Best Regar
is supported properly in case of
>> any potential issues.
If it's not working fine, looks good to me.
BTW, I didn't have tested on its platform. Do you have a plan to fix it?
Reviewed-by: Jaehoon Chung
>>
>> Signed-off-by: Yangbo Lu
>> ---
>> configs/ls10
On 3/19/20 10:52 AM, Alex Nemirovsky wrote:
> From: Arthur Li
>
> Initial DesignWare based DM support for Cortina Access CA SoCs.
>
> Signed-off-by: Arthur Li
> Signed-off-by: Alex Nemirovsky
>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Add I2C controller
> - Add LED controller
>
On 3/18/20 10:00 AM, Peng Fan wrote:
>> Subject: Re: [PATCH v2 0/3] Support SDMA mode on RPI4 target - 32bit
>>
>> Hi
>>
>> Is there any comment or plan to apply?
>
> Sorry, I missed this patchset. Will pick it up.
No problem. :) Thanks!
Best Regards
Hi
Is there any comment or plan to apply?
Best Regards,
Jaehoon Chung
On 2/18/20 10:25 AM, Jaehoon Chung wrote:
> RPI4's SDHCI controller is supported SDMA mode. (Checked on kernel side)
> But It doesn't use on u-boot side. Then it's too slow about read/write
> perform
#define AUTO_CAL_PU_OFFSET (0x62 << 0)
> +#endif
>
> #endif /* __ASSEMBLY__ */
> #endif /* __TEGRA_MMC_H_ */
> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
> index f022e93..a4bd679 100644
> --- a/drivers/mmc/tegra_mmc.c
> ++
Hi,
Discard this. I have done.
Best Regards,
Jaehoon Chung
On 3/9/20 4:48 PM, Jaehoon Chung wrote:
> Hi all,
>
> I have a question about booting Odroid-N2.
>
> When i have boot with mainline u-boot and Hardkernel's kernel, it's failed.
>
> Is it possible t
step, it's also hang during vpu_power_on(). (Kernel is
based on Hardkernel.)
If someone have succeeded to boot this combination, let me know, plz.
Best Regards,
Jaehoon Chung
check it more.
Will resend patch this after considering SPL.
Best Regards,
Jaehoon Chung
>
> Regards,
> Peng.
>
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> configs/brppt2_defconfig| 1 -
>> configs/ci20_mmc_defconfig | 1 -
>> conf
On 3/5/20 8:00 PM, Peng Fan wrote:
>> Subject: Re: [PATCH v3 00/11] Add Support for eMMC boot in AM65x and
>> J721e
>>
>> Peng,
>>
>> On 26/02/20 4:31 pm, Jaehoon Chung wrote:
>>> Hi Faiz,
>>>
>>> On 2/26/20 5:14 PM, Faiz Abbas wrot
On 2/26/20 8:37 PM, Lukasz Majewski wrote:
> After the
> commit 4213609cc7fb ("drivers: core: use strcmp when find device by name")
> the exact DTS node name for PMIC device must be provided.
>
> This patch fixes this issue by providing full DTS node name ('mc34708@8').
>
> Signed-off-by: Lukasz
On 2/26/20 6:34 PM, Lukasz Majewski wrote:
> Hi Patrick,
>
>> Move CONFIG_SET_DFU_ALT_INFO into Kconfig done by moveconfig.py.
>
> Thank you for the conversion.
>
> Acked-by: Lukasz Majewski
Reviewed-by: Jaehoon Chung
>
>>
>> Signed-off-by: Patrick
my suggestion.
Best Regards,
Jaehoon Chung
>
> v3:
> 1. Added a patch to fix a clash between two dummy clocks of the same
> name in k3-j721e-r5-common-proc-board.dtb
> 2. Converted the init() API patch to two patches adding deferred_probe()
> APIs to the mmc core and s
On 2/25/20 2:25 AM, Masahiro Yamada wrote:
> This header uses bd_t without including its definition.
>
> Change it to (struct bd_info), and add the forward declaration
> to specify it as a structure.
>
> Signed-off-by: Masahiro Yamada
Reviewed-by: Jaehoon Chung
Best Rega
On 2/22/20 2:05 AM, Tom Rini wrote:
> On Fri, Feb 21, 2020 at 04:21:52PM +0900, Jaehoon Chung wrote:
>> On 2/21/20 10:07 AM, Jaehoon Chung wrote:
>>> Hi Tom,
>>>
>>> On 2/21/20 4:57 AM, Tom Rini wrote:
>>>> On Thu, Feb 2
On 2/21/20 10:38 PM, Tom Rini wrote:
> On Fri, Feb 21, 2020 at 10:07:47AM +0900, Jaehoon Chung wrote:
>> Hi Tom,
>>
>> On 2/21/20 4:57 AM, Tom Rini wrote:
>>> On Thu, Feb 20, 2020 at 01:45:31PM +0900, Jaehoon Chung wrote:
>>>
>>>> CONFIG_MMC_BROKE
On 2/21/20 10:07 AM, Jaehoon Chung wrote:
> Hi Tom,
>
> On 2/21/20 4:57 AM, Tom Rini wrote:
>> On Thu, Feb 20, 2020 at 01:45:31PM +0900, Jaehoon Chung wrote:
>>
>>> CONFIG_MMC_BROKEN_CD needs not to define to Kconfig.
>>> broken-cd is already provide t
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