On 05/03/24 01:57, Bryan Brattlof wrote:
> Hey Vignesh!
>
> On March 4, 2024 thus sayeth Vignesh Raghavendra:
>> Hi Wadim,
>>
>> On 26/02/24 19:00, Wadim Egorov wrote:
>>> Texas Instruments has begun enabling security settings on the SoCs it
>>&g
Hi Wadim,
On 26/02/24 19:00, Wadim Egorov wrote:
> Texas Instruments has begun enabling security settings on the SoCs it
> produces to instruct ROM and TIFS to begin protecting the Security
> Management Subsystem (SMS) from other binaries we load into the chip by
> default.
>
> One way ROM and
On 19/02/24 18:04, Vitor Soares wrote:
> From: Vitor Soares
>
> The same U-Boot binary is compatible with multiple Verdin AM62 board
> variants. However, some of the SoC models can only operate at a maximum
> speed of 1 GHz.
>
> Previously, the boards with lower-speed grades were running at
On 08/11/23 04:51, Bryan Brattlof wrote:
> All of the starter kit boards for the am62xxx extended family utilize
> the same 32k crystal oscillator for a more accurate clock for the RTC
> instance. Add the setup the clock mux and debounce configuration to the
> common board directory so the
Hi,
On 21/09/23 21:52, Masahiro Yamada wrote:
> On Fri, Sep 22, 2023 at 12:03 AM Masahiro Yamada wrote:
>>
>> Hi.
>>
>> I am seeing a boot failure on AM64-SK.
>>
>>
>> I got the following error in SPL of the main core.
>> Do you have any clue?
>
>
>
> As a side-topic, I downloaded a prebuilt
Hi Masahiro,
On 21/09/23 20:33, Masahiro Yamada wrote:
> Hi.
[...]
> spl: mmc boot mode: fs
> Found FIT
> Error reading cluster
> fit read sector 0, sectors=985528, dst=, count=18446744073709551615,
> size=0xf09b8
> SPL: failed to boot from all boot devices
> ### ERROR ### Please RESET the board
-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am62a7_init.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index 1f51b0408969..8ac834cffdf9 100644
--- a/arch/arm/mach-k3/am62a7_init.c
+++ b/arch/arm/mach-k3
If early stack usage is exactly same as SIZE_LIMIT_PROVIDE_STACK, then
its most likely to have overflowed beyond this limit and corrupted any
regions beyond stack. Warn about this to the user.
Signed-off-by: Vignesh Raghavendra
---
I found this useful when debugging slient corruption of code
Enable CONFIG_TI_SECURE_DEVICE to support booting High Secure(HS)
variants of AM64x SoC.
Signed-off-by: Vignesh Raghavendra
---
configs/am64x_evm_a53_defconfig | 1 +
configs/am64x_evm_r5_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/am64x_evm_a53_defconfig b/configs
[...]
On 21/03/23 19:40, Hari Nagalla wrote:
> default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
> @@ -172,7 +175,7 @@ config K3_ATF_LOAD_ADDR
>
> config K3_DM_FW
> bool "Separate DM firmware image"
> - depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 ||
> SOC_K3_AM625
On 21/03/23 19:40, Hari Nagalla wrote:
> Add support for J784S4 SoC Identification.
>
> Signed-off-by: Hari Nagalla
> ---
> drivers/soc/soc_ti_k3.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
> index 8af0ac7051..caf8db9574
On 08/05/23 10:21, Manorit Chawdhry wrote:
> Hi Nishanth,
>
> On 08:45-20230505, Nishanth Menon wrote:
>> Manorit,
>>
>> On 20:59-20230504, Tom Rini wrote:
>>> On Thu, May 04, 2023 at 11:07:07AM +0530, Manorit Chawdhry wrote:
>>>
On K3 HS-SE devices all the firewalls are locked by default
This is required for UART boot flow where u-boot.img needs to be
downloaded via YMODEM.
Signed-off-by: Vignesh Raghavendra
---
configs/am62ax_evm_a53_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index
On 20/04/23 22:02, Svyatoslav Ryhel wrote:
..]
> +static int ssd2825_spi_write(struct udevice *dev, int reg,
> +const void *buf, int flags)
> +{
> + struct spi_slave *slave = dev_get_parent_priv(dev);
> + u8 command[2];
>
Allow non fitImage bootflow on Field Securable (HS-FS) devices in
addition to GP, force fitImage boot only on Security enforced (HS-SE)
devices where signed images are necessary to maintain chain of trust.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/common.c | 4 ++--
1 file changed
() in case of cold boot in
order to trigger warm reset. This needs enabling SYSRESET driver in R5
SPL to enable TI SCI reset driver.
Signed-off-by: Nitin Yadav
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am642_init.c | 33 +
configs/am64x_evm_r5_defconfig
Hi Nikhil,
On 06/04/23 11:57, Nikhil M Jain wrote:
>>> +struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
>>> + void **alloc_addr)
>>> +{
>>> + void *dst;
>>> + unsigned long len;
>>> + struct bmp_image *bmp;
>>> +
>>
>> if
the board same as an AM64x SK.
Signed-off-by: Judith Mendez
Acked-by: Andrew Davis
Signed-off-by: Vignesh Raghavendra
---
board/ti/am64x/evm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index c88139ac7acc..9aead2bc3
Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.
Fixes: 9a92851c33e8 ("dma: ti: k3-udma: Add BCDMA and PKTDMA support")
Reported-by: Nishanth Menon
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 2 +-
1 file changed, 1 insertion(+),
Hi Nikhil,
On 17/01/23 18:49, Tom Rini wrote:
> On Tue, Jan 17, 2023 at 10:09:00AM +0530, Nikhl M Jain wrote:
>> Hi, Tom
>>
>> On 13/01/23 20:13, Tom Rini wrote:
>>> On Fri, Jan 13, 2023 at 01:59:21PM +0530, Nikhil M Jain wrote:
>>>
Add device tree node which includes the register
On 11/01/23 11:34, Neha Malcom Francis wrote:
> Current default size of 0x10 is not capable of getting the FIT
> buffer during boot when transitioning to using binman generated boot
> images for certain K3 devices, so increase it to 0x40. Since A72 SPL
> is coming after relocation to
On 20/11/22 00:29, Hari Nagalla wrote:
> diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
> index 6807eb8e8b..bd4ce68d9c 100644
> --- a/drivers/dma/ti/Makefile
> +++ b/drivers/dma/ti/Makefile
> @@ -8,3 +8,4 @@ k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
>
Hi,
On 30/08/22 11:50 am, Jit Loon Lim wrote:
> From: Chee Hong Ang
>
> QSPI driver perform chip select on every flash read/write
> access. The driver need to disable/enable the QSPI controller
> while performing chip select. This may cause some data lost
> especially the QSPI controller is
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci_static_data.h | 42
Signed-off-by: Nishanth Menon
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/Kconfig | 1 +
board/ti/am62x/Kconfig | 59
board/ti/am62x/Makefile | 8 ++
board/ti/am62x/evm.c | 39 ++
4 files changed, 107
-by: Vignesh Raghavendra
---
arch/arm/dts/Makefile |3 +
arch/arm/dts/k3-am625-r5-sk.dts| 140 ++
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 100 +
arch/arm/dts/k3-am625-sk.dts | 150 ++
arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi | 2189
From: Suman Anna
Introduce the basic AM62 SoC description dtsi files describing most
peripherals as per kernel dts.
Signed-off-by: Gowtham Tammana
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am62-ddr.dtsi| 11 +
arch/arm/dts/k3-am62-main.dtsi
Add info of boot flow and build steps for AM62x SK.
Signed-off-by: Vignesh Raghavendra
---
doc/board/ti/am62x_sk.rst | 231 ++
doc/board/ti/index.rst| 1 +
2 files changed, 232 insertions(+)
create mode 100644 doc/board/ti/am62x_sk.rst
diff --git
Signed-off-by: Vignesh Raghavendra
---
board/ti/am62x/MAINTAINERS | 8 +++
configs/am62x_evm_a53_defconfig | 71 +
configs/am62x_evm_r5_defconfig | 91 +++
include/configs/am62x_evm.h | 106
4 files changed, 276
Add range of DMA channels available for R5 SPL usage before DM firmware
is loaded.
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci_static_data.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/firmware/ti_sci_static_data.h
b/drivers/firmware
device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Suman Anna
Signed-off-by: Gowtham Tammana
Signed-off-by: Aswath Govindraju
Signed-off-by: Nishanth Menon
Signed-off-by: Vignesh
From: Suman Anna
Introduce autogenerated SoC data support clk and device data for the
AM62. Hook it upto to power-domain and clk frameworks of U-Boot.
Signed-off-by: Dave Gerlach
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am62x/Makefile| 6
Add PSIL data for AM62x SoC.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/Makefile | 1 +
drivers/dma/ti/k3-psil-am62.c | 50 +++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 2 ++
4 files changed, 54 insertions
From: Suman Anna
Add support for AM62x SoC identification.
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/soc_ti_k3.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index 965728e818..42344145f9 100644
be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
include/dt-bindings/pinctrl/k3.h | 3
Vignesh Raghavendra (4):
dma: ti: Add PSIL data for AM62x DMASS
firmware: ti_sci_static_data: add static DMA chan data
configs: Add configs for AM62x SK
doc: ti: Add readme for AM62x SK
arch/arm/dts/Makefile |3 +
arch/arm/dts/k3-am62-ddr.dtsi | 11
instance.
Signed-off-by: Aswath Govindraju
Signed-off-by: Vignesh Raghavendra
---
drivers/mmc/am654_sdhci.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 4305967d78..42a6134364 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers
On 18/04/22 8:26 pm, Andrew Davis wrote:
> On 4/15/22 9:09 AM, Vignesh Raghavendra wrote:
>> Add info of boot flow and build steps for AM62x SK.
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> doc/board/ti/am62x_sk.rst | 231
Hi,
On 15/04/22 11:11 pm, Tom Rini wrote:
> On Fri, Apr 15, 2022 at 10:08:32PM +0530, Vignesh Raghavendra wrote:
>>
>>
>> On 15/04/22 9:57 pm, Tom Rini wrote:
>>> On Fri, Apr 15, 2022 at 07:39:24PM +0530, Vignesh Raghavendra wrote:
>>>
>>> [snip]
&
On 15/04/22 9:58 pm, Tom Rini wrote:
> On Fri, Apr 15, 2022 at 07:39:27PM +0530, Vignesh Raghavendra wrote:
>> From: Suman Anna
>>
>> Introduce the basic AM62 SoC description dtsi files. While doing this,
>> lets reuse the DDR controller definition from AM64 as
On 15/04/22 9:57 pm, Tom Rini wrote:
> On Fri, Apr 15, 2022 at 07:39:24PM +0530, Vignesh Raghavendra wrote:
>
> [snip]
>> diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
>> new file mode 100644
>> index 00..ee902a774e
>> ---
On 15/04/22 9:57 pm, Tom Rini wrote:
> On Fri, Apr 15, 2022 at 07:39:22PM +0530, Vignesh Raghavendra wrote:
>> From: Suman Anna
>>
>> Add pinctrl macros for AM62x SoCs. These macro definitions are similar
>> to that of previous platforms, but adding new definit
Signed-off-by: Nishanth Menon
Signed-off-by: Aswath Govindraju
Signed-off-by: Nishanth Menon
Signed-off-by: Dave Gerlach
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/Makefile |3 +
arch/arm/dts/k3-am62-main.dtsi | 44 +-
arch/arm/dts/k3-am62
Add info of boot flow and build steps for AM62x SK.
Signed-off-by: Vignesh Raghavendra
---
doc/board/ti/am62x_sk.rst | 231 ++
doc/board/ti/index.rst| 1 +
2 files changed, 232 insertions(+)
create mode 100644 doc/board/ti/am62x_sk.rst
diff --git
Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for
A53 SPL and U-Boot support.
Signed-off-by: Aswath Govindraju
Signed-off-by: Vignesh Raghavendra
---
board/ti/am62x/MAINTAINERS | 8 +++
configs/am62x_evm_a53_defconfig | 110 ++
configs
From: Suman Anna
Add basic support for AM64 SK. This has 2GB DDR.
Note that stack for R5 SPL is in OCRAM @ 0x7000 so that is away from
BSS and does not step on BSS section
Signed-off-by: Suman Anna
Signed-off-by: Aswath Govindraju
Signed-off-by: Nishanth Menon
Signed-off-by: Vignesh
From: Suman Anna
Introduce the basic AM62 SoC description dtsi files. While doing this,
lets reuse the DDR controller definition from AM64 as the instance is
the same
Signed-off-by: Gowtham Tammana
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am62
Add PSIL data for AM62x SoC
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/Makefile | 1 +
drivers/dma/ti/k3-psil-am62.c | 50 +++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 2 ++
4 files changed, 54 insertions(+)
create
From: Suman Anna
Introduce autogenerated SoC data support clk and device data for the
AM62. Hook it upto to power-domain and clk frameworks of U-Boot.
Signed-off-by: Dave Gerlach
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am62x/Makefile| 6
device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Suman Anna
Signed-off-by: Gowtham Tammana
Signed-off-by: Aswath Govindraju
Signed-off-by: Nishanth Menon
Signed-off-by: Vignesh
From: Suman Anna
Add support for AM62x SoC identification.
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/soc_ti_k3.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index 965728e818..42344145f9 100644
be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Suman Anna
Signed-off-by: Vignesh Raghavendra
---
include/dt-bindings/pinctrl/k3.h | 3
instance.
Signed-off-by: Aswath Govindraju
Signed-off-by: Vignesh Raghavendra
---
drivers/mmc/am654_sdhci.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 4305967d78..42a6134364 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers
the basic files to support AM62 SK board
Vignesh Raghavendra (3):
dma: ti: Add PSIL data for AM62x DMASS
configs: Add configs for AM62x SK
doc: ti: Add readme for AM62x SK
arch/arm/dts/Makefile |3 +
arch/arm/dts/k3-am62-ddr.dtsi | 11 +
arch
On 07/03/22 2:55 pm, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra
> ---
> arch/arm/dts/k3-j721s2-common-pr
Timer0 runs at 200MHz,and the clock-frequency defined in DT is
incorrect. Fix it.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +-
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3
-by: Vignesh Raghavendra
---
configs/am64x_evm_a53_defconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index 7397436def..bceb35f5ec 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -135,9
: lore.kernel.org/r/20220307092059.669376-1-vigne...@ti.com
Vignesh Raghavendra (2):
configs: am64x_evm_a53_defconfig: Switch to per-cpu timer as tick
provider
ARM: dts: k3-am642: Correct timer frequency
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +-
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 2 +-
configs
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.
Without this delays in R5 SPL are 10x off.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch
Timer0 runs at 200MHz,and the clock-frequency defined in DT appears
is incorrect.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +-
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3
Patch 1 switches AM64 to use GTC as system timer at A53 SPL/U-boot
stage as done in other TI K3 platforms
Patch 2 corrects DM timer freq to be 200MHz (used at R5 SPL stage)
Vignesh Raghavendra (2):
configs: am64x_evm_a53_defconfig: Switch to GTC as tick timer
ARM: dts: k3-am642: Fix correct
GTC is to be used as tick timer for A53 SPL/U-Boot, but currently
AM64 ends up using DM timer as driver is enabled in the config,
drop OMAP DM Timer related configs so that GTC is used by default.
Signed-off-by: Vignesh Raghavendra
---
configs/am64x_evm_a53_defconfig | 3 ---
1 file changed, 3
buffer is passed during UART
boot since commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer
for loading images")
With this, UART boot works again on K3 (AM654, J7, AM64) family of
devices.
Fixes: 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images")
Si
Gmeiner
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 454986ff15..87f51b3b99 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b
On 21/01/22 8:27 pm, Tom Rini wrote:
> On Fri, Jan 21, 2022 at 09:59:21AM +0530, Vignesh Raghavendra wrote:
>>
>>
>> On 17/01/22 8:47 am, Tom Rini wrote:
>>> On Fri, Dec 24, 2021 at 12:55:36PM +0530, Vignesh Raghavendra wrote:
>>>
>>>> En
Enable config options needed to support Ethernet boot on AM64x SK.
Signed-off-by: Vignesh Raghavendra
---
configs/am64x_evm_a53_defconfig | 4
configs/am64x_evm_r5_defconfig | 12
2 files changed, 16 insertions(+)
diff --git a/configs/am64x_evm_a53_defconfig b/configs
With Ethboot support in SPL, network stack requires more BSS area, so
increase BSS max size to 16K
Signed-off-by: Vignesh Raghavendra
---
include/configs/am64x_evm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to
download images on the same port, therefore there is no need to enable
cpsw_port1. Disable the same.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am642-r5-sk.dts | 11 ---
arch/arm/dts/k3-am642-sk-u
Replace error case print with meaning full message.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 6ae69b51c7..454986ff15 100644
/20211224072536.270251-1-vigne...@ti.com/T/#t
Vignesh Raghavendra (4):
net: ti: am65-cpsw-nuss: Fix err msg for port bind failures
ARM: dts: k3-am642-sk: Disable cpsw_port1 in SPL
configs: am64xx_evm: Increase BSS max size to 16K
configs: am64x_evm_r5/a53_defconfig: Enable configs required
On 17/01/22 8:16 pm, Tom Rini wrote:
> On Fri, Dec 24, 2021 at 12:55:34PM +0530, Vignesh Raghavendra wrote:
>
>> ROM supports boot from CPSW second port, therefore set eth1 boot
>> interface
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> includ
On 21/01/22 4:49 am, Tom Rini wrote:
> On Fri, Jan 21, 2022 at 01:13:54AM +0200, Ramon Fried wrote:
>> On Mon, Jan 17, 2022 at 8:37 PM Tom Rini wrote:
>>>
>>> On Fri, Dec 24, 2021 at 12:55:30PM +0530, Vignesh Raghavendra wrote:
>>>
>>>> On ce
On 17/01/22 8:47 am, Tom Rini wrote:
> On Fri, Dec 24, 2021 at 12:55:36PM +0530, Vignesh Raghavendra wrote:
>
>> Enable config options needed to support Ethernet boot on AM64x SK.
>>
>> Signed-off-by: Vignesh Raghavendra
>
> This leads to size overflow on
On 30/12/21 1:01 am, Ramon Fried wrote:
> On Fri, Dec 24, 2021 at 9:25 AM Vignesh Raghavendra wrote:
>>
>> On certain TI SoC, like AM64x there is a CPSW3G which supports 2
>> external independent MAC ports for single CPSW instance.
>> It is not possible for Ether
Enable config options needed to support Ethernet boot on AM64x SK.
Signed-off-by: Vignesh Raghavendra
---
configs/am64x_evm_a53_defconfig | 4
configs/am64x_evm_r5_defconfig | 12
2 files changed, 16 insertions(+)
diff --git a/configs/am64x_evm_a53_defconfig b/configs
Enable Second Ethernet port on which ROM support Ethboot.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am642-r5-sk.dts | 74
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 40 ++-
2 files changed, 113 insertions(+), 1 deletion(-)
diff --git
ROM supports boot from CPSW second port, therefore set eth1 boot
interface
Signed-off-by: Vignesh Raghavendra
---
include/configs/am64x_evm.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index 99624081c3
This is required to enables spl_net boot on AM64x
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/include/mach/am64_spl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/include/mach/am64_spl.h
b/arch/arm/mach-k3/include/mach/am64_spl.h
index 607b09c2e5..b4f396b2c0
In order to support Ethernet boot on AM64x, probe AM65 CPSW NUSS.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am642_init.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 533905daeb..184f1a2761 100644
Call dram_init_banksize() from spl_board_init() otherwise TFTP download
fails due to lmb_get_free_size() not able to find unreserved region due
to lack of DRAM size info. Required to support Ethernet boot on AM64x.
Signed-off-by: Vignesh Raghavendra
---
board/ti/am64x/evm.c | 3 +++
1 file
.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/Kconfig | 2 +
drivers/net/ti/am65-cpsw-nuss.c | 77 +
2 files changed, 52 insertions(+), 27 deletions(-)
diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig
index f2dbbd0128..59c96d862d 100644
Probe toplevel AM65 CPSW NUSS driver from misc_init_r() when driver
is enabled. Since driver is modeled as UCLASS_MISC, we need to
explicitly probe the driver. Use common misc_init_r() that entire
K3 family of SoCs.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/common.c | 16
on AM64x SK with RGMII 1G bootmode at 1G.
https://controlc.com/90d555ee
Sanity tested TFTP at U-Boot prompt on AM65x and J721e.
Vignesh Raghavendra (8):
mach-k3: common: Instantiate AM65 CPSW NUSS wrapper
net: ti: am65-cpsw: Add support for multi port independent MAC mode
board: ti: am64x: Init
not able to get DMA channels at R5 SPL on AM64x
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 411edef3a7..86603d43f1 100644
by ROM/TIFS in case of HS platform
and thus cannot reside in OSPI/xSPI and needs to be copied over to
internal OCRAM.
This unblocks OSPI/xSPI boot on HS platforms
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Dave Gerlach
Tested-by: Keerthy
---
arch/arm/mach-k3/sysfw-loader.c | 18
== 2, #size-cells == 1)
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 41ce9fcb59
On 6/14/21 1:35 PM, Tero Kristo wrote:
> On 13/06/2021 19:49, Tom Rini wrote:
>> On Fri, Jun 11, 2021 at 09:40:14PM +0530, Lokesh Vutla wrote:
>>
>>> Hi Tom,
>>> Please find the PR for master branch targeted for v2021.10-next
>>> branch
>>> with checkpatch warnings fixed. Details about the
On 6/8/21 12:35 PM, Lokesh Vutla wrote:
>
>
> On 07/06/21 7:47 pm, Vignesh Raghavendra wrote:
>> This series add DMA support for R5 SPL on J721e/J7200 SoCs post HSM
>> Rearch.
>>
>> Depends on Tero's base HSM rearch support series.
>>
>> v2
but setting
up of cfg registers is handled locally.
U-Boot specific code is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma-u-boot.c | 177
is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc-u-boot.c | 61
drivers/soc/ti/k3-navss-ringacc.c| 36
for now.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 14 ++
.../k3-j7200-common-proc-board-u-boot.dtsi| 26 +++
.../k3-j721e-common-proc-board-u-boot.dtsi| 14 ++
3 files changed, 54 insertions(+)
diff --git a/arch/arm
Add DM firmware node which will provide DM services during R5 SPL stage.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 17 +
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 18 ++
2 files changed, 35 insertions(+)
diff
will have to directly interact with TIFS using DM to DMSC
channels to request RM resources.
Therefore add DT binding and driver for the same. This driver will
handle Resource Management services at R5 SPL stage.
Signed-off-by: Vignesh Raghavendra
---
.../firmware/ti,j721e-dm-sci.txt
R5 SPL would need to talk to DMSC using DM to DMSC sec-proxy threads.
Mark these as valid threads in the driver.
Signed-off-by: Vignesh Raghavendra
---
drivers/mailbox/k3-sec-proxy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers
In case of R5 SPL, GET_RANGE API service is not available (as DM
services are not yet up), therefore service such calls locally using
per SoC static data.
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci.c | 36 +++
drivers/firmware/ti_sci_static_data.h | 92
This series add DMA support for R5 SPL on J721e/J7200 SoCs post HSM
Rearch.
Depends on Tero's base HSM rearch support series.
v2:
Use IS_ENABLED() consistentially instead of #ifdef
Reword commit msg for 5/7 as suggested by Lokesh
Rebase on Tero's latest HSM base series.
Vignesh Raghavendra (7
AM64x GP and SK EVM have DP83867 PHY connected to CPSW external port0.
Enable the driver in order to use ethernet at U-Boot prompt.
CONFIG_PHY_TI is selected by CONFIG_PHY_TI_DP83867 and thus can be dropped.
Signed-off-by: Vignesh Raghavendra
---
Based on top of https://source.denx.de/u-boot
On 5/12/21 11:40 AM, Lokesh Vutla wrote:
>
>
> On 11/05/21 11:34 am, Vignesh Raghavendra wrote:
>>
>>
>> On 5/11/21 10:21 AM, Lokesh Vutla wrote:
>>>
>>>
>>> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>>>> R5 SPL needs a
On 5/11/21 10:19 AM, Lokesh Vutla wrote:
>
>
> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>> On J721e and J7200, MCU R5 core (boot master) itself would run Device
>> Manager (DM) Firmware and interact with TI Foundational Security (TIFS)
>> firmware to enable
On 5/11/21 10:21 AM, Lokesh Vutla wrote:
>
>
> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>> R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
>> CFG, TCHAN CFG and RCHAN CFG address ranges.
>>
>> Signed-off-by: Vignesh Raghavendra
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