Re: [U-Boot] [PATCH V4] AT91: pio: Add PIO3 features
Hi Wolfgang and Albert, How to move on? Thanks BR, Eric On 01/31/2012 01:14 PM, Hong Xu wrote: This patch adds the support for new PIO controller introduced by some AT91 SoCs. New features include * More peripheral multiplexing * Pull-down, Schmitt trigger, Debouncer * More irq trigger mode (may be not interesting in U-Boot) Signed-off-by: Hong Xuhong...@atmel.com Acked-by: Remy Bohmerli...@bohmer.net --- Changes since V3 Add Acked-by from Remy Bohmer arch/arm/include/asm/arch-at91/at91_pio.h | 48 ++- drivers/gpio/at91_gpio.c | 130 +++- 2 files changed, 171 insertions(+), 7 deletions(-) [...] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Avoiding reload on ARM U-BOOT
Hello again Sorry for slipping the u-boot list e-mail address i understand the benefit of relocating u-boot to the end of DRAM but in systems where boot time is critical this redundant copy is undesirable. anyway i understand there is no official way of avoiding it. One more question i have is regarding the SPL Framework. i read all the documentation i could find about the SPL but i don't think i fully understand the usage of this framework. since i noticed several SPL Macros around the relocation code i suspected it has something to do with relocation or u-boot running as secondary boot program i would appreciate a short explanation when CONFIG_SPL or CONFIG_NAND_SPL should be set ? Thanks again Yehuda On Fri, Feb 3, 2012 at 10:15 AM, Marek Vasut marek.va...@gmail.com wrote: Hello Marek ALWAYS CC U-BOOT ML Thank you for your answer My SOC (Marvells Armada Controller) uses a bootrom code to copy to initialize the DRAM and to copy the u-boot image. so the entire DRAM init and copy sequence in u-boot is redundant. I see. I know about this soc's bootrom. Though it still can't place the bootloader properly to the end of DRAM. in previous version there was a way to avoid this. i find it limiting that there isn't a way in the new version. Why would i want to relocate the code anyway ? See above, to place it to the end of DRAM. Yehuda On Thu, Feb 2, 2012 at 11:34 AM, Marek Vasut marek.va...@gmail.com wrote: Hello everyone im trying to port u-boot 2011-09 to a new board with an arm based SOC i found that u-boot will always relocate the code even if it is placed already in DDR which is the case with my SOC. The u-boot is always relocated to the end of the DRAM, which is likely what you want. And it's quite a quick process. So if you are manufacturing your soc with various size of RAM, you want the relocation to happen. What SoC is that anyway? is there any clean way to avoid relocating the u-boot ? does the various SPL configs have something to do with that ? Not really and you don't want this to happen. M if yes which one should i define ? Thanks in advance Yehuda ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] mmc: card status polling fixes
Hi, These are two patches for some card status polling issues that we ran across lately. The first patch fixes single block writes to cards because the card status was not always checked (only for multi block writes). Also, if the card status could not be obtained, the error was not propagated upwards. The second patch aligns the status polling with the Linux kernel (retrying the command five times) to make it more robust... Regards, Jan Kloetzke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mmc: fix card busy polling
A MMC/SD card may always go into the programming state (and hence be
busy) after a block write. Therefore always check the card state, even
after single block writes. On the other hand there is no need to check
the card status after a read.
Also make sure that errors during busy polling are propagated upwards.
Signed-off-by: Jan Kloetzke jan.kloet...@dspg.com
Cc: Andy Fleming aflem...@gmail.com
---
drivers/mmc/mmc.c | 14 ++
1 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 6db37b1..7b09272 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -305,11 +305,12 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t
blkcnt, const void*src)
printf(mmc fail to send stop cmd\n);
return 0;
}
-
- /* Waiting for the ready status */
- mmc_send_status(mmc, timeout);
}
+ /* Waiting for the ready status */
+ if (mmc_send_status(mmc, timeout))
+ return 0;
+
return blkcnt;
}
@@ -341,7 +342,6 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
{
struct mmc_cmd cmd;
struct mmc_data data;
- int timeout = 1000;
if (blkcnt 1)
cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
@@ -373,9 +373,6 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong
start, lbaint_t blkcnt)
printf(mmc fail to send stop cmd\n);
return 0;
}
-
- /* Waiting for the ready status */
- mmc_send_status(mmc, timeout);
}
return blkcnt;
@@ -610,7 +607,8 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
ret = mmc_send_cmd(mmc, cmd, NULL);
/* Waiting for the ready status */
- mmc_send_status(mmc, timeout);
+ if (!ret)
+ ret = mmc_send_status(mmc, timeout);
return ret;
--
1.7.3.4
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[U-Boot] [PATCH 2/2] mmc: make mmc_send_status() more reliable
Align the card status polling with the Linux kernel and retry the
command at least five times. Also some cards apparently mishandle the
status bits, so make sure to check the card state too.
Signed-off-by: Jan Kloetzke jan.kloet...@dspg.com
Cc: Andy Fleming aflem...@gmail.com
---
drivers/mmc/mmc.c | 20
include/mmc.h |2 ++
2 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7b09272..49c3349 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -108,7 +108,7 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
int mmc_send_status(struct mmc *mmc, int timeout)
{
struct mmc_cmd cmd;
- int err;
+ int err, retries = 5;
#ifdef CONFIG_MMC_TRACE
int status;
#endif
@@ -121,17 +121,21 @@ int mmc_send_status(struct mmc *mmc, int timeout)
do {
err = mmc_send_cmd(mmc, cmd, NULL);
- if (err)
+ if (!err) {
+ if ((cmd.response[0] MMC_STATUS_RDY_FOR_DATA)
+ (cmd.response[0] MMC_STATUS_CURR_STATE) !=
+MMC_STATE_PRG)
+ break;
+ else if (cmd.response[0] MMC_STATUS_MASK) {
+ printf(Status Error: 0x%08X\n,
+ cmd.response[0]);
+ return COMM_ERR;
+ }
+ } else if (--retries 0)
return err;
- else if (cmd.response[0] MMC_STATUS_RDY_FOR_DATA)
- break;
udelay(1000);
- if (cmd.response[0] MMC_STATUS_MASK) {
- printf(Status Error: 0x%08X\n, cmd.response[0]);
- return COMM_ERR;
- }
} while (timeout--);
#ifdef CONFIG_MMC_TRACE
diff --git a/include/mmc.h b/include/mmc.h
index 8744604..30c2375 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -112,6 +112,8 @@
#define MMC_STATUS_CURR_STATE (0xf 9)
#define MMC_STATUS_ERROR (1 19)
+#define MMC_STATE_PRG (7 9)
+
#define MMC_VDD_165_1950x0080 /* VDD voltage 1.65 -
1.95 */
#define MMC_VDD_20_21 0x0100 /* VDD voltage 2.0 ~ 2.1 */
#define MMC_VDD_21_22 0x0200 /* VDD voltage 2.1 ~ 2.2 */
--
1.7.3.4
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[U-Boot] [PATCH] add STM29F400BB to table of supported legacy flashs
Signed-off-by: David Mueller d.muel...@elsoft.ch
diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 36d30c3..2350f36 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -69,6 +69,9 @@
#define SST39SF010A0x00B5
#define SST39SF020A0x00B6
+/* STM */
+#define STM29F400BB0x00D6
+
/* MXIC */
#define MX29LV040 0x004F
@@ -346,6 +349,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1, 15),
}
},
+ {
+ .mfr_id = (u16)STM_MANUFACT,
+ .dev_id = STM29F400BB,
+ .name = ST Micro M29F400BB,
+ .uaddr = {
+ [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+ },
+ .DevSize= SIZE_512KiB,
+ .CmdSet = CFI_CMDSET_AMD_LEGACY,
+ .NumEraseRegions= 4,
+ .regions= {
+ ERASEINFO(0x04000, 1),
+ ERASEINFO(0x02000, 2),
+ ERASEINFO(0x08000, 1),
+ ERASEINFO(0x1, 7),
+ }
+ },
#endif
};
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Re: [U-Boot] [PATCH] arm: Add option to disable code relocation
Hi Wolfgang, On 02/06/2012 06:51 PM, Wolfgang Denk wrote: Dear Graeme Russ, In message CALButC+==qgs5eaahtqqu4zejqvg-3187ewaqu-fv3dwp5q...@mail.gmail.com you wrote: I think the immediate focus should be on centralising the init sequence processing into /common/init.c and then bringing the new'initcall' architecture online Agreed. Once these have been done, any board can just specific: SKIP_INIT(RELOC) I will probably object to his, too - for the same reasons. Considering this is a 'free' artefact of how the init sequence functions, and that it is board specific and totally non-invasive for anyone else (i.e. no ugly ifdef's anywhere else in the code) I'm surprised you would object... It would be like a board not populated with USB hardware on a arch that globally defines it saying SKIP_INIT(USB) to avoid linking in the USB initialisation (maybe not the best example, but you get the point) Or if a pre-loader initialises SDRAM the board can specify SKIP_INIT(SDRAM) The point is we can specify a 'standard' set of init 'components' and boards can trivially disable any of these components as they see fit with zero impact on any other part of the U-Boot code base And they can add their own init components, again with zero impact on the U-Boot code base Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
Hi Govindraj,
I was about to ask Tom to reorder the patches while applying, but
there are still several things to fix.
I'm also fine with fixing these by a follow up patch (after merging this).
There are several comments, you missed to fix from previous version [1].
Please, fix those.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/123832
On 02/03/12 15:38, Govindraj.R wrote:
From: Govindraj.R govindraj.r...@ti.com
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic sba...@denx.de
Signed-off-by: Govindraj.R govindraj.r...@ti.com
After fixing the pointed issues:
Acked-by: Igor Grinberg grinb...@compulab.co.il
---
board/efikamx/efikamx-usb.c | 24 ++--
drivers/usb/ulpi/ulpi-viewport.c | 30 ++--
drivers/usb/ulpi/ulpi.c | 54 +++--
include/usb/ulpi.h | 36 +
4 files changed, 82 insertions(+), 62 deletions(-)
[...]
diff --git a/drivers/usb/ulpi/ulpi-viewport.c
b/drivers/usb/ulpi/ulpi-viewport.c
index 490fb0e..6f03f08 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
[...]
-int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg 16) | (value 0xff);
You should utilize the port_num variable here, right?
something like:
val |= (ulpi_vp-port_num 0x7) 24;
- return ulpi_request(ulpi_viewport, val);
+ return ulpi_request(ulpi_vp, val);
}
-u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
u32 val = ULPI_RWRUN | ((u32)reg 16);
same here
- err = ulpi_request(ulpi_viewport, val);
+ err = ulpi_request(ulpi_vp, val);
if (err)
return err;
- return (readl(ulpi_viewport) 8) 0xff;
+ return (readl(ulpi_vp-viewport_addr) 8) 0xff;
}
[...]
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 802f077..a036bab 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -28,12 +28,23 @@
#endif
/*
+ * ulpi view port address and
+ * Port_number that can be passed.
+ * Any additional data to be passed can
+ * be extended from this structure
+ */
+struct ulpi_viewport {
+ u32 viewport_addr;
+ u8 port_num;
+};
haven't we aggreed, that this will be:
u32 port_num;
?
+
+/*
* Initialize the ULPI transciever and check the interface integrity.
- * @ulpi_viewport - the address of the ULPI viewport register.
+ * @ulpi_viewport - structure containing ULPI viewport data
This is ulpi_vp now.
[...]
--
Regards,
Igor.
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[U-Boot] [PATCH v9 0/4] Add SMDK5250 board support
This patchset add support for Samsung's SMDK5250 board based on EXYNOS5250 based SoC. It also adds support for MMC SPL booting. The porting is done by Samsung engineers at HQ in System LSI Team. I am contributing in upstreaming the code for the board. Based upon discussions following patches are dropped in this version: Exynos: Add CONFIG_EXYNOS4 Macro to EXYNOS4 based boards Exynos: Clock.c: Replace exynos4 prefix with exynos SMDK5250: enable device tree support is squashed with EXYNOS: Add SMDK5250 board support Chander Kashyap (4): Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro ARM: EXYNOS: Add support for Exynos5 based SoCs EXYNOS: Add SMDK5250 board support EXYNOS: SMDK5250: Add MMC SPL support MAINTAINERS |1 + Makefile |1 + arch/arm/cpu/armv7/exynos/clock.c| 214 +- arch/arm/include/asm/arch-exynos/clock.h | 326 + arch/arm/include/asm/arch-exynos/cpu.h | 35 +++- arch/arm/include/asm/arch-exynos/dmc.h | 146 ++ arch/arm/include/asm/arch-exynos/gpio.h | 99 ++- arch/arm/include/asm/arch-exynos/tzpc.h | 52 board/samsung/smdk5250/Makefile | 58 board/samsung/smdk5250/clock_init.c | 202 + board/samsung/smdk5250/dmc_init.c| 462 ++ board/samsung/smdk5250/lowlevel_init.S | 96 ++ board/samsung/smdk5250/mmc_boot.c| 58 board/samsung/smdk5250/setup.h | 451 + board/samsung/smdk5250/smdk5250.c| 146 ++ board/samsung/smdk5250/tzpc_init.c | 48 +++ boards.cfg |1 + include/configs/s5pc210_universal.h |1 + include/configs/smdk5250.h | 197 + include/configs/trats.h |1 + tools/Makefile |6 + tools/mkexynosspl.c | 122 22 files changed, 2706 insertions(+), 17 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/dmc.h create mode 100644 arch/arm/include/asm/arch-exynos/tzpc.h create mode 100644 board/samsung/smdk5250/Makefile create mode 100644 board/samsung/smdk5250/clock_init.c create mode 100644 board/samsung/smdk5250/dmc_init.c create mode 100644 board/samsung/smdk5250/lowlevel_init.S create mode 100644 board/samsung/smdk5250/mmc_boot.c create mode 100644 board/samsung/smdk5250/setup.h create mode 100644 board/samsung/smdk5250/smdk5250.c create mode 100644 board/samsung/smdk5250/tzpc_init.c create mode 100644 include/configs/smdk5250.h create mode 100644 tools/mkexynosspl.c -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 1/4] Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4)
architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ
to make it generic for exynos architecture.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- None
Changes for v3:
- None
Changes for V4:
- Added CONFIG_SYS_CLK_FREQ to trats.h
Changes for v5:
- None
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
- None
Changes for v9:
- None
arch/arm/cpu/armv7/exynos/clock.c |6 +-
include/configs/s5pc210_universal.h |1 +
include/configs/trats.h |1 +
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 0c199cd..4d92c53 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -26,10 +26,6 @@
#include asm/arch/clock.h
#include asm/arch/clk.h
-#ifndef CONFIG_SYS_CLK_FREQ_C210
-#define CONFIG_SYS_CLK_FREQ_C210 2400
-#endif
-
/* exynos4: return pll clock frequency */
static unsigned long exynos4_get_pll_clk(int pllreg)
{
@@ -76,7 +72,7 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
/* SDIV [2:0] */
s = r 0x7;
- freq = CONFIG_SYS_CLK_FREQ_C210;
+ freq = CONFIG_SYS_CLK_FREQ;
if (pllreg == EPLL) {
k = k 0x;
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_universal.h
index be000cb..8286680 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -49,6 +49,7 @@
/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
#define CONFIG_SYS_CLK_FREQ_C210 2400
+#define CONFIG_SYS_CLK_FREQCONFIG_SYS_CLK_FREQ_C210
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
diff --git a/include/configs/trats.h b/include/configs/trats.h
index acb3241..10f11d9 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -49,6 +49,7 @@
/* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
#define CONFIG_SYS_CLK_FREQ_C210 2400
+#define CONFIG_SYS_CLK_FREQCONFIG_SYS_CLK_FREQ_C210
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
--
1.7.5.4
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[U-Boot] [PATCH v9 2/4] ARM: EXYNOS: Add support for Exynos5 based SoCs
Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- This patch was part of EXYNOS: Add SMDK5250 board support
- Now it is seprated as SoC support.
Changes for v3:
- Populated complete exynos5 gpio structures
Changes for v4:
- Added dmc.h and tzpc.h header files
- Renamed EXYNOS5_PHY*_CTRL_BASE to EXYNOS5_DMC_PHY*_BASE
Changes for v5:
- None
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
- None
Changes for v9:
- None
arch/arm/cpu/armv7/exynos/clock.c| 208 +++-
arch/arm/include/asm/arch-exynos/clock.h | 326 ++
arch/arm/include/asm/arch-exynos/cpu.h | 35 +++-
arch/arm/include/asm/arch-exynos/dmc.h | 146 +
arch/arm/include/asm/arch-exynos/gpio.h | 99 +-
arch/arm/include/asm/arch-exynos/tzpc.h | 52 +
6 files changed, 854 insertions(+), 12 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/dmc.h
create mode 100644 arch/arm/include/asm/arch-exynos/tzpc.h
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 4d92c53..2f7048b 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -92,6 +92,72 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return fout;
}
+/* exynos5: return pll clock frequency */
+static unsigned long exynos5_get_pll_clk(int pllreg)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con0);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con0);
+ k = readl(clk-epll_con1);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con0);
+ k = readl(clk-vpll_con1);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ /*
+* APLL_CON: MIDV [25:16]
+* MPLL_CON: MIDV [25:16]
+* EPLL_CON: MIDV [24:16]
+* VPLL_CON: MIDV [24:16]
+*/
+ if (pllreg == APLL || pllreg == MPLL)
+ mask = 0x3ff;
+ else
+ mask = 0x1ff;
+
+ m = (r 16) mask;
+
+ /* PDIV [13:8] */
+ p = (r 8) 0x3f;
+ /* SDIV [2:0] */
+ s = r 0x7;
+
+ freq = CONFIG_SYS_CLK_FREQ;
+
+ if (pllreg == EPLL) {
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+ } else if (pllreg == VPLL) {
+ k = k 0xfff;
+ /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 1024) * (freq / (p * (1 s)));
+ } else {
+ if (s 1)
+ s = 1;
+ /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+ fout = m * (freq / (p * (1 (s - 1;
+ }
+
+ return fout;
+}
+
/* exynos4: return ARM clock frequency */
static unsigned long exynos4_get_arm_clk(void)
{
@@ -114,6 +180,28 @@ static unsigned long exynos4_get_arm_clk(void)
return armclk;
}
+/* exynos5: return ARM clock frequency */
+static unsigned long exynos5_get_arm_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long div;
+ unsigned long armclk;
+ unsigned int arm_ratio;
+ unsigned int arm2_ratio;
+
+ div = readl(clk-div_cpu0);
+
+ /* ARM_RATIO: [2:0], ARM2_RATIO: [30:28] */
+ arm_ratio = (div 0) 0x7;
+ arm2_ratio = (div 28) 0x7;
+
+ armclk = get_pll_clk(APLL) / (arm_ratio + 1);
+ armclk /= (arm2_ratio + 1);
+
+ return armclk;
+}
+
/* exynos4: return pwm clock frequency */
static unsigned long exynos4_get_pwm_clk(void)
{
@@ -157,6 +245,27 @@ static unsigned long exynos4_get_pwm_clk(void)
return pclk;
}
+/* exynos5: return pwm clock frequency */
+static unsigned long exynos5_get_pwm_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int ratio;
+
+ /*
+* CLK_DIV_PERIC3
+* PWM_RATIO [3:0]
+*/
+ ratio = readl(clk-div_peric3);
+ ratio = ratio 0xf;
+ sclk = get_pll_clk(MPLL);
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
/* exynos4: return uart clock frequency */
static unsigned long exynos4_get_uart_clk(int
[U-Boot] [PATCH v9 3/4] EXYNOS: Add SMDK5250 board support
SMDK5250 board is based on Samsungs EXYNOS5250 SoC. Signed-off-by: Chander Kashyap chander.kash...@linaro.org --- Changes for v2: - This patch is bifurcated into borad support and SoC support - Fixed typo: s/EEYNOS/EXYNOS - Squashed patch SMDK5250: enable device tree support in this. Changes for v3: - None Changes for v4: - Converted assembly routines for clock, memory, uart and tzpc - init to c functions - Moved uart init to smdk5250.c Changes for v5: - Remove init of gpio1 - Fixed gpio configuration for uart Changes for v6: - Add gpio1 init in board_uart_init, which was removed in v5 Changes for v7: - Converted magic numbers in dmc_init.c with macro defines - Divided mem_ctrl_init() function in dmc_init.c in smaller modules. - Removed init of all uarts except uart2 in smdk5250.c file. - Removed values assigned for boolean defines. - Removed back-slashes used for continuation in smdk5250.c Changes for v8: - cdrex config added in dmc_init.c Changes for v9: - None MAINTAINERS|1 + board/samsung/smdk5250/Makefile| 51 board/samsung/smdk5250/clock_init.c| 202 ++ board/samsung/smdk5250/dmc_init.c | 462 board/samsung/smdk5250/lowlevel_init.S | 96 +++ board/samsung/smdk5250/setup.h | 451 +++ board/samsung/smdk5250/smdk5250.c | 146 ++ board/samsung/smdk5250/tzpc_init.c | 48 boards.cfg |1 + include/configs/smdk5250.h | 190 + 10 files changed, 1648 insertions(+), 0 deletions(-) create mode 100644 board/samsung/smdk5250/Makefile create mode 100644 board/samsung/smdk5250/clock_init.c create mode 100644 board/samsung/smdk5250/dmc_init.c create mode 100644 board/samsung/smdk5250/lowlevel_init.S create mode 100644 board/samsung/smdk5250/setup.h create mode 100644 board/samsung/smdk5250/smdk5250.c create mode 100644 board/samsung/smdk5250/tzpc_init.c create mode 100644 include/configs/smdk5250.h diff --git a/MAINTAINERS b/MAINTAINERS index a05ad46..f88a282 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -713,6 +713,7 @@ Chander Kashyap k.chan...@samsung.com origen ARM ARMV7 (EXYNOS4210 SoC) SMDKV310ARM ARMV7 (EXYNOS4210 SoC) + SMDK5250ARM ARMV7 (EXYNOS5250 SoC) Heungjun Kim riverful@samsung.com diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile new file mode 100644 index 000..80e8be3 --- /dev/null +++ b/board/samsung/smdk5250/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2012 Samsung Electronics +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +SOBJS := lowlevel_init.o + +COBJS := clock_init.o +COBJS += dmc_init.o +COBJS += tzpc_init.o +COBJS += smdk5250.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +ALL:= $(obj).depend $(LIB) + +all: $(ALL) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/samsung/smdk5250/clock_init.c b/board/samsung/smdk5250/clock_init.c new file mode 100644 index 000..305842d --- /dev/null +++ b/board/samsung/smdk5250/clock_init.c @@ -0,0 +1,202 @@ +/* + * Clock setup for SMDK5250 board based on EXYNOS5 + * + * Copyright (C) 2012 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but
[U-Boot] [PATCH v9 4/4] EXYNOS: SMDK5250: Add MMC SPL support
This patch adds support for MMC SPL booting.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
- Moved $BOARD/tools/mkexynos_image.c to tools/mksmdk5250spl.c
- Incorporated Mike's review comments
Changes for v9:
- Renamed mksmdk5250spl.c to mkexynosspl.c
- Included warning message and exit statement mksmdk5250spl.c
- in case fstat fails.
- Added entry in Makefile to clean mksmdk5250spl executable
- during make distclean.
Makefile |1 +
board/samsung/smdk5250/Makefile |7 ++
board/samsung/smdk5250/mmc_boot.c | 58 +
include/configs/smdk5250.h|7 ++
tools/Makefile|6 ++
tools/mkexynosspl.c | 122 +
6 files changed, 201 insertions(+), 0 deletions(-)
create mode 100644 board/samsung/smdk5250/mmc_boot.c
create mode 100644 tools/mkexynosspl.c
diff --git a/Makefile b/Makefile
index 36246b6..648d477 100644
--- a/Makefile
+++ b/Makefile
@@ -735,6 +735,7 @@ clean:
$(obj)tools/gdb/{astest,gdbcont,gdbsend} \
$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
+ $(obj)tools/mk{smdk5250,}spl \
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}\
$(obj)board/matrix_vision/*/bootscript.img \
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 80e8be3..226db1f 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -29,7 +29,14 @@ SOBJS:= lowlevel_init.o
COBJS := clock_init.o
COBJS += dmc_init.o
COBJS += tzpc_init.o
+
+ifndef CONFIG_SPL_BUILD
COBJS += smdk5250.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+COBJS += mmc_boot.o
+endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/board/samsung/smdk5250/mmc_boot.c
b/board/samsung/smdk5250/mmc_boot.c
new file mode 100644
index 000..449a919
--- /dev/null
+++ b/board/samsung/smdk5250/mmc_boot.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#includecommon.h
+#includeconfig.h
+
+/*
+* Copy U-boot from mmc to RAM:
+* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
+* Pointer to API (Data transfer from mmc to ram)
+*/
+void copy_uboot_to_ram(void)
+{
+ u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+
+ copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+}
+
+void board_init_f(unsigned long bootflag)
+{
+ __attribute__((noreturn)) void (*uboot)(void);
+ copy_uboot_to_ram();
+
+ /* Jump to U-Boot image */
+ uboot = (void *)CONFIG_SYS_TEXT_BASE;
+ (*uboot)();
+ /* Never returns Here */
+}
+
+/* Place Holders */
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+ /* Function attribute is no-return */
+ /* This Function never executes */
+ while (1)
+ ;
+}
+
+void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 67e4012..f54d7ac 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -102,6 +102,10 @@
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
+/* MMC SPL */
+#define CONFIG_SPL
+#define COPY_BL2_FNPTR_ADDR0x02020030
+
#define CONFIG_BOOTCOMMAND mmc read 40007000 451 2000; bootm 40007000
/* Miscellaneous configurable options */
@@ -178,6 +182,9 @@
#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+/* U-boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET
Re: [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support
On 02/03/12 15:38, Govindraj.R wrote:
From: Govindraj.R govindraj.r...@ti.com
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg grinb...@compulab.co.il for reviewing the
omap-ehci patches and suggesting this approach.
[1]: http://www.mail-archive.com/u-boot@lists.denx.de/msg76076.html
Tested-by: Stefano Babic sba...@denx.de
Signed-off-by: Govindraj.R govindraj.r...@ti.com
After fixing several neats below,
Acked-by: Igor Grinberg grinb...@compulab.co.il
---
doc/README.omap-ulpi-viewport | 27 +
drivers/usb/ulpi/Makefile |1 +
drivers/usb/ulpi/omap-ulpi-viewport.c | 105
+
include/configs/omap3_beagle.h|3 +
include/configs/omap4_panda.h |2 +
5 files changed, 138 insertions(+), 0 deletions(-)
create mode 100644 doc/README.omap-ulpi-viewport
create mode 100644 drivers/usb/ulpi/omap-ulpi-viewport.c
diff --git a/doc/README.omap-ulpi-viewport b/doc/README.omap-ulpi-viewport
new file mode 100644
index 000..19feecd
--- /dev/null
+++ b/doc/README.omap-ulpi-viewport
@@ -0,0 +1,27 @@
+Reference code drivers/usb/ulpi/omap-ulpi-viewport.c
+
+Contains the ulpi read write api's to perform
+any ulpi phy port access on omap platform.
+
+On omap ehci reg map contains INSNREG05_ULPI
+register which offers the ulpi phy access so
+any ulpi phy commands can be passsed using this
should be passed ^^^
+register.
+
+omap-ulpi-viewport.c is a low level function
+implementation of drivers/usb/ulpi/ulpi.c
+
+To enable and use omap-ulpi-viewport.c
+we requires CONFIG_USB_ULPI_VIEWPORT_OMAP and
s/requires/require/
+CONFIG_USB_ULPI be enabled from config file.
s/from/in/
+
+Any ulpi ops request can be done with ulpi.c
+and soc specific binding and usage is done with
+omap-ulpi-viewport implementation.
+
+Ex: scenario:
+omap-ehci driver code requests for ulpi phy reset if
+ehci is used in phy mode, which will call ulpi phy reset
+the ulpi phy reset does ulpi_read/write from viewport
+implementation which will do ulpi reset using the
+INSNREG05_ULPI register.
[...]
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c
b/drivers/usb/ulpi/omap-ulpi-viewport.c
new file mode 100644
index 000..66b1795
--- /dev/null
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
[...]
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
+{
+ u32 val = ((ulpi_vp-port_num 0x7) 24) |
+ OMAP_ULPI_WR_OPSEL | ((u32)reg 16) | (value 0xff);
On OMAP, port_num is 4 bits wide, therefore:
ulpi_vp-port_num 0xf
+
+ return ulpi_request(ulpi_vp, val);
+}
+
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
+{
+ int err;
+ u32 val = ((ulpi_vp-port_num 0x7) 24) |
+ OMAP_ULPI_WR_OPSEL | ((u32)reg 16);
same here:
ulpi_vp-port_num 0xf
+
+ err = ulpi_request(ulpi_vp, val);
+ if (err)
+ return err;
+
+ return readl(ulpi_vp-viewport_addr) 0xff;
+}
[...]
--
Regards,
Igor.
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Re: [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
Hi Igor,
On Mon, Feb 6, 2012 at 2:25 PM, Igor Grinberg grinb...@compulab.co.il wrote:
Hi Govindraj,
I was about to ask Tom to reorder the patches while applying, but
there are still several things to fix.
I'm also fine with fixing these by a follow up patch (after merging this).
[...]
[...]
diff --git a/drivers/usb/ulpi/ulpi-viewport.c
b/drivers/usb/ulpi/ulpi-viewport.c
index 490fb0e..6f03f08 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
[...]
-int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg 16) | (value 0xff);
You should utilize the port_num variable here, right?
something like:
val |= (ulpi_vp-port_num 0x7) 24;
Yes correct, Shouldn't we add something like this
[...]
#ifndef CONFIG_ULPI_PORT_SHIFT CONFIG_ULPI_PORT_MASK
#define CONFIG_ULPI_PORT_SHIFT 24
#define CONFIG_ULPI_PORT_MASK 0x7
#endif
[...]
val |= (ulpi_vp-port_num CONFIG_ULPI_PORT_MASK)
CONFIG_ULPI_PORT_SHIFT;
- return ulpi_request(ulpi_viewport, val);
+ return ulpi_request(ulpi_vp, val);
}
-u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
u32 val = ULPI_RWRUN | ((u32)reg 16);
same here
- err = ulpi_request(ulpi_viewport, val);
+ err = ulpi_request(ulpi_vp, val);
if (err)
return err;
- return (readl(ulpi_viewport) 8) 0xff;
+ return (readl(ulpi_vp-viewport_addr) 8) 0xff;
}
[...]
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 802f077..a036bab 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -28,12 +28,23 @@
#endif
/*
+ * ulpi view port address and
+ * Port_number that can be passed.
+ * Any additional data to be passed can
+ * be extended from this structure
+ */
+struct ulpi_viewport {
+ u32 viewport_addr;
+ u8 port_num;
+};
haven't we aggreed, that this will be:
u32 port_num;
My bad I missed this will correct now.
?
+
+/*
* Initialize the ULPI transciever and check the interface integrity.
- * @ulpi_viewport - the address of the ULPI viewport register.
+ * @ulpi_viewport - structure containing ULPI viewport data
This is ulpi_vp now.
will correct this.
--
Thanks,
Govindraj.R
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[U-Boot] [PATCH] davinci: cleanup davinci_sync_env_enetaddr() fucntion
check for the return status for eth_getenv_enetaddr_by_index()
and eth_setenv_enetaddr() functions and print appropriate message
on failure. Also convert debug message to printf().
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/cpu/arm926ejs/davinci/misc.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/misc.c
b/arch/arm/cpu/arm926ejs/davinci/misc.c
index 5f510b6..3036e8a 100644
--- a/arch/arm/cpu/arm926ejs/davinci/misc.c
+++ b/arch/arm/cpu/arm926ejs/davinci/misc.c
@@ -101,18 +101,22 @@ void davinci_emac_mii_mode_sel(int mode_sel)
void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
{
uint8_t env_enetaddr[6];
+ int ret;
- eth_getenv_enetaddr_by_index(eth, 0, env_enetaddr);
- if (!memcmp(env_enetaddr, \0\0\0\0\0\0, 6)) {
+ ret = eth_getenv_enetaddr_by_index(eth, 0, env_enetaddr);
+ if (ret !memcmp(env_enetaddr, \0\0\0\0\0\0, 6)) {
/*
* There is no MAC address in the environment, so we
* initialize it from the value in the EEPROM.
*/
- debug(### Setting environment from EEPROM MAC address =
+ printf(### Setting environment from EEPROM MAC address =
\%pM\\n,
env_enetaddr);
- eth_setenv_enetaddr(ethaddr, rom_enetaddr);
+ ret = !eth_setenv_enetaddr(ethaddr, rom_enetaddr);
}
+ if (!ret)
+ printf(Failed to set mac address from EEPROM\n);
+
}
#endif /* CONFIG_DRIVER_TI_EMAC */
--
1.6.2.4
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Re: [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
On 02/06/12 11:38, Govindraj wrote:
Hi Igor,
On Mon, Feb 6, 2012 at 2:25 PM, Igor Grinberg grinb...@compulab.co.il wrote:
Hi Govindraj,
I was about to ask Tom to reorder the patches while applying, but
there are still several things to fix.
I'm also fine with fixing these by a follow up patch (after merging this).
[...]
[...]
diff --git a/drivers/usb/ulpi/ulpi-viewport.c
b/drivers/usb/ulpi/ulpi-viewport.c
index 490fb0e..6f03f08 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
[...]
-int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg 16) | (value
0xff);
You should utilize the port_num variable here, right?
something like:
val |= (ulpi_vp-port_num 0x7) 24;
Yes correct, Shouldn't we add something like this
[...]
#ifndef CONFIG_ULPI_PORT_SHIFT CONFIG_ULPI_PORT_MASK
#define CONFIG_ULPI_PORT_SHIFT 24
#define CONFIG_ULPI_PORT_MASK 0x7
#endif
[...]
val |= (ulpi_vp-port_num CONFIG_ULPI_PORT_MASK)
CONFIG_ULPI_PORT_SHIFT;
We have already discussed this in the previous session [1]
And the conclusion was to use plain values instead,
because otherwise, you should replace all other masks and shifts...
and that will be a mess...
IMO,
(ulpi_vp-port_num 0x7) 24;
is really self explanatory and intuitive, so replacing it with defines
just make the code look bad and split into multiple lines.
Also the values are viewport specific and will not change, so
there is no reason to make them a config option.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/124222
- return ulpi_request(ulpi_viewport, val);
+ return ulpi_request(ulpi_vp, val);
}
-u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
u32 val = ULPI_RWRUN | ((u32)reg 16);
same here
- err = ulpi_request(ulpi_viewport, val);
+ err = ulpi_request(ulpi_vp, val);
if (err)
return err;
- return (readl(ulpi_viewport) 8) 0xff;
+ return (readl(ulpi_vp-viewport_addr) 8) 0xff;
}
[...]
--
Regards,
Igor.
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[U-Boot] [PATCH v2 1/2] davinci: remove macro CONFIG_DISPLAY_CPUINFO
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer
required. This is because clock info will be printed as part
'bdinfo' command and also remove support print_cpuinfo() as it will
no longer be called.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 44
include/configs/cam_enc_4xx.h |1 -
include/configs/davinci_dm355evm.h |1 -
include/configs/davinci_dm355leopard.h |1 -
include/configs/davinci_dm6467Tevm.h |1 -
include/configs/davinci_dm6467evm.h|1 -
include/configs/davinci_dvevm.h|1 -
include/configs/davinci_schmoogie.h|1 -
include/configs/davinci_sffsdr.h |1 -
include/configs/davinci_sonata.h |1 -
include/configs/enbw_cmc.h |1 -
11 files changed, 0 insertions(+), 54 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c
b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index 9ea9785..173 100644
--- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
@@ -115,21 +115,8 @@ int clk_get(enum davinci_clk_ids id)
out:
return pll_out;
}
-#ifdef CONFIG_DISPLAY_CPUINFO
-int print_cpuinfo(void)
-{
- printf(Cores: ARM %d MHz,
- clk_get(DAVINCI_ARM_CLKID) / 100);
- printf(\nDDR: %d MHz\n,
- /* DDR PHY uses an x2 input clock */
- clk_get(0x10001) / 100);
- return 0;
-}
-#endif
#else /* CONFIG_SOC_DA8XX */
-#ifdef CONFIG_DISPLAY_CPUINFO
-
static unsigned pll_div(volatile void *pllbase, unsigned offset)
{
u32 div;
@@ -185,36 +172,6 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned
div)
return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div));
}
-int print_cpuinfo(void)
-{
- /* REVISIT fetch and display CPU ID and revision information
-* too ... that will matter as more revisions appear.
-*/
-#if defined(CONFIG_SOC_DM365)
- printf(Cores: ARM %d MHz,
- pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, ARM_PLLDIV));
-#else
- printf(Cores: ARM %d MHz,
- pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV));
-#endif
-
-#ifdef DSP_PLLDIV
- printf(, DSP %d MHz,
- pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV));
-#endif
-
- printf(\nDDR: %d MHz\n,
- /* DDR PHY uses an x2 input clock */
-#if defined(CONFIG_SOC_DM365)
- pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DDR_PLLDIV)
- / 2);
-#else
- pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV)
- / 2);
-#endif
- return 0;
-}
-
#ifdef DAVINCI_DM6467EVM
unsigned int davinci_arm_clk_get()
{
@@ -228,7 +185,6 @@ unsigned int davinci_clk_get(unsigned int div)
return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 100;
}
#endif
-#endif /* CONFIG_DISPLAY_CPUINFO */
#endif /* !CONFIG_SOC_DA8XX */
/*
diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index a21d448..419cfd4 100644
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -257,7 +257,6 @@
#define CONFIG_POSTCONFIG_SYS_POST_MEMORY
#define _POST_WORD_ADDR0x0
-#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_INIT_SP_ADDRCONFIG_SPL_STACK
diff --git a/include/configs/davinci_dm355evm.h
b/include/configs/davinci_dm355evm.h
index ddf673c..8578730 100644
--- a/include/configs/davinci_dm355evm.h
+++ b/include/configs/davinci_dm355evm.h
@@ -26,7 +26,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SYS_NO_FLASH/* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
diff --git a/include/configs/davinci_dm355leopard.h
b/include/configs/davinci_dm355leopard.h
index dfa0a00..eaff66e 100644
--- a/include/configs/davinci_dm355leopard.h
+++ b/include/configs/davinci_dm355leopard.h
@@ -25,7 +25,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SYS_NO_FLASH/* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
diff --git a/include/configs/davinci_dm6467Tevm.h
b/include/configs/davinci_dm6467Tevm.h
index b3a4e44..f7c994e 100644
--- a/include/configs/davinci_dm6467Tevm.h
+++ b/include/configs/davinci_dm6467Tevm.h
@@ -23,7 +23,6 @@
/* Spectrum Digital TMS320DM6467T EVM board */
#define DAVINCI_DM6467EVM
#define DAVINCI_DM6467TEVM
-#define CONFIG_DISPLAY_CPUINFO
#define
[U-Boot] [PATCH v2 2/2] davinci: add support for printing clock frequency
add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 32
arch/arm/include/asm/u-boot.h |3 +++
arch/arm/lib/board.c | 10 +-
common/cmd_bdinfo.c|9 +
include/common.h |1 +
include/configs/cam_enc_4xx.h |4
include/configs/da830evm.h |4
include/configs/da850evm.h |4
include/configs/davinci_dm355evm.h |4
include/configs/davinci_dm355leopard.h |4
include/configs/davinci_dm365evm.h |4
include/configs/davinci_dm6467Tevm.h |4
include/configs/davinci_dm6467evm.h|4
include/configs/davinci_dvevm.h|5 +
include/configs/davinci_schmoogie.h|4
include/configs/davinci_sffsdr.h |4
include/configs/davinci_sonata.h |4
include/configs/ea20.h |4
include/configs/enbw_cmc.h |4
include/configs/hawkboard.h|4
20 files changed, 115 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c
b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index 173..b3c9fb7 100644
--- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
@@ -25,6 +25,8 @@
#include asm/arch/hardware.h
#include asm/io.h
+DECLARE_GLOBAL_DATA_PTR;
+
/* offsets from PLL controller base */
#define PLLC_PLLCTL0x100
#define PLLC_PLLM 0x110
@@ -187,6 +189,36 @@ unsigned int davinci_clk_get(unsigned int div)
#endif
#endif /* !CONFIG_SOC_DA8XX */
+int set_cpu_clk_info(void)
+{
+#ifdef CONFIG_SOC_DA8XX
+ gd-bd-bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 100;
+ /* DDR PHY uses an x2 input clock */
+ gd-bd-bi_ddr_freq = clk_get(0x10001) / 100;
+#else
+
+ unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE;
+#if defined(CONFIG_SOC_DM365)
+ pllbase = DAVINCI_PLL_CNTRL1_BASE;
+#endif
+ gd-bd-bi_arm_freq = pll_sysclk_mhz(pllbase, ARM_PLLDIV);
+
+#ifdef DSP_PLLDIV
+ gd-bd-bi_dsp_freq =
+ pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV);
+#else
+ gd-bd-bi_dsp_freq = 0;
+#endif
+
+ pllbase = DAVINCI_PLL_CNTRL1_BASE;
+#if defined(CONFIG_SOC_DM365)
+ pllbase = DAVINCI_PLL_CNTRL0_BASE;
+#endif
+ gd-bd-bi_ddr_freq = pll_sysclk_mhz(pllbase, DDR_PLLDIV) / 2;
+#endif
+ return 0;
+}
+
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h
index f30b9fc..20e1653 100644
--- a/arch/arm/include/asm/u-boot.h
+++ b/arch/arm/include/asm/u-boot.h
@@ -41,6 +41,9 @@ typedef struct bd_info {
unsigned long bi_ip_addr; /* IP Address */
ulong bi_arch_number; /* unique id for this board */
ulong bi_boot_params; /* where this board expects params */
+ unsigned long bi_arm_freq; /* arm frequency */
+ unsigned long bi_dsp_freq; /* dsp core frequency */
+ unsigned long bi_ddr_freq; /* ddr frequency */
struct /* RAM configuration */
{
ulong start;
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 3d78274..500e216 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -463,7 +463,15 @@ void board_init_r(gd_t *id, ulong dest_addr)
debug(monitor flash len: %08lX\n, monitor_flash_len);
board_init(); /* Setup chipselects */
-
+ /*
+* TODO: printing of the clock inforamtion of the board is now
+* implemented as part of bdinfo command. Currently only support for
+* davinci SOC's is added. Remove this check once all the board
+* implement this.
+*/
+#ifdef CONFIG_CLOCKS
+ set_cpu_clk_info(); /* Setup clock information */
+#endif
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 97f2945..5359a47 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -370,6 +370,15 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
print_num(irq_sp, gd-irq_sp);/* irq stack pointer */
print_num(sp start , gd-start_addr_sp);
print_num(FB base , gd-fb_base);
+ /*
+* TODO: Currently only support for davinci SOC's is added.
+* Remove this check once all the board implement this.
+*/
+#ifdef CONFIG_CLOCKS
+ printf(ARM frequency = %ld MHz\n, gd-bd-bi_arm_freq);
+ printf(DSP frequency = %ld MHz\n, gd-bd-bi_dsp_freq);
+ printf(DDR frequency = %ld MHz\n, gd-bd-bi_ddr_freq);
[U-Boot] [PATCH v2 0/2] add support for printing of clock information as part of 'bdinfo' command
This patch series adds support for printing of clock information as part of 'bdinfo' command. Support for printing CPU, DSP core and DDR frequency is added. Also, support for printing frequency info during u-boot initialization is removed as it will delay u-boot coming up. Changes from previous version: 1: Add support for printing clock information as part of bdinfo command instead of custom command, so that all architectures can have benefit of it. Manjunath Hadli (2): davinci: remove macro CONFIG_DISPLAY_CPUINFO davinci: add support for printing clock frequency arch/arm/cpu/arm926ejs/davinci/cpu.c | 76 +-- arch/arm/include/asm/u-boot.h |3 + arch/arm/lib/board.c | 10 - common/cmd_bdinfo.c|9 include/common.h |1 + include/configs/cam_enc_4xx.h |5 ++- include/configs/da830evm.h |4 ++ include/configs/da850evm.h |4 ++ include/configs/davinci_dm355evm.h |5 ++- include/configs/davinci_dm355leopard.h |5 ++- include/configs/davinci_dm365evm.h |4 ++ include/configs/davinci_dm6467Tevm.h |5 ++- include/configs/davinci_dm6467evm.h|5 ++- include/configs/davinci_dvevm.h|6 ++- include/configs/davinci_schmoogie.h|5 ++- include/configs/davinci_sffsdr.h |5 ++- include/configs/davinci_sonata.h |5 ++- include/configs/ea20.h |4 ++ include/configs/enbw_cmc.h |5 ++- include/configs/hawkboard.h|4 ++ 20 files changed, 115 insertions(+), 55 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/5] net: fec_mxc: add 1000 Mbps selection
On 03/02/2012 01:22, Troy Kisky wrote:
Define CONFIG_FEC_QUIRK_ENET_MAC and add to
board files mx6qarm2 and mx6qsabrelite.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Dirk Behme dirk.be...@de.bosch.com
---
drivers/net/fec_mxc.c | 21 +++--
drivers/net/fec_mxc.h |2 ++
include/configs/mx6qarm2.h |1 +
include/configs/mx6qsabrelite.h |1 +
4 files changed, 23 insertions(+), 2 deletions(-)
This patch series is against Stefano's u-boot-imx
Patches 2/3 and 5 have changes from version 3
Hi Troy,
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index ed73353..7c42b87 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -379,13 +379,14 @@ static int fec_set_hwaddr(struct eth_device *dev)
static int fec_open(struct eth_device *edev)
{
struct fec_priv *fec = (struct fec_priv *)edev-priv;
+ int speed;
debug(fec_open: fec_open(dev)\n);
/* full-duplex, heartbeat disabled */
writel(1 2, fec-eth-x_cntrl);
fec-rbd_index = 0;
-#if defined(CONFIG_MX6Q)
+#ifdef CONFIG_FEC_QUIRK_ENET_MAC
/* Enable ENET HW endian SWAP */
writel(readl(fec-eth-ecntrl) | FEC_ECNTRL_DBSWAP,
fec-eth-ecntrl);
@@ -428,9 +429,25 @@ static int fec_open(struct eth_device *edev)
#endif
miiphy_wait_aneg(edev);
- miiphy_speed(edev-name, fec-phy_id);
+ speed = miiphy_speed(edev-name, fec-phy_id);
miiphy_duplex(edev-name, fec-phy_id);
+#ifdef CONFIG_FEC_QUIRK_ENET_MAC
+ {
It seems to me that QUIRK_ENET_MAC depends on the SOC, and not on the
boards. All imx6 boards must set it. If this is right, what about to put
this setup (as FEC_QUIRK_ENET_MAC) inside the imx-regs.h file ? All imx6
boards will automatically use it.
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
=
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Re: [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c
On 02/03/12 15:38, Govindraj.R wrote:
From: Govindraj.R govindraj.r...@ti.com
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Some final neats below, otherwise:
Acked-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/include/asm/arch-omap3/ehci.h | 55 +++
arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 ---
arch/arm/include/asm/arch-omap4/ehci.h | 49 ++
arch/arm/include/asm/ehci-omap.h | 148 ++
drivers/usb/host/ehci-omap.c | 212
+++---
5 files changed, 408 insertions(+), 114 deletions(-)
create mode 100644 arch/arm/include/asm/arch-omap3/ehci.h
delete mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h
create mode 100644 arch/arm/include/asm/arch-omap4/ehci.h
create mode 100644 arch/arm/include/asm/ehci-omap.h
[...]
diff --git a/arch/arm/include/asm/ehci-omap.h
b/arch/arm/include/asm/ehci-omap.h
new file mode 100644
index 000..c99ac20
--- /dev/null
+++ b/arch/arm/include/asm/ehci-omap.h
[...]
+
+/* ULPI */
+#define ULPI_SET(a) (a + 1)
+#define ULPI_CLR(a) (a + 2)
+#define ULPI_FUNC_CTRL 0x04
+#define ULPI_FUNC_CTRL_RESET (1 5)
The above should be removed as it is not used anymore.
+
+struct omap_usbhs_board_data {
+ enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
+};
+
+struct omap_usbtll {
+ u32 rev;/* 0x00 */
+ u32 hwinfo; /* 0x04 */
+ u8 reserved1[0x8];
Are you sure you want this to be an array of bytes instead of
register (u32) wide fields?
IMO,
u32 reserved1[2];
looks much better than:
u8 reserved1[0x8];
and does not have alignment issues, but if you think u8 is better,
I will not object.
+ u32 sysc; /* 0x10 */
+ u32 syss; /* 0x14 */
+ u32 irqst; /* 0x18 */
+ u32 irqen; /* 0x1c */
+ u8 reserved2[0x10];
+ u32 shared_conf;/* 0x30 */
+ u8 reserved3[0xc];
+ u32 channel_conf; /* 0x40 */
+};
+
+struct omap_uhh {
+ u32 rev;/* 0x00 */
+ u32 hwinfo; /* 0x04 */
+ u8 reserved1[0x8];
+ u32 sysc; /* 0x10 */
+ u32 syss; /* 0x14 */
+ u8 reserved2[0x28];
+ u32 hostconfig; /* 0x40 */
+ u32 debugcsr; /* 0x44 */
+};
+
+struct omap_ehci {
+ u32 hccapbase; /* 0x00 */
+ u32 hcsparams; /* 0x04 */
+ u32 hccparams; /* 0x08 */
+ u8 reserved1[0x04];
+ u32 usbcmd; /* 0x10 */
+ u32 usbsts; /* 0x14 */
+ u32 usbintr;/* 0x18 */
+ u32 frindex;/* 0x1c */
+ u32 ctrldssegment; /* 0x20 */
+ u32 periodiclistbase; /* 0x24 */
+ u32 asysnclistaddr; /* 0x28 */
+ u8 reserved2[0x24];
+ u32 configflag; /* 0x50 */
+ u32 portsc_i; /* 0x54 */
+ u8 reserved3[0x38];
+ u32 insreg00; /* 0x90 */
+ u32 insreg01; /* 0x94 */
+ u32 insreg02; /* 0x98 */
+ u32 insreg03; /* 0x9c */
+ u32 insreg04; /* 0xa0 */
+ u32 insreg05_utmi_ulpi; /* 0xa4 */
+ u32 insreg06; /* 0xa8 */
+ u32 insreg07; /* 0xac */
+ u32 insreg08; /* 0xb0 */
+};
+
+int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata);
+int omap_ehci_hcd_stop(void);
+
+#endif /* _OMAP_COMMON_EHCI_H_ */
[...]
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 93d3bb7..89c3c3a 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
[...]
+static void omap_ehci_soft_phy_reset(int port)
+{
+ struct ulpi_viewport ulpi_vp;
+
+ ulpi_vp.viewport_addr = (u32)ehci-insreg05_utmi_ulpi;
+ ulpi_vp.port_num = port;
+
+ ulpi_reset(ulpi_vp);
+
no need for the empty line here
+}
+
[...]
/*
- * Initialize the OMAP3 EHCI controller and PHY.
- * Based on drivers/usb/host/ehci-omap.c from Linux 2.6.37.
+ * Initialize the OMAP EHCI controller and PHY.
+ * Based on drivers/usb/host/ehci-omap.c from Linux 3.1
* See there for additional Copyrights.
*/
-int ehci_hcd_init(void)
+int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata)
{
- int
[U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
Thumb is an alternate instruction set available in many ARM processors. Below is a detailed description from ARM specs: The Thumb instruction set is a re-encoded subset of the ARM instruction set. Thumb instructions execute in their own processor state, with the architecture defining the mechanisms required to transition between ARM and Thumb states. The key difference is that Thumb instructions are half the size of ARM instructions(16 bits compared with 32 bits). Greater code density can usually be achieved by using the Thumb instruction set in preference to the ARM instruction set, at a cost of some reduction in performance In ARMv6T2, Thumb-2 technology is introduced. This technology makes it possible to extend the original Thumb instruction set with many 32-bit instructions. The range of 32-bit Thumb instructions included in ARMv6T2 permits Thumb code to achieve performance similar to ARM code, with code density better than that of earlier Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide almost identical functionality This series adds Thumb support in U-Boot and enables it for OMAP4. It also fixes issues faced while booting OMAP4 with Thumb-2 images of U-Boot and SPL. Thumb mode is becoming increasingly relevant for U-Boot with the advent of SPL. It's very important to keep SPL size smaller considering the internal RAM size constraints on many platforms. On OMAP4 the size reduction enables us to use SPL on secure devices that have smaller internal RAM available for non-secure world. I would request all who are interested in this feature to test it and give feedback. To make that easier I have pushed my patches here (along with the timer patch from Nicolas that fixes boot on OMAP4): g...@github.com:aneeshv/u-boot.git branch: thumb To enable support for new platforms you just need to add CONFIG_SYS_THUMB_BUILD in your config file. Aneesh V (4): ARM: enable Thumb build OMAP3+: fix issues with Thumb build OMAP3+: Use -march=armv7-a and thereby enable Thumb-2 OMAP4: enable Thumb build README |9 +++ arch/arm/config.mk | 29 ++-- arch/arm/cpu/armv7/cpu.c |4 ++- arch/arm/cpu/armv7/omap-common/config.mk |1 - arch/arm/cpu/armv7/omap-common/hwinit-common.c | 25 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |4 +- arch/arm/cpu/armv7/omap3/config.mk |2 + arch/arm/cpu/armv7/omap4/config.mk |2 + include/configs/omap4_common.h |2 + 9 files changed, 62 insertions(+), 16 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build
Enable Thumb build and ARM-Thumb interworking based on the new config flag CONFIG_SYS_THUMB_BUILD Signed-off-by: Aneesh V ane...@ti.com --- README |9 + arch/arm/config.mk | 29 + 2 files changed, 26 insertions(+), 12 deletions(-) diff --git a/README b/README index 9d713e8..dfe7fb3 100644 --- a/README +++ b/README @@ -420,6 +420,15 @@ The following options need to be configured: XWAY SoCs for booting from NOR flash. The U-Boot image needs to be swapped if a flash programmer is used. +- ARM Options: + CONFIG_SYS_THUMB_BUILD + + Use this flag to build U-Boot using the Thumb instruction + set for ARM architectures. Thumb instruction set provides + better code density. For ARM architectures that support + Thumb2 this flag will result in Thumb2 code generated by + GCC. + - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 45f9dca..9a450d7 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -33,26 +33,31 @@ endif PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: -PF_CPPFLAGS_ARM := $(call cc-option,-marm,) +# Choose between ARM/Thumb instruction sets +ifeq ($(CONFIG_SYS_THUMB_BUILD),y) +PF_CPPFLAGS_ARM += $(call cc-option, -mthumb -mthumb-interwork, \ + -marm -mno-thumb-interwork) +else +PF_CPPFLAGS_ARM += $(call cc-option, -marm -mno-thumb-interwork) +endif # Try if EABI is supported, else fall back to old API, # i. e. for example: # - with ELDK 4.2 (EABI supported), use: -# -mabi=aapcs-linux -mno-thumb-interwork +# -mabi=aapcs-linux # - with ELDK 4.1 (gcc 4.x, no EABI), use: -# -mabi=apcs-gnu -mno-thumb-interwork +# -mabi=apcs-gnu # - with ELDK 3.1 (gcc 3.x), use: -# -mapcs-32 -mno-thumb-interwork -PF_CPPFLAGS_ABI := $(call cc-option,\ - -mabi=aapcs-linux -mno-thumb-interwork,\ - $(call cc-option,\ - -mapcs-32,\ +# -mapcs-32 +PLATFORM_CPPFLAGS += $(call cc-option,\ + -mabi=aapcs-linux,\ $(call cc-option,\ - -mabi=apcs-gnu,\ + -mapcs-32,\ + $(call cc-option,\ + -mabi=apcs-gnu,\ + )\ )\ - ) $(call cc-option,-mno-thumb-interwork,)\ - ) + ) PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI) # For EABI, make sure to provide raise() -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH 2/4] OMAP3+: fix issues with Thumb build
When U-Boot/SPL is built using the Thumb instruction set the
toolchain has a potential issue with weakly linked symbols.
If a function has a weakly linked default implementation in C
and a real implementation in assembly GCC is confused about the
instruction set of the assembly implementation. As a result
the assembly function that is built in ARM is executed as
if it is Thumb. This results in a crash.
We need to investigate further to see if this is a toolchain
issue or an issue with our usage of it. In the meanwhile, we
can workaround the issue by having both the weakly linked alias
and the real implementation in C.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cpu.c |4 ++-
arch/arm/cpu/armv7/omap-common/hwinit-common.c | 25
arch/arm/cpu/armv7/omap-common/lowlevel_init.S |4 +-
3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 662c496..3844556 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -37,8 +37,10 @@
#include asm/cache.h
#include asm/armv7.h
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
+void __attribute__((naked)) save_boot_params_default(u32 r0, u32 r1,
+ u32 r2, u32 r3)
{
+ asm volatile (blx lr);
}
void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index ab46bff..16dfbed 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -237,3 +237,28 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+/*
+ * This function is a wrapper to do_save_boot_params that does the
+ * real implementation of the functionality. 'do_save_boot_params()' is
+ * implemented in assembly because this is called very early in the boot
+ * when stack is not available. We had to wrap it around in this 'naked'
+ * C function because of a potential issue with the tool-chain.
+ *
+ * When U-Boot/SPL is built using the Thumb instruction set compiler
+ * potential issue with weakly linked symbols. If a function has a weakly
+ * linked default implementation in C and a real implementation in assembly
+ * GCC is confused about the instruction set of the assembly implementation
+ * As a result the assembly function that is built in ARM is executed as
+ * if it is Thumb. This results in a crash. The solution (or workaround)
+ * is to have both the weakly linked alias and the real implementation
+ * in C.
+ *
+ * This function runs without a valid stack. So, never try to use a stack
+ * or any other fancy stuff.
+ */
+void __attribute__((naked)) save_boot_params(u32 r0, u32 r1, u32 r2, u32 r4)
+{
+ asm volatile (ldr r12, =do_save_boot_params);
+ asm volatile (bx r12);
+}
diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
index 35f38ac..38ca054 100644
--- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -28,8 +28,8 @@
#include asm/arch/omap.h
-.global save_boot_params
-save_boot_params:
+.global do_save_boot_params
+do_save_boot_params:
/*
* See if the rom code passed pointer is valid:
* It is not valid if it is not in non-secure SRAM
--
1.7.1
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[U-Boot] [RFC PATCH 3/4] OMAP3+: Use -march=armv7-a and thereby enable Thumb-2
Enable -march=armv7-a for OMAP3+ platforms. This in turn results in Thumb-2 code generated for these platforms if CONFIG_SYS_THUMB_BUILD is enabled. Signed-off-by: Aneesh V ane...@ti.com --- arch/arm/cpu/armv7/omap-common/config.mk |1 - arch/arm/cpu/armv7/omap3/config.mk |2 ++ arch/arm/cpu/armv7/omap4/config.mk |2 ++ 3 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/config.mk b/arch/arm/cpu/armv7/omap-common/config.mk index c400dcc..2a1a5f3 100644 --- a/arch/arm/cpu/armv7/omap-common/config.mk +++ b/arch/arm/cpu/armv7/omap-common/config.mk @@ -23,7 +23,6 @@ PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float # Make ARMv5 to allow more compilers to work, even though its v7a. -PLATFORM_CPPFLAGS += -march=armv5 # = # # Supply options according to compiler version diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk index b34fa64..4421fe2 100644 --- a/arch/arm/cpu/armv7/omap3/config.mk +++ b/arch/arm/cpu/armv7/omap3/config.mk @@ -28,3 +28,5 @@ ALL-y += $(OBJTREE)/MLO else ALL-y += $(obj)u-boot.img endif + +PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5) diff --git a/arch/arm/cpu/armv7/omap4/config.mk b/arch/arm/cpu/armv7/omap4/config.mk index b34fa64..4421fe2 100644 --- a/arch/arm/cpu/armv7/omap4/config.mk +++ b/arch/arm/cpu/armv7/omap4/config.mk @@ -28,3 +28,5 @@ ALL-y += $(OBJTREE)/MLO else ALL-y += $(obj)u-boot.img endif + +PLATFORM_CPPFLAGS += $(call cc-option, -march=armv7-a, -march=armv5) -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH 4/4] OMAP4: enable Thumb build
Signed-off-by: Aneesh V ane...@ti.com --- include/configs/omap4_common.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index a989721..01b4d6c 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -287,4 +287,6 @@ #define CONFIG_SYS_ENABLE_PADS_ALL +#define CONFIG_SYS_THUMB_BUILD + #endif /* __CONFIG_OMAP4_COMMON_H */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
On 02/03/12 15:38, Govindraj.R wrote:
From: Govindraj.R govindraj.r...@ti.com
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Acked-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/cpu/armv7/omap3/board.c|4
arch/arm/cpu/armv7/omap3/clock.c| 20
arch/arm/cpu/armv7/omap4/clocks.c |5 +
arch/arm/include/asm/arch-omap3/sys_proto.h |1 +
4 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c
b/arch/arm/cpu/armv7/omap3/board.c
index 871aa37..054e9c4 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -228,6 +228,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_USB_EHCI_OMAP
+ ehci_clocks_enable();
+#endif
Just a question (not blocking):
I would really like to see this being a part of usb start call some day...
Can't this be called from omap_ehci_hcd_init()?
+
#ifdef CONFIG_SPL_BUILD
preloader_console_init();
diff --git a/arch/arm/cpu/armv7/omap3/clock.c
b/arch/arm/cpu/armv7/omap3/clock.c
index e0d65c7..567817e 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -626,6 +626,26 @@ void prcm_init(void)
sdelay(5000);
}
+/*
+ * Enable usb ehci uhh, tll clocks
+ */
+void ehci_clocks_enable(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+ /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
+ sr32(prcm_base-iclken_usbhost, 0, 1, 1);
+ /*
+ * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
+ * and USBHOST_120M_FCLK (USBHOST_FCLK2)
+ */
+ sr32(prcm_base-fclken_usbhost, 0, 2, 3);
+ /* Enable USBTTL_ICLK */
+ sr32(prcm_base-iclken3_core, 2, 1, 1);
+ /* Enable USBTTL_FCLK */
+ sr32(prcm_base-fclken3_core, 2, 1, 1);
+}
+
/**
* peripheral_enable() - Enable the clks power for perifs (GPT2, UART1,...)
*/
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c
b/arch/arm/cpu/armv7/omap4/clocks.c
index 0886f92..12e283a 100644
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -342,6 +342,9 @@ void enable_basic_clocks(void)
prcm-cm_l4per_gpio4_clkctrl,
prcm-cm_l4per_gpio5_clkctrl,
prcm-cm_l4per_gpio6_clkctrl,
+ prcm-cm_l3init_usbphy_clkctrl,
+ prcm-cm_clksel_usb_60mhz,
+ prcm-cm_l3init_hsusbtll_clkctrl,
0
};
@@ -352,6 +355,8 @@ void enable_basic_clocks(void)
prcm-cm_l4per_gptimer2_clkctrl,
prcm-cm_wkup_wdtimer2_clkctrl,
prcm-cm_l4per_uart3_clkctrl,
+ prcm-cm_l3init_fsusb_clkctrl,
+ prcm-cm_l3init_hsusbhost_clkctrl,
0
};
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h
b/arch/arm/include/asm/arch-omap3/sys_proto.h
index e5031d5..2a89e56 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -34,6 +34,7 @@ struct emu_hal_params {
void prcm_init(void);
void per_clocks_enable(void);
+void ehci_clocks_enable(void);
void memif_init(void);
void sdrc_init(void);
--
Regards,
Igor.
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Re: [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
On Mon, Feb 6, 2012 at 5:12 PM, Igor Grinberg grinb...@compulab.co.il wrote: On 02/03/12 15:38, Govindraj.R wrote: From: Govindraj.R govindraj.r...@ti.com Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework. Signed-off-by: Govindraj.R govindraj.r...@ti.com Acked-by: Igor Grinberg grinb...@compulab.co.il --- arch/arm/cpu/armv7/omap3/board.c | 4 arch/arm/cpu/armv7/omap3/clock.c | 20 arch/arm/cpu/armv7/omap4/clocks.c | 5 + arch/arm/include/asm/arch-omap3/sys_proto.h | 1 + 4 files changed, 30 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 871aa37..054e9c4 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -228,6 +228,10 @@ void s_init(void) per_clocks_enable(); +#ifdef CONFIG_USB_EHCI_OMAP + ehci_clocks_enable(); +#endif Just a question (not blocking): I would really like to see this being a part of usb start call some day... Can't this be called from omap_ehci_hcd_init()? But its better to have it part of clock framework. on omap4 I have added this part of enabling essential clocks done part of clock framework. arch/arm/cpu/armv7/omap[4/5]/clocks.c = arch/arm/cpu/armv7/omap-common/clocks-common.c but on omap3 we don't seem to use clocks common. so I have just used this function. on omap4/5 clocks.c makes things simpler for us. (re-use the same rather to complicate with our funcs) -- Thanks, Govindraj.R ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] MX35: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
MX5/MX6 have not yet implemented.
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm1136/mx35/timer.c | 103 +++--
1 files changed, 64 insertions(+), 39 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c
b/arch/arm/cpu/arm1136/mx35/timer.c
index 80c0675..04937a1 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -25,7 +25,14 @@
#include common.h
#include asm/io.h
+#include div64.h
#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp (gd-tbl)
+#define lastinc(gd-lastinc)
/* General purpose timers bitfields */
#define GPTCR_SWR (115)/* Software reset */
@@ -33,7 +40,24 @@
#define GPTCR_CLKSOURCE_32 (0x1006)/* Clock source */
#define GPTCR_CLKSOURCE_IPG (0x0016) /* Clock source */
#define GPTCR_TEN (1)/* Timer enable */
-#define GPTPR_VAL (66)
+
+#defineTIMER_FREQ_HZ mxc_get_clock(MXC_IPG_CLK)
+
+static inline unsigned long long tick_to_time(unsigned long long tick)
+{
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, TIMER_FREQ_HZ);
+
+ return tick;
+}
+
+static inline unsigned long long us_to_tick(unsigned long long usec)
+{
+ usec *= TIMER_FREQ_HZ;
+ do_div(usec, 100);
+
+ return usec;
+}
int timer_init(void)
{
@@ -45,7 +69,7 @@ int timer_init(void)
for (i = 0; i 100; i++)
writel(0, gpt-ctrl); /* We have no udelay by now */
- writel(GPTPR_VAL, gpt-pre);
+ writel(0, gpt-pre);
/* Freerun Mode, PERCLK1 input */
writel(readl(gpt-ctrl) |
GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
@@ -54,58 +78,59 @@ int timer_init(void)
return 0;
}
-void reset_timer_masked(void)
+unsigned long long get_ticks(void)
{
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
-
- writel(0, gpt-ctrl);
- /* Freerun Mode, PERCLK1 input */
- writel(GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
- gpt-ctrl);
+ ulong now = readl(gpt-counter); /* current tick value */
+
+ if (now = lastinc) {
+ /*
+* normal mode (non roll)
+* move stamp forward with absolut diff ticks
+*/
+ timestamp += (now - lastinc);
+ } else {
+ /* we have rollover of incrementer */
+ timestamp += (0x - lastinc) + now;
+ }
+ lastinc = now;
+ return timestamp;
}
-inline ulong get_timer_masked(void)
+ulong get_timer_masked(void)
{
-
- struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
- ulong val = readl(gpt-counter);
-
- return val;
+ /*
+* get_ticks() returns a long long (64 bit), it wraps in
+* 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
+* 5 * 10^6 days - long enough.
+*/
+ return tick_to_time(get_ticks());
}
ulong get_timer(ulong base)
{
- ulong tmp;
+ return get_timer_masked() - base;
+}
- tmp = get_timer_masked();
+/* delay x useconds AND preserve advance timstamp value */
+void __udelay(unsigned long usec)
+{
+ unsigned long long tmp;
+ ulong tmo;
- if (tmp = (base * 1000)) {
- /* Overflow */
- tmp += (0x - base);
- }
+ tmo = us_to_tick(usec);
+ tmp = get_ticks() + tmo;/* get current timestamp */
- return (tmp / 1000) - base;
+ while (get_ticks() tmp) /* loop till event */
+/*NOP*/;
}
/*
- * delay x useconds AND preserve advance timstamp value
- * GPTCNT is now supposed to tick 1 by 1 us.
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
*/
-void __udelay(unsigned long usec)
+ulong get_tbclk(void)
{
- ulong tmp;
-
- tmp = get_timer_masked(); /* get current timestamp */
-
- /* if setting this forward will roll time stamp */
- if ((usec + tmp + 1) tmp) {
- /* reset advancing timestamp to 0, set lastinc value */
- reset_timer_masked();
- } else {
- /* else, set advancing stamp wake up time */
- tmp += usec;
- }
-
- while (get_timer_masked() tmp)/* loop till event */
-/*NOP*/;
+ return TIMER_FREQ_HZ;
}
--
1.7.5.4
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[U-Boot] [PATCH 2/3] MX31: add missing get_tbclk()
Signed-off-by: Stefano Babic sba...@denx.de
CC: Helmut Raiger helmut.rai...@hale.at
---
arch/arm/cpu/arm1136/mx31/timer.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c
b/arch/arm/cpu/arm1136/mx31/timer.c
index f494440..72081a8 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -153,6 +153,15 @@ void __udelay(unsigned long usec)
/*NOP*/;
}
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ return CONFIG_MX31_CLK32;
+}
+
void reset_cpu(ulong addr)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
--
1.7.5.4
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[U-Boot] [PATCH 3/3] MX5/MX6: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
MX5/MX6 have not yet implemented.
Signed-off-by: Stefano Babic sba...@denx.de
CC: Dirk Behme dirk.be...@de.bosch.com
CC: Jason Liu jason@linaro.org
CC: Marek Vasut marek.va...@gmail.com
CC: Troy Kisky troy.ki...@boundarydevices.com
CC: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/armv7/imx-common/timer.c | 75 +
1 files changed, 57 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/armv7/imx-common/timer.c
b/arch/arm/cpu/armv7/imx-common/timer.c
index 98e9f4a..1645ff8 100755
--- a/arch/arm/cpu/armv7/imx-common/timer.c
+++ b/arch/arm/cpu/armv7/imx-common/timer.c
@@ -25,6 +25,7 @@
#include common.h
#include asm/io.h
+#include div64.h
#include asm/arch/imx-regs.h
/* General purpose timers registers */
@@ -50,6 +51,22 @@ DECLARE_GLOBAL_DATA_PTR;
#define timestamp (gd-tbl)
#define lastinc (gd-lastinc)
+static inline unsigned long long tick_to_time(unsigned long long tick)
+{
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, CLK_32KHZ);
+
+ return tick;
+}
+
+static inline unsigned long long us_to_tick(unsigned long long usec)
+{
+ usec *= CLK_32KHZ;
+ do_div(usec, 100);
+
+ return usec;
+}
+
int timer_init(void)
{
int i;
@@ -75,36 +92,58 @@ int timer_init(void)
return 0;
}
-ulong get_timer_masked(void)
+unsigned long long get_ticks(void)
{
- ulong val = __raw_readl(cur_gpt-counter);
- val /= (CLK_32KHZ / CONFIG_SYS_HZ);
- if (val = lastinc)
- timestamp += (val - lastinc);
- else
- timestamp += ((0x / (CLK_32KHZ / CONFIG_SYS_HZ))
- - lastinc) + val;
- lastinc = val;
+ ulong now = __raw_readl(cur_gpt-counter); /* current tick value */
+
+ if (now = lastinc) {
+ /*
+* normal mode (non roll)
+* move stamp forward with absolut diff ticks
+*/
+ timestamp += (now - lastinc);
+ } else {
+ /* we have rollover of incrementer */
+ timestamp += (0x - lastinc) + now;
+ }
+ lastinc = now;
return timestamp;
}
+ulong get_timer_masked(void)
+{
+ /*
+* get_ticks() returns a long long (64 bit), it wraps in
+* 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
+* 5 * 10^6 days - long enough.
+*/
+ return tick_to_time(get_ticks());
+}
+
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
-/* delay x useconds AND preserve advance timestamp value */
+/* delay x useconds AND preserve advance timstamp value */
void __udelay(unsigned long usec)
{
- unsigned long now, start, tmo;
- tmo = usec * (CLK_32KHZ / 1000) / 1000;
-
- if (!tmo)
- tmo = 1;
+ unsigned long long tmp;
+ ulong tmo;
- now = start = readl(cur_gpt-counter);
+ tmo = us_to_tick(usec);
+ tmp = get_ticks() + tmo;/* get current timestamp */
- while ((now - start) tmo)
- now = readl(cur_gpt-counter);
+ while (get_ticks() tmp) /* loop till event */
+/*NOP*/;
+}
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ return CLK_32KHZ;
}
--
1.7.5.4
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Re: [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda
On 02/03/12 15:38, Govindraj.R wrote:
From: Govindraj.R govindraj.r...@ti.com
For beagle and panda enable and use the ehci-omap.c generic
api's added to configure usb host ports based on data passed
from board file to configure in modes as specified from board data.
For panda initialise the mux pins for ehci usage.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Last neats and
Acked-by: Igor Grinberg grinb...@compulab.co.il
---
board/ti/beagle/beagle.c| 28 ++
board/ti/panda/panda.c | 41
+++
board/ti/panda/panda_mux_data.h | 16 +++---
include/configs/omap4_panda.h | 23 -
4 files changed, 99 insertions(+), 9 deletions(-)
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 98548ab..5031cf2 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -45,6 +45,11 @@
#include beagle.h
#include command.h
+#ifdef CONFIG_USB_EHCI
+#include usb.h
+#include asm/ehci-omap.h
+#endif
+
#define pr_debug(fmt, args...) debug(fmt, ##args)
#define TWL4030_I2C_BUS 0
@@ -442,6 +447,29 @@ void show_boot_progress(int val)
if(val == 15)
usb_stop();
}
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(void)
+{
+ int ret = 0;
+
+ ret = omap_ehci_hcd_init(usbhs_bdata);
+ return ret;
+}
just:
return omap_ehci_hcd_init(usbhs_bdata);
+
+int ehci_hcd_stop(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_stop();
+ return ret;
+}
same here:
return omap_ehci_hcd_stop();
+
#endif /* CONFIG_USB_EHCI */
#ifndef CONFIG_SPL_BUILD
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index fc8c0b4..1f8509b 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -26,9 +26,16 @@
#include asm/arch/mmc_host_def.h
#include asm/arch/clocks.h
#include asm/arch/gpio.h
+#include asm/gpio.h
#include panda_mux_data.h
+#ifdef CONFIG_USB_EHCI
+#include usb.h
+#include asm/arch/ehci.h
+#include asm/ehci-omap.h
+#endif
+
#define PANDA_ULPI_PHY_TYPE_GPIO 182
DECLARE_GLOBAL_DATA_PTR;
@@ -177,6 +184,40 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#ifdef CONFIG_USB_EHCI
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
+};
+
+int ehci_hcd_init(void)
+{
+ int ret;
+ unsigned int utmi_clk;
+
+ /* Now we can enable our port clocks */
+ utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
+ utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
+ sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
+
+ ret = omap_ehci_hcd_init(usbhs_bdata);
+ if (ret 0)
+ return ret;
+
+ return 0;
return omap_ehci_hcd_init(usbhs_bdata);
?
+}
+
+int ehci_hcd_stop(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_stop();
+ return ret;
return omap_ehci_hcd_stop();
+}
+#endif
[...]
--
Regards,
Igor.
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Re: [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
On 02/06/12 13:57, Govindraj wrote: On Mon, Feb 6, 2012 at 5:12 PM, Igor Grinberg grinb...@compulab.co.il wrote: On 02/03/12 15:38, Govindraj.R wrote: From: Govindraj.R govindraj.r...@ti.com Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework. Signed-off-by: Govindraj.R govindraj.r...@ti.com Acked-by: Igor Grinberg grinb...@compulab.co.il --- arch/arm/cpu/armv7/omap3/board.c|4 arch/arm/cpu/armv7/omap3/clock.c| 20 arch/arm/cpu/armv7/omap4/clocks.c |5 + arch/arm/include/asm/arch-omap3/sys_proto.h |1 + 4 files changed, 30 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 871aa37..054e9c4 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -228,6 +228,10 @@ void s_init(void) per_clocks_enable(); +#ifdef CONFIG_USB_EHCI_OMAP + ehci_clocks_enable(); +#endif Just a question (not blocking): I would really like to see this being a part of usb start call some day... Can't this be called from omap_ehci_hcd_init()? But its better to have it part of clock framework. on omap4 I have added this part of enabling essential clocks done part of clock framework. arch/arm/cpu/armv7/omap[4/5]/clocks.c = arch/arm/cpu/armv7/omap-common/clocks-common.c but on omap3 we don't seem to use clocks common. so I have just used this function. on omap4/5 clocks.c makes things simpler for us. (re-use the same rather to complicate with our funcs) Yes, I understand, it is indeed simpler. I'm trying also to see this from the final product POV, where things like power consumption and supermarket principle (pay only for what you buy) can meter. Again, this is fine (I already acked the patch), just wanted to know how difficult would it be to get it fine tuned for usb start/stop. Thanks -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi, This patch fixes ref_cpu clock setup. This bug leads to a hanging board after rebooting from the Kernel, due to failing memory size detection: U-Boot 2011.12-svn342 (Feb 02 2012 - 17:20:00) Freescale i.MX28 family I2C: ready DRAM: 0 Bytes The cause of the bug is register hw_clkctrl_frac0 being accessed as a 32-bit long, whereas the manual specifically states it can be accessed as bytes only. This patches introduces an 8-bit wide register type, mx28_register_8. The already existing mx28_register has been renamed mx28_register_32. With this patch, U-Boot no longer hangs after an i.mx28 based board was reset from the Kernel. (PS: I hope this email is properly formatted now, after fight our exchange server for a whole morning and loosing in the end) Signed-off-by: Robert Delien rob...@delien.nl --- arch/arm/cpu/arm926ejs/mx28/clock.c | 74 +++- arch/arm/cpu/arm926ejs/mx28/iomux.c |6 +- arch/arm/cpu/arm926ejs/mx28/mx28.c|6 +- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c| 23 +-- arch/arm/include/asm/arch-mx28/regs-apbh.h| 254 arch/arm/include/asm/arch-mx28/regs-bch.h | 42 ++-- arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 101 +-- arch/arm/include/asm/arch-mx28/regs-common.h | 28 ++- arch/arm/include/asm/arch-mx28/regs-gpmi.h| 26 ++-- arch/arm/include/asm/arch-mx28/regs-i2c.h | 28 ++-- arch/arm/include/asm/arch-mx28/regs-ocotp.h | 86 arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 168 arch/arm/include/asm/arch-mx28/regs-power.h | 28 ++-- arch/arm/include/asm/arch-mx28/regs-rtc.h | 28 ++-- arch/arm/include/asm/arch-mx28/regs-ssp.h | 40 ++-- arch/arm/include/asm/arch-mx28/regs-timrot.h | 38 ++-- arch/arm/include/asm/arch-mx28/regs-usbphy.h | 20 +- arch/arm/include/asm/arch-mx28/sys_proto.h|6 +- drivers/gpio/mxs_gpio.c | 16 +- drivers/usb/host/ehci-mxs.c |8 +- 20 files changed, 505 insertions(+), 521 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c b/arch/arm/cpu/arm926ejs/mx28/clock.c index f698506..c0eea9e 100644 --- a/arch/arm/cpu/arm926ejs/mx28/clock.c +++ b/arch/arm/cpu/arm926ejs/mx28/clock.c @@ -46,8 +46,8 @@ static uint32_t mx28_get_pclk(void) struct mx28_clkctrl_regs *clkctrl_regs = (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; - uint32_t clkctrl, clkseq, clkfrac; - uint32_t frac, div; + uint32_t clkctrl, clkseq, div; + uint8_t clkfrac, frac; clkctrl = readl(clkctrl_regs-hw_clkctrl_cpu); @@ -67,8 +67,8 @@ static uint32_t mx28_get_pclk(void) } /* REF Path */ - clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0); - frac = clkfrac CLKCTRL_FRAC0_CPUFRAC_MASK; + clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]); + frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK; div = clkctrl CLKCTRL_CPU_DIV_CPU_MASK; return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div; } @@ -96,8 +96,8 @@ static uint32_t mx28_get_emiclk(void) struct mx28_clkctrl_regs *clkctrl_regs = (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; - uint32_t frac, div; - uint32_t clkctrl, clkseq, clkfrac; + uint32_t clkctrl, clkseq, div; + uint8_t clkfrac, frac; clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq); clkctrl = readl(clkctrl_regs-hw_clkctrl_emi); @@ -109,11 +109,9 @@ static uint32_t mx28_get_emiclk(void) return XTAL_FREQ_MHZ / div; } - clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0); - /* REF Path */ - frac = (clkfrac CLKCTRL_FRAC0_EMIFRAC_MASK) - CLKCTRL_FRAC0_EMIFRAC_OFFSET; + clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]); + frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK; div = clkctrl CLKCTRL_EMI_DIV_EMI_MASK; return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div; } @@ -123,8 +121,8 @@ static uint32_t mx28_get_gpmiclk(void) struct mx28_clkctrl_regs *clkctrl_regs = (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; - uint32_t frac, div; - uint32_t clkctrl, clkseq, clkfrac; + uint32_t clkctrl, clkseq, div; + uint8_t clkfrac, frac; clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq); clkctrl = readl(clkctrl_regs-hw_clkctrl_gpmi); @@ -135,11 +133,9 @@ static uint32_t mx28_get_gpmiclk(void) return XTAL_FREQ_MHZ / div; } - clkfrac = readl(clkctrl_regs-hw_clkctrl_frac1); - /* REF Path */ - frac = (clkfrac CLKCTRL_FRAC1_GPMIFRAC_MASK) - CLKCTRL_FRAC1_GPMIFRAC_OFFSET; + clkfrac = readb(clkctrl_regs-hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]); + frac = clkfrac CLKCTRL_FRAC1_FRAC_MASK; div = clkctrl CLKCTRL_GPMI_DIV_MASK; return (PLL_FREQ_MHZ * PLL_FREQ_COEF /
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi, This patch fixes ref_cpu clock setup. This bug leads to a hanging board after rebooting from the Kernel, due to failing memory size detection: U-Boot 2011.12-svn342 (Feb 02 2012 - 17:20:00) Freescale i.MX28 family I2C: ready DRAM: 0 Bytes The cause of the bug is register hw_clkctrl_frac0 being accessed as a 32-bit long, whereas the manual specifically states it can be accessed as bytes only. This patches introduces an 8-bit wide register type, mx28_register_8. The already existing mx28_register has been renamed mx28_register_32. With this patch, U-Boot no longer hangs after an i.mx28 based board was reset from the Kernel. (PS: I hope this email is properly formatted now, after fight our exchange server for a whole morning and loosing in the end) btw 2/2 is missing? M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
On Monday 06 February 2012 05:07 PM, Aneesh V wrote: Thumb is an alternate instruction set available in many ARM processors. Below is a detailed description from ARM specs: The Thumb instruction set is a re-encoded subset of the ARM instruction set. Thumb instructions execute in their own processor state, with the architecture defining the mechanisms required to transition between ARM and Thumb states. The key difference is that Thumb instructions are half the size of ARM instructions(16 bits compared with 32 bits). Greater code density can usually be achieved by using the Thumb instruction set in preference to the ARM instruction set, at a cost of some reduction in performance In ARMv6T2, Thumb-2 technology is introduced. This technology makes it possible to extend the original Thumb instruction set with many 32-bit instructions. The range of 32-bit Thumb instructions included in ARMv6T2 permits Thumb code to achieve performance similar to ARM code, with code density better than that of earlier Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide almost identical functionality This series adds Thumb support in U-Boot and enables it for OMAP4. It also fixes issues faced while booting OMAP4 with Thumb-2 images of U-Boot and SPL. Thumb mode is becoming increasingly relevant for U-Boot with the advent of SPL. It's very important to keep SPL size smaller considering the internal RAM size constraints on many platforms. On OMAP4 the size reduction enables us to use SPL on secure devices that have smaller internal RAM available for non-secure world. I would request all who are interested in this feature to test it and give feedback. To make that easier I have pushed my patches here (along with the timer patch from Nicolas that fixes boot on OMAP4): g...@github.com:aneeshv/u-boot.git branch: thumb To enable support for new platforms you just need to add CONFIG_SYS_THUMB_BUILD in your config file. Some statistics: Code-size reduction: Image ARM build Thumb build % Reduction u-boot.bin 190408 144676 24.01% u-boot-spl.bin 33200 25096 24.40% Performance(timestamp just before the main loop): ARM build Thumb build % Reduction 898510us878247us-2.25% That is, performance actually improved marginally for the Thumb build, maybe because of the reduced image sizes. br, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi Marek,
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- }
I think you're mixing two things together above. This patch and some kind of a
cleanup. But ok, thinking of this, it seems context related.
Yeah, duplicate code didn't feel right. Besides, the code didn't check for
values
larger than MXC_IOCLK0, which is does now.
+ io_reg = CLKCTRL_FRAC0_IO0 - (io - MXC_IOCLK0);
Uh ... ioreg = (io == MXC_IOCLK0) ? something : another; or stuff like that
might be better. The math above is really confusing. Or you can even enumerate
enum mxs_ioclock so that you won't need this math at all, which is even
better.
I came accross an enumerator in the code, but I found that too big of a change
to slip in, because it alters the external interface. But we're not done with
the code
yet. Plenty of oppertunities left.
ioreg = (io == MXC_IOCLK0) is not the same. The actual value of
io != MXC_IOCLK0 it compiler implementation depending.
Can you actually separate out the rename to register_32 and then the fixup
patch
for register_8?
I'd rather not: I'm down to my neck it work and I don't these two parts in my
archive
so that means manual merging, verifying and for another two hours.
Rest seems ok
Can you see if our server swapped tabs for spaces? It's beyond my grasp how M$
considers it a good idea to alter to contents of my email.
Cheers,
Robert.
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Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
btw 2/2 is missing? Not missing, just not sent again; It hasn't been changed. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V7] mcx: support for HTKW mcx board
Hi Stefano,
Cc'd Govindraj.
On 02/05/12 16:57, Stefano Babic wrote:
From: Ilya Yanok ya...@emcraft.com
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND, MMC, RTC, EHCI USB host and both
NAND and MMC SPLs are supported.
Signed-off-by: Ilya Yanok ya...@emcraft.com
Signed-off-by: Stefano Babic sba...@denx.de
CC: Tom Rini tom.r...@gmail.com
Cc: Detlev Zundel d...@denx.de
[...]
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
new file mode 100644
index 000..dcc8707
--- /dev/null
+++ b/board/htkw/mcx/mcx.c
[...]
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_EHCI_PORT_MODE_PHY,
This looks wrong, as port3 is TLL only, so it cannot have a PHY,
or am I missing something?
+};
+
+int ehci_hcd_init(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_init(usbhs_bdata);
+ if (ret 0)
+ return ret;
+
+ return 0;
+}
return omap_ehci_hcd_init(usbhs_bdata);
?
+
+int ehci_hcd_stop(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_stop();
+ return ret;
+}
same here:
return omap_ehci_hcd_stop();
?
[...]
--
Regards,
Igor.
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Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi Marek,
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- }
I think you're mixing two things together above. This patch and some kind
of a cleanup. But ok, thinking of this, it seems context related.
Yeah, duplicate code didn't feel right. Besides, the code didn't check for
values larger than MXC_IOCLK0, which is does now.
+ io_reg = CLKCTRL_FRAC0_IO0 - (io - MXC_IOCLK0);
Uh ... ioreg = (io == MXC_IOCLK0) ? something : another; or stuff like
that might be better. The math above is really confusing. Or you can
even enumerate enum mxs_ioclock so that you won't need this math at all,
which is even better.
I came accross an enumerator in the code, but I found that too big of a
change to slip in, because it alters the external interface. But we're not
done with the code yet. Plenty of oppertunities left.
Not really, fixing the enumeration should be fine I believe.
ioreg = (io == MXC_IOCLK0) is not the same. The actual value of
io != MXC_IOCLK0 it compiler implementation depending.
That's why I put the ternary operator there ?
Can you actually separate out the rename to register_32 and then the
fixup patch for register_8?
I'd rather not: I'm down to my neck it work and I don't these two parts in
my archive so that means manual merging, verifying and for another two
hours.
It's impossible to review like this though and much more prone to pull in bugs.
Rest seems ok
Can you see if our server swapped tabs for spaces? It's beyond my grasp how
M$ considers it a good idea to alter to contents of my email.
It didnt.
Cheers,
Robert.
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Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
btw 2/2 is missing? Not missing, just not sent again; It hasn't been changed. Uh ... I don't see this patch in in-reply-to either. So I can't find it, really. M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] mx28evk: add RTC support
Hi Stefano, On 1/23/12, Fabio Estevam feste...@gmail.com wrote: On 1/18/12, Matthias Fuchs matthias.fu...@esd.eu wrote: This patch adds support for the MX28 internal RTC and enables u-boot's date command. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu Tested-by: Fabio Estevam fabio.este...@freescale.com Any issues with this patch series? If not, is it possible to apply them? Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was
here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
- *cd = gpio_get_value(171);
- } else /* Don't have the CD GPIO pin on board */
- *cd = 0;
+ ret = !gpio_get_value(171);
+ }
- return 0;
+ return ret;
}
int board_mmc_init(bd_t *bis)
--
1.7.4.1
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Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi Marek,
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- }
I think you're mixing two things together above. This patch and some kind
of a cleanup. But ok, thinking of this, it seems context related.
Yeah, duplicate code didn't feel right. Besides, the code didn't check for
values larger than MXC_IOCLK0, which is does now.
+ io_reg = CLKCTRL_FRAC0_IO0 - (io - MXC_IOCLK0);
Uh ... ioreg = (io == MXC_IOCLK0) ? something : another; or stuff like
that might be better. The math above is really confusing. Or you can
even enumerate enum mxs_ioclock so that you won't need this math at all,
which is even better.
I came accross an enumerator in the code, but I found that too big of a
change to slip in, because it alters the external interface. But we're not
done with the code yet. Plenty of oppertunities left.
ioreg = (io == MXC_IOCLK0) is not the same. The actual value of
io != MXC_IOCLK0 it compiler implementation depending.
Can you actually separate out the rename to register_32 and then the
fixup patch for register_8?
I'd rather not: I'm down to my neck it work and I don't these two parts in
my archive so that means manual merging, verifying and for another two
hours.
Rest seems ok
Can you see if our server swapped tabs for spaces? It's beyond my grasp how
M$ considers it a good idea to alter to contents of my email.
Cheers,
Robert.
btw. a quick hint:
git reset HEAD^
git add -p
Add only the reg32 changes, commit, add the rest, commit. Send ;-)
M
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[U-Boot] [PATCH] Ethernut 5: fix build error for board_mmc_getcd()
Fix build error for ethernut5 and mx6qarm2 board due
to prototype change for function board_mmc_getcd()
ethernut5.c:238: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was
here
make[2]: *** [ethernut5.o] Error 1
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/egnite/ethernut5/ethernut5.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/board/egnite/ethernut5/ethernut5.c
b/board/egnite/ethernut5/ethernut5.c
index e42e91e..fd021a3 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -235,10 +235,9 @@ int board_mmc_init(bd_t *bd)
return atmel_mci_init((void *)ATMEL_BASE_MCI);
}
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
- *cd = at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
- return 0;
+ return !at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN);
}
#endif
--
1.7.4.1
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Re: [U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
On 06.02.2012 13:54, Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was
here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
- *cd = gpio_get_value(171);
- } else /* Don't have the CD GPIO pin on board */
- *cd = 0;
+ ret = !gpio_get_value(171);
+ }
- return 0;
+ return ret;
}
int board_mmc_init(bd_t *bis)
This should be fixed already at u-boot-imx.git:
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=e669db1c209eed02ca8c837914c161f5daa2d8fd
Please check.
Best regards
Dirk
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Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi, That's why I put the ternary operator there ? Ah; without anything behind it, it really just looked like a question mark. But using a ternary caters only for a set of two. So enumeration would be better ideed. It's impossible to review like this though and much more prone to pull in bugs. Can you point me to a good and tutorial for GIT then? Just a brief description of the work flow, from cloning the public archive, to submitting patches with a couple of examples. Now, for every bit of rework, I clone a new archive and manually patch in all my changes to make a clean patch. That is two hours of work and I'm not willing to spend that time on every remark. Cheers, Robert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
Dirk,
My bad didn't notice it.
WBR,
--Prabhakar Lad
On Mon, Feb 6, 2012 at 6:30 PM, Dirk Behme dirk.be...@de.bosch.com wrote:
On 06.02.2012 13:54, Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd'
was here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/**mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/**mx6qarm2.c
b/board/freescale/mx6qarm2/**mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/**mx6qarm2.c
+++ b/board/freescale/mx6qarm2/**mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
- *cd = gpio_get_value(171);
- } else /* Don't have the CD GPIO pin on board */
- *cd = 0;
+ ret = !gpio_get_value(171);
+ }
- return 0;
+ return ret;
}
int board_mmc_init(bd_t *bis)
This should be fixed already at u-boot-imx.git:
http://git.denx.de/?p=u-boot/**u-boot-imx.git;a=commitdiff;h=**
e669db1c209eed02ca8c837914c161**f5daa2d8fdhttp://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=e669db1c209eed02ca8c837914c161f5daa2d8fd
Please check.
Best regards
Dirk
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Re: [U-Boot] [PATCH 1/3] mx28evk: add RTC support
On 06/02/2012 13:51, Fabio Estevam wrote: Hi Stefano, On 1/23/12, Fabio Estevam feste...@gmail.com wrote: On 1/18/12, Matthias Fuchs matthias.fu...@esd.eu wrote: This patch adds support for the MX28 internal RTC and enables u-boot's date command. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu Tested-by: Fabio Estevam fabio.este...@freescale.com Any issues with this patch series? If not, is it possible to apply them? No issue, I am going to apply them. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
Hi, That's why I put the ternary operator there ? Ah; without anything behind it, it really just looked like a question mark. But using a ternary caters only for a set of two. So enumeration would be better ideed. It's impossible to review like this though and much more prone to pull in bugs. Can you point me to a good and tutorial for GIT then? Just a brief description of the work flow, from cloning the public archive, to submitting patches with a couple of examples. I just sent you an howto in a subsequent mail. Now, for every bit of rework, I clone a new archive and manually patch in all my changes to make a clean patch. No, it's really simple, see the email. That is two hours of work and I'm not willing to spend that time on every remark. Yep ... basically, you need to learn: git rebase -i (select patches you want to edit, reword ...) git commit --amend (add stuff to top-of-head patch) And the stuff I sent you -- git reset to reset changes from the index, git add -p to add changes selectively. M Cheers, Robert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/4] Enable Thumb build for ARM platforms
On Monday 06 February 2012 05:56 PM, Aneesh V wrote: On Monday 06 February 2012 05:07 PM, Aneesh V wrote: Thumb is an alternate instruction set available in many ARM processors. Below is a detailed description from ARM specs: The Thumb instruction set is a re-encoded subset of the ARM instruction set. Thumb instructions execute in their own processor state, with the architecture defining the mechanisms required to transition between ARM and Thumb states. The key difference is that Thumb instructions are half the size of ARM instructions(16 bits compared with 32 bits). Greater code density can usually be achieved by using the Thumb instruction set in preference to the ARM instruction set, at a cost of some reduction in performance In ARMv6T2, Thumb-2 technology is introduced. This technology makes it possible to extend the original Thumb instruction set with many 32-bit instructions. The range of 32-bit Thumb instructions included in ARMv6T2 permits Thumb code to achieve performance similar to ARM code, with code density better than that of earlier Thumb code. From ARMv6T2, the ARM and Thumb instruction sets provide almost identical functionality This series adds Thumb support in U-Boot and enables it for OMAP4. It also fixes issues faced while booting OMAP4 with Thumb-2 images of U-Boot and SPL. Thumb mode is becoming increasingly relevant for U-Boot with the advent of SPL. It's very important to keep SPL size smaller considering the internal RAM size constraints on many platforms. On OMAP4 the size reduction enables us to use SPL on secure devices that have smaller internal RAM available for non-secure world. I would request all who are interested in this feature to test it and give feedback. To make that easier I have pushed my patches here (along with the timer patch from Nicolas that fixes boot on OMAP4): g...@github.com:aneeshv/u-boot.git branch: thumb To enable support for new platforms you just need to add CONFIG_SYS_THUMB_BUILD in your config file. Some statistics: Code-size reduction: Image ARM build Thumb build % Reduction u-boot.bin 190408 144676 24.01% u-boot-spl.bin 33200 25096 24.40% Performance(timestamp just before the main loop): ARM build Thumb build % Reduction 898510us 878247us -2.25% That is, performance actually improved marginally for the Thumb build, maybe because of the reduced image sizes. Oops! I missed details about the tool-chains I used. I succcessfully tried the following tool-chains for the Thumb build. 1. Sourcery G++ Lite 2010q1-202 arm-none-linux-gnueabi-gcc (Sourcery G++ Lite 2010q1-202) 4.4.1 GNU ld (Sourcery G++ Lite 2010q1-202) - binutils 2.19.51.20090709 2. Linaro 4.6-2012.01 arm-linux-gnueabi-gcc (crosstool-NG linaro-1.13.1-2012.01-20120125 - Linaro GCC 2012.01) 4.6.3 20120105 (prerelease) GNU ld (crosstool-NG linaro-1.13.1-2012.01-20120125 - Linaro GCC 2012.01) 2.22 Test reports with different tool-chains will be greatly appreciated! best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Ethernut 5: fix build error for board_mmc_getcd()
* Prabhakar Lad wrote:
Fix build error for ethernut5 and mx6qarm2 board due
to prototype change for function board_mmc_getcd()
ethernut5.c:238: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was
here
make[2]: *** [ethernut5.o] Error 1
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/egnite/ethernut5/ethernut5.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/board/egnite/ethernut5/ethernut5.c
b/board/egnite/ethernut5/ethernut5.c
index e42e91e..fd021a3 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -235,10 +235,9 @@ int board_mmc_init(bd_t *bd)
return atmel_mci_init((void *)ATMEL_BASE_MCI);
}
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
- *cd = at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
- return 0;
+ return !at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN);
}
#endif
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
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Re: [U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
* Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd' was
here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
Could you fix up this comment at the same time (put spaces after /* and
before */)?
- *cd = gpio_get_value(171);
- } else /* Don't have the CD GPIO pin on board */
- *cd = 0;
+ ret = !gpio_get_value(171);
+ }
- return 0;
+ return ret;
}
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
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[U-Boot] [PATCH v4 3/7] ehci-omap: driver for EHCI host on OMAP3
From: Ilya Yanok ya...@emcraft.com
Taken from Beagle code. Tested on mcx board (AM3517-based).
Signed-off-by: Ilya Yanok ya...@emcraft.com
---
board/ti/beagle/beagle.c | 101 --
drivers/usb/host/Makefile |1 +
drivers/usb/host/ehci-omap.c | 156
include/configs/omap3_beagle.h |4 +
4 files changed, 161 insertions(+), 101 deletions(-)
create mode 100644 drivers/usb/host/ehci-omap.c
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 5c04b34..98548ab 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -42,15 +42,6 @@
#include asm/arch/sys_proto.h
#include asm/gpio.h
#include asm/mach-types.h
-#ifdef CONFIG_USB_EHCI
-#include usb.h
-#include asm/arch/clocks.h
-#include asm/arch/clocks_omap3.h
-#include asm/arch/ehci_omap3.h
-/* from drivers/usb/host/ehci-core.h */
-extern struct ehci_hccr *hccr;
-extern volatile struct ehci_hcor *hcor;
-#endif
#include beagle.h
#include command.h
@@ -445,104 +436,12 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_USB_EHCI
-
-#define GPIO_PHY_RESET 147
-
-/* Reset is needed otherwise the kernel-driver will throw an error. */
-int ehci_hcd_stop(void)
-{
- pr_debug(Resetting OMAP3 EHCI\n);
- gpio_set_value(GPIO_PHY_RESET, 0);
- writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE +
OMAP_UHH_SYSCONFIG);
- /* disable USB clocks */
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- sr32(prcm_base-iclken_usbhost, 0, 1, 0);
- sr32(prcm_base-fclken_usbhost, 0, 2, 0);
- sr32(prcm_base-iclken3_core, 2, 1, 0);
- sr32(prcm_base-fclken3_core, 2, 1, 0);
- return 0;
-}
-
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
if(val == 15)
usb_stop();
}
-
-/*
- * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
- * Based on drivers/usb/host/ehci-omap.c from Linux 2.6.37.
- * See there for additional Copyrights.
- */
-int ehci_hcd_init(void)
-{
- pr_debug(Initializing OMAP3 ECHI\n);
-
- /* Put the PHY in RESET */
- gpio_request(GPIO_PHY_RESET, );
- gpio_direction_output(GPIO_PHY_RESET, 0);
- gpio_set_value(GPIO_PHY_RESET, 0);
-
- /* Hold the PHY in RESET for enough time till DIR is high */
- /* Refer: ISSUE1 */
- udelay(10);
-
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
- sr32(prcm_base-iclken_usbhost, 0, 1, 1);
- /*
-* Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
-* and USBHOST_120M_FCLK (USBHOST_FCLK2)
-*/
- sr32(prcm_base-fclken_usbhost, 0, 2, 3);
- /* Enable USBTTL_ICLK */
- sr32(prcm_base-iclken3_core, 2, 1, 1);
- /* Enable USBTTL_FCLK */
- sr32(prcm_base-fclken3_core, 2, 1, 1);
- pr_debug(USB clocks enabled\n);
-
- /* perform TLL soft reset, and wait until reset is complete */
- writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
- /* Wait for TLL reset to complete */
- while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
-OMAP_USBTLL_SYSSTATUS_RESETDONE));
- pr_debug(TLL reset done\n);
-
- writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
- OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
- OMAP_USBTLL_SYSCONFIG_CACTIVITY,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
-
- /* Put UHH in NoIdle/NoStandby mode */
- writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
- | OMAP_UHH_SYSCONFIG_SIDLEMODE
- | OMAP_UHH_SYSCONFIG_CACTIVITY
- | OMAP_UHH_SYSCONFIG_MIDLEMODE,
- OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
-
- /* setup burst configurations */
- writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
- OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
-
- /*
-* Refer ISSUE1:
-* Hold the PHY in RESET for enough time till
-* PHY is settled and ready
-*/
- udelay(10);
- gpio_set_value(GPIO_PHY_RESET, 1);
-
- hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
- hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
-
- pr_debug(OMAP3 EHCI init done\n);
- return 0;
-}
-
#endif /* CONFIG_USB_EHCI */
#ifndef CONFIG_SPL_BUILD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 77e217f..975c3e5 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ endif
COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
+COBJS-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
[U-Boot] [PATCH v4 7/7] OMAP4: ehci-omap: enable ehci-omap for panda boards
From: Govindraj.R govindraj.r...@ti.com
For panda initialise the mux pins for ehci usage and
enable ehci in omap4_panda config file.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
board/ti/panda/panda_mux_data.h | 16
include/configs/omap4_panda.h | 23 ++-
2 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 2970ccd..5b66a14 100644
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -136,14 +136,14 @@ const struct pad_conf_entry
core_padconf_array_non_essential[] = {
{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},/*
cam_shutter */
{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /*
cam_strobe */
{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /*
gpio_83 */
- {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /*
hsi1_cawake */
- {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /*
hsi1_cadata */
- {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /*
hsi1_caflag */
- {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /*
hsi1_acready */
- {USBB1_ULPITLL_DAT0, (OFF_EN | M1)},/*
hsi1_acwake */
- {USBB1_ULPITLL_DAT1, (OFF_EN | M1)},/*
hsi1_acdata */
- {USBB1_ULPITLL_DAT2, (OFF_EN | M1)},/*
hsi1_acflag */
- {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /*
hsi1_caready */
+ {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_clk */
+ {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /*
usbb1_ulpiphy_stp */
+ {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /*
usbb1_ulpiphy_dir */
+ {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /*
usbb1_ulpiphy_nxt */
+ {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat0 */
+ {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat1 */
+ {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat2 */
+ {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat3 */
{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat4 */
{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat5 */
{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/*
usbb1_ulpiphy_dat6 */
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 416eb39..b4756be 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -31,12 +31,33 @@
/*
* High Level Configuration Options
*/
-#define CONFIG_PANDA 1 /* working with Panda */
+#define CONFIG_PANDA /* working with Panda */
+
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
+#define CONFIG_UBOOT_ENABLE_PADS_ALL
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
#define CONFIG_USB_ULPI
#define CONFIG_USB_ULPI_VIEWPORT_OMAP
#include configs/omap4_common.h
+#define CONFIG_CMD_NET
/* GPIO */
#define CONFIG_CMD_GPIO
--
1.7.5.4
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[U-Boot] [PATCH v4 4/7] ehci-omap: Clean up added ehci-omap.c
From: Govindraj.R govindraj.r...@ti.com Clean up added ehci-omap.c and make it generic for re-use across omap-soc having same ehci ip block. Also pass the modes to be configured from board file and configure the ports accordingly. All usb layers are not cache aligned, till then keep cache off for usb ops as ehci will use internally dma for all usb ops. * Add a generic common header ehci-omap.h having common ip block data and reg shifts. * Rename and modify ehci-omap3 to ehci.h retain only conflicting sysc reg shifts remove others and move to common header file. * pass the board data for beagle/panda accordinly to use ehci ports. Acked-by: Igor Grinberg grinb...@compulab.co.il Signed-off-by: Govindraj.R govindraj.r...@ti.com --- arch/arm/include/asm/arch-omap3/ehci.h | 55 +++ arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 --- arch/arm/include/asm/arch-omap4/ehci.h | 49 ++ arch/arm/include/asm/ehci-omap.h | 142 + board/ti/beagle/beagle.c | 22 +++ board/ti/panda/panda.c | 38 + drivers/usb/host/ehci-omap.c | 209 +++--- 7 files changed, 460 insertions(+), 113 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap3/ehci.h delete mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h create mode 100644 arch/arm/include/asm/arch-omap4/ehci.h create mode 100644 arch/arm/include/asm/ehci-omap.h diff --git a/arch/arm/include/asm/arch-omap3/ehci.h b/arch/arm/include/asm/arch-omap3/ehci.h new file mode 100644 index 000..0f73d20 --- /dev/null +++ b/arch/arm/include/asm/arch-omap3/ehci.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2011 + * Alexander Holler hol...@ahsoftware.de + * + * Based on drivers/usb/host/ehci-omap.c from Linux 2.6.37 + * + * See there for additional Copyrights. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#ifndef _OMAP3_EHCI_H_ +#define _OMAP3_EHCI_H_ + +/* USB/EHCI registers */ +#define OMAP_USBTLL_BASE 0x48062000UL +#define OMAP_UHH_BASE 0x48064000UL +#define OMAP_EHCI_BASE 0x48064800UL + +/* TLL Register Set */ +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET(1 1) +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP(1 2) +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE(1 3) +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY(1 8) +#define OMAP_USBTLL_SYSSTATUS_RESETDONE1 + +/* UHH Register Set */ +#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 1) +#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 8) +#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 3) +#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 2) +#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 12) +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 2) + +#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_CACTIVITY | \ + OMAP_UHH_SYSCONFIG_SIDLEMODE | \ + OMAP_UHH_SYSCONFIG_ENAWAKEUP | \ + OMAP_UHH_SYSCONFIG_MIDLEMODE) + +#endif /* _OMAP3_EHCI_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/ehci_omap3.h b/arch/arm/include/asm/arch-omap3/ehci_omap3.h deleted file mode 100644 index cd01f50..000 --- a/arch/arm/include/asm/arch-omap3/ehci_omap3.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2011 - * Alexander Holler hol...@ahsoftware.de - * - * Based on drivers/usb/host/ehci-omap.c from Linux 2.6.37 - * - * See there for additional Copyrights. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - *
[U-Boot] [PATCH v4 5/7] OMAP3+: Clock: Adding ehci clock enabling
From: Govindraj.R govindraj.r...@ti.com
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/cpu/armv7/omap3/board.c|4
arch/arm/cpu/armv7/omap3/clock.c| 20
arch/arm/cpu/armv7/omap4/clocks.c |5 +
arch/arm/include/asm/arch-omap3/sys_proto.h |1 +
4 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 871aa37..054e9c4 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -228,6 +228,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_USB_EHCI_OMAP
+ ehci_clocks_enable();
+#endif
+
#ifdef CONFIG_SPL_BUILD
preloader_console_init();
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index e0d65c7..567817e 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -626,6 +626,26 @@ void prcm_init(void)
sdelay(5000);
}
+/*
+ * Enable usb ehci uhh, tll clocks
+ */
+void ehci_clocks_enable(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+ /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
+ sr32(prcm_base-iclken_usbhost, 0, 1, 1);
+ /*
+* Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
+* and USBHOST_120M_FCLK (USBHOST_FCLK2)
+*/
+ sr32(prcm_base-fclken_usbhost, 0, 2, 3);
+ /* Enable USBTTL_ICLK */
+ sr32(prcm_base-iclken3_core, 2, 1, 1);
+ /* Enable USBTTL_FCLK */
+ sr32(prcm_base-fclken3_core, 2, 1, 1);
+}
+
/**
* peripheral_enable() - Enable the clks power for perifs (GPT2, UART1,...)
*/
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c
b/arch/arm/cpu/armv7/omap4/clocks.c
index 0886f92..12e283a 100644
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -342,6 +342,9 @@ void enable_basic_clocks(void)
prcm-cm_l4per_gpio4_clkctrl,
prcm-cm_l4per_gpio5_clkctrl,
prcm-cm_l4per_gpio6_clkctrl,
+ prcm-cm_l3init_usbphy_clkctrl,
+ prcm-cm_clksel_usb_60mhz,
+ prcm-cm_l3init_hsusbtll_clkctrl,
0
};
@@ -352,6 +355,8 @@ void enable_basic_clocks(void)
prcm-cm_l4per_gptimer2_clkctrl,
prcm-cm_wkup_wdtimer2_clkctrl,
prcm-cm_l4per_uart3_clkctrl,
+ prcm-cm_l3init_fsusb_clkctrl,
+ prcm-cm_l3init_hsusbhost_clkctrl,
0
};
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h
b/arch/arm/include/asm/arch-omap3/sys_proto.h
index e5031d5..2a89e56 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -34,6 +34,7 @@ struct emu_hal_params {
void prcm_init(void);
void per_clocks_enable(void);
+void ehci_clocks_enable(void);
void memif_init(void);
void sdrc_init(void);
--
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[U-Boot] [PATCH v4 1/7] usb: ulpi: Extend the existing ulpi framework.
From: Govindraj.R govindraj.r...@ti.com
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic sba...@denx.de
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
board/efikamx/efikamx-usb.c | 24 ++--
drivers/usb/ulpi/ulpi-viewport.c | 32 --
drivers/usb/ulpi/ulpi.c | 54 +++--
include/usb/ulpi.h | 36 +
4 files changed, 84 insertions(+), 62 deletions(-)
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
index 840bd9a..ac2d2e9 100644
--- a/board/efikamx/efikamx-usb.c
+++ b/board/efikamx/efikamx-usb.c
@@ -120,6 +120,7 @@ static void efika_ehci_init(struct usb_ehci *ehci, uint32_t
stp_gpio,
{
int ret;
struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+ struct ulpi_viewport ulpi_vp;
mxc_request_iomux(stp_gpio, alt0);
mxc_iomux_set_pad(stp_gpio, PAD_CTL_DRV_HIGH |
@@ -133,23 +134,26 @@ static void efika_ehci_init(struct usb_ehci *ehci,
uint32_t stp_gpio,
mxc_iomux_set_pad(stp_gpio, USB_PAD_CONFIG);
udelay(1);
- ret = ulpi_init((u32)ehci-ulpi_viewpoint);
+ ulpi_vp.viewport_addr = (u32)ehci-ulpi_viewpoint;
+ ulpi_vp.port_num = 0;
+
+ ret = ulpi_init(ulpi_vp);
if (ret) {
printf(Efika USB ULPI initialization failed\n);
return;
}
/* ULPI set flags */
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-otg_ctrl,
+ ulpi_write(ulpi_vp, ulpi-otg_ctrl,
ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
ULPI_OTG_EXTVBUSIND);
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-function_ctrl,
+ ulpi_write(ulpi_vp, ulpi-function_ctrl,
ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
ULPI_FC_SUSPENDM);
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-iface_ctrl, 0);
+ ulpi_write(ulpi_vp, ulpi-iface_ctrl, 0);
/* Set VBus */
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-otg_ctrl_set,
+ ulpi_write(ulpi_vp, ulpi-otg_ctrl_set,
ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
/*
@@ -158,8 +162,7 @@ static void efika_ehci_init(struct usb_ehci *ehci, uint32_t
stp_gpio,
* NOTE: This violates USB specification, but otherwise, USB on Efika
* doesn't work.
*/
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-otg_ctrl_set,
- ULPI_OTG_CHRGVBUS);
+ ulpi_write(ulpi_vp, ulpi-otg_ctrl_set, ULPI_OTG_CHRGVBUS);
}
int board_ehci_hcd_init(int port)
@@ -177,9 +180,12 @@ void ehci_powerup_fixup(uint32_t *status_reg, uint32_t
*reg)
uint32_t port = OTG_BASE_ADDR + (0x200 * CONFIG_MXC_USB_PORT);
struct usb_ehci *ehci = (struct usb_ehci *)port;
struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+ struct ulpi_viewport ulpi_vp;
+
+ ulpi_vp.viewport_addr = (u32)ehci-ulpi_viewpoint;
+ ulpi_vp.port_num = 0;
- ulpi_write((u32)ehci-ulpi_viewpoint, ulpi-otg_ctrl_set,
- ULPI_OTG_CHRGVBUS);
+ ulpi_write(ulpi_vp, ulpi-otg_ctrl_set, ULPI_OTG_CHRGVBUS);
wait_ms(50);
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 490fb0e..b4974ed 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -40,13 +40,13 @@
*
* returns 0 on mask match, ULPI_ERROR on time out.
*/
-static int ulpi_wait(u32 ulpi_viewport, u32 mask)
+static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
{
int timeout = CONFIG_USB_ULPI_TIMEOUT;
/* Wait for the bits in mask to become zero. */
while (--timeout) {
- if ((readl(ulpi_viewport) mask) == 0)
+ if ((readl(ulpi_vp-viewport_addr) mask) == 0)
return 0;
udelay(1);
@@ -60,16 +60,16 @@ static int ulpi_wait(u32 ulpi_viewport, u32 mask)
*
* returns 0 on success.
*/
-static int ulpi_wakeup(u32 ulpi_viewport)
+static int ulpi_wakeup(struct ulpi_viewport *ulpi_vp)
{
int err;
- if (readl(ulpi_viewport) ULPI_SS)
+ if (readl(ulpi_vp-viewport_addr) ULPI_SS)
return 0; /* already awake */
- writel(ULPI_WU, ulpi_viewport);
+ writel(ULPI_WU, ulpi_vp-viewport_addr);
- err = ulpi_wait(ulpi_viewport, ULPI_WU);
+ err = ulpi_wait(ulpi_vp, ULPI_WU);
if (err)
printf(ULPI wakeup timed out\n);
@@ -81,38 +81,40 @@ static int ulpi_wakeup(u32 ulpi_viewport)
*
* @value - the ULPI request
*/
-static int ulpi_request(u32 ulpi_viewport, u32 value)
+static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
{
int err;
- err =
[U-Boot] [PATCH v4 2/7] usb: ulpi: Add omap-ulpi-view port support
From: Govindraj.R govindraj.r...@ti.com
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg grinb...@compulab.co.il for reviewing the
omap-ehci patches and suggesting this approach.
[1]: http://www.mail-archive.com/u-boot@lists.denx.de/msg76076.html
Tested-by: Stefano Babic sba...@denx.de
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
doc/README.omap-ulpi-viewport | 27 +
drivers/usb/ulpi/Makefile |1 +
drivers/usb/ulpi/omap-ulpi-viewport.c | 105 +
include/configs/omap3_beagle.h|4 +
include/configs/omap4_panda.h |3 +
5 files changed, 140 insertions(+), 0 deletions(-)
create mode 100644 doc/README.omap-ulpi-viewport
create mode 100644 drivers/usb/ulpi/omap-ulpi-viewport.c
diff --git a/doc/README.omap-ulpi-viewport b/doc/README.omap-ulpi-viewport
new file mode 100644
index 000..a5240b9
--- /dev/null
+++ b/doc/README.omap-ulpi-viewport
@@ -0,0 +1,27 @@
+Reference code drivers/usb/ulpi/omap-ulpi-viewport.c
+
+Contains the ulpi read write api's to perform
+any ulpi phy port access on omap platform.
+
+On omap ehci reg map contains INSNREG05_ULPI
+register which offers the ulpi phy access so
+any ulpi phy commands should be passsed using this
+register.
+
+omap-ulpi-viewport.c is a low level function
+implementation of drivers/usb/ulpi/ulpi.c
+
+To enable and use omap-ulpi-viewport.c
+we require CONFIG_USB_ULPI_VIEWPORT_OMAP and
+CONFIG_USB_ULPI be enabled in config file.
+
+Any ulpi ops request can be done with ulpi.c
+and soc specific binding and usage is done with
+omap-ulpi-viewport implementation.
+
+Ex: scenario:
+omap-ehci driver code requests for ulpi phy reset if
+ehci is used in phy mode, which will call ulpi phy reset
+the ulpi phy reset does ulpi_read/write from viewport
+implementation which will do ulpi reset using the
+INSNREG05_ULPI register.
diff --git a/drivers/usb/ulpi/Makefile b/drivers/usb/ulpi/Makefile
index d43b229..281eb1c 100644
--- a/drivers/usb/ulpi/Makefile
+++ b/drivers/usb/ulpi/Makefile
@@ -24,6 +24,7 @@ LIB := $(obj)libusb_ulpi.o
COBJS-$(CONFIG_USB_ULPI) += ulpi.o
COBJS-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
+COBJS-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c
b/drivers/usb/ulpi/omap-ulpi-viewport.c
new file mode 100644
index 000..3c1ea1a
--- /dev/null
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
@@ -0,0 +1,105 @@
+/*
+ * OMAP ulpi viewport support
+ * Based on drivers/usb/ulpi/ulpi-viewport.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
+ * Author: Govindraj R govindraj.r...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include common.h
+#include asm/io.h
+#include usb/ulpi.h
+
+#define OMAP_ULPI_WR_OPSEL (3 21)
+#define OMAP_ULPI_ACCESS (1 31)
+
+/*
+ * Wait for the ULPI Access to complete
+ */
+static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
+{
+ int timeout = CONFIG_USB_ULPI_TIMEOUT;
+
+ while (--timeout) {
+ if ((readl(ulpi_vp-viewport_addr) mask))
+ return 0;
+
+ udelay(1);
+ }
+
+ return ULPI_ERROR;
+}
+
+/*
+ * Wake the ULPI PHY up for communication
+ *
+ * returns 0 on success.
+ */
+static int ulpi_wakeup(struct ulpi_viewport *ulpi_vp)
+{
+ int err;
+
+ if (readl(ulpi_vp-viewport_addr) OMAP_ULPI_ACCESS)
+ return 0; /* already awake */
+
+ writel(OMAP_ULPI_ACCESS, ulpi_vp-viewport_addr);
+
+ err = ulpi_wait(ulpi_vp, OMAP_ULPI_ACCESS);
+ if (err)
+ debug(ULPI wakeup timed out\n);
+
+ return err;
+}
+
+/*
+ * Issue a ULPI read/write request
+ */
+static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
+{
+ int err;
+
+ err = ulpi_wakeup(ulpi_vp);
+ if (err)
+ return err;
+
+ writel(value, ulpi_vp-viewport_addr);
+
+ err = ulpi_wait(ulpi_vp,
[U-Boot] [PATCH v4 6/7] OMAP4: clock-common: Move the usb dppl configuration to new func
From: Govindraj.R govindraj.r...@ti.com
usb dpll configuration is done only part of non-essential
dppl configuration however if CONFIG_USB_EHCI_OMAP is defined
we may have to configure usb dpll's for proper functioning
of usb modules. So move the usb dppl configuration to a new func.
and utilise the same during essential dpll configuration.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 54 ++-
1 files changed, 33 insertions(+), 21 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c
b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 1da90a4..4cfe119 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -251,6 +251,35 @@ void configure_mpu_dpll(void)
debug(MPU DPLL locked\n);
}
+#ifdef CONFIG_USB_EHCI_OMAP
+static void setup_usb_dpll(void)
+{
+ const struct dpll_params *params;
+ u32 sys_clk_khz, sd_div, num, den;
+
+ sys_clk_khz = get_sys_clk_freq() / 1000;
+ /*
+* USB:
+* USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction
+* DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250)
+* - where CLKINP is sys_clk in MHz
+* Use CLKINP in KHz and adjust the denominator accordingly so
+* that we have enough accuracy and at the same time no overflow
+*/
+ params = get_usb_dpll_params();
+ num = params-m * sys_clk_khz;
+ den = (params-n + 1) * 250 * 1000;
+ num += den - 1;
+ sd_div = num / den;
+ clrsetbits_le32(prcm-cm_clksel_dpll_usb,
+ CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK,
+ sd_div CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT);
+
+ /* Now setup the dpll with the regular function */
+ do_setup_dpll(prcm-cm_clkmode_dpll_usb, params, DPLL_LOCK, usb);
+}
+#endif
+
static void setup_dplls(void)
{
u32 temp;
@@ -282,13 +311,16 @@ static void setup_dplls(void)
/* MPU dpll */
configure_mpu_dpll();
+
+#ifdef CONFIG_USB_EHCI_OMAP
+ setup_usb_dpll();
+#endif
}
#ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL
static void setup_non_essential_dplls(void)
{
u32 sys_clk_khz, abe_ref_clk;
- u32 sd_div, num, den;
const struct dpll_params *params;
sys_clk_khz = get_sys_clk_freq() / 1000;
@@ -300,26 +332,6 @@ static void setup_non_essential_dplls(void)
params = get_iva_dpll_params();
do_setup_dpll(prcm-cm_clkmode_dpll_iva, params, DPLL_LOCK, iva);
- /*
-* USB:
-* USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction
-* DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250)
-* - where CLKINP is sys_clk in MHz
-* Use CLKINP in KHz and adjust the denominator accordingly so
-* that we have enough accuracy and at the same time no overflow
-*/
- params = get_usb_dpll_params();
- num = params-m * sys_clk_khz;
- den = (params-n + 1) * 250 * 1000;
- num += den - 1;
- sd_div = num / den;
- clrsetbits_le32(prcm-cm_clksel_dpll_usb,
- CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK,
- sd_div CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT);
-
- /* Now setup the dpll with the regular function */
- do_setup_dpll(prcm-cm_clkmode_dpll_usb, params, DPLL_LOCK, usb);
-
/* Configure ABE dpll */
params = get_abe_dpll_params();
#ifdef CONFIG_SYS_OMAP_ABE_SYSCK
--
1.7.5.4
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[U-Boot] [PATCH v4 0/7] Add and Clean up ehci-omap and extend support for omap3/4 socs
From: Govindraj.R govindraj.r...@ti.com Clean up ehci-omap added and make it generic to extend support for omap4 socs. Adds omap-ulpi-viewport for ulpi access from ehci-omap. Adds ehci support for omap4-panda. Based on denx master branch commit: 137703b811502dfea364650fb3e17f20b4c21333 Changes from v3: --- git-test-sequence was checked and sequence of patches was fixed and compilation warning on each patch was checked for beagle, panda/4430sdp, omap5_evm: http://www.mail-archive.com/u-boot@lists.denx.de/msg76665.html Fixed comments as in this thread: http://patchwork.ozlabs.org/patch/139370/ http://patchwork.ozlabs.org/patch/139371/ http://patchwork.ozlabs.org/patch/139372/ http://patchwork.ozlabs.org/patch/139373/ http://patchwork.ozlabs.org/patch/139375/ Dependent Patch: http://patchwork.ozlabs.org/patch/138844/ (omap4 boot will fail without this patch) This patch series long with above dependent patch is avialable at: git://gitorious.org/denx_u-boot/denx_uboot_omap.git v4_ehci_omap4 Govindraj.R (6): usb: ulpi: Extend the existing ulpi framework. usb: ulpi: Add omap-ulpi-view port support ehci-omap: Clean up added ehci-omap.c OMAP3+: Clock: Adding ehci clock enabling OMAP4: clock-common: Move the usb dppl configuration to new func OMAP4: ehci-omap: enable ehci-omap for panda boards Ilya Yanok (1): ehci-omap: driver for EHCI host on OMAP3 arch/arm/cpu/armv7/omap-common/clocks-common.c | 54 +++-- arch/arm/cpu/armv7/omap3/board.c |4 + arch/arm/cpu/armv7/omap3/clock.c | 20 ++ arch/arm/cpu/armv7/omap4/clocks.c |5 + arch/arm/include/asm/arch-omap3/ehci.h | 55 + arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 -- arch/arm/include/asm/arch-omap3/sys_proto.h|1 + arch/arm/include/asm/arch-omap4/ehci.h | 49 + arch/arm/include/asm/ehci-omap.h | 142 + board/efikamx/efikamx-usb.c| 24 ++- board/ti/beagle/beagle.c | 109 ++- board/ti/panda/panda.c | 38 board/ti/panda/panda_mux_data.h| 16 +- doc/README.omap-ulpi-viewport | 27 +++ drivers/usb/host/Makefile |1 + drivers/usb/host/ehci-omap.c | 255 drivers/usb/ulpi/Makefile |1 + drivers/usb/ulpi/omap-ulpi-viewport.c | 105 ++ drivers/usb/ulpi/ulpi-viewport.c | 32 ++-- drivers/usb/ulpi/ulpi.c| 54 +++--- include/configs/omap3_beagle.h |8 + include/configs/omap4_panda.h | 26 +++- include/usb/ulpi.h | 36 +++- 23 files changed, 876 insertions(+), 244 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap3/ehci.h delete mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h create mode 100644 arch/arm/include/asm/arch-omap4/ehci.h create mode 100644 arch/arm/include/asm/ehci-omap.h create mode 100644 doc/README.omap-ulpi-viewport create mode 100644 drivers/usb/host/ehci-omap.c create mode 100644 drivers/usb/ulpi/omap-ulpi-viewport.c -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
Thierry,
On 2/6/12, Thierry Reding thierry.red...@avionic-design.de wrote:
* Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd'
was here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
Could you fix up this comment at the same time (put spaces after /* and
before */)?
The patch for this fix already submitted, shall submit independent
patch with this fix?
WBR,
--Prabhakar Lad
-*cd = gpio_get_value(171);
-} else /* Don't have the CD GPIO pin on board */
-*cd = 0;
+ret = !gpio_get_value(171);
+}
-return 0;
+return ret;
}
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
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Re: [U-Boot] [PATCH] mx6qarm2: fix build error for board_mmc_getcd()
* Prabhakar Lad wrote:
Thierry,
On 2/6/12, Thierry Reding thierry.red...@avionic-design.de wrote:
* Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd'
was here
Signed-off-by: Prabhakar Lad prabhakar.cse...@gmail.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index 9894245..2cb37dd 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -120,17 +120,17 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR, 1},
};
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
gpio_direction_input(171); /*GPIO6_11*/
Could you fix up this comment at the same time (put spaces after /* and
before */)?
The patch for this fix already submitted, shall submit independent
patch with this fix?
If it hasn't been applied to any of the upstream repositories yet, then you
can always send an updated version.
Thierry
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Re: [U-Boot] Skipping relocation RAM to RAM, esp. on i.MX6?
On Sunday 05 February 2012 11:49 AM, Simon Glass wrote: Hi, On Sat, Feb 4, 2012 at 1:15 AM, Aneesh Vane...@ti.com wrote: Hi Dirk, On Friday 03 February 2012 12:55 PM, Dirk Behme wrote: Hi, on i.MX6 devices, e.g. ARM2 or SabreLite, the ROM boot loader copies the U-Boot image from the boot device, e.g. the SD card, to the main memory. This does mean that U-Boot is started in RAM. With this, one might wonder why any relocation RAM - RAM is done anyway and if this could be skipped? Looking into the details shows that board_init_f() in arch/arm/lib/board.c and relocate_code() in arch/arm/cpu/armv7/start.S [1] are involved in this. In board_init_f() the relocation destination address 'addr' is calculated. This is basically at the end of the available RAM (- some space for various stuff like TLB tables etc.). At SabreLite this results in 0x4FF8D000. By the boot loader, the U-Boot is loaded to CONFIG_SYS_TEXT_BASE 0x1780 This results in relocate_code() copying U-Boot from RAM 0x1780 to RAM 0x4FF8D000. Setting CONFIG_SYS_TEXT_BASE to the relocation destination address 0x4FF8D000 does avoid the (unnecessary?) copy by cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ in relocate_code(). But: 1) The resulting image still runs without the relocation (CONFIG_SYS_TEXT_BASE 0x4FF8D000). But e.g. the U-Boot command line doesn't work properly any more. Most probably this is because not only the copy is skipped by the 'beq clear_bss', but the whole 'fix .rel.dyn relocations' is skipped too. 2) It's hard to set CONFIG_SYS_TEXT_BASE at compile time to the relocation address calculated at runtime in board_init_f() due to the amount of #ifdef and runtime calculation done there. So finding a generic approach which could easily defined in the config files to avoid the relocation seems difficult. I haven't really completely read your mail. But here is an implementation I had provided long time back for ARM. But Wolfgang didn't want to take it. You can see the patch and the following discussion in this thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/96352 From your patch Aneesh I evolved something that I still use - it deals with the case where malloc cannot fit below the text area. I find any sort of messing with the ICE startup a pain - although I have often been able to script it. But for me I need to attach the device tree to the binary and a few other things so I might as well disable relocation at the same time. It also allows me to debug seamlessly in board_init_f() as well as afterwards. I will send a patch. Great! It would be good to get something in mainline despite the protestations, if only to avoid all the work that people have to do to figure out this problem. I am always in favor of that:) best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
btw. a quick hint: git reset HEAD^ git add -p Add only the reg32 changes, commit, add the rest, commit. Send ;-) Well, I made it a little more work than that. But who would have thought? GIT is actually growing on me! I've got my changes in my repository now, in 4 separate commits. I've even found an SMTP server on the network here. So we're looking good. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Skipping relocation RAM to RAM, esp. on i.MX6?
On Sat, Feb 4, 2012 at 4:00 AM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Le 04/02/2012 10:15, Aneesh V a écrit : Hi Dirk, On Friday 03 February 2012 12:55 PM, Dirk Behme wrote: Hi, on i.MX6 devices, e.g. ARM2 or SabreLite, the ROM boot loader copies the U-Boot image from the boot device, e.g. the SD card, to the main memory. This does mean that U-Boot is started in RAM. With this, one might wonder why any relocation RAM - RAM is done anyway and if this could be skipped? Looking into the details shows that board_init_f() in arch/arm/lib/board.c and relocate_code() in arch/arm/cpu/armv7/start.S [1] are involved in this. In board_init_f() the relocation destination address 'addr' is calculated. This is basically at the end of the available RAM (- some space for various stuff like TLB tables etc.). At SabreLite this results in 0x4FF8D000. By the boot loader, the U-Boot is loaded to CONFIG_SYS_TEXT_BASE 0x1780 This results in relocate_code() copying U-Boot from RAM 0x1780 to RAM 0x4FF8D000. Setting CONFIG_SYS_TEXT_BASE to the relocation destination address 0x4FF8D000 does avoid the (unnecessary?) copy by cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ in relocate_code(). But: 1) The resulting image still runs without the relocation (CONFIG_SYS_TEXT_BASE 0x4FF8D000). But e.g. the U-Boot command line doesn't work properly any more. Most probably this is because not only the copy is skipped by the 'beq clear_bss', but the whole 'fix .rel.dyn relocations' is skipped too. 2) It's hard to set CONFIG_SYS_TEXT_BASE at compile time to the relocation address calculated at runtime in board_init_f() due to the amount of #ifdef and runtime calculation done there. So finding a generic approach which could easily defined in the config files to avoid the relocation seems difficult. I haven't really completely read your mail. But here is an implementation I had provided long time back for ARM. But Wolfgang didn't want to take it. You can see the patch and the following discussion in this thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/96352 Recently there was an reminder by Wolfgang that debugging can be done even with relocation, provided the symbols are dropped and reloaded in gdb upon hitting the end of the relocate loop where the jump to (the new location of) board_init_f happens --see http://www.denx.de/wiki/view/DULG/WrongDebugSymbolsAfterRelocation. I am not a specialist of gdb but I think it might be automated, too, so that if you want to debug u-boot past relocation then you would just have to enter a single command in gdb, or a script name when invoking gdb, to load u-boot in low RAM , set a breakpoint at the pivot point after relocation, run to that breakpoint, drop current symbols and reload symbols with the adequate offset, possibly computed from some accessible global. Anyone itching enough to do some research and experiments on this? In my experience, the offset is consistent on a given platform so once you do the dance once to figure out where it'll be placed you can just start off debugging post-relocation. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] v2 i.MX28: Fix ref_cpu clock setup
btw. a quick hint: git reset HEAD^ git add -p Add only the reg32 changes, commit, add the rest, commit. Send ;-) Well, I made it a little more work than that. But who would have thought? GIT is actually growing on me! I've got my changes in my repository now, in 4 separate commits. I've even found an SMTP server on the network here. So we're looking good. Yes, finally run git format-patch -o somewhere and tools/checkpatch.pl on the patches, fix the remaining trouble and git send-email ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Add option to disable code relocation
On Mon, Feb 6, 2012 at 1:43 AM, Graeme Russ graeme.r...@gmail.com wrote: Hi Wolfgang, On 02/06/2012 06:51 PM, Wolfgang Denk wrote: Dear Graeme Russ, In message CALButC+==qgs5eaahtqqu4zejqvg-3187ewaqu-fv3dwp5q...@mail.gmail.com you wrote: I think the immediate focus should be on centralising the init sequence processing into /common/init.c and then bringing the new'initcall' architecture online Agreed. Once these have been done, any board can just specific: SKIP_INIT(RELOC) I will probably object to his, too - for the same reasons. Considering this is a 'free' artefact of how the init sequence functions, and that it is board specific and totally non-invasive for anyone else (i.e. no ugly ifdef's anywhere else in the code) I'm surprised you would object... To pick up Wolfgang's argument, but why do we want to skip relocation? You can debug through it, it's documented (official wiki has GDB, over in TI-land, the wiki page for CCS has the bits for doing it in that Eclipse-based env, other debuggers I'm sure have a similar now add symbols at this offset from link option) and the end result makes it very easy for end-users to break their world (default kernel load addrs being where U-Boot would be). I can see this, along with not at all allowed tricks like loading and running U-Boot from U-Boot being in the realm of not supported tricks the sufficiently clever can do. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. So save and restore the CPSR register.
2) The exception vector location is set back to bootrom space to
make the USB interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
changes in v2:
- store old SPSR on stack instead of jiggling around with some bits
- remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
arch/arm/cpu/arm926ejs/mx28/start.S | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..69d911b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -171,6 +171,7 @@ _reset:
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
+ push{r0}
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
@@ -185,6 +186,20 @@ _reset:
bl board_init_ll
+ /*
+* restore bootrom's cpu mode (especially FIQ)
+*/
+ pop {r0}
+ msr cpsr,r0
+
+ /*
+* set exception vector location back to bootrom space.
+* (required by bootrom for USB boot)
+*/
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x2000 /* set bit 13 'V' */
+ mcr p15, 0, r0, c1, c0, 0
+
pop {r0-r12,r14}
bx lr
--
1.6.1
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[U-Boot] [PATCH] OMAP4460: Reduce MPU clock speed from 920 to 700
We do not have thermal management or Smartreflex
enabled at U-Boot level. So, it's better to stick
to OPP100 for MPU instead of the OPP Turbo that is
used now. Adjust the VDD_MPU accordingly.
Tested-by: Sebastien Jan s-...@ti.com
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/clocks.c | 22 +++---
1 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c
b/arch/arm/cpu/armv7/omap4/clocks.c
index 0886f92..311a720 100644
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -67,15 +67,15 @@ const u32 sys_clk_array[8] = {
* Please use this tool for creating the table for any new frequency.
*/
-/* dpll locked at 1840 MHz MPU clk at 920 MHz(OPP Turbo 4460) - DCC OFF */
-static const struct dpll_params mpu_dpll_params_1840mhz[NUM_SYS_CLKS] = {
- {230, 2, 1, -1, -1, -1, -1, -1},/* 12 MHz */
- {920, 12, 1, -1, -1, -1, -1, -1}, /* 13 MHz */
- {219, 3, 1, -1, -1, -1, -1, -1},/* 16.8 MHz */
- {575, 11, 1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
- {460, 12, 1, -1, -1, -1, -1, -1}, /* 26 MHz */
- {920, 26, 1, -1, -1, -1, -1, -1}, /* 27 MHz */
- {575, 23, 1, -1, -1, -1, -1, -1}/* 38.4 MHz */
+/* dpll locked at 1400 MHz MPU clk at 700 MHz(OPP100) - DCC OFF */
+static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {
+ {175, 2, 1, -1, -1, -1, -1, -1},/* 12 MHz */
+ {700, 12, 1, -1, -1, -1, -1, -1}, /* 13 MHz */
+ {125, 2, 1, -1, -1, -1, -1, -1},/* 16.8 MHz */
+ {401, 10, 1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
+ {350, 12, 1, -1, -1, -1, -1, -1}, /* 26 MHz */
+ {700, 26, 1, -1, -1, -1, -1, -1}, /* 27 MHz */
+ {638, 34, 1, -1, -1, -1, -1, -1}/* 38.4 MHz */
};
/* dpll locked at 1584 MHz - MPU clk at 792 MHz(OPP Turbo 4430) */
@@ -217,7 +217,7 @@ const struct dpll_params *get_mpu_dpll_params(void)
else if (omap_rev OMAP4460_ES1_0)
return mpu_dpll_params_1600mhz[sysclk_ind];
else
- return mpu_dpll_params_1840mhz[sysclk_ind];
+ return mpu_dpll_params_1400mhz[sysclk_ind];
}
const struct dpll_params *get_core_dpll_params(void)
@@ -280,7 +280,7 @@ void scale_vcores(void)
omap_rev = omap_revision();
/* TPS - supplies vdd_mpu on 4460 */
if (omap_rev = OMAP4460_ES1_0) {
- volt = 1313;
+ volt = 1203;
do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt);
}
--
1.7.1
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[U-Boot] [PATCH 4/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |4
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 24
2 files changed, 0 insertions(+), 28 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 9663836..0f790e7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -120,10 +120,6 @@ void mx28_mem_setup_cpu_and_hbus(void)
writeb(19 CLKCTRL_FRAC0_FRAC_MASK,
(uint8_t*)clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
- /* Set CPU bypass */
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_set);
-
/* HBUS = 151MHz */
writel(CLKCTRL_HBUS_DIV_MASK, clkctrl_regs-hw_clkctrl_hbus_set);
writel(((~3) CLKCTRL_HBUS_DIV_OFFSET) CLKCTRL_HBUS_DIV_MASK,
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index 380b120..5e21a1e 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -30,28 +30,6 @@
#include mx28_init.h
-void mx28_power_clock2xtal(void)
-{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
- /* Set XTAL as CPU reference clock */
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_set);
-}
-
-void mx28_power_clock2pll(void)
-{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
- writel(CLKCTRL_PLL0CTRL0_POWER,
- clkctrl_regs-hw_clkctrl_pll0ctrl0_set);
- early_delay(100);
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_clr);
-}
-
void mx28_power_clear_auto_restart(void)
{
struct mx28_rtc_regs *rtc_regs =
@@ -606,7 +584,6 @@ void mx28_power_configure_power_source(void)
mx28_src_power_init();
mx28_5v_boot();
- mx28_power_clock2pll();
mx28_init_batt_bo();
mx28_switch_vddd_to_dcdc_source();
@@ -880,7 +857,6 @@ void mx28_power_init(void)
struct mx28_power_regs *power_regs =
(struct mx28_power_regs *)MXS_POWER_BASE;
- mx28_power_clock2xtal();
mx28_power_clear_auto_restart();
mx28_power_set_linreg();
mx28_power_setup_5v_detect();
--
1.7.0.4
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[U-Boot] [PATCH 3/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
Fixing erroneous 32-bit access to hw_clkctrl_frac0 and
hw_clkctrl_frac1 registers.
---
arch/arm/cpu/arm926ejs/mx28/clock.c | 70 ++---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c| 23 -
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 47 ++---
3 files changed, 54 insertions(+), 86 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c
b/arch/arm/cpu/arm926ejs/mx28/clock.c
index 9d3a018..c0eea9e 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -46,8 +46,8 @@ static uint32_t mx28_get_pclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t clkctrl, clkseq, clkfrac;
- uint32_t frac, div;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkctrl = readl(clkctrl_regs-hw_clkctrl_cpu);
@@ -67,8 +67,8 @@ static uint32_t mx28_get_pclk(void)
}
/* REF Path */
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0);
- frac = clkfrac CLKCTRL_FRAC0_CPUFRAC_MASK;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
+ frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK;
div = clkctrl CLKCTRL_CPU_DIV_CPU_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -96,8 +96,8 @@ static uint32_t mx28_get_emiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq);
clkctrl = readl(clkctrl_regs-hw_clkctrl_emi);
@@ -109,11 +109,9 @@ static uint32_t mx28_get_emiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0);
-
/* REF Path */
- frac = (clkfrac CLKCTRL_FRAC0_EMIFRAC_MASK)
- CLKCTRL_FRAC0_EMIFRAC_OFFSET;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
+ frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK;
div = clkctrl CLKCTRL_EMI_DIV_EMI_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -123,8 +121,8 @@ static uint32_t mx28_get_gpmiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq);
clkctrl = readl(clkctrl_regs-hw_clkctrl_gpmi);
@@ -135,11 +133,9 @@ static uint32_t mx28_get_gpmiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac1);
-
/* REF Path */
- frac = (clkfrac CLKCTRL_FRAC1_GPMIFRAC_MASK)
- CLKCTRL_FRAC1_GPMIFRAC_OFFSET;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+ frac = clkfrac CLKCTRL_FRAC1_FRAC_MASK;
div = clkctrl CLKCTRL_GPMI_DIV_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -152,11 +148,12 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t div;
+ int io_reg;
if (freq == 0)
return;
- if (io MXC_IOCLK1)
+ if ((io MXC_IOCLK0) || (io MXC_IOCLK1))
return;
div = (PLL_FREQ_KHZ * PLL_FREQ_COEF) / freq;
@@ -167,23 +164,13 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
if (div 35)
div = 35;
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- }
+ io_reg = CLKCTRL_FRAC0_IO0 - (io - MXC_IOCLK0);
+ writeb(CLKCTRL_FRAC0_CLKGATE,
+ clkctrl_regs-hw_clkctrl_frac0_set[io_reg]);
+ writeb(CLKCTRL_FRAC0_CLKGATE | (div CLKCTRL_FRAC0_FRAC_MASK),
+
[U-Boot] [PATCH 1/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
This patch Renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
---
arch/arm/cpu/arm926ejs/mx28/clock.c |4 +-
arch/arm/cpu/arm926ejs/mx28/iomux.c |6 +-
arch/arm/cpu/arm926ejs/mx28/mx28.c|6 +-
arch/arm/include/asm/arch-mx28/regs-apbh.h| 254
arch/arm/include/asm/arch-mx28/regs-bch.h | 42 ++--
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 58 +++---
arch/arm/include/asm/arch-mx28/regs-common.h | 12 +-
arch/arm/include/asm/arch-mx28/regs-gpmi.h| 26 ++--
arch/arm/include/asm/arch-mx28/regs-i2c.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ocotp.h | 86
arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 168
arch/arm/include/asm/arch-mx28/regs-power.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-rtc.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ssp.h | 40 ++--
arch/arm/include/asm/arch-mx28/regs-timrot.h | 38 ++--
arch/arm/include/asm/arch-mx28/regs-usbphy.h | 20 +-
arch/arm/include/asm/arch-mx28/sys_proto.h|6 +-
drivers/gpio/mxs_gpio.c | 16 +-
drivers/usb/host/ehci-mxs.c |8 +-
19 files changed, 437 insertions(+), 437 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c
b/arch/arm/cpu/arm926ejs/mx28/clock.c
index f698506..9d3a018 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -223,7 +223,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq,
int xtal)
return;
clkreg = (uint32_t)(clkctrl_regs-hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE);
while (readl(clkreg) CLKCTRL_SSP_CLKGATE)
@@ -272,7 +272,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
return XTAL_FREQ_KHZ;
clkreg = (uint32_t)(clkctrl_regs-hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
tmp = readl(clkreg) CLKCTRL_SSP_DIV_MASK;
diff --git a/arch/arm/cpu/arm926ejs/mx28/iomux.c
b/arch/arm/cpu/arm926ejs/mx28/iomux.c
index 9ea411f..12916b6 100644
--- a/arch/arm/cpu/arm926ejs/mx28/iomux.c
+++ b/arch/arm/cpu/arm926ejs/mx28/iomux.c
@@ -43,7 +43,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
{
u32 reg, ofs, bp, bm;
void *iomux_base = (void *)MXS_PINCTRL_BASE;
- struct mx28_register *mxs_reg;
+ struct mx28_register_32 *mxs_reg;
/* muxsel */
ofs = 0x100;
@@ -70,7 +70,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
/* vol */
if (PAD_VOL_VALID(pad)) {
bp = PAD_PIN(pad) % 8 * 4 + 2;
- mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
if (PAD_VOL(pad))
writel(1 bp, mxs_reg-reg_set);
else
@@ -82,7 +82,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
ofs = PULL_OFFSET;
ofs += PAD_BANK(pad) * 0x10;
bp = PAD_PIN(pad);
- mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
if (PAD_PULL(pad))
writel(1 bp, mxs_reg-reg_set);
else
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 683777f..0e69193 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -63,7 +63,7 @@ void reset_cpu(ulong ignored)
;
}
-int mx28_wait_mask_set(struct mx28_register *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int
timeout)
{
while (--timeout) {
if ((readl(reg-reg) mask) == mask)
@@ -74,7 +74,7 @@ int mx28_wait_mask_set(struct mx28_register *reg, uint32_t
mask, int timeout)
return !timeout;
}
-int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int
timeout)
{
while (--timeout) {
if ((readl(reg-reg) mask) == 0)
@@ -85,7 +85,7 @@ int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t
mask, int timeout)
return !timeout;
}
-int mx28_reset_block(struct mx28_register *reg)
+int mx28_reset_block(struct mx28_register_32 *reg)
{
/* Clear SFTRST */
writel(MX28_BLOCK_SFTRST, reg-reg_clr);
diff --git a/arch/arm/include/asm/arch-mx28/regs-apbh.h
b/arch/arm/include/asm/arch-mx28/regs-apbh.h
index a7fa1ec..91d7bc8 100644
---
[U-Boot] [PATCH 2/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
Introducing 8-bit wide register, mx28_register_8.
---
arch/arm/include/asm/arch-mx28/regs-common.h | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx28/regs-common.h
b/arch/arm/include/asm/arch-mx28/regs-common.h
index 75cc9a6..d2e1953 100644
--- a/arch/arm/include/asm/arch-mx28/regs-common.h
+++ b/arch/arm/include/asm/arch-mx28/regs-common.h
@@ -47,16 +47,32 @@
*
*/
+#define__mx28_reg_8(name) \
+ uint8_t name[4];\
+ uint8_t name##_set[4]; \
+ uint8_t name##_clr[4]; \
+ uint8_t name##_tog[4]; \
+
#define__mx28_reg_32(name) \
uint32_t name; \
uint32_t name##_set;\
uint32_t name##_clr;\
uint32_t name##_tog;
+struct mx28_register_8 {
+ __mx28_reg_8(reg)
+};
+
struct mx28_register_32 {
__mx28_reg_32(reg)
};
+#definemx28_reg_8(name)\
+ union { \
+ struct { __mx28_reg_8(name) }; \
+ struct mx28_register_8 name##_reg; \
+ };
+
#definemx28_reg_32(name) \
union { \
struct { __mx28_reg_32(name) }; \
--
1.7.0.4
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Re: [U-Boot] [PATCH 2/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
Introducing 8-bit wide register, mx28_register_8.
---
arch/arm/include/asm/arch-mx28/regs-common.h | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx28/regs-common.h
b/arch/arm/include/asm/arch-mx28/regs-common.h index 75cc9a6..d2e1953
100644
--- a/arch/arm/include/asm/arch-mx28/regs-common.h
+++ b/arch/arm/include/asm/arch-mx28/regs-common.h
@@ -47,16 +47,32 @@
*
*/
+#define __mx28_reg_8(name) \
+ uint8_t name[4];\
+ uint8_t name##_set[4]; \
+ uint8_t name##_clr[4]; \
+ uint8_t name##_tog[4]; \
+
#define __mx28_reg_32(name) \
uint32_t name; \
uint32_t name##_set;\
uint32_t name##_clr;\
uint32_t name##_tog;
+struct mx28_register_8 {
+ __mx28_reg_8(reg)
+};
+
struct mx28_register_32 {
__mx28_reg_32(reg)
};
+#define mx28_reg_8(name)\
+ union { \
+ struct { __mx28_reg_8(name) }; \
+ struct mx28_register_8 name##_reg; \
Will this kind of access (via register.reg) even work? I think we should
replace
it with register_32.
+ };
+
#define mx28_reg_32(name) \
union { \
struct { __mx28_reg_32(name) }; \
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Re: [U-Boot] [PATCH V2] mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. So save and restore the CPSR register.
2) The exception vector location is set back to bootrom space to
make the USB interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
changes in v2:
- store old SPSR on stack instead of jiggling around with some bits
- remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
arch/arm/cpu/arm926ejs/mx28/start.S | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S index 2cd4d73..69d911b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -171,6 +171,7 @@ _reset:
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
+ push{r0}
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
@@ -185,6 +186,20 @@ _reset:
bl board_init_ll
+ /*
+ * restore bootrom's cpu mode (especially FIQ)
+ */
+ pop {r0}
+ msr cpsr,r0
+
+ /*
+ * set exception vector location back to bootrom space.
+ * (required by bootrom for USB boot)
+ */
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x2000 /* set bit 13 'V' */
+ mcr p15, 0, r0, c1, c0, 0
Maybe you can save this register too, like you did with CPSR?
Otherwise, it looks good.
btw plain push r0 doesn't work?
M
+
pop {r0-r12,r14}
bx lr
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Re: [U-Boot] [PATCH 3/4 v3] i.MX28: Fix ref_cpu clock setup
From: Robert Delien rob...@delien.nl
Fixing erroneous 32-bit access to hw_clkctrl_frac0 and
hw_clkctrl_frac1 registers.
---
arch/arm/cpu/arm926ejs/mx28/clock.c | 70
++--- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c|
23 -
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 47 ++---
3 files changed, 54 insertions(+), 86 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c
b/arch/arm/cpu/arm926ejs/mx28/clock.c index 9d3a018..c0eea9e 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -46,8 +46,8 @@ static uint32_t mx28_get_pclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t clkctrl, clkseq, clkfrac;
- uint32_t frac, div;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkctrl = readl(clkctrl_regs-hw_clkctrl_cpu);
@@ -67,8 +67,8 @@ static uint32_t mx28_get_pclk(void)
}
/* REF Path */
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0);
- frac = clkfrac CLKCTRL_FRAC0_CPUFRAC_MASK;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
+ frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK;
div = clkctrl CLKCTRL_CPU_DIV_CPU_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -96,8 +96,8 @@ static uint32_t mx28_get_emiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq);
clkctrl = readl(clkctrl_regs-hw_clkctrl_emi);
@@ -109,11 +109,9 @@ static uint32_t mx28_get_emiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac0);
-
/* REF Path */
- frac = (clkfrac CLKCTRL_FRAC0_EMIFRAC_MASK)
- CLKCTRL_FRAC0_EMIFRAC_OFFSET;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
+ frac = clkfrac CLKCTRL_FRAC0_FRAC_MASK;
div = clkctrl CLKCTRL_EMI_DIV_EMI_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -123,8 +121,8 @@ static uint32_t mx28_get_gpmiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(clkctrl_regs-hw_clkctrl_clkseq);
clkctrl = readl(clkctrl_regs-hw_clkctrl_gpmi);
@@ -135,11 +133,9 @@ static uint32_t mx28_get_gpmiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(clkctrl_regs-hw_clkctrl_frac1);
-
/* REF Path */
- frac = (clkfrac CLKCTRL_FRAC1_GPMIFRAC_MASK)
- CLKCTRL_FRAC1_GPMIFRAC_OFFSET;
+ clkfrac = readb(clkctrl_regs-hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+ frac = clkfrac CLKCTRL_FRAC1_FRAC_MASK;
div = clkctrl CLKCTRL_GPMI_DIV_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -152,11 +148,12 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t
freq) struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t div;
+ int io_reg;
if (freq == 0)
return;
- if (io MXC_IOCLK1)
+ if ((io MXC_IOCLK0) || (io MXC_IOCLK1))
return;
div = (PLL_FREQ_KHZ * PLL_FREQ_COEF) / freq;
@@ -167,23 +164,13 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t
freq) if (div 35)
div = 35;
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_set);
- clrsetbits_le32(clkctrl_regs-hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- clkctrl_regs-hw_clkctrl_frac0_clr);
- }
+ io_reg = CLKCTRL_FRAC0_IO0 - (io - MXC_IOCLK0);
+ writeb(CLKCTRL_FRAC0_CLKGATE,
+ clkctrl_regs-hw_clkctrl_frac0_set[io_reg]);
+ writeb(CLKCTRL_FRAC0_CLKGATE | (div CLKCTRL_FRAC0_FRAC_MASK),
+ clkctrl_regs-hw_clkctrl_frac0[io_reg]);
+
Re: [U-Boot] [PATCH 4/4 v3] i.MX28: Fix ref_cpu clock setup
Fabio, can you comment on this one?
btw. please, at least add some description to the patches. Also, why do all of
them have the same subject? Also, next time, submit a series:
git format-patch --cover-letter -o xyz
git send-email xyz/*
M
From: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |4
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 24
2 files changed, 0 insertions(+), 28 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 9663836..0f790e7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -120,10 +120,6 @@ void mx28_mem_setup_cpu_and_hbus(void)
writeb(19 CLKCTRL_FRAC0_FRAC_MASK,
(uint8_t*)clkctrl_regs-hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
- /* Set CPU bypass */
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_set);
-
/* HBUS = 151MHz */
writel(CLKCTRL_HBUS_DIV_MASK, clkctrl_regs-hw_clkctrl_hbus_set);
writel(((~3) CLKCTRL_HBUS_DIV_OFFSET) CLKCTRL_HBUS_DIV_MASK,
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 380b120..5e21a1e
100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -30,28 +30,6 @@
#include mx28_init.h
-void mx28_power_clock2xtal(void)
-{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
- /* Set XTAL as CPU reference clock */
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_set);
-}
-
-void mx28_power_clock2pll(void)
-{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
- writel(CLKCTRL_PLL0CTRL0_POWER,
- clkctrl_regs-hw_clkctrl_pll0ctrl0_set);
- early_delay(100);
- writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
- clkctrl_regs-hw_clkctrl_clkseq_clr);
-}
-
void mx28_power_clear_auto_restart(void)
{
struct mx28_rtc_regs *rtc_regs =
@@ -606,7 +584,6 @@ void mx28_power_configure_power_source(void)
mx28_src_power_init();
mx28_5v_boot();
- mx28_power_clock2pll();
mx28_init_batt_bo();
mx28_switch_vddd_to_dcdc_source();
@@ -880,7 +857,6 @@ void mx28_power_init(void)
struct mx28_power_regs *power_regs =
(struct mx28_power_regs *)MXS_POWER_BASE;
- mx28_power_clock2xtal();
mx28_power_clear_auto_restart();
mx28_power_set_linreg();
mx28_power_setup_5v_detect();
___
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Re: [U-Boot] [PATCH 4/4 v3] i.MX28: Fix ref_cpu clock setup
On 2/6/12, rob...@delien.nl rob...@delien.nl wrote: From: Robert Delien rob...@delien.nl Signed-off-by line is missing. Please run checkpatch script and it will alert you of such error. You also missed the commit message explaining why the patch is needed, what does it fix, etc. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Integity validation (checksum) of a squashfs root file system
Hi, I would like to validate the integrity (checksum) of a squashfs root file system before starting Linux. Current strategy I am using is: - Wrap squashfs rootfs inside a u-boot image - TFTP download on the target - Download validation using iminfo - Save squashfs rootfs in flash without the image header (Linux failed to load squashfs rootfs if u-boot image is present) Problems: - I need to hardcode squashfs rootfs offset in u-boot image in order to be able to flash it - U-Boot image header information (size, crc, ...) is lost after a reboot. It is not possible to check the integrity of the flash content. I would like to save some fields of u-boot image header (size, crc, ...) in u-boot environment variables. And then do an integrity check at boot time. I have not find a way to extract those fields and save them without changing u-boot code. I have added some code to “iminfo” command to set environment variables for CRC, size, payload offset, timestamp. Is it an acceptable way of doing it? Is there a better way of doing it? Thanks in advance, Pascal___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Integity validation (checksum) of a squashfs root file system
Hi, I would like to validate the integrity (checksum) of a squashfs root file system before starting Linux. Current strategy I am using is: - Wrap squashfs rootfs inside a u-boot image - TFTP download on the target - Download validation using iminfo - Save squashfs rootfs in flash without the image header (Linux failed to load squashfs rootfs if u-boot image is present) Problems: - I need to hardcode squashfs rootfs offset in u-boot image in order to be able to flash it - U-Boot image header information (size, crc, ...) is lost after a reboot. It is not possible to check the integrity of the flash content. I would like to save some fields of u-boot image header (size, crc, ...) in u-boot environment variables. And then do an integrity check at boot time. I have not find a way to extract those fields and save them without changing u-boot code. I have added some code to “iminfo” command to set environment variables for CRC, size, payload offset, timestamp. Is it an acceptable way of doing it? Is there a better way of doing it? Thanks in advance, Pascal Use sha1sum integrated into uboot and stick it at the end? M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Integity validation (checksum) of a squashfs root file system
Hi, I would like to validate the integrity (checksum) of a squashfs root file system before starting Linux. Current strategy I am using is: - Wrap squashfs rootfs inside a u-boot image - TFTP download on the target - Download validation using iminfo - Save squashfs rootfs in flash without the image header (Linux failed to load squashfs rootfs if u-boot image is present) Problems: - I need to hardcode squashfs rootfs offset in u-boot image in order to be able to flash it - U-Boot image header information (size, crc, ...) is lost after a reboot. It is not possible to check the integrity of the flash content. I would like to save some fields of u-boot image header (size, crc, ...) in u-boot environment variables. And then do an integrity check at boot time. I have not find a way to extract those fields and save them without changing u-boot code. I have added some code to “iminfo” command to set environment variables for CRC, size, payload offset, timestamp. Is it an acceptable way of doing it? Is there a better way of doing it? Thanks in advance, Pascal___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] i.MX28: digctrl registers added
From: Robert Delien rob...@delien.nl This patch adds the digctrl registers, eliminating the need of using magic numbers for their addresses. Signed-off-by: Robert Delien (rob...@delien.nl) Robert Delien (1): Elimintated magic numbers for scratch register addresses arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +- arch/arm/include/asm/arch-mx28/imx-regs.h|1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Elimintated magic numbers for scratch register addresses
From: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +-
arch/arm/include/asm/arch-mx28/imx-regs.h|1 +
arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++
3 files changed, 160 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index 0e69193..9bfd83b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
}
#endif
-#defineHW_DIGCTRL_SCRATCH0 0x8001c280
-#defineHW_DIGCTRL_SCRATCH1 0x8001c290
int mx28_dram_init(void)
{
+ struct mx28_digctl_regs *digctl_regs =
+ (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
uint32_t sz[2];
- sz[0] = readl(HW_DIGCTRL_SCRATCH0);
- sz[1] = readl(HW_DIGCTRL_SCRATCH1);
+ sz[0] = readl(digctl_regs-hw_digctl_scratch0);
+ sz[1] = readl(digctl_regs-hw_digctl_scratch1);
if (sz[0] != sz[1]) {
printf(MX28:\n
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h
index 9561b5e..f9e6c53 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -27,6 +27,7 @@
#include asm/arch/regs-base.h
#include asm/arch/regs-bch.h
#include asm/arch/regs-clkctrl.h
+#include asm/arch/regs-digctl.h
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
#include asm/arch/regs-ocotp.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-digctl.h
b/arch/arm/include/asm/arch-mx28/regs-digctl.h
new file mode 100644
index 000..9a63594
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-digctl.h
@@ -0,0 +1,155 @@
+/*
+ * Freescale i.MX28 DIGCTL Register Definitions
+ *
+ * Copyright (C) 2012 Robert Delien rob...@delien.nl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX28_REGS_DIGCTL_H__
+#define __MX28_REGS_DIGCTL_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef__ASSEMBLY__
+struct mx28_digctl_regs {
+ mx28_reg_32(hw_digctl_ctrl) /* 0x000 */
+ mx28_reg_32(hw_digctl_status) /* 0x010 */
+ mx28_reg_32(hw_digctl_hclkcount)/* 0x020 */
+ mx28_reg_32(hw_digctl_ramctrl) /* 0x030 */
+ mx28_reg_32(hw_digctl_emi_status) /* 0x040 */
+ mx28_reg_32(hw_digctl_read_margin) /* 0x050 */
+ uint32_thw_digctl_writeonce;/* 0x060 */
+ uint32_treserved_writeonce[3];
+ mx28_reg_32(hw_digctl_bist_ctl) /* 0x070 */
+ mx28_reg_32(hw_digctl_bist_status) /* 0x080 */
+ uint32_thw_digctl_entropy; /* 0x090 */
+ uint32_treserved_entropy[3];
+ uint32_thw_digctl_entropy_latched; /* 0x0a0 */
+ uint32_treserved_entropy_latched[3];
+
+ uint32_treserved1[4];
+
+ mx28_reg_32(hw_digctl_microseconds) /* 0x0c0 */
+ uint32_thw_digctl_dbgrd;/* 0x0d0 */
+ uint32_treserved_hw_digctl_dbgrd[3];
+ uint32_thw_digctl_dbg; /* 0x0e0 */
+ uint32_treserved_hw_digctl_dbg[3];
+
+ uint32_treserved2[4];
+
+ mx28_reg_32(hw_digctl_usb_loopback) /* 0x100 */
+ mx28_reg_32(hw_digctl_ocram_status0)/* 0x110 */
+ mx28_reg_32(hw_digctl_ocram_status1)/* 0x120 */
+ mx28_reg_32(hw_digctl_ocram_status2)/* 0x130 */
+ mx28_reg_32(hw_digctl_ocram_status3)/* 0x140 */
+ mx28_reg_32(hw_digctl_ocram_status4)/* 0x150 */
+ mx28_reg_32(hw_digctl_ocram_status5)/* 0x160 */
+ mx28_reg_32(hw_digctl_ocram_status6)/* 0x170 */
+ mx28_reg_32(hw_digctl_ocram_status7)/* 0x180 */
+
Re: [U-Boot] Integity validation (checksum) of a squashfs root file system
Hi M, sha1sum does provide a console output but nothing that could be used for an automated check like crc32 -v... Pascal -Original Message- From: Marek Vasut Sent: Monday, February 06, 2012 11:34 AM To: u-boot@lists.denx.de Cc: Pascal Levesque Subject: Re: [U-Boot] Integity validation (checksum) of a squashfs root file system Hi, I would like to validate the integrity (checksum) of a squashfs root file system before starting Linux. Current strategy I am using is: - Wrap squashfs rootfs inside a u-boot image - TFTP download on the target - Download validation using iminfo - Save squashfs rootfs in flash without the image header (Linux failed to load squashfs rootfs if u-boot image is present) Problems: - I need to hardcode squashfs rootfs offset in u-boot image in order to be able to flash it - U-Boot image header information (size, crc, ...) is lost after a reboot. It is not possible to check the integrity of the flash content. I would like to save some fields of u-boot image header (size, crc, ...) in u-boot environment variables. And then do an integrity check at boot time. I have not find a way to extract those fields and save them without changing u-boot code. I have added some code to “iminfo” command to set environment variables for CRC, size, payload offset, timestamp. Is it an acceptable way of doing it? Is there a better way of doing it? Thanks in advance, Pascal Use sha1sum integrated into uboot and stick it at the end? M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Elimintated magic numbers for scratch register addresses
On 2/6/12, rob...@delien.nl rob...@delien.nl wrote: From: Robert Delien rob...@delien.nl Put a commit message and a Signed-off-by line. --- arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +- arch/arm/include/asm/arch-mx28/imx-regs.h|1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 0e69193..9bfd83b 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif -#define HW_DIGCTRL_SCRATCH0 0x8001c280 -#define HW_DIGCTRL_SCRATCH1 0x8001c290 Please remove HW_DIGCTRL_SCRATCHx from spl_mem_init.c as well. Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Elimintated magic numbers for scratch register addresses
From: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +-
arch/arm/include/asm/arch-mx28/imx-regs.h|1 +
arch/arm/include/asm/arch-mx28/regs-digctl.h | 155
++ 3 files changed, 160 insertions(+), 4
deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 0e69193..9bfd83b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char
*mac) }
#endif
-#define HW_DIGCTRL_SCRATCH0 0x8001c280
-#define HW_DIGCTRL_SCRATCH1 0x8001c290
int mx28_dram_init(void)
{
+ struct mx28_digctl_regs *digctl_regs =
+ (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
uint32_t sz[2];
- sz[0] = readl(HW_DIGCTRL_SCRATCH0);
- sz[1] = readl(HW_DIGCTRL_SCRATCH1);
+ sz[0] = readl(digctl_regs-hw_digctl_scratch0);
+ sz[1] = readl(digctl_regs-hw_digctl_scratch1);
if (sz[0] != sz[1]) {
printf(MX28:\n
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h
b/arch/arm/include/asm/arch-mx28/imx-regs.h index 9561b5e..f9e6c53 100644
--- a/arch/arm/include/asm/arch-mx28/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx28/imx-regs.h
@@ -27,6 +27,7 @@
#include asm/arch/regs-base.h
#include asm/arch/regs-bch.h
#include asm/arch/regs-clkctrl.h
+#include asm/arch/regs-digctl.h
#include asm/arch/regs-gpmi.h
#include asm/arch/regs-i2c.h
#include asm/arch/regs-ocotp.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-digctl.h
b/arch/arm/include/asm/arch-mx28/regs-digctl.h new file mode 100644
index 000..9a63594
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-digctl.h
@@ -0,0 +1,155 @@
+/*
+ * Freescale i.MX28 DIGCTL Register Definitions
+ *
+ * Copyright (C) 2012 Robert Delien rob...@delien.nl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA + *
+ */
+
+#ifndef __MX28_REGS_DIGCTL_H__
+#define __MX28_REGS_DIGCTL_H__
+
+#include asm/arch/regs-common.h
+
+#ifndef __ASSEMBLY__
+struct mx28_digctl_regs {
+ mx28_reg_32(hw_digctl_ctrl) /* 0x000 */
+ mx28_reg_32(hw_digctl_status) /* 0x010 */
+ mx28_reg_32(hw_digctl_hclkcount)/* 0x020 */
+ mx28_reg_32(hw_digctl_ramctrl) /* 0x030 */
+ mx28_reg_32(hw_digctl_emi_status) /* 0x040 */
+ mx28_reg_32(hw_digctl_read_margin) /* 0x050 */
+ uint32_thw_digctl_writeonce;/* 0x060 */
+ uint32_treserved_writeonce[3];
Just mark all this crap as reserved and be done with it.
+ mx28_reg_32(hw_digctl_bist_ctl) /* 0x070 */
+ mx28_reg_32(hw_digctl_bist_status) /* 0x080 */
+ uint32_thw_digctl_entropy; /* 0x090 */
+ uint32_treserved_entropy[3];
+ uint32_thw_digctl_entropy_latched; /* 0x0a0 */
+ uint32_treserved_entropy_latched[3];
+
+ uint32_treserved1[4];
+
+ mx28_reg_32(hw_digctl_microseconds) /* 0x0c0 */
+ uint32_thw_digctl_dbgrd;/* 0x0d0 */
+ uint32_treserved_hw_digctl_dbgrd[3];
+ uint32_thw_digctl_dbg; /* 0x0e0 */
+ uint32_treserved_hw_digctl_dbg[3];
+
+ uint32_treserved2[4];
Just like this :)
+
+ mx28_reg_32(hw_digctl_usb_loopback) /* 0x100 */
+ mx28_reg_32(hw_digctl_ocram_status0)/* 0x110 */
+ mx28_reg_32(hw_digctl_ocram_status1)/* 0x120 */
+ mx28_reg_32(hw_digctl_ocram_status2)/* 0x130 */
+ mx28_reg_32(hw_digctl_ocram_status3)/* 0x140 */
+ mx28_reg_32(hw_digctl_ocram_status4)/* 0x150 */
+ mx28_reg_32(hw_digctl_ocram_status5)/* 0x160 */
+ mx28_reg_32(hw_digctl_ocram_status6)/* 0x170 */
+
Re: [U-Boot] Integity validation (checksum) of a squashfs root file system
Hi M, sha1sum does provide a console output but nothing that could be used for an automated check like crc32 -v... Make it export an env. variable? M Pascal -Original Message- From: Marek Vasut Sent: Monday, February 06, 2012 11:34 AM To: u-boot@lists.denx.de Cc: Pascal Levesque Subject: Re: [U-Boot] Integity validation (checksum) of a squashfs root file system Hi, I would like to validate the integrity (checksum) of a squashfs root file system before starting Linux. Current strategy I am using is: - Wrap squashfs rootfs inside a u-boot image - TFTP download on the target - Download validation using iminfo - Save squashfs rootfs in flash without the image header (Linux failed to load squashfs rootfs if u-boot image is present) Problems: - I need to hardcode squashfs rootfs offset in u-boot image in order to be able to flash it - U-Boot image header information (size, crc, ...) is lost after a reboot. It is not possible to check the integrity of the flash content. I would like to save some fields of u-boot image header (size, crc, ...) in u-boot environment variables. And then do an integrity check at boot time. I have not find a way to extract those fields and save them without changing u-boot code. I have added some code to “iminfo” command to set environment variables for CRC, size, payload offset, timestamp. Is it an acceptable way of doing it? Is there a better way of doing it? Thanks in advance, Pascal Use sha1sum integrated into uboot and stick it at the end? M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 1/4] ARM: enable Thumb build
On Mon, Feb 6, 2012 at 4:37 AM, Aneesh V ane...@ti.com wrote: Enable Thumb build and ARM-Thumb interworking based on the new config flag CONFIG_SYS_THUMB_BUILD Signed-off-by: Aneesh V ane...@ti.com [snip] -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: -PF_CPPFLAGS_ARM := $(call cc-option,-marm,) +# Choose between ARM/Thumb instruction sets +ifeq ($(CONFIG_SYS_THUMB_BUILD),y) +PF_CPPFLAGS_ARM += $(call cc-option, -mthumb -mthumb-interwork, \ + -marm -mno-thumb-interwork) +else +PF_CPPFLAGS_ARM += $(call cc-option, -marm -mno-thumb-interwork) +endif We need the ':=' syntax to evaluate this once rather than for every file we build. Same with the rest of the changes here. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
On 2/4/2012 8:38 PM, Mike Frysinger wrote:
On Saturday 04 February 2012 22:02:46 Troy Kisky wrote:
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
-static struct phy_driver BCM5461S_driver = {
+struct phy_driver BCM5461S_driver __phy_entry = {
why do you have to remove the static ? that shouldn't affect the section name
that it gets placed into.
I had static to start. But the compiler ate all of the code. No
references to any of the static symbols.
--- a/include/phy.h
+++ b/include/phy.h
+extern struct phy_driver __phy_entry_start, __phy_entry_end;
linker symbols should be declared like:
extern char __phy_entry_start[];
Why char ?
+ . = ALIGN(4);
+ __phy_entry_start = .;
+ .phy_entry : {
+ KEEP(*(.phy_entry))
+ }
+ __phy_entry_end = .;
might have to introduce a helper macro like Linux's VMLINUX_SYMBOL() since
some targets have a symbol prefix (like an underscore)
-mike
Hmmm. Your right,
grep ___u_boot_cmd_start 0001-RFC-create-u-boot-common.lds.patch
finds that arch/blackfin/cpu/u-boot.lds has an extra _
Thanks for pointing it out.
Troy
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Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
On Monday 06 February 2012 13:48:13 Troy Kisky wrote:
On 2/4/2012 8:38 PM, Mike Frysinger wrote:
On Saturday 04 February 2012 22:02:46 Troy Kisky wrote:
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
-static struct phy_driver BCM5461S_driver = {
+struct phy_driver BCM5461S_driver __phy_entry = {
why do you have to remove the static ? that shouldn't affect the section
name that it gets placed into.
I had static to start. But the compiler ate all of the code. No
references to any of the static symbols.
sounds like you should change the __phy_entry define from unused to used
-mike
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Re: [U-Boot] [PATCH] davinci: cleanup davinci_sync_env_enetaddr() fucntion
On Monday 06 February 2012 04:59:53 Manjunath Hadli wrote:
--- a/arch/arm/cpu/arm926ejs/davinci/misc.c
+++ b/arch/arm/cpu/arm926ejs/davinci/misc.c
+ ret = eth_getenv_enetaddr_by_index(eth, 0, env_enetaddr);
+ if (ret !memcmp(env_enetaddr, \0\0\0\0\0\0, 6)) {
i don't think the memcmp() is necessary. the core code already calls
is_valid_ether_addr() and one of the checks in there is for all zeros.
-mike
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Re: [U-Boot] [PATCH] arm: Add option to disable code relocation
On Monday 06 February 2012 09:49:27 Tom Rini wrote: On Mon, Feb 6, 2012 at 1:43 AM, Graeme Russ wrote: On 02/06/2012 06:51 PM, Wolfgang Denk wrote: Graeme Russ wrote: I think the immediate focus should be on centralising the init sequence processing into /common/init.c and then bringing the new'initcall' architecture online Agreed. Once these have been done, any board can just specific: SKIP_INIT(RELOC) I will probably object to his, too - for the same reasons. Considering this is a 'free' artefact of how the init sequence functions, and that it is board specific and totally non-invasive for anyone else (i.e. no ugly ifdef's anywhere else in the code) I'm surprised you would object... To pick up Wolfgang's argument, but why do we want to skip relocation? You can debug through it, it's documented (official wiki has GDB, over in TI-land, the wiki page for CCS has the bits for doing it in that Eclipse-based env, other debuggers I'm sure have a similar now add symbols at this offset from link option) and the end result makes it very easy for end-users to break their world (default kernel load addrs being where U-Boot would be). if you have a static platform which never changes, isn't the relocation a waste of time ? i can understand wanting relocation by default for platforms where memory sizes are unknown, but it's not uncommon for people to have fixed hardware when they deploy. although, with SPL picking up direct-to-Linux booting, this argument might not matter that much anymore. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Add option to disable code relocation
On Mon, Feb 6, 2012 at 12:27 PM, Mike Frysinger vap...@gentoo.org wrote: On Monday 06 February 2012 09:49:27 Tom Rini wrote: On Mon, Feb 6, 2012 at 1:43 AM, Graeme Russ wrote: On 02/06/2012 06:51 PM, Wolfgang Denk wrote: Graeme Russ wrote: I think the immediate focus should be on centralising the init sequence processing into /common/init.c and then bringing the new'initcall' architecture online Agreed. Once these have been done, any board can just specific: SKIP_INIT(RELOC) I will probably object to his, too - for the same reasons. Considering this is a 'free' artefact of how the init sequence functions, and that it is board specific and totally non-invasive for anyone else (i.e. no ugly ifdef's anywhere else in the code) I'm surprised you would object... To pick up Wolfgang's argument, but why do we want to skip relocation? You can debug through it, it's documented (official wiki has GDB, over in TI-land, the wiki page for CCS has the bits for doing it in that Eclipse-based env, other debuggers I'm sure have a similar now add symbols at this offset from link option) and the end result makes it very easy for end-users to break their world (default kernel load addrs being where U-Boot would be). if you have a static platform which never changes, isn't the relocation a waste of time ? i can understand wanting relocation by default for platforms where memory sizes are unknown, but it's not uncommon for people to have fixed hardware when they deploy. although, with SPL picking up direct-to-Linux booting, this argument might not matter that much anymore. Yes, there's lots of tricks a deployment system can take to speed things up, and I agree, SPL loading Linux will make some of these less desirable. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
On 2/6/2012 12:07 PM, Mike Frysinger wrote:
On Monday 06 February 2012 13:48:13 Troy Kisky wrote:
On 2/4/2012 8:38 PM, Mike Frysinger wrote:
On Saturday 04 February 2012 22:02:46 Troy Kisky wrote:
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
-static struct phy_driver BCM5461S_driver = {
+struct phy_driver BCM5461S_driver __phy_entry = {
why do you have to remove the static ? that shouldn't affect the section
name that it gets placed into.
I had static to start. But the compiler ate all of the code. No
references to any of the static symbols.
sounds like you should change the __phy_entry define from unused to used
-mike
The would give me compiler warnings for unused variables. How does that
help?
Is there a keep attribute like the linker has for sections?
Troy
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Re: [U-Boot] [PATCH] arm: Add option to disable code relocation
Hi Mike, On Tue, Feb 7, 2012 at 6:27 AM, Mike Frysinger vap...@gentoo.org wrote: On Monday 06 February 2012 09:49:27 Tom Rini wrote: On Mon, Feb 6, 2012 at 1:43 AM, Graeme Russ wrote: On 02/06/2012 06:51 PM, Wolfgang Denk wrote: Graeme Russ wrote: I think the immediate focus should be on centralising the init sequence processing into /common/init.c and then bringing the new'initcall' architecture online Agreed. Once these have been done, any board can just specific: SKIP_INIT(RELOC) I will probably object to his, too - for the same reasons. Considering this is a 'free' artefact of how the init sequence functions, and that it is board specific and totally non-invasive for anyone else (i.e. no ugly ifdef's anywhere else in the code) I'm surprised you would object... To pick up Wolfgang's argument, but why do we want to skip relocation? You can debug through it, it's documented (official wiki has GDB, over in TI-land, the wiki page for CCS has the bits for doing it in that Eclipse-based env, other debuggers I'm sure have a similar now add symbols at this offset from link option) and the end result makes it very easy for end-users to break their world (default kernel load addrs being where U-Boot would be). if you have a static platform which never changes, isn't the relocation a waste of time ? i can understand wanting relocation by default for platforms where memory sizes are unknown, but it's not uncommon for people to have fixed hardware when they deploy. Also, if SPL can determine total SDRAM, copy U-Boot to the final location and perform the relocations, there is no need for relocation to be done by U-Boot. As I understand it, SPL loads U-Boot into a fixed address and then U-Boot copies itself to top-of-RAM. We can save one copy Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
Le 05/02/2012 21:40, Mike Frysinger a écrit : On Sunday 05 February 2012 08:26:57 Albert ARIBAUD wrote: Le 05/02/2012 04:38, Mike Frysinger a écrit : On Saturday 04 February 2012 22:02:46 Troy Kisky wrote: --- a/include/phy.h +++ b/include/phy.h +extern struct phy_driver __phy_entry_start, __phy_entry_end; linker symbols should be declared like: extern char __phy_entry_start[]; Why should they? because that's what the GNU linker documentation says to, and that's how all existing symbols have been handled. look at asm/sections.h in every Linux arch. Does it? What I read from http://sourceware.org/binutils/docs-2.22/ld/Source-Code-Reference.html#Source-Code-Reference never says that linker-defined symbols should be declared in source code as char[]; actually, it gives examples where linker-defined symbols are defined with types int and char, not char[]. What the section says, OTOH, is that one must remember that the linker will not allocate space for a symbol unless explicitly instructed to, so such symbols my not have meaningful values, only addresses, and the code should access these symbols by address -- which is what is being done in the code of the RFC patch IIUC. -mike Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
Le 06/02/2012 21:17, Troy Kisky a écrit :
On 2/6/2012 12:07 PM, Mike Frysinger wrote:
On Monday 06 February 2012 13:48:13 Troy Kisky wrote:
On 2/4/2012 8:38 PM, Mike Frysinger wrote:
On Saturday 04 February 2012 22:02:46 Troy Kisky wrote:
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
-static struct phy_driver BCM5461S_driver = {
+struct phy_driver BCM5461S_driver __phy_entry = {
why do you have to remove the static ? that shouldn't affect the
section
name that it gets placed into.
I had static to start. But the compiler ate all of the code. No
references to any of the static symbols.
sounds like you should change the __phy_entry define from unused to
used
-mike
The would give me compiler warnings for unused variables. How does that
help?
Is there a keep attribute like the linker has for sections?
No, but indeed not keeping the 'static' keyword has this effect: the
object file will keep the phy struct, in case it is referred to by
another object file at link time.
Troy
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH 2/2] RFC: Let linker create phy array
On Monday 06 February 2012 15:17:32 Troy Kisky wrote:
On 2/6/2012 12:07 PM, Mike Frysinger wrote:
On Monday 06 February 2012 13:48:13 Troy Kisky wrote:
On 2/4/2012 8:38 PM, Mike Frysinger wrote:
On Saturday 04 February 2012 22:02:46 Troy Kisky wrote:
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
-static struct phy_driver BCM5461S_driver = {
+struct phy_driver BCM5461S_driver __phy_entry = {
why do you have to remove the static ? that shouldn't affect the
section name that it gets placed into.
I had static to start. But the compiler ate all of the code. No
references to any of the static symbols.
sounds like you should change the __phy_entry define from unused to
used
The would give me compiler warnings for unused variables. How does that
help?
does gcc issue warnings ? doesn't seem to do so for me.
Is there a keep attribute like the linker has for sections?
yes, __attribute__((used))
-mike
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