Hi Albert,
On 02/07/12 00:56, Albert ARIBAUD wrote:
Le 09/01/2012 09:30, Nikita Kiryanov a écrit :
On 01/05/2012 04:56 PM, Wolfgang Denk wrote:
Dear Igor Grinberg,
In message1325764937-7342-1-git-send-email-grinb...@compulab.co.il
you wrote:
From: Nikita Kiryanovnik...@compulab.co.il
Add
On 07/02/2012 02:38, Bud Miljkovic wrote:
Hi Stefano,
I cloned from http://git.denx.de/u-boot-imx.git into local directory
/home/budm/Mamaku-Boot/. Then configured for mx53loco_config without a
problem but the make failed.
I am using the same tools as the previous case when I was
On 18/01/2012 12:33, Matthias Fuchs wrote:
This patch adds support for the MX28 internal RTC
and enables u-boot's date command.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
On 18/01/2012 12:33, Matthias Fuchs wrote:
This patch enables USB host support on the MX28EVK board.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=
On 18/01/2012 12:33, Matthias Fuchs wrote:
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.
This patch has been tested on a
Hi all,
We have been trying get to the splash screen from uboot but we are not
able to get it. I am using at91sam9g45-ekes board. And I have been
trying to get as per http://wiki.openmoko.org/wiki/Splash_screen. Can
any one help me out to bring it up.
--
Thanks and Regards,
Sathishkumar D
+ uint32_thw_digctl_writeonce;/* 0x060 */
+ uint32_treserved_writeonce[3];
Just mark all this crap as reserved and be done with it.
If that's good enought, that will save me some work next time.
+ uint32_thw_digctl_dbg;
On 06.02.2012 16:29, Marek Vasut wrote:
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is
Hi Wolfgang,
The following changes since commit 137703b811502dfea364650fb3e17f20b4c21333:
overo: add SPL support (2012-01-16 08:40:13 +0100)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git master
Graeme Russ (18):
x86: Import glibc memcpy implementation
Hi Simon,
On 02/06/2012 10:41 AM, Simon Glass wrote:
Hi Graeme,
On Sun, Feb 5, 2012 at 3:37 PM, Graeme Russ graeme.r...@gmail.com wrote:
Hi Simon
On Mon, Feb 6, 2012 at 10:32 AM, Simon Glass s...@chromium.org wrote:
Hi Graeme,
[snip]
Which reminds me - did you do that pull request for
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is
From: Robert Delien rob...@delien.nl
This set of patches fixes ref_cpu clock setup.
Robert Delien (4):
Renamed mx28_register to mx28_register_32 to prepare for
mx28_register_8
Introducing 8-bit wide register, mx28_register_8
Fix erroneous 32-bit access to hw_clkctrl_frac0 and
From: Robert Delien rob...@delien.nl
This patch introduces an 8-bit register, mx28_register_8, in order to
prepare for fixing erroneous 32-bit wide access of registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien rob...@delien.nl
---
From: Robert Delien rob...@delien.nl
This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/clock.c |4 +-
From: Robert Delien rob...@delien.nl
This patch fixes erroneous 32-bit access to registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/clock.c | 70 ++---
From: Robert Delien rob...@delien.nl
This patch prevents the needless switching on and off of PLL bypass
mode. With this patch in place, single-stepping through the SPL is
now possible.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |4
On Mon, Feb 6, 2012 at 11:17 PM, Ramneek Mehresh
ramneek.mehr...@freescale.com wrote:
+ start_offset, compat_mph);
if (node_offset 0) {
- printf(WARNING: could not find compatible node %s: %s.\n,
- compat,
Hi M,
this is very similar to my actual solution with iminfo (see below).
In fact, the main question is: Is it generic enough to be integrated in
u-boot development tree?
Is it better to modify sha1sum instead?
Or finally, a more generic approach is to offer a command to set an
environment
From: Robert Delien rob...@delien.nl
This patch eliminates the use of magic numbers for the scratch register
addresses. The registers in the DIGCTL sections are now defined and
used to access the scratch registers.
Robert Delien (2):
Added register definitions for DIGCTL registers
Replaced
From: Robert Delien rob...@delien.nl
This patch adds register definitions for the registers of the DIGCTL
IP-block.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/include/asm/arch-mx28/imx-regs.h|1 +
arch/arm/include/asm/arch-mx28/regs-digctl.h | 155
From: Robert Delien rob...@delien.nl
This patch replaces the use of magice numbers for scratch register
addresses with earlier defined register definitions.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |8
On 06/02/2012 23:43, Albert ARIBAUD wrote:
Hi,
Hi Albert,
Some time ago I have posted http://patchwork.ozlabs.org/patch/136368/
which adds HUSH parser to ED Mini V2. In itself, the change is only made
of three CONFIG defines.
This patch has built cleanly and worked as expected until
On 06/02/2012 15:55, Igor Grinberg wrote:
Hi Stefano,
Hi Igor,
+#ifdef CONFIG_USB_EHCI
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+.port_mode[2] = OMAP_EHCI_PORT_MODE_PHY,
+};
On Monday 06 February 2012 16:01:56 Albert ARIBAUD wrote:
Le 06/02/2012 21:57, Mike Frysinger a écrit :
The would give me compiler warnings for unused variables. How does that
help?
does gcc issue warnings ? doesn't seem to do so for me.
Some do, and some will.
vague ... be nice to
On Monday 06 February 2012 16:44:36 Troy Kisky wrote:
On 2/6/2012 1:57 PM, Mike Frysinger wrote:
On Monday 06 February 2012 15:17:32 Troy Kisky wrote:
On 2/6/2012 12:07 PM, Mike Frysinger wrote:
On Monday 06 February 2012 13:48:13 Troy Kisky wrote:
On 2/4/2012 8:38 PM, Mike Frysinger
On 07/02/2012 16:13, Stefano Babic wrote:
This is a strange effect. I have tested setting OMAP_EHCI_PORT_MODE_PHY
(of course the phy is on another port), and everything works. However,
after setting port_mode[2] to OMAP_USBHS_PORT_MODE_NONE, it does not
work anymore and no storage are
Hi folks,
I'm a newbie.
I'm trying to write a basic script in u-boot which erases and writes
x-loader to NAND between 0x0 and 0x8.
When I save some basic environment variables to u-boot such as:
set foo bar
saveenv
foo is always there when i come back. However, when I write a slightly
Hi list,
I've enabled hush on my openrd based board because I need the test
command to choose how to boot (see patch below).
When I start u-boot for the first time I get the expected
*** Warning - bad CRC, using default environment
output, and everything works fine. However, if I
We are seeing occasional timeouts in the Tegra mmc code when
we are reading from external MMC cards. These don't seem to be
detrimental if they are handled properly. This CL properly
clears the normal interrupt status register (norintsts) in
error conditions. If we don't do this, when we come
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada peter.bar...@logicpd.com
---
arch/arm/include/asm/arch-omap3/mem.h | 40
On 02/07/2012 11:32 AM, Peter Barada wrote:
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Arrgh, got the parameters to MCFG() backwards, I'll shoot a
On Tue, Feb 7, 2012 at 9:35 AM, Peter Barada peter.bar...@logicpd.com wrote:
On 02/07/2012 11:32 AM, Peter Barada wrote:
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
---
arch/arm/cpu/arm926ejs/mx28/timer.c | 19 +--
1 files changed, 17 insertions(+), 2
From: Robert Delien rob...@delien.nl
This patch adds register definitions for the registers of the DIGCTL
IP-block.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/include/asm/arch-mx28/imx-regs.h|1 +
arch/arm/include/asm/arch-mx28/regs-digctl.h | 155
From: Robert Delien rob...@delien.nl
This patch replaces the use of magice numbers for scratch register
addresses with earlier defined register definitions.
Signed-off-by: Robert Delien rob...@delien.nl
---
arch/arm/cpu/arm926ejs/mx28/mx28.c |8
From: Robert Delien rob...@delien.nl
This patch prevents the needless switching on and off of PLL bypass
mode. With this patch in place, single-stepping through the SPL is
now possible.
Why did FSL have it in the bootlets though? Fabio, can you explain?
M
Signed-off-by: Robert Delien
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB
On 07/02/2012 17:54, Marek Vasut wrote:
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is
On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut marek.va...@gmail.com wrote:
From: Robert Delien rob...@delien.nl
This patch prevents the needless switching on and off of PLL bypass
mode. With this patch in place, single-stepping through the SPL is
now possible.
Why did FSL have it in the
Bit definitions for these registers are missing. I have a crappy script that
converts original FSL files into u-boot variant (though it needs some handjob
still).
Bring it on, and I'll see if I can do it. No, this is not implying I'm good at
hand-
jobs.
But please accept my patch in the mean
On 07/02/2012 10:32, Matthias Fuchs wrote:
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image
On 07/02/2012 17:47, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
---
This fixes building of MX28 based boards - applied to u-boot-imx,
From: Robert Delien rob...@delien.nl
This patch makes a small correction to the mx28evk board pin
configuration.
1. The Debug UART (DUART) SPIO pins should be operating in the 3v3
domain, not the 1v8 domain, because the connected MX3222 level-
shifter operates in the 3v3 domain too.
2. The SSP0
On 31/01/2012 01:00, Marek Vasut wrote:
The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Robert Deliën rob...@delien.nl
Cc:
From: Robert Delien rob...@delien.nl
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index 396761b..d724d2f 100644
From: Robert Delien rob...@delien.nl
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c | 14 ++
1 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index d724d2f..178bde2
From: Robert Delien rob...@delien.nl
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c | 27 ++-
1 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index
From: Robert Delien rob...@delien.nl
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index
From: Robert Delien rob...@delien.nl
This set of patches fixes ref_cpu clock setup.
Robert Delien (4):
Renamed mx28_register to mx28_register_32 to prepare for
mx28_register_8
Introducing 8-bit wide register, mx28_register_8
Fix erroneous 32-bit access to hw_clkctrl_frac0 and
From: Robert Delien rob...@delien.nl
Description of the patches won't hurt ;-)
Otherwise, these patches are Fabios ... so he'll ack/nak them
M
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c | 24
1 files changed, 24
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm926ejs/mx27/timer.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
b/arch/arm/cpu/arm926ejs/mx27/timer.c
index 5af9359..226c0a5 100644
---
Hi Mike,
On Fri, Feb 3, 2012 at 5:44 AM, Mike Frysinger vap...@gentoo.org wrote:
in general, i like this. my only concern would be the drivers that might
break due to incorrect cache management (which the volatile markers happen to
work around for them).
having the API accept a volatile but
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada peter.bar...@logicpd.com
---
Changes for V2:
Fix ordering of
The initial checkin dropped pinmux setup for GPMC pins A6-A10, D0-D7 and
NCS1/2 necessary to access LAN92xx on Logic OMAP35x/DM37x modules.
Signed-off-by: Peter Barada peter.bar...@logicpd.com
---
board/logicpd/omap3som/omap3logic.c | 15 +++
1 files changed, 15 insertions(+), 0
On 02/07/2012 12:45 PM, Peter Barada wrote:
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada peter.bar...@logicpd.com
---
Robert, I tested first three patches on my board and it refuses to boot. Why?
I'm trying to reproduce, but my workspace no longer builds after a pull... The
set
obviously works in my own workspace, so I'm trying to figure out the problem.
___
U-Boot
Robert, I tested first three patches on my board and it refuses to boot. Why?
I can reproduce now. It all goes south after patch 3. I'm working on it.
___
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http://lists.denx.de/mailman/listinfo/u-boot
Hi,
On Tue, Feb 7, 2012 at 8:12 AM, Alex Zeffertt
azeffe...@cambridgesys.com wrote:
Hi list,
I've enabled hush on my openrd based board because I need the test
command to choose how to boot (see patch below).
When I start u-boot for the first time I get the expected
*** Warning -
Robert, I tested first three patches on my board and it refuses to boot.
Why?
I can reproduce now. It all goes south after patch 3. I'm working on it.
Did you even test before submitting? Also, I think if I remove patch 3, it all
works fine.
M
ACTIM_CTRLA macro errently passes b parameter to ACTIM_CTRLA_TRAS()
instead of c. To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada peter.bar...@logicpd.com
---
Changes for V2:
Fix ordering of
Even I am facing this problem.
I have applied the patches to be mainlined to u-boot-marvell.git (tobe send for
pull request) but my build is failing due to same issue.
Regards..
Prafulla . . .
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm926ejs/mx27/timer.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
b/arch/arm/cpu/arm926ejs/mx27/timer.c index 5af9359..226c0a5 100644
---
Hi,
Looking for help on DDR2 configuration in u-boot.
I have the MPC8313ERDB from Freescale. It has 128Mbytes of DDR2 ram. The
existing 128MByte that uses only CS0.
I have a new board design to bring up.
The timing parameters are all ok but I need some guidance on changing the
settings
Dear Dirk Behme,
In message 4f30c794.50...@de.bosch.com you wrote:
Also, if SPL can determine total SDRAM, copy U-Boot to the final location
and perform the relocations, there is no need for relocation to be done by
U-Boot. As I understand it, SPL loads U-Boot into a fixed address and then
Dear Aneesh V,
In message 4f30d06e.8060...@ti.com you wrote:
I agree. Even on some platforms that are not fully static (such as having
variants with different memory sizes) the minimum available memory is
more than enough to allocate big enough partitions for each need at
U-Boot level. And
Hi Wolfgang,
On Wed, Feb 8, 2012 at 10:23 AM, Wolfgang Denk w...@denx.de wrote:
Dear Dirk Behme,
In message 4f30c794.50...@de.bosch.com you wrote:
Also, if SPL can determine total SDRAM, copy U-Boot to the final location
and perform the relocations, there is no need for relocation to be
Dear Graeme Russ,
In message CALButCKfG+guStJP+M5E=nsr34vphzgbrebxquxd6028sw6...@mail.gmail.com
you wrote:
If SPL was to determing the relocation address, it would also have to
read the environment, because there are a number of environment
variables which can cause (dynamically) the
Hi Wolfgang,
On Wed, Feb 8, 2012 at 10:36 AM, Wolfgang Denk w...@denx.de wrote:
Dear Graeme Russ,
In message
CALButCKfG+guStJP+M5E=nsr34vphzgbrebxquxd6028sw6...@mail.gmail.com you
wrote:
If SPL was to determing the relocation address, it would also have to
read the environment,
Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Dirk Behme dirk.be...@de.bosch.com
---
arch/arm/include/asm/arch-mx6/imx-regs.h |1 +
drivers/net/fec_mxc.c| 21 +++--
Boards may have things they want done before or after normal phy config.
Letting the boards call drv-config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Dirk Behme
Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.
There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
Surround non PHYLIB routines miiphy_restart_aneg
and miiphy_wait_aneg with ifndef CONFIG_PHYLIB.
When later PHYLIB is required it is easy to delete
the non-PHYLIB code. This separation idea
came from Andy Fleming.
fec_miiphy_read, and fec_miiphy_write changed to
fec_phy_read, and fec_phy_write
Add the gigabit phy KSZ9021.
Also, add function ksz9021_phy_extended_write
/_read for access to the phys extended registers.
The environment variable disable_giga
can be used to disable 1000baseTx.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Dirk Behme
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
---
drivers/net/phy/atheros.c|9 +
drivers/net/phy/broadcom.c | 15 +++
drivers/net/phy/davicom.c|9 +
drivers/net/phy/lxt.c|9 +
drivers/net/phy/marvell.c| 24
On 2/7/2012 5:39 PM, Graeme Russ wrote:
Hi Troy,
On Wed, Feb 8, 2012 at 11:20 AM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
This makes adding linker defined tables easier
as only 1 lds file (include/u-boot-common.lds)
will need to be touched instead of 193 files.
Signed-off-by: Troy
Hi Tony,
On Wed, Feb 8, 2012 at 11:49 AM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/7/2012 5:39 PM, Graeme Russ wrote:
Hi Troy,
On Wed, Feb 8, 2012 at 11:20 AM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
This makes adding linker defined tables easier
as only 1 lds file
Hi Troy,
On Wed, Feb 8, 2012 at 12:21 PM, Graeme Russ graeme.r...@gmail.com wrote:
Hi Tony,
Oops, sorry - forgot to proof read
Regards,
Graeme
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Hi Troy,
On Wed, Feb 8, 2012 at 12:21 PM, Graeme Russ graeme.r...@gmail.com wrote:
Add U_BOOT_LDS_SECTION(phy_entry, 4) to all the linker scripts
Oh, and it should have an #ifdef around it - I know it's probably harmless,
but I dislike having 'fluff' floating around :)
Regards,
Graeme
On 2/7/2012 6:21 PM, Graeme Russ wrote:
Hi Tony,
On Wed, Feb 8, 2012 at 11:49 AM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/7/2012 5:39 PM, Graeme Russ wrote:
Hi Troy,
On Wed, Feb 8, 2012 at 11:20 AM, Troy Kisky
troy.ki...@boundarydevices.comwrote:
This makes adding linker
Hi Troy,
On Wed, Feb 8, 2012 at 12:56 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/7/2012 6:21 PM, Graeme Russ wrote:
Hi Tony,
On Wed, Feb 8, 2012 at 11:49 AM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
That works fine for existing sections.. i.e
Hi Marek,
On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut marek.va...@gmail.com wrote:
From: Robert Delien rob...@delien.nl
This patch prevents the needless switching on and off of PLL bypass
mode. With this patch in place, single-stepping through the SPL is
now possible.
Why did FSL have it
Hi Marek,
On Tue, Feb 7, 2012 at 2:53 PM, Marek Vasut marek.va...@gmail.com wrote:
From: Robert Delien rob...@delien.nl
This patch prevents the needless switching on and off of PLL bypass
mode. With this patch in place, single-stepping through the SPL is
now possible.
Why did
That is because not only CPU running @ PLL, HBUS also source from P_CLK, we
switch CPU clock to XTAL, the HBUS clock also slow down.
Ok, but you switch it back to PLL after the power supply was configured. And
then the consumption grows back.
M
Best Regards.
Anson huang 黄勇才
Freescale
On 2/7/2012 7:24 PM, Graeme Russ wrote:
Hi Troy,
On Wed, Feb 8, 2012 at 12:56 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/7/2012 6:21 PM, Graeme Russ wrote:
Hi Tony,
On Wed, Feb 8, 2012 at 11:49 AM, Troy Kisky
troy.ki...@boundarydevices.comwrote:
That works fine for
Hi Troy,
On Wed, Feb 8, 2012 at 1:46 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/7/2012 7:24 PM, Graeme Russ wrote:
The next biggie is where to define all the externs exported from the
linker script as a result of using the U_BOOT_LDS_SECTION macro. I'm half
tempted to think
Can someone clue me in how one goes about a NAND bootable u-Boot?
-bud
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On Tue, Feb 7, 2012 at 11:52 AM, Scott Larson slar...@a2etech.com wrote:
Hi,
Looking for help on DDR2 configuration in u-boot.
I have the MPC8313ERDB from Freescale. It has 128Mbytes of DDR2 ram. The
existing 128MByte that uses only CS0.
I have a new board design to bring up.
The
Reformat the data so it's easier to navigate through them.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 86
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff
Hi Albert/Heiko
I have posted the patch for this fix for all ARM Marvell SoCs.
Will include it and post the pull request.
Regards..
Prafulla . . .
-Original Message-
From: Prafulla Wadaskar
Sent: 08 February 2012 02:40
To: 'Albert ARIBAUD'; Heiko Schocher
Cc: U-Boot
Subject: RE:
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell
build fails with below error
common/libcommon.o: In function `cread_line':
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_ticks'
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to
Hi Prafulla,
On Wed, Feb 8, 2012 at 7:49 PM, Prafulla Wadaskar prafu...@marvell.com wrote:
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell
build fails with below error
common/libcommon.o: In function `cread_line':
/home/uboot/src/u-boot-arm/common/main.c:717:
Hi Stefano,
On Tue, Feb 7, 2012 at 9:03 PM, Stefano Babic sba...@denx.de wrote:
On 07/02/2012 16:13, Stefano Babic wrote:
This is a strange effect. I have tested setting OMAP_EHCI_PORT_MODE_PHY
(of course the phy is on another port), and everything works. However,
after setting port_mode[2]
Based on comments from Stefano Babic sba...@denx.de
In this thread [1] here the updated patch [2]
same is corrected in u-boot tree having v4 ehci-omap patch-set:
git://gitorious.org/denx_u-boot/denx_uboot_omap.git v4_ehci_omap4
---
Regards,
Govindraj.R
[1]:
Hello Stefano,
Stefano Babic wrote:
On 06/02/2012 23:43, Albert ARIBAUD wrote:
Hi,
Hi Albert,
Some time ago I have posted http://patchwork.ozlabs.org/patch/136368/
which adds HUSH parser to ED Mini V2. In itself, the change is only made
of three CONFIG defines.
This patch has built
Dear Wolfgang,
On Wednesday 08 February 2012 04:56 AM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4f30d06e.8060...@ti.com you wrote:
I agree. Even on some platforms that are not fully static (such as having
variants with different memory sizes) the minimum available memory is
more than
On 08.02.2012 00:48, Graeme Russ wrote:
Hi Wolfgang,
On Wed, Feb 8, 2012 at 10:36 AM, Wolfgang Denk w...@denx.de wrote:
Dear Graeme Russ,
In message CALButCKfG+guStJP+M5E=nsr34vphzgbrebxquxd6028sw6...@mail.gmail.com
you wrote:
If SPL was to determing the relocation address, it would also
On 08.02.2012 00:36, Wolfgang Denk wrote:
Dear Graeme Russ,
In message CALButCKfG+guStJP+M5E=nsr34vphzgbrebxquxd6028sw6...@mail.gmail.com
you wrote:
If SPL was to determing the relocation address, it would also have to
read the environment, because there are a number of environment
variables
-Original Message-
From: Graeme Russ [mailto:graeme.r...@gmail.com]
Sent: 08 February 2012 11:00
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [U-Boot] [PATCH] bugfix: all Marvell specific build fails
due to undefined reference to
Hi Dirk,
On Tue, Feb 7, 2012 at 10:51 PM, Dirk Behme dirk.be...@de.bosch.com wrote:
On 08.02.2012 00:36, Wolfgang Denk wrote:
Dear Graeme Russ,
In message
CALButCKfG+guStJP+M5E=nsr34vphzgbrebxquxd6028sw6...@mail.gmail.com you
wrote:
If SPL was to determing the relocation address, it
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