2013/2/28 Damien HUANG damien...@hotmail.com
After investigation, I believe the problem can be fixed at function
set_cluster within file fat_write.c under directory /fs/fat (patch file
was attached).
Hi Damien,
I found no trace of your patch in the mailing list (perhaps the attachment was
From: Dirk Behme dirk.be...@de.bosch.com
Several ARM timer implementations use gd-arch.tbl to record the
absolute tick count of 32-bit counters, including timer overflows.
For example arch/arm/imx-common/timer.c does:
ulong lastinc;
ulong now = counter value;
if (no overflow) {
...
}
Hello,
Separating DATA phase and STATUS phase by mdelay(1) helps me solve current
problem.
diff --git a/common/usb_storage.c b/common/usb_storage.c
index fb322b4..ea88536 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -740,6 +740,7 @@ static int usb_stor_BBB_transport(ccb *srb,
On 04/03/13 00:27, Wolfgang Denk wrote:
Dear Mark Jackson,
In message 5130c537.8000...@mimc.co.uk you wrote:
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define V_MPUCLK desired clock freq in Hz
Dear xulei,
In message 1362368146-738-1-git-send-email-b33...@freescale.com you wrote:
+ /* On P204x/P304x/P50x0 Rev1.0, USB transmit will result internal
+ * multi-bit ECC errors, which has impact on performance, so software
+ * should disable all ECC reporting from USB1 and
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK desired clock freq in Hz
Signed-off-by: Mark Jackson m...@newflow.co.uk
---
Changes in v3:
- Changed from V_MPUCLK to
Dear xulei,
In message 1362368146-738-1-git-send-email-b33...@freescale.com you wrote:
On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2 by setting bits
Dear Jagannadha Sutradharudu Teki,
In message 51f05678-4118-4be8-bb94-ad295c407...@db3ehsmhs015.ehs.local you
wrote:
I think the entire logic to add mtest address support through devicetree with
the
help of environment variables is a mess as there are some side effects (as
you mentioned
On 03/02/2013 11:46 PM, Albert ARIBAUD wrote:
(..) Basically, this means we need Vincent's series
to be applied first, then we can apply Sricharan's.
Hi,
I think this is too much trouble for a one liner. Please feel free to
squash.
Best regards,
V.
Dear Dirk Behme,
In message 1362387637-32334-1-git-send-email-dirk.be...@de.bosch.com you
wrote:
From: Dirk Behme dirk.be...@de.bosch.com
Several ARM timer implementations use gd-arch.tbl to record the
absolute tick count of 32-bit counters, including timer overflows.
For example
Dear Anton Vasilyev,
In message caly29_0wphebvh3orjg-rwn41ekxdarrgy+az0kucyg87i3...@mail.gmail.com
you wrote:
Separating DATA phase and STATUS phase by mdelay(1) helps me solve current
problem.
diff --git a/common/usb_storage.c b/common/usb_storage.c
index fb322b4..ea88536 100644
---
Dear Mark Jackson,
In message 51346856.8020...@mimc.co.uk you wrote:
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK desired clock freq in Hz
Why do you claim an accuracy of Hz
Dear Sonic Zhang,
In message cajxxz0o_ozk7w_cdfjkzpwdmfqwt1m-yn_bz6yzhrdfqt6w...@mail.gmail.com
you wrote:
Maybe I didn't describe it clearly. Yes, I return 0 at the end of this
function. But, the same function may return UNUSABLE_ERR(-17) at the
beginning if the data flags match
On 04/03/13 11:14, Wolfgang Denk wrote:
Dear Mark Jackson,
In message 51346856.8020...@mimc.co.uk you wrote:
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLKdesired clock freq in
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK desired clock freq in MHz
Signed-off-by: Mark Jackson m...@newflow.co.uk
---
Changes in v4:
- Now defined as MHz (not Hz)
Changes in
Mark == Mark Jackson mpfj-l...@mimc.co.uk writes:
Mark Allow AM335x MPU core clock speed to be specified in the board config
file.
Mark To use, add the following to the board's config file:-
Mark #define CONFIG_SYS_MPUCLKdesired clock freq in MHz
Mark Signed-off-by: Mark Jackson
On Sun, Mar 03, 2013 at 10:34:08PM +, Peter Korsgaard wrote:
Matt == Matt Porter mpor...@ti.com writes:
Matt TI814x has a 192MHz hsmmc reference clock. Select that clock rate
Matt when building for TI814x.
Matt Signed-off-by: Matt Porter mpor...@ti.com
Acked-by: Peter Korsgaard
+U-Boot mailing list
Hi Mingkai,
On Mon, Mar 4, 2013 at 12:48 AM, Hu Mingkai-B21284 b21...@freescale.com wrote:
Hi Simon,
After applied following patch, read from SPI flash will hang on p2041rdb
board.
From 2400727318a0a1ecf15a9deae85b0719c4c47aba Mon Sep 17 00:00:00 2001
From: Simon
Matt == Matt Porter mpor...@ti.com writes:
Hi,
Did you figure out why it was working for you with 96 MHz ref?
Matt Unfortunately not at a root cause level. Unless I'm missing
Matt something I would have expected the calculations from the
Matt supplied 96 MHz ref clock to result in 2x the
From: Knut Wohlrab knut.wohl...@de.bosch.com
The i.MX6 common timer uses the 32-bit variable tbl (time base lower)
to record the overflow of the 32-bit counter. I.e. if the counter
overflows, the variable tbl does overflow, too.
To capture this overflow, use the variable tbu (time base upper),
Dear Wolfgang,
On 04.03.2013 12:10, Wolfgang Denk wrote:
Dear Dirk Behme,
In message 1362387637-32334-1-git-send-email-dirk.be...@de.bosch.com you
wrote:
From: Dirk Behme dirk.be...@de.bosch.com
Several ARM timer implementations use gd-arch.tbl to record the
absolute tick count of 32-bit
On Thu, Feb 28, 2013 at 08:46:15AM -0500, Robert P. J. Day wrote:
it would seem that in addition to manually setting HOSTCC, a user
should also set HOSTSTRIP when building fw_printenv, no? there's no
mention of that in the README but the strip operation will certainly
fail without it.
On Mon, Mar 04, 2013 at 02:08:13PM +0800, Sonic Zhang wrote:
The following changes since commit 47104c37de076e2be35ae1b3d144614f4d24a766:
MAKEALL: add support for per architecture toolchains (2013-02-20
09:40:34 -0500)
are available in the git repository at:
On Thu, Feb 28, 2013 at 03:00:47PM +0800, Bo Shen wrote:
Add sama5d3xek support with following feature
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD support
- EMAC support
- USB support
Hi,
I've got a NAS which uses uboot:
U-Boot 1.1.4 (Feb 6 2012 - 14:40:46) Marvell version: 3.4.27
It's a Netgear ReadyNAS Duo V2, and the original sofware sucks. ;)
I would like to start with the original kernel (because it contains some
patches) and a custom debian made with multistrap.
Stephen Albert,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Friday, March 01, 2013 2:54 PM
To: Tom Warren
Cc: u-boot@lists.denx.de; Stephen Warren
Subject: Re: [U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata
workarounds
On 02/28/2013
On Mar 4, 2013, at 10:40 AM, JPT j-...@gmx.net wrote:
It's a Netgear ReadyNAS Duo V2, and the original sofware sucks. ;)
standalone=fsload 0x200 $(image_name);setenv bootargs $(console)
root=/dev/mtdblock0 rw ip=$(ipaddr):$(serverip)$(bootargs_end)
$(mvPhoneConfig); bootm 0x200;
Hi JPT,
On Mon, Mar 4, 2013 at 9:10 PM, JPT j-...@gmx.net wrote:
Hi,
I've got a NAS which uses uboot:
U-Boot 1.1.4 (Feb 6 2012 - 14:40:46) Marvell version: 3.4.27
It's a Netgear ReadyNAS Duo V2, and the original sofware sucks. ;)
I would like to start with the original kernel (because it
Hi Tom,
On Mon, 4 Mar 2013 08:30:11 -0800, Tom Warren twar...@nvidia.com
wrote:
Stephen Albert,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Friday, March 01, 2013 2:54 PM
To: Tom Warren
Cc: u-boot@lists.denx.de; Stephen Warren
Subject: Re:
Hi Jagan,
On Mon, 4 Mar 2013 23:02:58 +0530, Jagan Teki
jagannadh.t...@gmail.com wrote:
Hi JPT,
On Mon, Mar 4, 2013 at 9:10 PM, JPT j-...@gmx.net wrote:
Hi,
I've got a NAS which uses uboot:
U-Boot 1.1.4 (Feb 6 2012 - 14:40:46) Marvell version: 3.4.27
It's a Netgear ReadyNAS Duo
Hi Michael,
On Mon, 4 Mar 2013 12:23:05 -0500, Michael Cashwell
mboa...@prograde.net wrote:
On Mar 4, 2013, at 10:40 AM, JPT j-...@gmx.net wrote:
It's a Netgear ReadyNAS Duo V2, and the original sofware sucks. ;)
standalone=fsload 0x200 $(image_name);setenv bootargs $(console)
Hello -
I want to pass a number of arguments from u-boot to the booted kernel.
The arguments are needed by user space applications, not the kernel.
I can think of two ways:
1. append args by setting bootargs.
2. add nodes to the dtb before booting.
Is there a preferred way to pass
Albert,
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: Monday, March 04, 2013 11:00 AM
To: Tom Warren
Cc: Stephen Warren; u-boot@lists.denx.de; Stephen Warren; Tom Warren
Subject: Re: [U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata
On 03/03/2013 08:04:01 AM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/01/2013 09:59 PM, Scott Wood wrote:
On 03/01/2013 09:57:40 AM, Tom Rini wrote:
On Thu, Feb 28, 2013 at 07:37:51PM -0600, Scott Wood wrote:
+ * @param limmaximum size that length may be in
On Mon, Feb 18, 2013 at 07:26:42AM +0100, Peter Korsgaard wrote:
Koen == Koen Kooi k...@dominion.thruhere.net writes:
Koen #define CONFIG_CMD_EXT2
Koen +#define CONFIG_CMD_EXT4
Shouldn't the bootcmd then also be changed to use ext4load instead? Why
keep CMD_EXT2 enabled?
Koen
Thierry,
On Thu, Feb 14, 2013 at 12:54 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
This depends
Hi All,
Any suggestions please.
Thanks,
Jagan.
On Sat, Mar 2, 2013 at 1:59 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi All,
On Fri, Jan 11, 2013 at 7:46 AM, Simon Glass s...@chromium.org wrote:
Hi Jagannadha,
On Mon, Dec 31, 2012 at 3:13 AM, Jagannadha Sutradharudu Teki
On Sun, Feb 24, 2013 at 09:35:42AM -0800, Simon Glass wrote:
Hi,
On Wed, Dec 26, 2012 at 11:53 AM, Simon Glass s...@chromium.org wrote:
This series adds support for filesystems to sandbox. While we don't yet have
access to host machine block devices, we can access files on the host
On Thu, Feb 28, 2013 at 07:55:39PM -0800, Simon Glass wrote:
[snip]
The following changes since commit a1eac57a2001ecf86a46f520cd85ef8e9c8b3687:
common/env_nand.c: calculate crc only when readenv was OK
(2013-02-22 19:59:53 -0600)
are available in the git repository at:
On Thu, Nov 01, 2012 at 04:54:18PM -, Joe Hershberger wrote:
UBI can mount volumes by name or number The current code forces you
to name the volume by prepending every name with ubi:.
From fs/ubifs/super.c
* There are several ways to specify UBI volumes when mounting UBIFS:
* o
On Thu, Nov 01, 2012 at 04:54:18PM -, Joe Hershberger wrote:
UBI can mount volumes by name or number The current code forces you
to name the volume by prepending every name with ubi:.
From fs/ubifs/super.c
* There are several ways to specify UBI volumes when mounting UBIFS:
* o
On Tue, Feb 26, 2013 at 04:54:19AM -, Daniel Schwierzeck wrote:
All code related to the bootm ramdisk subcommand is conditionally
enabled by CONFIG_SYS_BOOT_RAMDISK_HIGH except for the help message.
Replace the CONFIG_ARCH defines by CONFIG_SYS_BOOT_RAMDISK_HIGH
to fix this.
On Fri, Feb 08, 2013 at 10:12:34AM -, Joe Hershberger wrote:
If readline says there was an error, don't write to the variable!
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
On Thu, Feb 28, 2013 at 08:21:13PM -, Sonic Zhang wrote:
Signed-off-by: Sonic Zhang sonic@gmail.com
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
On Wed, Jan 30, 2013 at 03:11:40PM -0800, York Sun wrote:
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are removed. They are all consistent with
true =
Hey all,
I've tagged and pushed v2013.04-rc1 now. I expect a number of changes
still to come, but I want to remind folks when the next release is, and
that is sooner than you thought. I've also given patchwork a
clean-up, so if you haven't checked your TODO list of late, it might
have grown.
On 03/04/2013 01:38 PM, Tom Rini wrote:
On Wed, Jan 30, 2013 at 03:11:40PM -0800, York Sun wrote:
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are
On Fri, 1 Mar 2013 16:11:36 +
Akshay Saraswat aksha...@samsung.com wrote:
Samsung Enterprise Portal mySingle
Hi Kim,
On Thu, 28 Feb 2013 11:08:21 +
Akshay Saraswat aksha...@samsung.com wrote:
On Wed, 27 Feb 2013 10:24:39 -0500
Akshay Saraswat
On Fri, 1 Mar 2013 11:16:22 -0500
Akshay Saraswat aksha...@samsung.com wrote:
SHA-256 and SHA-1 accelerated using ACE hardware.
curious about the rationale: how much faster is this than software?
---
Changes since v2:
- Added falling back to software sha256 in case length exceeds
On Mon, 4 Mar 2013, Tom Rini wrote:
On Thu, Feb 28, 2013 at 08:46:15AM -0500, Robert P. J. Day wrote:
it would seem that in addition to manually setting HOSTCC, a user
should also set HOSTSTRIP when building fw_printenv, no? there's no
mention of that in the README but the strip
This series adds DFU support to NAND and was started by Pantelis. The
NAND changes have been compile-tested on all ARM and PowerPC targets and
run-time tested on ARM. DFU itself has been tested, for NAND, on
am335x_evm.
For practical reasons, this series depends on Pantelis' previous series
of
We make these two functions take a size_t pointer to how much space
was used on NAND to read or write the buffer (when reads/writes happen)
so that bad blocks can be accounted for. We also make them take an
loff_t limit on how much data can be read or written. This means that
we can now catch
The flag changed from WITH_INLINE_OOB to WITH_YAFFS_OOB by accident in
418396e.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v4:
- Add patch to fix CONFIG_CMD_NAND_YAFFS
Changes in v3: None
Changes in v2: None
common/cmd_nand.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Pantelis Antoniou pa...@antoniou-consulting.com
Support for NAND storage devices to work with the DFU framework.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v4: None
Changes in v3:
- Rework logic in nand_block_op for
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add CONFIG_CMD_MTDPARTS and relevant information to am335x_evm
include/configs/am335x_evm.h |9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/am335x_evm.h
From: Pantelis Antoniou pa...@antoniou-consulting.com
- Add CONFIG_DFU_NAND, CONFIG_DFU_MMC
- Set dfu_alt_info_nand and dfu_alt_info_mmc to show a working example
for both.
- Increase CONFIG_SYS_MAXARGS due to hush parsing bugs that would
otherwise disallow 'setenv dfu_alt_info
On Fri, 1 Mar 2013 11:16:24 -0500
Akshay Saraswat aksha...@samsung.com wrote:
+#include ace_sha.h
/*
* These are the hash algorithms we support. Chips which support accelerated
* crypto could perhaps add named version of these algorithms here.
*/
static struct hash_algo
On Mon, Mar 04, 2013 at 01:46:48PM -0700, Tom Warren wrote:
[...]
I kinda lost track of this patchset. I'd like to move it into
u-boot-tegra/next if you think it's ready, but I'm not sure if it
conflicts with/works with Stephen's 4th patch of his v2 series (ARM:
tegra: enable a common set of
Stephen,
On Wed, Feb 27, 2013 at 11:08 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 02/27/2013 09:59 AM, Tom Warren wrote:
Stephen,
On Tue, Feb 26, 2013 at 4:26 PM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 02/26/2013 01:46 PM, Tom Warren wrote:
T30 requires specific SDMMC pad
Thierry,
On Mon, Mar 4, 2013 at 3:41 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Mon, Mar 04, 2013 at 01:46:48PM -0700, Tom Warren wrote:
[...]
I kinda lost track of this patchset. I'd like to move it into
u-boot-tegra/next if you think it's ready, but I'm not sure if it
From: Stephen Warren swar...@nvidia.com
Add common code to enable the workaround for ARM erratum 716044. This
will be enabled for Tegra.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
This depends on my previous ARM errata series. I found out we needed
another one after I wrote the first
From: Stephen Warren swar...@nvidia.com
Tegra20 requires the workaround for this erratum. Enable it.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
include/configs/tegra20-common.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/tegra20-common.h
On 03/04/2013 04:26 PM, Tom Warren wrote:
Thierry,
On Mon, Mar 4, 2013 at 3:41 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Mon, Mar 04, 2013 at 01:46:48PM -0700, Tom Warren wrote:
[...]
I kinda lost track of this patchset. I'd like to move it into
u-boot-tegra/next if
Hi Tom,
On Fri, Mar 1, 2013 at 2:28 PM, Tom Rini tr...@ti.com wrote:
On Wed, Feb 27, 2013 at 02:11:31PM -0600, Joe Hershberger wrote:
Hi Tom,
On Mon, Feb 18, 2013 at 11:20 AM, Tom Rini tr...@ti.com wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/09/2013 11:21 AM, Otavio
Hi Tom,
Great to see the previous lot made it in. Here is the next x86 series.
The following changes since commit 2536850d7cd90bdb75bf3ff86838f913392b68db:
Prepare v2013.04-rc1 (2013-03-04 16:29:17 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git master
for
On Mon, 4 Mar 2013 10:30:45 -0800
Curt Brune c...@cumulusnetworks.com wrote:
Hello -
I want to pass a number of arguments from u-boot to the booted kernel.
The arguments are needed by user space applications, not the kernel.
I can think of two ways:
1. append args by setting bootargs.
On 03/04/2013 04:11 PM, Tom Warren wrote:
Stephen,
On Wed, Feb 27, 2013 at 11:08 AM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 02/27/2013 09:59 AM, Tom Warren wrote:
Stephen,
On Tue, Feb 26, 2013 at 4:26 PM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 02/26/2013 01:46 PM, Tom
On 02/28/2013 07:55:56 PM, garyio wrote:
Hi Scott,
I know it's been a while but did you ever get this part to work?
Thanks,
Garyio
What is this part?
--
View this message in context:
http://u-boot.10912.n7.nabble.com/U-Boot-Add-new-NAND-flash-tp72701p148633.html
Sent from the U-Boot
On 03/04/2013 04:17:10 PM, Tom Rini wrote:
The flag changed from WITH_INLINE_OOB to WITH_YAFFS_OOB by accident in
418396e.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v4:
- Add patch to fix CONFIG_CMD_NAND_YAFFS
Changes in v3: None
Changes in v2: None
common/cmd_nand.c |2 +-
1
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/04/2013 08:12 PM, Scott Wood wrote:
On 03/04/2013 04:17:10 PM, Tom Rini wrote:
The flag changed from WITH_INLINE_OOB to WITH_YAFFS_OOB by
accident in 418396e.
Signed-off-by: Tom Rini tr...@ti.com --- Changes in v4: - Add
patch to fix
On 03/04/2013 07:27:40 PM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/04/2013 08:12 PM, Scott Wood wrote:
On 03/04/2013 04:17:10 PM, Tom Rini wrote:
The flag changed from WITH_INLINE_OOB to WITH_YAFFS_OOB by
accident in 418396e.
Signed-off-by: Tom Rini tr...@ti.com
On 03/02/2013 03:01:10 AM, Tao Hou wrote:
When the data has been partially written into the NAND Flash,
returning the written length instead of 0. The written length
may be useful when the upper level decides to continue the writing
after skipping the block causing the write failure.
We
Hi Tom,
On 3/4/2013 23:14, Tom Rini wrote:
On Thu, Feb 28, 2013 at 03:00:47PM +0800, Bo Shen wrote:
Add sama5d3xek support with following feature
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD
On Tue, Mar 05, 2013 at 10:03:57AM +0800, Bo Shen wrote:
Hi Tom,
On 3/4/2013 23:14, Tom Rini wrote:
On Thu, Feb 28, 2013 at 03:00:47PM +0800, Bo Shen wrote:
[snip]
@@ -0,0 +1,268 @@
+/*
+ * Configuation settings for the SAMA5D3xEK board.
[snip]
+#undef CONFIG_USE_IRQ
Hi Wolfgang,
On Mon, Mar 4, 2013 at 7:21 PM, Wolfgang Denk w...@denx.de wrote:
Dear Sonic Zhang,
In message
cajxxz0o_ozk7w_cdfjkzpwdmfqwt1m-yn_bz6yzhrdfqt6w...@mail.gmail.com you
wrote:
Maybe I didn't describe it clearly. Yes, I return 0 at the end of this
function. But, the same
Hi Tom,
Thanks.
On 3/5/2013 10:20, Tom Rini wrote:
On Tue, Mar 05, 2013 at 10:03:57AM +0800, Bo Shen wrote:
Hi Tom,
On 3/4/2013 23:14, Tom Rini wrote:
On Thu, Feb 28, 2013 at 03:00:47PM +0800, Bo Shen wrote:
[snip]
@@ -0,0 +1,268 @@
+/*
+ * Configuation settings for the SAMA5D3xEK board.
Currently for ARM based cpu's, mmu pagetable attributes are
set with manager permissions for all 4GB address space.
Because of this the 'execute never (XN)' permission is
never checked on read sensitive regions which results in
speculative aborts.
This series changes the domain permissions of the
From: Vincent Stehlé v-ste...@ti.com
We declare the set_section_dcache function globally in the cache header, for
later use by e.g. machine specific code.
Signed-off-by: Vincent Stehlé v-stehle at ti.com
Cc: Tom Rini trini at ti.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
---
From: R Sricharan r.sricha...@ti.com
Introduce a weak version of dram_bank_setup function
to allow a platform specific function.
This is used in the subsequent patch to setup dram region
without 'XN' attribute in order to enable the region
under client permissions.
Signed-off-by: R Sricharan
From: R Sricharan r.sricha...@ti.com
The 'XN' execute never bit is set in the pagetables. This will
prevent speculative prefetches to non executable regions. But the
domain permissions are set as master in the DACR register.
So the pagetable attribute for 'XN' is not effective. Change the
Hi,
On Monday 04 March 2013 03:38 PM, Vincent Stehlé wrote:
On 03/02/2013 11:46 PM, Albert ARIBAUD wrote:
(..) Basically, this means we need Vincent's series
to be applied first, then we can apply Sricharan's.
Hi,
I think this is too much trouble for a one liner. Please feel free to
squash.
Hi york,
Could you ack this patch?
Thanks.
-Original Message-
From: Wang Dongsheng-B40534
Sent: Monday, February 25, 2013 2:22 PM
To: Fleming Andy-AFLEMING
Cc: u-boot@lists.denx.de
Subject: RE: [PATCH] powerpc/mpc85xx: add setting of clock-frequency for
mpic node
Hi Andy,
Hi Tom,
On 02/15/2013 11:24 PM, Tom Rini wrote:
On Mon, Dec 03, 2012 at 02:19:40PM +0200, Nikita Kiryanov wrote:
This patchset implements card detection and write protection check for
omap mmc. The write protect implementation also adds generic code
that is usable by other mmc drivers.
The
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