[U-Boot] [PATCH 2/3] arm: Implement workaround for Cortex-A9 errata 845369

[Peng Fan]

Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.

Signed-off-by: Peng Fan 
Cc: Albert Aribaud 
Cc: Tom Rini 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/Kconfig   | 3 +++
 arch/arm/cpu/armv7/start.S | 6 ++
 2 files changed, 9 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7f6ab4a..787f2b1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -97,6 +97,9 @@ config ARM_ERRATA_833069
 config ARM_ERRATA_833471
bool
 
+config ARM_ERRATA_845369
+   bool
+
 config ARM_ERRATA_852421
bool
 
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index f06fd28..7b84a7a 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -187,6 +187,12 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
 #endif
 
+#ifdef CONFIG_ARM_ERRATA_845369
+   mrc p15, 0, r0, c15, c0, 1  @ read diagnostic register
+   orr r0, r0, #1 << 22@ set bit #22
+   mcr p15, 0, r0, c15, c0, 1  @ write diagnostic register
+#endif
+
mov r5, lr  @ Store my Caller
mrc p15, 0, r1, c0, c0, 0   @ r1 has Read Main ID Register (MIDR)
mov r3, r1, lsr #20 @ get variant field
-- 
2.6.2

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[U-Boot] [PATCH 3/3] imx: mx6: select ARM_ERRATA_845369

[Peng Fan]

Select ARM_ERRATA_845369 for i.MX6DQ/DL/QP.

Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/mx6/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 2be67e1..4eed100 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -4,6 +4,7 @@ config MX6_SMP
select ARM_ERRATA_751472
select ARM_ERRATA_761320
select ARM_ERRATA_794072
+   select ARM_ERRATA_845369
bool
 
 config MX6
-- 
2.6.2

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[U-Boot] [PATCH 1/3] ARM: i.MX6: exclude the ARM errata from i.MX6 UP system

[Peng Fan]

The ARM errata 751472, 794072, 761320 only applied
to the following configuration:

This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors

i.MX6 family does not have the ACP and thus only the MPCore system
will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/mach-imx/mx6/Kconfig | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index bb2ce33..2be67e1 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -1,24 +1,31 @@
 if ARCH_MX6
 
+config MX6_SMP
+   select ARM_ERRATA_751472
+   select ARM_ERRATA_761320
+   select ARM_ERRATA_794072
+   bool
+
 config MX6
+   select ARM_ERRATA_743622 if !MX6UL
bool
default y
-   select ARM_ERRATA_743622 if !MX6UL
-   select ARM_ERRATA_751472 if !MX6UL
-   select ARM_ERRATA_761320 if !MX6UL
-   select ARM_ERRATA_794072 if !MX6UL
imply CMD_FUSE
 
 config MX6D
+   select MX6_SMP
bool
 
 config MX6DL
+   select MX6_SMP
bool
 
 config MX6Q
+   select MX6_SMP
bool
 
 config MX6QDL
+   select MX6_SMP
bool
 
 config MX6S
-- 
2.6.2

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Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[Priyanka Jain]

> -Original Message-
> From: York Sun
> Sent: Tuesday, August 08, 2017 2:20 AM
> To: Priyanka Jain ; Santan Kumar
> ; u-boot@lists.denx.de
> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
> programming
> 
> On 06/20/2017 11:54 PM, Priyanka Jain wrote:
> >
> >
> >> -Original Message-
> >> From: York Sun
> >> Sent: Wednesday, June 14, 2017 2:16 AM
> >> To: Santan Kumar ; u-boot@lists.denx.de
> >> Cc: Priyanka Jain 
> >> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
> >> programming
> >>
> >> On 06/08/2017 11:16 PM, Santan Kumar wrote:
> >>> LS2080ARDB/LS2088ARDB updated RevF boards do not have smart voltage
> >>> translator, so no need to program GPIO for LS2088ARDB boards The
> >>> GPIO programming is required only for LS2081ARDB.
> >>>
> >>> Signed-off-by: Santan Kumar 
> >>> Signed-off-by: Priyanka Jain 
> >>> ---
> >>>board/freescale/ls2080ardb/ls2080ardb.c | 18 ++
> >>>1 file changed, 2 insertions(+), 16 deletions(-)
> >>>
> >>> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
> >>> b/board/freescale/ls2080ardb/ls2080ardb.c
> >>> index df2d768..210142c 100644
> >>> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> >>> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> >>> @@ -257,31 +257,17 @@ int board_early_init_f(void)
> >>>
> >>>int misc_init_r(void)
> >>>{
> >>> -#ifdef CONFIG_FSL_QIXIS
> >>> - /*
> >>> -  * LS2081ARDB has smart voltage translator which needs
> >>> -  * to be programmed as below
> >>> -  */
> >>> -#ifndef CONFIG_TARGET_LS2081ARDB
> >>> - u8 sw;
> >>> -
> >>> - sw = QIXIS_READ(arch);
> >>>   /*
> >>> -  * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
> >>> +  * LS2081ARDB RevF board has smart voltage translator
> >>>* which needs to be programmed to enable high speed SD 
> >>> interface
> >>>* by setting GPIO4_10 output to zero
> >>>*/
> >>> - if ((sw & 0xf) == 0x5) {
> >>> -#endif
> >>> +#ifdef CONFIG_TARGET_LS2081ARDB
> >>>   out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
> >>>   in_le32(GPIO4_GPDIR_ADDR)));
> >>>   out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
> >>>   
> >>> in_le32(GPIO4_GPDAT_ADDR))); -
> >> #ifndef
> >>> CONFIG_TARGET_LS2081ARDB
> >>> - }
> >>> -#endif
> >>>#endif
> >>> -
> >>>   if (hwconfig("sdhc"))
> >>>   config_board_mux(MUX_TYPE_SDHC);
> >>>
> >>>
> >>
> >> This change is not backward-compatible, is it?
> >>
> >> York
> > Yes, It is backward compatible. As per updated board designs and the
> manufactured boards, GPIO programming is required only for LS2081ARDB
> boards.
> 
> Priyanka,
> 
> I looked at this patch again. Before this change, LS2080ARDB rev F and
> LS2081ARDB both have the smart voltage translator enabled. After this change,
> rev F no longer enables this voltage translator. You still consider it 
> backward-
> compatible?
> 
> York

Both LS2080ARDB rev F and LS2081ARDB were initially designed to have smart 
voltage translator to support SD-boot and UHS mode 
At a later stage, due to some issues on LS2088ARDB RevF board to support 
SD-boot, translator was removed from RevF boards.

I confirmed with board team that all LS2088ARDB RevF board will not have the 
smart voltage translator and all LS2081ARDB boards will have smart voltage 
translator.

Priyanka



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[U-Boot] [PATCH] spi: add "jedec,spi-nor" to spi_flash_std_ids

[Chris Packham]

"jedec,spi-nor" is used by Linux for many boards with spi flash. In fact
according to the binding documentation this must be included for any SPI
NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
Make device trees more portable between Linux an U-Boot by supporting
"jedec,spi-nor" in addition to the U-Boot specific "spi-flash".

Signed-off-by: Chris Packham 
---
This fixes my issues with the spi speed selection on db-88f6820-amc. I
didn't find anything in the commit message from the initial
implementation saying that "jedec,spi-nor" was omitted intentionally so
I've settled on this instead of updating armada-385-amc.dts.

If there is a good reason not to make this change I'm happy to submit a patch
that just updates armada-385-amc.dts.

 drivers/mtd/spi/sf_probe.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 7b296378d2be..1953ec3cb748 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -164,6 +164,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
 
 static const struct udevice_id spi_flash_std_ids[] = {
{ .compatible = "spi-flash" },
+   { .compatible = "jedec,spi-nor" },
{ }
 };
 
-- 
2.13.0

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Re: [U-Boot] [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl applied

[Yogesh Narayan Gaur]

Ack-ed

--
Yogesh Gaur

> -Original Message-
> From: York Sun
> Sent: Tuesday, August 08, 2017 2:43 AM
> To: Yogesh Narayan Gaur ; Priyanka Jain
> 
> Cc: Santan Kumar ; u-boot@lists.denx.de; Prabhakar
> Kushwaha 
> Subject: Re: [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier 
> if dpl
> applied
> 
> On 06/28/2017 10:47 PM, Santan Kumar wrote:
> > In fsl_mc_ldpaa_exit(), in case of mc is booted and dpl is applied, it
> > should return earlier without executing
> > dpbp_exit()
> >
> > Signed-off-by: Santan Kumar 
> > ---
> > This piece of code is mistakenly removed in below patch.
> >
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> >
> chwork.ozlabs.org%2Fpatch%2F756038%2F=01%7C01%7Cyork.sun%40nx
> p.co
> >
> m%7C67ffe48248b14183512708d4beb2434e%7C686ea1d3bc2b4c6fa92cd99c5c
> 30163
> >
> 5%7C0=PvzNEpCqJ8MOLT9vRSNuNLTeH9hjxLxQi97ngEkrXf0%3D
> ed=0
> >
> >   drivers/net/fsl-mc/mc.c | 11 +--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index
> > 8bf25c7..3a30c03 100644
> > --- a/drivers/net/fsl-mc/mc.c
> > +++ b/drivers/net/fsl-mc/mc.c
> > @@ -1336,14 +1336,18 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
> >   {
> > int err = 0;
> > bool is_dpl_apply_status = false;
> > +   bool mc_boot_status = false;
> >
> > if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
> > mc_apply_dpl(mc_lazy_dpl_addr);
> > mc_lazy_dpl_addr = 0;
> > }
> >
> > +   if (!get_mc_boot_status())
> > +   mc_boot_status = true;
> > +
> > /* MC is not loaded intentionally, So return success. */
> > -   if (bd && get_mc_boot_status() != 0)
> > +   if (bd && !mc_boot_status)
> > return 0;
> >
> > /* If DPL is deployed, set is_dpl_apply_status as TRUE. */ @@
> > -1354,11 +1358,14 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
> >  * For case MC is loaded but DPL is not deployed, return success and
> >  * print message on console. Else FDT fix-up code execution hanged.
> >  */
> > -   if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
> > +   if (bd && mc_boot_status && !is_dpl_apply_status) {
> > printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
> > return 0;
> > }
> >
> > +   if (bd && mc_boot_status && is_dpl_apply_status)
> > +   return 0;
> > +
> > err = dpbp_exit();
> > if (err < 0) {
> > printf("dpbp_exit() failed: %d\n", err);
> >
> 
> Yogesh and Priyanka,
> 
> Please review this patch. Thanks.
> 
> York
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Re: [U-Boot] [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl applied

[Priyanka Jain]

Ack-ed

--Priyanka

> -Original Message-
> From: York Sun
> Sent: Tuesday, August 08, 2017 2:43 AM
> To: Yogesh Narayan Gaur ; Priyanka Jain
> 
> Cc: Santan Kumar ; u-boot@lists.denx.de; Prabhakar
> Kushwaha 
> Subject: Re: [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier 
> if dpl
> applied
> 
> On 06/28/2017 10:47 PM, Santan Kumar wrote:
> > In fsl_mc_ldpaa_exit(), in case of mc is booted and dpl is applied, it
> > should return earlier without executing
> > dpbp_exit()
> >
> > Signed-off-by: Santan Kumar 
> > ---
> > This piece of code is mistakenly removed in below patch.
> >
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> >
> chwork.ozlabs.org%2Fpatch%2F756038%2F=01%7C01%7Cyork.sun%40nx
> p.co
> >
> m%7C67ffe48248b14183512708d4beb2434e%7C686ea1d3bc2b4c6fa92cd99c5c
> 30163
> >
> 5%7C0=PvzNEpCqJ8MOLT9vRSNuNLTeH9hjxLxQi97ngEkrXf0%3D
> ed=0
> >
> >   drivers/net/fsl-mc/mc.c | 11 +--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index
> > 8bf25c7..3a30c03 100644
> > --- a/drivers/net/fsl-mc/mc.c
> > +++ b/drivers/net/fsl-mc/mc.c
> > @@ -1336,14 +1336,18 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
> >   {
> > int err = 0;
> > bool is_dpl_apply_status = false;
> > +   bool mc_boot_status = false;
> >
> > if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
> > mc_apply_dpl(mc_lazy_dpl_addr);
> > mc_lazy_dpl_addr = 0;
> > }
> >
> > +   if (!get_mc_boot_status())
> > +   mc_boot_status = true;
> > +
> > /* MC is not loaded intentionally, So return success. */
> > -   if (bd && get_mc_boot_status() != 0)
> > +   if (bd && !mc_boot_status)
> > return 0;
> >
> > /* If DPL is deployed, set is_dpl_apply_status as TRUE. */ @@
> > -1354,11 +1358,14 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
> >  * For case MC is loaded but DPL is not deployed, return success and
> >  * print message on console. Else FDT fix-up code execution hanged.
> >  */
> > -   if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
> > +   if (bd && mc_boot_status && !is_dpl_apply_status) {
> > printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
> > return 0;
> > }
> >
> > +   if (bd && mc_boot_status && is_dpl_apply_status)
> > +   return 0;
> > +
> > err = dpbp_exit();
> > if (err < 0) {
> > printf("dpbp_exit() failed: %d\n", err);
> >
> 
> Yogesh and Priyanka,
> 
> Please review this patch. Thanks.
> 
> York
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Re: [U-Boot] [PATCH 1/1] board: ls2080ardb: Add fsl_fdt_fixup_flash

[Priyanka Jain]

> -Original Message-
> From: York Sun
> Sent: Tuesday, August 08, 2017 3:31 AM
> To: Santan Kumar ; u-boot@lists.denx.de
> Cc: Priyanka Jain 
> Subject: Re: [PATCH 1/1] board: ls2080ardb: Add fsl_fdt_fixup_flash
> 
> On 07/05/2017 05:32 AM, Santan Kumar wrote:
> > IFC and QSPI are muxed on board.
> >
> > Add fsl_fdt_fixup_flash()
> > -To disable IFC node in dts if QSPI is enabled.
> > -Or disable QSPI node in dts if IFC is enabled.
> 
> The pin mux is at SoC level. Can you put this fixup at SoC level?
> 
> York
At Soc level, some of IFC pins (not all) are mux-ed with QSPI lines. 
So, it is possible to provide NAND functionality with QSPI if the board allows.

But in this case at board level, complete IFC is mux-ed with QSPI. 
So, we have put this code in board file.
Priyanka
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Re: [U-Boot] [linux-sunxi] [PATCH 1/2] sunxi: add PRCM secure switch register definition

[Chen-Yu Tsai]

On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng  wrote:
> Some new Allwinner SoCs' PRCM has a secure switch register, which
> controls the access to some clock and power registers in PRCM block.
>
> Add the definition of this register and its bits in the PRCM header
> file.
>
> Signed-off-by: Icenowy Zheng 

Could you provide a reference as to where or how you found out
about this?

Thanks
ChenYu
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[U-Boot] [RFC] Kconfig: Migrate SYS_NAND_ECC... et al question

[Adam Ford]

I am trying to migrate ECC Scheme, SYS_NAND_ECCBYTES,
SYS_NAND_ECCSIZE, and SYS_NAND_ECCSIZE to Kconfig with the changes
I am attaching.

I my ideal scenario, the selection of scheme would set
CONFIG_NAND_OMAP_ECCSCHEME to whatever menu option is defined, then
corresponding default values of CONFIG_SYS_NAND_ECCSIZE and
CONFIG_SYS_NAND_ECCBYTES, but I can't figure out how to make that
work.

When I run the migration tool, all the omap2plus boards fail.

If anyone has any suggestions, I'm open to ideas.  I have been
testing this on the Logic PD DM3730 Kit.

Signed-off-by: Adam Ford 

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 75cbff9..a2e5a30 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -45,6 +45,54 @@ config NAND_OMAP_GPMC
  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
  and BCH16 ECC algorithms.
 
+if NAND_OMAP_GPMC
+choice
+   prompt "OMAP ECC Scheme"
+   default OMAP_ECC_HAM1_CODE_SW
+
+config OMAP_ECC_HAM1_CODE_SW
+   bool "1-bit Hamming code using software lib. (legacy)"
+   help
+ 1-bit Hamming code using software lib.
+ (for legacy devices only)
+
+config OMAP_ECC_HAM1_CODE_HW
+   bool "1-bit Hamming code using GPMC hardware. (legacy)"
+   help
+ 1-bit Hamming code using GPMC hardware.
+ (for legacy devices only)
+
+config OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+   bool "8-bit BCH code w/ HW detection and SW correction"
+   depends on !NAND_OMAP_ELM
+   select BCH
+   help
+ 8-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using software library.
+ - requires CONFIG_BCH to enable software BCH library
+ (For legacy device which do not have ELM h/w engine)
+
+config OMAP_ECC_BCH8_CODE_HW
+   depends on NAND_OMAP_ELM
+   bool "8-bit BCH code w/ HW detection and ELM engine"
+   help
+ 8-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using ELM hardware engine.
+
+config OMAP_ECC_BCH16_CODE_HW
+   depends on NAND_OMAP_ELM
+   bool "16-bit BCH code w/ HW detection and ELM engine"
+   help
+ 16-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using ELM hardware engine.
+
+endchoice
+
+endif
+
 config NAND_OMAP_GPMC_PREFETCH
bool "Enable GPMC Prefetch"
depends on NAND_OMAP_GPMC
@@ -170,6 +218,27 @@ config SYS_NAND_BUSWIDTH_16BIT
not available while configuring controller. So a static 
CONFIG_NAND_xx
is needed to know the device's bus-width in advance.
 
+config SYS_NAND_ECCBYTES
+   int "ECC Bytes"
+   help
+ Defines the size and behavior of the NAND that SPL uses to read 
U-Boot.
+ Number of ECC bytes generated to protect 512 bytes of data, which is:
+ 3 for HAM1_xx ecc schemes
+ 7 for BCH4_xx ecc schemes
+ 14 for BCH8_xx ecc schemes
+ 26 for BCH16_xx ecc schemes
+
+config SYS_NAND_ECCSIZE
+   int "ECC Size"
+   default 512
+
+config SYS_NAND_MAX_ECCPOS
+   int "maximum number of ECC bytes supported"
+   help
+ If specified, overrides the maximum number of ECC bytes
+ supported.  Useful for reducing image size, especially with SPL.
+ This must be at least 48 if nand_base.c is used.
+
 if SPL
 
 config SYS_NAND_U_BOOT_LOCATIONS
diff --git a/lib/Kconfig b/lib/Kconfig
index 2f5a210..1194345 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -1,5 +1,12 @@
 menu "Library routines"
 
+config BCH
+   bool "Enable Software based BCH ECC"
+   help
+ Enables software based BCH ECC algorithm present in lib/bch.c
+ This is used by SoC platforms which do not have built-in ELM
+ hardware engine required for BCH ECC correction.
+
 config CC_OPTIMIZE_LIBS_FOR_SPEED
bool "Optimize libraries for speed"
help
-- 
2.7.4

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Re: [U-Boot] spi flash env and driver model

[Chris Packham]

On Mon, Aug 7, 2017 at 10:31 PM, Chris Packham  wrote:
> Hi,
>
> I'm looking at a problem on the db-88f6820-amc board (which has it's
> env on spi flash). Somewhere in the init sequence we get a crash.
>
> git bisect leads me to commit 8fee8845e7 ("enf_sf: reuse
> setup_flash_device instead of open coding it") but I don't think
> that's actually the problem. The real problem seems to be the way
> setup_spi_device() relies on the speed to come from the device-tree.
> Even when I specify a speed for the spi-flash in the device tree it
> doesn't seem to stick. The only thing that seems to work is restoring
> the CONFIG_ENV_SPI_MAX_HZ in the DM_SPI_FLASH case.
>
> I can submit that as a patch but it seems contrary to the intentions
> of commit 96907c0fe5 ("dm: spi: Read default speed and mode values
> from DT").
>
> Does anyone have any thoughts as to where to go with this?

So now I've actually been able to see the failure with an ICD attached
the problem is a divide by 0 in mvebu_spi_set_speed() because the
speed is being passed down as 0. Moving up the stack this appears to
be coming from the parent_platdata looked up by spi_get_bus_and_cs().
So it looks like the spi-max-frequency property hasn't been parsed up
from the device tree prior to this call.
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Re: [U-Boot] [PATCH] ls1046aqds: update the defaule mtdparts

[Xiaowei Bao]

Hi York,

This patch is for the ls1046aqds platform, In order to facilitate the test 
staff and customers to view the detailed partition information, so didn't 
define a larger partition to include all images, and the partition rule  is 
discussed internally as the default partitioning standard for the layerscape 
platform.

thanks

-Original Message-
From: York Sun 
Sent: Tuesday, August 08, 2017 6:31 AM
To: Xiaowei Bao ; Mingkai Hu ; Sumit 
Garg ; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] ls1046aqds: update the defaule mtdparts

On 07/12/2017 04:44 AM, xiaowei.bao wrote:
> From: Bao Xiaowei 
> 
> modify the include/configs/ls1046aqds.h file, according to the latest 
> partion rules, norflash nandflash dspiflash detailed partion as follows:
> 
> mtd0: 0010 0002 "nor_bank0_rcw"
> mtd1: 0020 0002 "nor_bank0_uboot"
> mtd2: 0010 0002 "nor_bank0_uboot_env"
> mtd3: 0020 0002 "nor_bank0_ppa"
> mtd4: 0030 0002 "nor_bank0_secure_boot"
> mtd5: 0060 0002 "nor_bank0_dppa_qe"
> mtd6: 0010 0002 "nor_bank0_dtb"
> mtd7: 0100 0002 "nor_bank0_kernel"
> mtd8: 0200 0002 "nor_bank0_rootfs"
> mtd9: 0010 0002 "nor_bank4_rcw"
> mtd10: 0020 0002 "nor_bank4_uboot"
> mtd11: 0020 0002 "nor_bank4_uboot_env"
> mtd12: 0010 0002 "nor_bank4_ppa"
> mtd13: 0030 0002 "nor_bank4_secure_boot"
> mtd14: 0060 0002 "nor_bank4_dppa_qe"
> mtd15: 0010 0002 "nor_bank4_dtb"
> mtd16: 0100 0002 "nor_bank4_kernel"
> mtd17: 0200 0002 "nor_bank4_rootfs"
> mtd18: 0010 0004 "nand_rcw"
> mtd19: 0020 0004 "nand_uboot"
> mtd20: 0010 0004 "nand_uboot_env"
> mtd21: 0020 0004 "nand_ppa"
> mtd22: 0030 0004 "nand_secure_boot"
> mtd23: 0060 0004 "nand_dppa_qe"
> mtd24: 0010 0004 "nand_dtb"
> mtd25: 0100 0004 "nand_kernel"
> mtd26: 0200 0004 "nand_rootfs"
> mtd27: 1c00 0004 "nand_free"
> mtd28: 0100 0001 "spi0_free"
> mtd29: 0008 1000 "spi1_free"
> mtd30: 0080 1000 "spi2_free"

Do we really need to expose every image as individual partition? It is only 
useful if we need to access them under Linux. What's the chance to update 
U-Boot environmental variables under Linux? If you really to do so, you can 
probably be fine by defining a larger partition to include all images used for 
U-Boot. Agree?

York
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Re: [U-Boot] board: sama5d2_xplained: Make SPL work on spiflash

[Yang, Wenyou]

Hi Tom,


On 2017/8/7 21:55, Tom Rini wrote:

On Thu, Jul 20, 2017 at 04:28:47PM +0800, wenyou.y...@microchip.com wrote:


Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.

As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---
The patch is based on
 [PATCH 0/6] board: atmel: Add new board: SAMA5D27-SOM1-EK board
 https://lists.denx.de/pipermail/u-boot/2017-July/298815.html

  board/atmel/sama5d2_xplained/sama5d2_xplained.c | 10 ++
  include/configs/sama5d2_xplained.h  |  2 +-
  2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c 
b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 48f45b35ce..8fd7eb8af1 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -285,6 +285,16 @@ void at91_pmc_init(void)
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
u32 tmp;
  
+	/*

+* while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz
+* so we need to slow down and configure MCKR accordingly.
+* This is why we have a special flavor of the switching function.
+*/
+   tmp = AT91_PMC_MCKR_PLLADIV_2 |
+ AT91_PMC_MCKR_MDIV_3 |
+ AT91_PMC_MCKR_CSS_MAIN;
+   at91_mck_init_down(tmp);

What patch adds the at91_mck_init_down function?  Thanks!

It is in the patch,
https://lists.denx.de/pipermail/u-boot/2017-August/30.html

Best Regards,
Wenyou Yang
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Re: [U-Boot] [RFC] move booti_setup to arch/arm/lig/image.c

[Bin Chen]

On 8 August 2017 at 02:13, Tom Rini  wrote:

> On Fri, Jul 28, 2017 at 06:04:11PM +1000, Bin Chen wrote:
>
> > Follow bootz's pattern by moving the booti_setup to arch/arm/lib.
> > This allows to use that function in other path, e.g booting
> > an android image contains Image format.
> >
> > Note that kernel relocation is move out of booti_setup and it is the
> > caller's responsibility to do it and allows them do it differently. say,
> > cmd/booti.c just do a manually, while in the bootm path, we can use
> > bootm_load_os(with some changes).
>
> Just to be clear, did you boot test this path on hardware?
>

yes, I tested the booti path with this patch applied.

>
> And, a minor comment:
> > - ih = (struct Image_header *)map_sysmem(images->ep, 0);
> > -
> > - lmb_reserve(>lmb, images->ep, le32_to_cpu(ih->image_size));
> > + /* Handle BOOTM_STATE_LOADOS */
> > + if (relocated_addr != ld) {
> > +debug("Moving Image from 0x%lx to 0x%lx\n", ld, relocated_addr);
> > +memmove((void *)relocated_addr, (void *)ld, image_size);
> > +}
>
> Please correct the indentation here.
>
OK. Thanks for the review!

>
> Otherwise, and assuming you've booted the kernel with this patch, fix
> the above, post as v2 instead and:
>
> Reviewed-by: Tom Rini 
>
> Thanks!
>
> --
> Tom
>



-- 
Regards,
Bin
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[U-Boot] [PATCH v2 2/2] driver: spi: add rockchip sfc support

[Andy Yan]

SFC stands for Serial Flash Controller on some
rockchip platforms such as RV1108/RK3128.

This patch add support for it with Standard,Dual,Quad
mode.

Signed-off-by: Andy Yan 

---

Changes in v2:
- fix the wrong reference in Makefile, which should be rockchip_sfc.o
  not rk_sfc.o

 drivers/spi/Kconfig|   8 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/rockchip_sfc.c | 402 +
 drivers/spi/rockchip_sfc.h |  82 +
 4 files changed, 493 insertions(+)
 create mode 100644 drivers/spi/rockchip_sfc.c
 create mode 100644 drivers/spi/rockchip_sfc.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8a8e8e4..52c4993 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -99,6 +99,14 @@ config ROCKCHIP_SPI
  This uses driver model and requires a device tree binding to
  operate.
 
+config ROCKCHIP_SFC
+   bool "Rockchip SFC driver"
+   help
+ Enable the Rockchip SFC driver, used to access SPI NOR flash
+ on Rockchip SoCs.
+ This uses driver model and requires a device tree binding to
+ operate.
+
 config SANDBOX_SPI
bool "Sandbox SPI driver"
depends on SANDBOX && DM
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 9f8b86d..052c608 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
+obj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
 obj-$(CONFIG_SH_SPI) += sh_spi.o
 obj-$(CONFIG_SH_QSPI) += sh_qspi.o
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
new file mode 100644
index 000..4388e51
--- /dev/null
+++ b/drivers/spi/rockchip_sfc.c
@@ -0,0 +1,402 @@
+/*
+ * sfc driver for rockchip
+ *
+ * (C) Copyright 2008-2016 Rockchip Electronics
+ * Yifeng.zhao, Software Engineering, .
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "rockchip_sfc.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum rockchip_sfc_if_type {
+   IF_TYPE_STD,
+   IF_TYPE_DUAL,
+   IF_TYPE_QUAD,
+};
+
+struct rockchip_sfc_platdata {
+   s32 frequency;
+   fdt_addr_t base;
+};
+
+struct rockchip_sfc {
+   struct rockchip_sfc_reg *regbase;
+   struct clk clk;
+   unsigned int max_freq;
+   unsigned int mode;
+   unsigned int speed_hz;
+   u32 cmd;
+   u32 addr;
+};
+
+static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
+{
+   struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+   struct rockchip_sfc *sfc = dev_get_priv(bus);
+   const void *blob = gd->fdt_blob;
+   int node = dev_of_offset(bus);
+   int subnode;
+   int ret;
+
+   plat->base = devfdt_get_addr(bus);
+
+   ret = clk_get_by_index(bus, 0, >clk);
+   if (ret < 0) {
+   debug("Could not get clock for %s: %d\n", bus->name, ret);
+   return ret;
+   }
+
+   subnode = fdt_first_subnode(blob, node);
+   if (subnode < 0) {
+   debug("Error: subnode with SPI flash config missing!\n");
+   return -ENODEV;
+   }
+
+   plat->frequency = fdtdec_get_int(blob, subnode, "spi-max-frequency",
+1);
+
+   return 0;
+}
+
+static int rockchip_sfc_probe(struct udevice *bus)
+{
+   struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+   struct rockchip_sfc *sfc = dev_get_priv(bus);
+   int ret;
+
+   sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
+
+   sfc->max_freq = plat->frequency;
+
+   ret = clk_set_rate(>clk, sfc->max_freq);
+   if (ret < 0) {
+   debug("%s: Failed to set clock: %d\n", __func__, ret);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
+{
+   struct rockchip_sfc_reg *regs = sfc->regbase;
+   int tbase = get_timer(0);
+   u32 rcvr;
+   int ret = 0;
+
+   writel(SFC_RESET, >rcvr);
+   do {
+   rcvr = readl(>rcvr);
+   if (get_timer(tbase) > 1000) {
+   debug("sfc reset timeout\n");
+   ret =  -ETIMEDOUT;
+   break;
+   }
+   udelay(1);
+   } while (rcvr);
+
+   writel(0x, >iclr);
+
+   debug("sfc reset\n");
+
+   return ret;
+}
+
+static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
+{
+   int type = IF_TYPE_STD;
+
+   if (sfc->cmd & SFC_WR) {
+   if (sfc->mode & SPI_TX_QUAD)
+   type = IF_TYPE_QUAD;
+   else if (sfc->mode & SPI_TX_DUAL)
+   type = 

[U-Boot] [PATCH v2 1/2] sf: add support for GD25Q256

[Andy Yan]

Add support for GD25Q256, a 32MiB SPI Nor
flash from Gigadevice.

Signed-off-by: Andy Yan 

---

Changes in v2:
- remove the include of function read_cr

 drivers/mtd/spi/sf_internal.h   | 1 +
 drivers/mtd/spi/spi_flash.c | 5 +++--
 drivers/mtd/spi/spi_flash_ids.c | 1 +
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 839cdbe..357b3bc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -37,6 +37,7 @@ enum spi_nor_option_flags {
 #define SPI_FLASH_CFI_MFR_SST  0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND  0xef
 #define SPI_FLASH_CFI_MFR_ATMEL0x1f
+#define SPI_FLASH_CIF_MFR_GIGADEVICE   0xc8
 
 /* Erase commands */
 #define CMD_ERASE_4K   0x20
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 0034a28..a57e171 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -807,7 +807,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 #endif
 
 
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
 static int macronix_quad_enable(struct spi_flash *flash)
 {
u8 qeb_status;
@@ -892,8 +892,9 @@ static int set_quad_mode(struct spi_flash *flash,
 const struct spi_flash_info *info)
 {
switch (JEDEC_MFR(info)) {
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
case SPI_FLASH_CFI_MFR_MACRONIX:
+   case SPI_FLASH_CIF_MFR_GIGADEVICE:
return macronix_quad_enable(flash);
 #endif
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index edca94e..46d5e67 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -65,6 +65,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
{"gd25q64b",   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
{"gd25lq32",   INFO(0xc86016, 0x0, 64 * 1024,64, SECT_4K) },
+   {"GD25Q256",   INFO(0xc84019, 0x0, 64 * 1024,   512, RD_FULL | 
WR_QPP | SECT_4K)},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI   /* ISSI */
{"is25lp032",  INFO(0x9d6016, 0x0, 64 * 1024,64, 0) },
-- 
2.7.4


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Re: [U-Boot] [PATCH v0 13/20] efi_loader: use proper device-paths for partitions

[Jonathan Gray]

On Mon, Aug 07, 2017 at 12:16:54PM -0400, Rob Clark wrote:
> On Mon, Aug 7, 2017 at 11:47 AM, Jonathan Gray  wrote:
> > On Sun, Aug 06, 2017 at 11:34:15AM -0400, Rob Clark wrote:
> >> On Sun, Aug 6, 2017 at 10:45 AM, Rob Clark  wrote:
> >> >
> >> > I've started trying to hack up test_efi_loader.py to add a test that
> >> > loads OpenBSD's bootloader..  kinda muddling through it at this point,
> >> > since not a py expert or too familiar w/ u-boot's test framework.  But
> >> > I'll see if I can get to the point where I can run the same thing on
> >> > various arm7 and aarch64 devices in qemu.
> >> >
> >>
> >> Making a bit of progress on this (running it on a vexpress_ca15_tc2
> >> board in qemu).. any hint where I can find BOOTARM.EFI src code?
> >>
> >> => tftpboot 8040 obsdboot.efi
> >> smc911x: MAC 52:54:00:12:34:56
> >> smc911x: detected LAN9118 controller
> >> smc911x: phy initialized
> >> smc911x: MAC 52:54:00:12:34:56
> >> Using smc911x-0 device
> >> TFTP from server 10.0.2.2; our IP address is 10.0.2.15
> >> Filename 'obsdboot.efi'.
> >> Load address: 0x8040
> >> Loading: *%08#
> >> 12.4 MiB/s
> >> done
> >> Bytes transferred = 64908 (fd8c hex)
> >> smc911x: MAC 52:54:00:12:34:56
> >> => crc32 8040 $filesize
> >> CRC32 for 8040 ... 8040fd8b ==> a9ac4fcf
> >> => bootefi 8040
> >> ## Starting EFI application at 8040 ...
> >> WARNING: Invalid device tree, expect boot to fail
> >> BS->LocateHandle() returns 0
> >> undefined instruction
> >> pc : [<9eec65c4>]   lr : [<9eeca390>]
> >> sp : 9fed7a18  ip : 003f fp : 9fed7a2c
> >> r10:   r9 : 9eed4658 r8 : 
> >> r7 : 9eed1ce4  r6 : 9eed3538 r5 : 9fed7a6c  r4 : 9eed4658
> >> r3 :   r2 : 9eed2f8e r1 : 9eed1ee0  r0 : 
> >> Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> >> Resetting CPU ...
> >>
> >> resetting ...
> >>
> >>
> >> U-Boot 2017.09-rc1-00025-g534695d189 (Aug 06 2017 - 06:58:16 -0400)
> >>
> >> DRAM:  1 GiB
> >> WARNING: Caches not enabled
> >> Flash: 128 MiB
> >> MMC:   MMC: 0
> >> *** Warning - bad CRC, using default environment
> >>
> >> In:serial
> >> Out:   serial
> >> Err:   serial
> >> Net:   smc911x-0
> >> Hit any key to stop autoboot:  2
> >
> > Why does U-Boot not set fdt_addr_r or fdtfile for vexpress?  Worse yet
> > trying to load to the default kernel_addr_r fails.  So it requires a
> > script or manual commands to boot instead of the usual distro boot
> > arrangement?
> 
> I suspect this is specific to the test framework (probably not
> enabling distro-boot-cmd so that the test framework can run the cmds
> it wants??)

I didn't attempt to use the test framework, just loaded the result
of building vexpress_ca15_tc2_defconfig into qemu.

It looks like the load addresses are only good for >= 1G physmem.

U-Boot 2017.09-rc1 (Aug 02 2017 - 10:55:19 +1000)

DRAM:  128 MiB
WARNING: Caches not enabled
Flash: 128 MiB
MMC:   MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   smc911x-0
Hit any key to stop autoboot:  0
=> printenv
arch=arm
baudrate=38400
board=vexpress
board_name=vexpress
boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} 
${prefix}${script}; source ${scriptaddr}
boot_efi_binary=load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} 
efi/boot/bootarm.efi; if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} 
${fdt_addr_r};else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi
boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} 
${prefix}extlinux/extlinux.conf
boot_prefixes=/ /boot/
boot_script_dhcp=boot.scr.uimg
boot_scripts=boot.scr.uimg boot.scr
boot_targets=mmc1 mmc0 pxe dhcp
bootcmd=run distro_bootcmd; run bootflash;
bootcmd_dhcp=if dhcp ${scriptaddr} ${boot_script_dhcp}; then source 
${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; if test -z "${fdtfile}" -a -n 
"${soc}"; then setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; fi; setenv 
efi_old_vci ${bootp_vci};setenv efi_old_arch ${bootp_arch};setenv bootp_vci 
PXEClient:Arch:00010:UNDI:003000;setenv bootp_arch 0xa;if dhcp 
${kernel_addr_r}; then tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};if fdt addr 
${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r}; else bootefi 
${kernel_addr_r} ${fdtcontroladdr};fi;fi;setenv bootp_vci ${efi_old_vci};setenv 
bootp_arch ${efi_old_arch};setenv efi_fdtfile;setenv efi_old_arch;setenv 
efi_old_vci;
bootcmd_mmc0=setenv devnum 0; run mmc_boot
bootcmd_mmc1=setenv devnum 1; run mmc_boot
bootcmd_pxe=dhcp; if pxe get; then pxe boot; fi
bootdelay=2
bootflash=run flashargs; cp ${ramdisk_addr} ${ramdisk_addr_r} ${maxramdisk}; 
bootm ${kernel_addr} ${ramdisk_addr_r}
console=ttyAMA0,38400n8
cpu=armv7
distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done
dram=1024M
efi_dtb_prefixes=/ /dtb/ /dtb/current/
ethact=smc911x-0
ethaddr=52:54:00:12:34:56
flashargs=setenv bootargs root=${root} console=${console} 

[U-Boot] [PATCH] scripts: spl: fix typo

[Peng Fan]

Typo fix: CONIFG->CONFIG

Signed-off-by: Peng Fan 
Cc: Tom Rini 
---
 scripts/Makefile.uncmd_spl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl
index 15d0836..b399411 100644
--- a/scripts/Makefile.uncmd_spl
+++ b/scripts/Makefile.uncmd_spl
@@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD
 ifndef CONFIG_SPL_DM
 CONFIG_DM_SERIAL=
 CONFIG_DM_GPIO=
-CONIFG_DM_I2C=
+CONFIG_DM_I2C=
 CONFIG_DM_SPI=
 CONFIG_DM_SPI_FLASH=
 endif
-- 
2.6.2

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[U-Boot] [PATCH] common:usb_kbd:Add key values of F1~F12

[Leo Wen]

When you press the F1~F12 button from the USB keyboard, the reference Fn
key table(usb_kbd_fn_key[]),the key value(0xf0~0xfb) will be returned,
and you can use it to do more things.

Signed-off-by: Leo Wen 
---
 common/usb_kbd.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index d2d29cc..7c96c78 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -73,6 +73,10 @@ static const unsigned char usb_kbd_num_keypad[] = {
'1', '2', '3', '4', '5', '6', '7', '8', '9', '0',
'.', 0, 0, 0, '='
 };
+static const unsigned char usb_kbd_fn_key[] = {
+   0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
+   0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb
+};
 
 /*
  * map arrow keys to ^F/^B ^N/^P, can't really use the proper
@@ -206,6 +210,9 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, 
unsigned char scancode,
else
keycode = usb_kbd_numkey[scancode - 0x1e];
}
+   /* Fn keys pressed */
+   if ((scancode >= 0x3a) && (scancode <= 0x45))
+   keycode = usb_kbd_fn_key[scancode - 0x3a];
 
/* Arrow keys */
if ((scancode >= 0x4f) && (scancode <= 0x52))
-- 
2.7.4


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[U-Boot] TI814X and TI816X Kconfig Descriptions

[Adam Ford]

I don't know anything about these two boards, but the Kconfig in
arch/arm/mach-omap2 shows the same description for both boards and it
makes it seems like they are both AM335X SOC's.

config TI814X
bool "TI814X SoC"
help
 Support for AM335x SOC from Texas Instruments.
 The AM335x high performance SOC features a Cortex-A8
 ARM core and more.

config TI816X
bool "TI816X SoC"
help
 Support for AM335x SOC from Texas Instruments.
 The AM335x high performance SOC features a Cortex-A8
 ARM core and more.


Are those really the correct descriptions? I only came across this
while trying to port some OMAP_GPMC stuff to Kconfig.  It doesn't seem
like they get the love that the other SoC's get.

adam
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[U-Boot] [PATCH] ARM: dts: ethernut5: Fix the build warning

[Wenyou Yang]

Fix the building warning as below:
---8<
Warning (reg_format): "reg" property in /i2c-gpio-0/pcf8563@50 has invalid 
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for 
/i2c-gpio-0/pcf8563@50
Warning (avoid_default_addr_size): Relying on default #size-cells value for 
/i2c-gpio-0/pcf8563@50
--->8

Signed-off-by: Wenyou Yang 
---

 arch/arm/dts/ethernut5.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/ethernut5.dts b/arch/arm/dts/ethernut5.dts
index e07715225f..5c24deaf4b 100644
--- a/arch/arm/dts/ethernut5.dts
+++ b/arch/arm/dts/ethernut5.dts
@@ -84,6 +84,8 @@
};
 
i2c-gpio-0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
status = "okay";
 
pcf8563@50 {
-- 
2.13.0

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Re: [U-Boot] board: ethernut5: Update to support DT and DM

[Yang, Wenyou]

On 2017/8/7 21:55, Tom Rini wrote:

On Fri, Jul 21, 2017 at 02:30:57PM +0800, wenyou.y...@microchip.com wrote:


Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 

Applied to u-boot/master.  However:
Warning (reg_format): "reg" property in /i2c-gpio-0/pcf8563@50 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /i2c-gpio-0/pcf8563@50
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /i2c-gpio-0/pcf8563@50

Please fix and push to the kernel as well as U-Boot, thanks!

Yes, I will send the patch.


Best Regards,
Wenyou Yang

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[U-Boot] [PATCH v2 5/5] spl: fit: Add booting OS first

[York Sun]

If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
in FIT structure.

Signed-off-by: York Sun 

---
This presums the kernel image doesn't exist in a FIT image intended for
U-Boot. If kernel image normally co-exists with U-Boot and other images
and user intends to boot U-Boot, this patch needs to rewrite to favor
"loadables" over either "firmware" or "kernel" so user can select which
image to boot.

Changes in v2:
Split from previous patch, rebased on top of "SPL: FIT: allow loading
multiple images" by Andre Przywara.

 common/spl/spl_fit.c | 60 +++-
 1 file changed, 41 insertions(+), 19 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 0de4f40..0e4e87f 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -218,13 +218,16 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
ulong size;
unsigned long count;
struct spl_image_info image_info;
-   int node, images, ret;
+   bool boot_os = false;
+   int node = -1;
+   int images, ret;
int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
int index = 0;
 
/*
-* Figure out where the external images start. This is the base for the
-* data-offset properties in each image.
+* For FIT with external data, figure out where the external images
+* start. This is the base for the data-offset properties in each
+* image.
 */
size = fdt_totalsize(fit);
size = (size + 3) & ~3;
@@ -243,6 +246,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 *
 * In fact the FIT has its own load address, but we assume it cannot
 * be before CONFIG_SYS_TEXT_BASE.
+*
+* For FIT with data embedded, data is loaded as part of FIT image.
+* For FIT with external data, data is not loaded in this step.
 */
fit = (void *)((CONFIG_SYS_TEXT_BASE - size - info->bl_len -
align_len) & ~align_len);
@@ -260,8 +266,17 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
return -1;
}
 
+#ifdef CONFIG_SPL_OS_BOOT
+   /* Find OS image first */
+   node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
+   if (node < 0)
+   debug("No kernel image.\n");
+   else
+   boot_os = true;
+#endif
/* find the U-Boot image */
-   node = spl_fit_get_image_node(fit, images, "firmware", 0);
+   if (node < 0)
+   node = spl_fit_get_image_node(fit, images, "firmware", 0);
if (node < 0) {
debug("could not find firmware image, trying loadables...\n");
node = spl_fit_get_image_node(fit, images, "loadables", 0);
@@ -283,24 +298,31 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
if (ret)
return ret;
 
+#ifdef CONFIG_SPL_OS_BOOT
+   if (!fit_image_get_os(fit, node, _image->os))
+   debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
+#else
spl_image->os = IH_OS_U_BOOT;
+#endif
 
-   /* Figure out which device tree the board wants to use */
-   node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
-   if (node < 0) {
-   debug("%s: cannot find FDT node\n", __func__);
-   return node;
-   }
+   if (!boot_os) {
+   /* Figure out which device tree the board wants to use */
+   node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+   if (node < 0) {
+   debug("%s: cannot find FDT node\n", __func__);
+   return node;
+   }
 
-   /*
-* Read the device tree and place it after the image.
-* Align the destination address to ARCH_DMA_MINALIGN.
-*/
-   image_info.load_addr = spl_image->load_addr + spl_image->size;
-   ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-_info);
-   if (ret < 0)
-   return ret;
+   /*
+* Read the device tree and place it after the image.
+* Align the destination address to ARCH_DMA_MINALIGN.
+*/
+   image_info.load_addr = spl_image->load_addr + spl_image->size;
+   ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+_info);
+   if (ret < 0)
+   return ret;
+   }
 
/* Now check if there are more images for us to load */
for (; ; index++) {
-- 
2.7.4

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[U-Boot] [PATCH v2 3/5] spl: fit: Eanble GZIP support for image decompression

[York Sun]

Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
SPL boot, eg. falcon boot compressed kernel image.

Signed-off-by: York Sun 

---

Changes in v2:
Combine Kconfig change and actual code into one patch

 common/spl/spl_fit.c | 28 ++--
 lib/Kconfig  |  8 
 lib/Makefile |  5 +++--
 3 files changed, 37 insertions(+), 4 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d2a352e..23f85d2 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -135,6 +135,19 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
ulong overhead;
int nr_sectors;
int align_len = ARCH_DMA_MINALIGN - 1;
+#if defined(CONFIG_SPL_OS_BOOT) && defined(CONFIG_SPL_GZIP)
+   uint8_t image_comp, type;
+
+   if (fit_image_get_comp(fit, node, _comp))
+   puts("Cannot get image compression format.\n");
+   else
+   debug("%s ", genimg_get_comp_name(image_comp));
+
+   if (fit_image_get_type(fit, node, ))
+   puts("Cannot get image type.\n");
+   else
+   debug("%s ", genimg_get_type_name(type));
+#endif
 
offset = fdt_getprop_u32(fit, node, "data-offset");
if (offset == FDT_ERROR)
@@ -154,7 +167,7 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
if (info->read(info, sector + get_aligned_image_offset(info, offset),
   nr_sectors, (void*)load_ptr) != nr_sectors)
return -EIO;
-   debug("image: dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
+   debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
  (unsigned long)length);
 
src = (void *)load_ptr + overhead;
@@ -162,7 +175,18 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
board_fit_image_post_process(, );
 #endif
 
-   memcpy((void*)load_addr, src, length);
+#if defined(CONFIG_SPL_OS_BOOT) && defined(CONFIG_SPL_GZIP)
+   if (image_comp == IH_COMP_GZIP && type == IH_TYPE_KERNEL) {
+   if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
+  src, )) {
+   puts("Uncompressing error\n");
+   return -EIO;
+   }
+   } else
+#endif
+   {
+   memcpy((void *)load_addr, src, length);
+   }
 
if (image_info) {
image_info->load_addr = load_addr;
diff --git a/lib/Kconfig b/lib/Kconfig
index 2f5a210..a3c6520 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -160,6 +160,14 @@ config LZO
bool "Enable LZO decompression support"
help
  This enables support for LZO compression algorithm.r
+
+config SPL_GZIP
+   bool "Enable gzip decompression support for SPL build"
+   select SPL_ZLIB
+
+config SPL_ZLIB
+   bool
+
 endmenu
 
 config ERRNO_STR
diff --git a/lib/Makefile b/lib/Makefile
index eacc7d6..455cc9d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_LZO) += lzo/
-obj-$(CONFIG_ZLIB) += zlib/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -26,7 +25,6 @@ obj-y += crc16.o
 obj-$(CONFIG_ERRNO_STR) += errno_str.o
 obj-$(CONFIG_FIT) += fdtdec_common.o
 obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
-obj-$(CONFIG_GZIP) += gunzip.o
 obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
@@ -49,6 +47,9 @@ obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
 
+obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
+obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
+
 obj-$(CONFIG_SPL_SAVEENV) += qsort.o
 obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
 ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_SPL_OF_PLATDATA),yy)
-- 
2.7.4

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[U-Boot] [PATCH v2 4/5] spl: fit: Support both external and embedded data

[York Sun]

SPL supports U-Boot image in FIT format which has data outside of
FIT structure. This adds support for embedded data for normal FIT
images.

Signed-off-by: York Sun 

---

Changes in v2:
Rebase on top of "SPL: FIT: factor out spl_load_fit_image()" by Andre Przywara

 common/spl/spl_fit.c | 52 +---
 1 file changed, 33 insertions(+), 19 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 23f85d2..0de4f40 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -128,13 +128,15 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
  void *fit, ulong base_offset, int node,
  struct spl_image_info *image_info)
 {
-   ulong offset;
+   int offset;
size_t length;
+   int len;
ulong load_addr, load_ptr;
void *src;
ulong overhead;
int nr_sectors;
int align_len = ARCH_DMA_MINALIGN - 1;
+   const void *data;
 #if defined(CONFIG_SPL_OS_BOOT) && defined(CONFIG_SPL_GZIP)
uint8_t image_comp, type;
 
@@ -149,28 +151,40 @@ static int spl_load_fit_image(struct spl_load_info *info, 
ulong sector,
debug("%s ", genimg_get_type_name(type));
 #endif
 
-   offset = fdt_getprop_u32(fit, node, "data-offset");
-   if (offset == FDT_ERROR)
-   return -ENOENT;
-   offset += base_offset;
-   length = fdt_getprop_u32(fit, node, "data-size");
-   if (length == FDT_ERROR)
-   return -ENOENT;
-   load_addr = fdt_getprop_u32(fit, node, "load");
-   if (load_addr == FDT_ERROR && image_info)
+   if (fit_image_get_load(fit, node, _addr))
load_addr = image_info->load_addr;
-   load_ptr = (load_addr + align_len) & ~align_len;
 
-   overhead = get_aligned_image_overhead(info, offset);
-   nr_sectors = get_aligned_image_size(info, length, offset);
+   if (!fit_image_get_data_offset(fit, node, )) {
+   /* External data */
+   offset += base_offset;
+   if (fit_image_get_data_size(fit, node, ))
+   return -ENOENT;
 
-   if (info->read(info, sector + get_aligned_image_offset(info, offset),
-  nr_sectors, (void*)load_ptr) != nr_sectors)
-   return -EIO;
-   debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
- (unsigned long)length);
+   load_ptr = (load_addr + align_len) & ~align_len;
+   length = len;
+
+   overhead = get_aligned_image_overhead(info, offset);
+   nr_sectors = get_aligned_image_size(info, length, offset);
+
+   if (info->read(info,
+  sector + get_aligned_image_offset(info, offset),
+  nr_sectors, (void *)load_ptr) != nr_sectors)
+   return -EIO;
+
+   debug("External data: dst=%lx, offset=%x, size=%lx\n",
+ load_ptr, offset, (unsigned long)length);
+   src = (void *)load_ptr + overhead;
+   } else {
+   /* Embedded data */
+   if (fit_image_get_data(fit, node, , )) {
+   puts("Cannot get image data/size\n");
+   return -ENOENT;
+   }
+   debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
+ (unsigned long)length);
+   src = (void *)data;
+   }
 
-   src = (void *)load_ptr + overhead;
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
board_fit_image_post_process(, );
 #endif
-- 
2.7.4

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[U-Boot] [PATCH v2 1/5] tools: pblimage: Fix address calculation

[York Sun]

The image size should be added to the initial pbl command, not bit
"ORed".

Signed-off-by: York Sun 
---

Changes in v2: None

 tools/pblimage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/pblimage.c b/tools/pblimage.c
index ffc3268..d25a733 100644
--- a/tools/pblimage.c
+++ b/tools/pblimage.c
@@ -293,7 +293,7 @@ int pblimage_check_params(struct image_tool_params *params)
pbi_crc_cmd2 = 0;
pbl_cmd_initaddr = params->addr & PBL_ADDR_24BIT_MASK;
pbl_cmd_initaddr |= PBL_ACS_CONT_CMD;
-   pbl_cmd_initaddr |= uboot_size;
+   pbl_cmd_initaddr += uboot_size;
pbl_end_cmd[0] = 0x0961;
pbl_end_cmd[1] = 0x;
pbl_end_cmd[2] = 0x096100c0;
-- 
2.7.4

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[U-Boot] [PATCH v2 2/5] cmd: spl: Fix compiling warning

[York Sun]

Fix warning "cast from pointer to integer of different size".

Signed-off-by: York Sun 
---

Changes in v2: None

 cmd/spl.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/cmd/spl.c b/cmd/spl.c
index 057764a..562140a 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -108,12 +108,12 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[])
 
c = find_cmd_tbl(argv[1], _spl_export_sub[0],
ARRAY_SIZE(cmd_spl_export_sub));
-   if ((c) && ((int)c->cmd <= SPL_EXPORT_LAST)) {
+   if ((c) && ((long)c->cmd <= SPL_EXPORT_LAST)) {
argc -= 2;
argv += 2;
-   if (call_bootm(argc, argv, subcmd_list[(int)c->cmd]))
+   if (call_bootm(argc, argv, subcmd_list[(long)c->cmd]))
return -1;
-   switch ((int)c->cmd) {
+   switch ((long)c->cmd) {
 #ifdef CONFIG_OF_LIBFDT
case SPL_EXPORT_FDT:
printf("Argument image is now in RAM: 0x%p\n",
@@ -147,7 +147,7 @@ static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 
c = find_cmd_tbl(argv[1], _spl_sub[0], ARRAY_SIZE(cmd_spl_sub));
if (c) {
-   cmd = (int)c->cmd;
+   cmd = (long)c->cmd;
switch (cmd) {
case SPL_EXPORT:
argc--;
-- 
2.7.4

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[U-Boot] [PATCH v2 0/5] Extend FIT support for falcon boot

[York Sun]

This patch set extends FIT support for falcon boot. The difference
between U-Boot FIT and Linux FIT lies not only on the images inside,
but also the data offset. U-Boot FIT image has data outside of the
FIT structure while Linux FIT image can have data embedded within.
Linux FIT can use compressed image as well.

Changes in v2:
Combine Kconfig change and actual code into one patch
Rebase on top of "SPL: FIT: factor out spl_load_fit_image()" by Andre Przywara
Split from previous patch, rebased on top of "SPL: FIT: allow loading
multiple images" by Andre Przywara.

York Sun (5):
  tools: pblimage: Fix address calculation
  cmd: spl: Fix compiling warning
  spl: fit: Eanble GZIP support for image decompression
  spl: fit: Support both external and embedded data
  spl: fit: Add booting OS first

 cmd/spl.c|   8 +--
 common/spl/spl_fit.c | 140 ---
 lib/Kconfig  |   8 +++
 lib/Makefile |   5 +-
 tools/pblimage.c |   2 +-
 5 files changed, 116 insertions(+), 47 deletions(-)

-- 
2.7.4

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Re: [U-Boot] [PATCH] armv8: layerscape platform pcie link up state judgment strongly

[York Sun]

On 08/02/2017 07:58 PM, Bao Xiaowei wrote:
> modifiy the ls_pcie_link_up function, add the following three judging
> mechanisms:
> 
> detect state: return link down status;
> L0 state: return link up status;
> other state: delay about 100ms retrieve Status Returns the corresponding link
> status;

Please pay attention to your upper case and lower case in commit message.

What does the spec say about the timeout? Is 100ms the right time? If 
so, please put a comment in the source code.

> 
> Signed-off-by: Bao Xiaowei 
> ---
>   drivers/pci/pcie_layerscape.c | 17 +
>   1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
> index 7565e2f..4446ac9 100644
> --- a/drivers/pci/pcie_layerscape.c
> +++ b/drivers/pci/pcie_layerscape.c
> @@ -65,13 +65,22 @@ static int ls_pcie_ltssm(struct ls_pcie *pcie)
>   
>   static int ls_pcie_link_up(struct ls_pcie *pcie)
>   {
> - int ltssm;
> + int ltssm, i;
>   
>   ltssm = ls_pcie_ltssm(pcie);
> - if (ltssm < LTSSM_PCIE_L0)
> + if ((ltssm == 0) || (ltssm == 1))
>   return 0;
> -
> - return 1;
> + else if (ltssm == LTSSM_PCIE_L0)
> + return 1;
> + else {
> + for (i = 0; i < 100; i++) {
> + udelay(1000);
> + ltssm = ls_pcie_ltssm(pcie);
> + if (ltssm == LTSSM_PCIE_L0)
> + return 1;
> + }
> + return 0;
> + }

A comment to summary the logic would be nice.

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Re: [U-Boot] [PATCH 6/8] armv7: Add workaround for USB erratum A-009798

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> The default setting for USB High Speed Squelch Threshold results
> in a threshold close to or lower than 100mV. This leads to Receive
> Compliance test failure for a 100mV threshold.
> 
> The changes shift the threshold from ~100mV towards ~130mV resulting
> in passing of USB High Speed Receiver Sensitivity Compliance test.
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv7/ls102xa/Kconfig| 8 +++-
>   arch/arm/cpu/armv7/ls102xa/soc.c  | 9 +
>   arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
>   3 files changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
> b/arch/arm/cpu/armv7/ls102xa/Kconfig
> index 11e33d6..c605fc0 100644
> --- a/arch/arm/cpu/armv7/ls102xa/Kconfig
> +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
> @@ -6,6 +6,7 @@ config ARCH_LS1021A
>   select SYS_FSL_ERRATUM_A009942
>   select SYS_FSL_ERRATUM_A010315
>   select SYS_FSL_ERRATUM_A009008
> + select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_SRDS_1
>   select SYS_HAS_SERDES
>   select SYS_FSL_DDR_BE if SYS_FSL_DDR
> @@ -54,7 +55,12 @@ config SYS_FSL_ERRATUM_A010315
>   config SYS_FSL_ERRATUM_A009008
>   bool
>   help
> - Workaround for USB erratum A009008
> + Workaround for USB PHY erratum A009008
> +
> +config SYS_FSL_ERRATUM_A009798
> + bool
> + help
> + Workaround for USB PHY erratum A009798
>   
>   config SYS_FSL_SRDS_1
>   bool
> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c 
> b/arch/arm/cpu/armv7/ls102xa/soc.c
> index 986337d..ef44a6c 100644
> --- a/arch/arm/cpu/armv7/ls102xa/soc.c
> +++ b/arch/arm/cpu/armv7/ls102xa/soc.c
> @@ -70,6 +70,14 @@ static void erratum_a009008(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
>   }
>   
> +static void erratum_a009798(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
> + u32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4);

Put a blank line here.

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Re: [U-Boot] [PATCH] ls1046aqds: update the defaule mtdparts

[York Sun]

On 07/12/2017 04:44 AM, xiaowei.bao wrote:
> From: Bao Xiaowei 
> 
> modify the include/configs/ls1046aqds.h file, according to the latest
> partion rules, norflash nandflash dspiflash detailed partion as follows:
> 
> mtd0: 0010 0002 "nor_bank0_rcw"
> mtd1: 0020 0002 "nor_bank0_uboot"
> mtd2: 0010 0002 "nor_bank0_uboot_env"
> mtd3: 0020 0002 "nor_bank0_ppa"
> mtd4: 0030 0002 "nor_bank0_secure_boot"
> mtd5: 0060 0002 "nor_bank0_dppa_qe"
> mtd6: 0010 0002 "nor_bank0_dtb"
> mtd7: 0100 0002 "nor_bank0_kernel"
> mtd8: 0200 0002 "nor_bank0_rootfs"
> mtd9: 0010 0002 "nor_bank4_rcw"
> mtd10: 0020 0002 "nor_bank4_uboot"
> mtd11: 0020 0002 "nor_bank4_uboot_env"
> mtd12: 0010 0002 "nor_bank4_ppa"
> mtd13: 0030 0002 "nor_bank4_secure_boot"
> mtd14: 0060 0002 "nor_bank4_dppa_qe"
> mtd15: 0010 0002 "nor_bank4_dtb"
> mtd16: 0100 0002 "nor_bank4_kernel"
> mtd17: 0200 0002 "nor_bank4_rootfs"
> mtd18: 0010 0004 "nand_rcw"
> mtd19: 0020 0004 "nand_uboot"
> mtd20: 0010 0004 "nand_uboot_env"
> mtd21: 0020 0004 "nand_ppa"
> mtd22: 0030 0004 "nand_secure_boot"
> mtd23: 0060 0004 "nand_dppa_qe"
> mtd24: 0010 0004 "nand_dtb"
> mtd25: 0100 0004 "nand_kernel"
> mtd26: 0200 0004 "nand_rootfs"
> mtd27: 1c00 0004 "nand_free"
> mtd28: 0100 0001 "spi0_free"
> mtd29: 0008 1000 "spi1_free"
> mtd30: 0080 1000 "spi2_free"

Do we really need to expose every image as individual partition? It is 
only useful if we need to access them under Linux. What's the chance to 
update U-Boot environmental variables under Linux? If you really to do 
so, you can probably be fine by defining a larger partition to include 
all images used for U-Boot. Agree?

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Re: [U-Boot] [PATCH 7/8] armv7: Add workaround for USB erratum A-008997

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential
> Output Voltage Test Compliance fails using default transmitter settings
> 
> Change settings required for transmitter signal swings to pass
> compliance tests.
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
>   arch/arm/cpu/armv7/ls102xa/soc.c  | 13 +
>   arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  3 +++
>   3 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
> b/arch/arm/cpu/armv7/ls102xa/Kconfig
> index c605fc0..4f2e86e 100644
> --- a/arch/arm/cpu/armv7/ls102xa/Kconfig
> +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
> @@ -7,6 +7,7 @@ config ARCH_LS1021A
>   select SYS_FSL_ERRATUM_A010315
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
> + select SYS_FSL_ERRATUM_A008997
>   select SYS_FSL_SRDS_1
>   select SYS_HAS_SERDES
>   select SYS_FSL_DDR_BE if SYS_FSL_DDR
> @@ -62,6 +63,11 @@ config SYS_FSL_ERRATUM_A009798
>   help
>   Workaround for USB PHY erratum A009798
>   
> +config SYS_FSL_ERRATUM_A008997
> + bool
> + help
> + Workaround for USB PHY erratum A008997
> +
>   config SYS_FSL_SRDS_1
>   bool
>   
> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c 
> b/arch/arm/cpu/armv7/ls102xa/soc.c
> index ef44a6c..15b2299 100644
> --- a/arch/arm/cpu/armv7/ls102xa/soc.c
> +++ b/arch/arm/cpu/armv7/ls102xa/soc.c
> @@ -79,6 +79,18 @@ static void erratum_a009798(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
>   }
>   
> +static void erratum_a008997(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
> + u32 val = in_be32(scfg + SCFG_USB3PRM2CR / 4);

Put a blank line here.

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Re: [U-Boot] [PATCH 8/8] armv7: Add workaround for USB erratum A-009007

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> Rx Compliance tests may fail intermittently at high
> jitter frequencies using default register values
> 
> Changes identified in test setup makes the Rx compliance test pass
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
>   arch/arm/cpu/armv7/ls102xa/soc.c  | 11 +++
>   arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  7 +++
>   3 files changed, 24 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
> b/arch/arm/cpu/armv7/ls102xa/Kconfig
> index 4f2e86e..236addb 100644
> --- a/arch/arm/cpu/armv7/ls102xa/Kconfig
> +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
> @@ -8,6 +8,7 @@ config ARCH_LS1021A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select SYS_FSL_SRDS_1
>   select SYS_HAS_SERDES
>   select SYS_FSL_DDR_BE if SYS_FSL_DDR
> @@ -68,6 +69,11 @@ config SYS_FSL_ERRATUM_A008997
>   help
>   Workaround for USB PHY erratum A008997
>   
> +config SYS_FSL_ERRATUM_A009007
> + bool
> + help
> + Workaround for USB PHY erratum A009007
> +
>   config SYS_FSL_SRDS_1
>   bool
>   
> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c 
> b/arch/arm/cpu/armv7/ls102xa/soc.c
> index 15b2299..88219ec 100644
> --- a/arch/arm/cpu/armv7/ls102xa/soc.c
> +++ b/arch/arm/cpu/armv7/ls102xa/soc.c
> @@ -90,6 +90,16 @@ static void erratum_a008997(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
>   }
>   
> +static void erratum_a009007(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009007
> + void __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;

Put a blank line here.

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Re: [U-Boot] [PATCH 5/8] armv7: Add workaround for USB erratum A-009008

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> USB High Speed (HS) EYE Height Adjustment
> USB HS speed eye diagram fails with the default value at
> many corners, particularly at a high temperature
> 
> Optimal eye at TXVREFTUNE value to 1001 is ovserved, change
> set the same value.
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
>   arch/arm/cpu/armv7/ls102xa/soc.c  | 14 ++
>   arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  4 
>   3 files changed, 24 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
> b/arch/arm/cpu/armv7/ls102xa/Kconfig
> index b61f3cd..11e33d6 100644
> --- a/arch/arm/cpu/armv7/ls102xa/Kconfig
> +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
> @@ -5,6 +5,7 @@ config ARCH_LS1021A
>   select SYS_FSL_ERRATUM_A009663
>   select SYS_FSL_ERRATUM_A009942
>   select SYS_FSL_ERRATUM_A010315
> + select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_SRDS_1
>   select SYS_HAS_SERDES
>   select SYS_FSL_DDR_BE if SYS_FSL_DDR
> @@ -50,6 +51,11 @@ config SECURE_BOOT
>   config SYS_FSL_ERRATUM_A010315
>   bool "Workaround for PCIe erratum A010315"
>   
> +config SYS_FSL_ERRATUM_A009008
> + bool
> + help
> + Workaround for USB erratum A009008
> +
>   config SYS_FSL_SRDS_1
>   bool
>   
> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c 
> b/arch/arm/cpu/armv7/ls102xa/soc.c
> index b84a1a6..986337d 100644
> --- a/arch/arm/cpu/armv7/ls102xa/soc.c
> +++ b/arch/arm/cpu/armv7/ls102xa/soc.c
> @@ -60,6 +60,17 @@ unsigned int get_soc_major_rev(void)
>   return major;
>   }
>   
> +static void erratum_a009008(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009008
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
> + u32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4);

Put a blank here.

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Re: [U-Boot] [PATCH 4/8] armv8: Add workaround for USB erratum A-009007

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> Rx Compliance tests may fail intermittently at high
> jitter frequencies using default register values.
> 
> Changes identified in setup makes the Rx compliance test pass.
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv8/fsl-layerscape/Kconfig  | 12 -
>   arch/arm/cpu/armv8/fsl-layerscape/soc.c| 55 
> ++
>   .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  8 
>   .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 
>   4 files changed, 83 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index 867794d..3f63694 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -25,6 +25,7 @@ config ARCH_LS1043A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select SYS_FSL_HAS_DDR3
>   select SYS_FSL_HAS_DDR4
>   select ARCH_EARLY_INIT_R
> @@ -48,6 +49,7 @@ config ARCH_LS1046A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select SYS_FSL_HAS_DDR4
>   select SYS_FSL_SRDS_2
>   select ARCH_EARLY_INIT_R
> @@ -86,6 +88,7 @@ config ARCH_LS2080A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select ARCH_EARLY_INIT_R
>   select BOARD_EARLY_INIT_F
>   
> @@ -236,7 +239,14 @@ config SYS_FSL_ERRATUM_A009798
>   bool "Workaround for USB PHY erratum A009798"
>   
>   config SYS_FSL_ERRATUM_A008997
> - bool "Workaround for USB PHY erratum A008997"
> + bool
> + help
> + Workaround for USB PHY erratum A008997
> +
> +config SYS_FSL_ERRATUM_A009007
> + bool
> + help
> + Workaround for USB PHY erratum A009007
>   
>   config MAX_CPUS
>   int "Maximum number of CPUs permitted for Layerscape"
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 7ebb8d4..5810f42 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -115,6 +115,59 @@ static void erratum_a008997(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
>   }
>   
> +static void erratum_a009007(void)
> +{
> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
> + void __iomem *usb_phy = (void __iomem *)USB_PHY1;

Put a blank line here.

> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_1);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_2);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_3);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_4);
> +
> + usb_phy = (void __iomem *)USB_PHY2;
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_1);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_2);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_3);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_4);
> +
> + usb_phy = (void __iomem *)USB_PHY3;
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_1);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_2);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_3);
> + out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_4);
> +#elif defined(CONFIG_ARCH_LS2080A)
> + void __iomem *dcsr = (void __iomem *)DCSR_BASE;
> + out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_1);
> + out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_2);
> + out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_3);
> + out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_4);
> + out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_1);
> + out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_2);
> + out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_3);
> + out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +  USB_PHY_RX_EQ_VAL_4);
> 

Re: [U-Boot] [PATCH 2/8] armv8: Add workaround for USB erratum A-009798

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> The default setting for USB High Speed Squelch Threshold results
> in a threshold close to or lower than 100mV. This leads to Receiver
> Compliance test failure for a 100mV threshold.
> 
> The changes shift the threshold from ~100mV woards ~130mV resulting
> in passing of USB High Speed Receiver Sensitivity Compliance test.
> 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv8/fsl-layerscape/Kconfig   |  5 +
>   arch/arm/cpu/armv8/fsl-layerscape/soc.c | 21 
> +
>   .../include/asm/arch-fsl-layerscape/immap_lsch2.h   |  1 +
>   .../include/asm/arch-fsl-layerscape/immap_lsch3.h   |  1 +
>   4 files changed, 28 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index eebfcfe..63f4eec 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -23,6 +23,7 @@ config ARCH_LS1043A
>   select SYS_FSL_ERRATUM_A010315
>   select SYS_FSL_ERRATUM_A010539
>   select SYS_FSL_ERRATUM_A009008
> + select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_HAS_DDR3
>   select SYS_FSL_HAS_DDR4
>   select ARCH_EARLY_INIT_R
> @@ -44,6 +45,7 @@ config ARCH_LS1046A
>   select SYS_FSL_ERRATUM_A010165
>   select SYS_FSL_ERRATUM_A010539
>   select SYS_FSL_ERRATUM_A009008
> + select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_HAS_DDR4
>   select SYS_FSL_SRDS_2
>   select ARCH_EARLY_INIT_R
> @@ -80,6 +82,7 @@ config ARCH_LS2080A
>   select SYS_FSL_ERRATUM_A010165
>   select SYS_FSL_ERRATUM_A009203
>   select SYS_FSL_ERRATUM_A009008
> + select SYS_FSL_ERRATUM_A009798
>   select ARCH_EARLY_INIT_R
>   select BOARD_EARLY_INIT_F
>   
> @@ -226,6 +229,8 @@ config SYS_FSL_ERRATUM_A010539
>   config SYS_FSL_ERRATUM_A009008
>   bool "Workaround for USB PHY erratum A009008"
>   
> +config SYS_FSL_ERRATUM_A009798
> + bool "Workaround for USB PHY erratum A009798"
>   
>   config MAX_CPUS
>   int "Maximum number of CPUs permitted for Layerscape"
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index a91f85e..ad9127a 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -75,6 +75,25 @@ static void erratum_a009008(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
>   }
>   
> +static void erratum_a009798(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
> + u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB1 / 4);

Put a blank line here.

> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB1 / 4 , val & USB_SQRXTUNE);
> + val = gur_in32(scfg + SCFG_USB3PRM1CR_USB2 / 4);
> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB2 / 4 , val & USB_SQRXTUNE);
> + val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB3 / 4);
> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB3 / 4 , val & USB_SQRXTUNE);
> +#elif defined(CONFIG_ARCH_LS2080A)
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;

Same here. Move it up together if you can.

> + u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR / 4);

Put a blank line here.

York
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Re: [U-Boot] [PATCH 1/8] armv8: Add workaround for USB erratum A-009008

[York Sun]

Only cosmetic issues found in this set. Please check more comments on 
patch 4.

On 07/09/2017 07:41 PM, Ran Wang wrote:
> USB High Speed (HS) EYE Height Adjustment
> USB HS speed eye diagram fails with the default value at
> many corners, particularly at a high temperature
> 
> Optimal eye at TXREFTUNE value to 1001 is observed, change
> set the same value.
> 
> Signed-off-by: Ran Wang 
> ---
>   arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  7 ++
>   arch/arm/cpu/armv8/fsl-layerscape/soc.c| 25 
> ++
>   .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  6 ++
>   .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
>   4 files changed, 39 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index d8b285d..eebfcfe 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -22,6 +22,7 @@ config ARCH_LS1043A
>   select SYS_FSL_ERRATUM_A009942
>   select SYS_FSL_ERRATUM_A010315
>   select SYS_FSL_ERRATUM_A010539
> + select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_HAS_DDR3
>   select SYS_FSL_HAS_DDR4
>   select ARCH_EARLY_INIT_R
> @@ -42,6 +43,7 @@ config ARCH_LS1046A
>   select SYS_FSL_ERRATUM_A009942
>   select SYS_FSL_ERRATUM_A010165
>   select SYS_FSL_ERRATUM_A010539
> + select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_HAS_DDR4
>   select SYS_FSL_SRDS_2
>   select ARCH_EARLY_INIT_R
> @@ -77,6 +79,7 @@ config ARCH_LS2080A
>   select SYS_FSL_ERRATUM_A009942
>   select SYS_FSL_ERRATUM_A010165
>   select SYS_FSL_ERRATUM_A009203
> + select SYS_FSL_ERRATUM_A009008
>   select ARCH_EARLY_INIT_R
>   select BOARD_EARLY_INIT_F
>   
> @@ -220,6 +223,10 @@ config SYS_FSL_ERRATUM_A010315
>   config SYS_FSL_ERRATUM_A010539
>   bool "Workaround for PIN MUX erratum A010539"
>   
> +config SYS_FSL_ERRATUM_A009008
> + bool "Workaround for USB PHY erratum A009008"
> +
> +
>   config MAX_CPUS
>   int "Maximum number of CPUs permitted for Layerscape"
>   default 4 if ARCH_LS1043A
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 0943e83..a91f85e 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -52,6 +52,29 @@ bool soc_has_aiop(void)
>   return false;
>   }
>   
> +static void erratum_a009008(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009008
> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
> + u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB1 / 4);

Put a blank line after variable declaration.

> + val &= ~(0xF << 6);
> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB1 / 4, val|(USB_TXVREFTUNE << 6));
> + val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB2 / 4);
> + val &= ~(0xF << 6);
> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB2 / 4, val|(USB_TXVREFTUNE << 6));
> + val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB3 / 4);
> + val &= ~(0xF << 6);
> + scfg_out32(scfg + SCFG_USB3PRM1CR_USB3 / 4, val|(USB_TXVREFTUNE << 6));
> +#elif defined(CONFIG_ARCH_LS2080A)
> + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;

Move the common code together.
Same comment goes to other patches in this set.

York
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Re: [U-Boot] [PATCH v2] arm: omap: Fix 'get_device_type()' for OMAP34XX

[Derald Woods]

On Mon, Aug 7, 2017 at 7:41 AM, Tom Rini  wrote:

> On Mon, Aug 07, 2017 at 07:35:30AM -0500, Derald Woods wrote:
> > On Mon, Jul 31, 2017 at 7:41 AM, Derald D. Woods <
> woods.techni...@gmail.com>
> > wrote:
> >
> > > Fixes: 00bbe96ebabb ("arm: omap: Unify get_device_type() function")
> > >
> > > The control status register value is embedded in a structure somewhere
> > > in SRAM, with the last refactoring effort. This patch allows OMAP3 EVM
> > > (TMDSEVM3530) to boot again using the known control register base and
> > > offset for 'readl', for the OMAP34XX case.
> > >
> > > Signed-off-by: Derald D. Woods 
> > >
> > > ---
> > > Changes in v2:
> > > - Added 'signed-off-by'
> > > - Updated description
> > >
> > > ---
> > >  arch/arm/mach-omap2/sysinfo-common.c | 4 
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/arch/arm/mach-omap2/sysinfo-common.c
> > > b/arch/arm/mach-omap2/sysinfo-common.c
> > > index 1dc7051ab3..3955e803ad 100644
> > > --- a/arch/arm/mach-omap2/sysinfo-common.c
> > > +++ b/arch/arm/mach-omap2/sysinfo-common.c
> > > @@ -16,6 +16,10 @@
> > >   */
> > >  u32 get_device_type(void)
> > >  {
> > > +#if defined(CONFIG_OMAP34XX)
> > > +   return (readl(OMAP34XX_CTRL_BASE + 0x2f0) & DEVICE_TYPE_MASK)
> >>
> > > +   DEVICE_TYPE_SHIFT;
> > > +#endif
> > > return (readl((*ctrl)->control_status) & DEVICE_TYPE_MASK) >>
> > > DEVICE_TYPE_SHIFT;
> > >  }
> >
> > ​Is there any​ comment or concern with this patch? It was the simplest
> > means to get OMAP35XX booting again and still keep the original patch.
> > Basically it avoids the pointer to the OMAP_SRAM_SCRATCH_SYS_CTRL located
> > structure as now defined in "arch/arm/mach-omap2/omap3/hw_data.c". OMAP3
> > has a larger active SOC base than just OMAP36XX and greater. Was there
> > anything really broken with 'get_device_type()' previously?
>
> Is the pointer value wrong for 35xx?  The problem, such as it was, was
> having the same function duplicated in a number of places, and needing
> to make it more easily / readily available (rather than duplicated
> again) for some additional patches.  I'd really rather not introduce
> an #if here unless we really have no other choice.  Thanks!
>
> --
> Tom
>

​I will examine/debug the new 'get_device_type()' source code again
tonight. ‎Without the patch, I have two OMAP3530 boards that do not boot at
all.

Derald​
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Re: [U-Boot] [PATCH v0 21/20] efi_loader: hack for archs that cannot do unaligned accesses

[Rob Clark]

On Mon, Aug 7, 2017 at 5:14 PM, Mark Kettenis  wrote:
>> From: Alexander Graf 
>> Date: Mon, 7 Aug 2017 21:19:37 +0100
>>
>> On 05.08.17 21:31, Rob Clark wrote:
>> > On Sat, Aug 5, 2017 at 4:05 PM, Heinrich Schuchardt  
>> > wrote:
>> >> On 08/05/2017 08:43 PM, Rob Clark wrote:
>> >>> On Sat, Aug 5, 2017 at 1:06 PM, Rob Clark  wrote:
>>  On Sat, Aug 5, 2017 at 12:52 PM, Heinrich Schuchardt 
>>   wrote:
>> > On 08/05/2017 06:16 PM, Rob Clark wrote:
>> >> On Sat, Aug 5, 2017 at 12:12 PM, Heinrich Schuchardt 
>> >>  wrote:
>> >>> On 08/05/2017 05:58 PM, Rob Clark wrote:
>>  Some arch's have trouble with unaligned accesses.  Technically
>>  EFI device-path structs should be byte aligned, and the next node
>>  in the path starts immediately after the previous.  Meaning that
>>  a pointer to an 'struct efi_device_path' is not necessarily word
>>  aligned.  See section 10.3.1 in v2.7 of UEFI spec.
>> 
>>  This causes problems not just for u-boot, but also most/all EFI
>>  payloads loaded by u-boot on these archs.  Fortunately the common
>>  practice for traversing a device path is to rely on the length
>>  field in the header, rather than the specified length of the
>>  particular device path type+subtype.  So the EFI_DP_PAD() macro
>>  will add the specified number of bytes to the tail of device path
>>  structs to pad them to word alignment.
>> 
>>  Technically this is non-compliant, BROKEN_UNALIGNED should *only*
>>  be defined on archs that cannot do unaligned accesses.
>> 
>>  Signed-off-by: Rob Clark 
>>  ---
>>  I'm not sure if there are other arch's that need -DBROKEN_UNALIGNED
>> 
>>  Mark, this is untested but I think it should solve your crash on the
>>  Banana Pi.  Could you give it a try when you get a chance?
>> 
>>    arch/arm/config.mk   |  2 +-
>>    include/efi_api.h| 30 
>>  ++
>>    lib/efi_loader/efi_device_path.c |  3 +++
>>    3 files changed, 34 insertions(+), 1 deletion(-)
>> 
>>  diff --git a/arch/arm/config.mk b/arch/arm/config.mk
>>  index 1a9db4..067dc93a9d 100644
>>  --- a/arch/arm/config.mk
>>  +++ b/arch/arm/config.mk
>>  @@ -28,7 +28,7 @@ LLVMS_RELFLAGS  := $(call 
>>  cc-option,-mllvm,) \
>> $(call cc-option,-arm-use-movt=0,)
>>    PLATFORM_RELFLAGS+= $(LLVM_RELFLAGS)
>> 
>>  -PLATFORM_CPPFLAGS += -D__ARM__
>>  +PLATFORM_CPPFLAGS += -D__ARM__ -DBROKEN_UNALIGNED
>> >>>
>> >>> NAK
>> >>>
>> >>> We have more then ARM. And other architectures also create exceptions
>> >>> for unaligned access.
>> >>>
>> >>> I hate platform specific code. It should not be used outside /arch.
>> >>>
>> >>> To play it save you should not use _packed at all!
>> >>> Use memcpy to transfer between aligned and unaligned memory.
>> >>
>> >> except for reasons I explained in the thread on the patch that added
>> >> the __packed in the first place.  Sorry, this is ugly but we have to
>> >> do it.
>> >>
>> >> BR,
>> >> -R
>> >
>> > According to the UEFI standard the nodes in paths are not to be assumed
>> > to be aligned.
>> >
>> > So even if you use padding bytes in paths that you pass to the EFI
>> > application you should not expect that the EFI application does the
>> > same. Expect the EFI application either to remove them or send new 
>> > nodes
>> > without padding.
>> >
>> > To the idea of padding bytes and __packed does not make sense.
>> 
>>  Ok, to be fair, you are right about device-paths passed too u-boot.
>>  On BROKEN_UNALIGNED archs, we should sanitise with a copy to an
>>  aligned device-path in *addition* to what I proposed.  I can make a
>>  patch to add a helper to do this a bit later.
>> >>>
>> >>> so thinking about this a bit, I have two options in mind:
>> >>>
>> >>>   + efi_dp_sanitize() + efi_dp_free() helpers that are no-ops on
>> >>> archs that can do unaligned access, but efi_dp_sanitize() always
>> >>> allocates and copies on BROKEN_UNALIGNED archs and efi_dp_free()
>> >>> always free's on BROKEN_UNALIGNED archs, even if the dp passed
>> >>> from efi payload doesn't require it.
>> >>>
>> >>>   + efi_dp_sanitize() that is no-op on archs that can do unaligned
>> >>> access but only allocates/copies when passed a device path that
>> >>> would result in unaligned access, plus hook some mechanism to
>> >>> auto-free on EFI_EXIT().. which is 

Re: [U-Boot] [PATCH 1/1] board: ls2080ardb: Add fsl_fdt_fixup_flash

[York Sun]

On 07/05/2017 05:32 AM, Santan Kumar wrote:
> IFC and QSPI are muxed on board.
> 
> Add fsl_fdt_fixup_flash()
> -To disable IFC node in dts if QSPI is enabled.
> -Or disable QSPI node in dts if IFC is enabled.

The pin mux is at SoC level. Can you put this fixup at SoC level?

York
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Re: [U-Boot] [PATCH v2] Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to Kconfig

[Adam Ford]

On Aug 7, 2017 4:48 PM, "Peter Robinson"  wrote:

On Fri, Jul 28, 2017 at 2:32 PM, Adam Ford  wrote:
> This converts the following to Kconfig:
>CONFIG_SYS_TEXT_BASE
>
> The includes, whitelist, etc. were left for now but I don't get any
> build errors or warnings on the omap3_logic_defconfig or
> am3517_evm_defconfig builds I tried.

Was it intended to leave omap4 and most of the am33xx devices out of
this conversion?


All omap 2 plus devices are included. By default they do not need to appear
in the defconfig because the Kconfig will set the default value. The only
defconfig files that will appear are exceptions to the default.


Peter

> Signed-off-by: Adam Ford 
> ---
> Changes since V1
> - Move default 0x8080 if ARCH_OMAP2PLUS under config SYS_TEXT_BASE
> - Revert default 0x8080 under ARCH_OMAP2PLUS
>
>  Kconfig  | 4 +++-
>  configs/am335x_evm_norboot_defconfig | 1 +
>  configs/am3517_crane_defconfig   | 1 +
>  configs/am3517_evm_defconfig | 1 +
>  configs/cairo_defconfig  | 1 +
>  configs/cm_t3517_defconfig   | 1 +
>  configs/cm_t35_defconfig | 1 +
>  configs/devkit8000_defconfig | 1 +
>  configs/draco_defconfig  | 1 +
>  configs/eco5pk_defconfig | 1 +
>  configs/etamin_defconfig | 1 +
>  configs/kc1_defconfig| 1 +
>  configs/mcx_defconfig| 1 +
>  configs/mt_ventoux_defconfig | 1 +
>  configs/nokia_rx51_defconfig | 1 +
>  configs/omap3_beagle_defconfig   | 1 +
>  configs/omap3_evm_defconfig  | 1 +
>  configs/omap3_ha_defconfig   | 1 +
>  configs/omap3_pandora_defconfig  | 1 +
>  configs/pxm2_defconfig   | 1 +
>  configs/rastaban_defconfig   | 1 +
>  configs/rut_defconfig| 1 +
>  configs/sniper_defconfig | 1 +
>  configs/tao3530_defconfig| 1 +
>  configs/thuban_defconfig | 1 +
>  configs/tricorder_defconfig  | 1 +
>  configs/tricorder_flash_defconfig| 1 +
>  configs/twister_defconfig| 1 +
>  28 files changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/Kconfig b/Kconfig
> index bb80ada..e7b8052 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -325,12 +325,14 @@ config SYS_EXTRA_OPTIONS
>  config SYS_TEXT_BASE
> depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
> (M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS ||
\
> -   ARCH_ZYNQ || ARCH_KEYSTONE
> +   ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
> depends on !EFI_APP
> hex "Text Base"
> help
>   TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
>
> +   default 0x8080 if ARCH_OMAP2PLUS
> +
>
>  config SYS_CLK_FREQ
> depends on ARC || ARCH_SUNXI
> diff --git a/configs/am335x_evm_norboot_defconfig
b/configs/am335x_evm_norboot_defconfig
> index f121e2f..7f1fbab 100644
> --- a/configs/am335x_evm_norboot_defconfig
> +++ b/configs/am335x_evm_norboot_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x0800
>  CONFIG_TI_COMMON_CMD_OPTIONS=y
>  CONFIG_AM33XX=y
>  CONFIG_NOR=y
> diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_
defconfig
> index 2102956..f16decc 100644
> --- a/configs/am3517_crane_defconfig
> +++ b/configs/am3517_crane_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  # CONFIG_SPL_GPIO_SUPPORT is not set
>  CONFIG_TARGET_AM3517_CRANE=y
>  CONFIG_ENV_IS_IN_NAND=y
> diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
> index eddeb5e..863e8e7 100644
> --- a/configs/am3517_evm_defconfig
> +++ b/configs/am3517_evm_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  # CONFIG_SPL_GPIO_SUPPORT is not set
>  CONFIG_TARGET_AM3517_EVM=y
>  CONFIG_SYS_EXTRA_OPTIONS="NAND"
> diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
> index 5d26532..6118495 100644
> --- a/configs/cairo_defconfig
> +++ b/configs/cairo_defconfig
> @@ -1,5 +1,6 @@
>  CONFIG_ARM=y
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  CONFIG_TARGET_OMAP3_CAIRO=y
>  CONFIG_ENV_IS_IN_NAND=y
>  CONFIG_BOOTDELAY=-2
> diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
> index d37b693..1b5282a 100644
> --- a/configs/cm_t3517_defconfig
> +++ b/configs/cm_t3517_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x80008000
>  CONFIG_TARGET_CM_T3517=y
>  CONFIG_ENV_IS_IN_NAND=y
>  CONFIG_BOOTDELAY=3
> diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
> index ba76463..05190bd 

Re: [U-Boot] [PATCH v2] Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to Kconfig

[Peter Robinson]

On Fri, Jul 28, 2017 at 2:32 PM, Adam Ford  wrote:
> This converts the following to Kconfig:
>CONFIG_SYS_TEXT_BASE
>
> The includes, whitelist, etc. were left for now but I don't get any
> build errors or warnings on the omap3_logic_defconfig or
> am3517_evm_defconfig builds I tried.

Was it intended to leave omap4 and most of the am33xx devices out of
this conversion?

Peter

> Signed-off-by: Adam Ford 
> ---
> Changes since V1
> - Move default 0x8080 if ARCH_OMAP2PLUS under config SYS_TEXT_BASE
> - Revert default 0x8080 under ARCH_OMAP2PLUS
>
>  Kconfig  | 4 +++-
>  configs/am335x_evm_norboot_defconfig | 1 +
>  configs/am3517_crane_defconfig   | 1 +
>  configs/am3517_evm_defconfig | 1 +
>  configs/cairo_defconfig  | 1 +
>  configs/cm_t3517_defconfig   | 1 +
>  configs/cm_t35_defconfig | 1 +
>  configs/devkit8000_defconfig | 1 +
>  configs/draco_defconfig  | 1 +
>  configs/eco5pk_defconfig | 1 +
>  configs/etamin_defconfig | 1 +
>  configs/kc1_defconfig| 1 +
>  configs/mcx_defconfig| 1 +
>  configs/mt_ventoux_defconfig | 1 +
>  configs/nokia_rx51_defconfig | 1 +
>  configs/omap3_beagle_defconfig   | 1 +
>  configs/omap3_evm_defconfig  | 1 +
>  configs/omap3_ha_defconfig   | 1 +
>  configs/omap3_pandora_defconfig  | 1 +
>  configs/pxm2_defconfig   | 1 +
>  configs/rastaban_defconfig   | 1 +
>  configs/rut_defconfig| 1 +
>  configs/sniper_defconfig | 1 +
>  configs/tao3530_defconfig| 1 +
>  configs/thuban_defconfig | 1 +
>  configs/tricorder_defconfig  | 1 +
>  configs/tricorder_flash_defconfig| 1 +
>  configs/twister_defconfig| 1 +
>  28 files changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/Kconfig b/Kconfig
> index bb80ada..e7b8052 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -325,12 +325,14 @@ config SYS_EXTRA_OPTIONS
>  config SYS_TEXT_BASE
> depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
> (M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
> -   ARCH_ZYNQ || ARCH_KEYSTONE
> +   ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
> depends on !EFI_APP
> hex "Text Base"
> help
>   TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
>
> +   default 0x8080 if ARCH_OMAP2PLUS
> +
>
>  config SYS_CLK_FREQ
> depends on ARC || ARCH_SUNXI
> diff --git a/configs/am335x_evm_norboot_defconfig 
> b/configs/am335x_evm_norboot_defconfig
> index f121e2f..7f1fbab 100644
> --- a/configs/am335x_evm_norboot_defconfig
> +++ b/configs/am335x_evm_norboot_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x0800
>  CONFIG_TI_COMMON_CMD_OPTIONS=y
>  CONFIG_AM33XX=y
>  CONFIG_NOR=y
> diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
> index 2102956..f16decc 100644
> --- a/configs/am3517_crane_defconfig
> +++ b/configs/am3517_crane_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  # CONFIG_SPL_GPIO_SUPPORT is not set
>  CONFIG_TARGET_AM3517_CRANE=y
>  CONFIG_ENV_IS_IN_NAND=y
> diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
> index eddeb5e..863e8e7 100644
> --- a/configs/am3517_evm_defconfig
> +++ b/configs/am3517_evm_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  # CONFIG_SPL_GPIO_SUPPORT is not set
>  CONFIG_TARGET_AM3517_EVM=y
>  CONFIG_SYS_EXTRA_OPTIONS="NAND"
> diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
> index 5d26532..6118495 100644
> --- a/configs/cairo_defconfig
> +++ b/configs/cairo_defconfig
> @@ -1,5 +1,6 @@
>  CONFIG_ARM=y
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x8010
>  CONFIG_TARGET_OMAP3_CAIRO=y
>  CONFIG_ENV_IS_IN_NAND=y
>  CONFIG_BOOTDELAY=-2
> diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
> index d37b693..1b5282a 100644
> --- a/configs/cm_t3517_defconfig
> +++ b/configs/cm_t3517_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x80008000
>  CONFIG_TARGET_CM_T3517=y
>  CONFIG_ENV_IS_IN_NAND=y
>  CONFIG_BOOTDELAY=3
> diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
> index ba76463..05190bd 100644
> --- a/configs/cm_t35_defconfig
> +++ b/configs/cm_t35_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_ARM=y
>  # CONFIG_SYS_THUMB_BUILD is not set
>  CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_SYS_TEXT_BASE=0x80008000
>  CONFIG_TARGET_CM_T35=y
>  CONFIG_ENV_IS_IN_NAND=y
>  CONFIG_BOOTDELAY=3
> 

[U-Boot] [PATCH] Convert CONFIG_NAND to Kconfig

[Tom Rini]

From: Adam Ford 

This converts the following to Kconfig:
   CONFIG_NAND

Signed-off-by: Adam Ford 
[trini: Sync up a few more, add imply's]
Signed-off-by: Tom Rini 
---
A note about further imply's.  At least as things stand now while we can
add a few more here-and-there based on human knowledge rather than
moveconfig.py -i the number of places where we need to turn them off
makes things a wash right now.  This does however open the door to
allowing custodians to further tweak the logic as makes sense to them
and I should do one for ARCH_OMAP2PLUS at least soon.
---
 arch/arm/Kconfig | 1 +
 arch/arm/mach-uniphier/Kconfig   | 1 +
 configs/B4420QDS_NAND_defconfig  | 3 ++-
 configs/B4860QDS_NAND_defconfig  | 3 ++-
 configs/BSC9131RDB_NAND_SYSCLK100_defconfig  | 3 ++-
 configs/BSC9131RDB_NAND_defconfig| 2 +-
 configs/BSC9132QDS_NAND_DDRCLK100_defconfig  | 3 ++-
 configs/BSC9132QDS_NAND_DDRCLK133_defconfig  | 3 ++-
 configs/C29XPCIE_NAND_defconfig  | 2 +-
 configs/CHIP_pro_defconfig   | 1 +
 configs/MPC8313ERDB_NAND_33_defconfig| 3 ++-
 configs/MPC8313ERDB_NAND_66_defconfig| 3 ++-
 configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 +-
 configs/P1010RDB-PA_NAND_defconfig   | 2 +-
 configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 +-
 configs/P1010RDB-PB_NAND_defconfig   | 2 +-
 configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +-
 configs/P1020RDB-PC_NAND_defconfig   | 2 +-
 configs/P1020RDB-PD_NAND_defconfig   | 2 +-
 configs/P1021RDB-PC_36BIT_NAND_defconfig | 2 +-
 configs/P1021RDB-PC_NAND_defconfig   | 2 +-
 configs/P1022DS_36BIT_NAND_defconfig | 2 +-
 configs/P1022DS_NAND_defconfig   | 2 +-
 configs/P1024RDB_NAND_defconfig  | 2 +-
 configs/P1025RDB_NAND_defconfig  | 2 +-
 configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
 configs/P2020RDB-PC_NAND_defconfig   | 2 +-
 configs/P2041RDB_NAND_defconfig  | 3 ++-
 configs/P3041DS_NAND_SECURE_BOOT_defconfig   | 3 ++-
 configs/P3041DS_NAND_defconfig   | 3 ++-
 configs/P5020DS_NAND_SECURE_BOOT_defconfig   | 3 ++-
 configs/P5020DS_NAND_defconfig   | 3 ++-
 configs/P5040DS_NAND_SECURE_BOOT_defconfig   | 3 ++-
 configs/P5040DS_NAND_defconfig   | 3 ++-
 configs/T1023RDB_NAND_defconfig  | 3 ++-
 configs/T1024QDS_NAND_defconfig  | 3 ++-
 configs/T1024RDB_NAND_defconfig  | 3 ++-
 configs/T1040D4RDB_NAND_defconfig| 3 ++-
 configs/T1040RDB_NAND_defconfig  | 3 ++-
 configs/T1042D4RDB_NAND_defconfig| 3 ++-
 configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig   | 3 ++-
 configs/T1042RDB_PI_NAND_defconfig   | 3 ++-
 configs/T2080QDS_NAND_defconfig  | 3 ++-
 configs/T2080RDB_NAND_defconfig  | 3 ++-
 configs/T2081QDS_NAND_defconfig  | 3 ++-
 configs/T4160QDS_NAND_defconfig  | 3 ++-
 configs/T4240QDS_NAND_defconfig  | 3 ++-
 configs/am335x_baltos_defconfig  | 2 +-
 configs/am335x_evm_defconfig | 2 +-
 configs/am335x_evm_nor_defconfig | 2 +-
 configs/am335x_evm_usbspl_defconfig  | 2 +-
 configs/am335x_hs_evm_defconfig  | 2 +-
 configs/am335x_igep003x_defconfig| 1 +
 configs/am3517_evm_defconfig | 2 +-
 configs/am43xx_evm_defconfig | 3 ++-
 configs/am43xx_evm_ethboot_defconfig | 3 ++-
 configs/am43xx_evm_usbhost_boot_defconfig| 3 ++-
 configs/am43xx_hs_evm_defconfig  | 3 ++-
 configs/bcm11130_nand_defconfig  | 2 +-
 configs/brppt1_nand_defconfig| 3 ++-
 configs/cairo_defconfig  | 1 +
 configs/chiliboard_defconfig | 1 +
 configs/cm_t335_defconfig| 1 +
 configs/cm_t43_defconfig | 1 +
 configs/db-88f6820-amc_defconfig | 1 +
 configs/db-mv784mp-gp_defconfig  | 1 +
 configs/devkit8000_defconfig | 1 +
 configs/draco_defconfig  | 1 +
 configs/eco5pk_defconfig | 1 +
 configs/etamin_defconfig | 1 +
 configs/igep0020_defconfig   | 1 +
 configs/igep0030_defconfig   | 1 +
 configs/igep0032_defconfig   | 1 +
 configs/imx6q_logic_defconfig| 1 +
 configs/imx6qdl_icore_nand_defconfig | 1 +
 configs/imx6ul_geam_nand_defconfig   | 1 +
 

Re: [U-Boot] [PATCH] fsl-lsch2: csu: correct the workaround A-010315

[York Sun]

On 07/03/2017 03:07 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
> 
> The implementation of workaround A-010315 is wrong, it updated
> other IP's CSU registers.
> 
> Signed-off-by: Hou Zhiqiang 
> ---
>   board/freescale/common/ns_access.c | 20 ++--
>   include/fsl_csu.h  |  2 +-
>   2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/board/freescale/common/ns_access.c 
> b/board/freescale/common/ns_access.c
> index 1c2287d..0c3a54c 100644
> --- a/board/freescale/common/ns_access.c
> +++ b/board/freescale/common/ns_access.c
> @@ -10,15 +10,15 @@
>   #include 
>   #include 
>   
> -void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
> +void set_devices_ns_access(unsigned long index, u16 val)
>   {
>   u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
>   u32 *reg;
>   uint32_t tmp;
>   
> - reg = base + ns_dev->ind / 2;
> + reg = base + index / 2;
>   tmp = in_be32(reg);
> - if (ns_dev->ind % 2 == 0) {
> + if (index % 2 == 0) {
>   tmp &= 0x;
>   tmp |= val << 16;
>   } else {
> @@ -34,7 +34,7 @@ static void enable_devices_ns_access(struct csu_ns_dev 
> *ns_dev, uint32_t num)
>   int i;
>   
>   for (i = 0; i < num; i++)
> - set_devices_ns_access(ns_dev + i, ns_dev[i].val);
> + set_devices_ns_access(ns_dev[i].ind, ns_dev[i].val);
>   }
>   
>   void enable_layerscape_ns_access(void)
> @@ -50,20 +50,20 @@ void set_pcie_ns_access(int pcie, u16 val)
>   switch (pcie) {
>   #ifdef CONFIG_PCIE1
>   case PCIE1:
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE1], val);
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE1_IO], val);
> + set_devices_ns_access(CSU_CSLX_PCIE1, val);
> + set_devices_ns_access(CSU_CSLX_PCIE1_IO, val);
>   return;
>   #endif
>   #ifdef CONFIG_PCIE2
>   case PCIE2:
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE2], val);
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE2_IO], val);
> + set_devices_ns_access(CSU_CSLX_PCIE2, val);
> + set_devices_ns_access(CSU_CSLX_PCIE2_IO, val);
>   return;
>   #endif
>   #ifdef CONFIG_PCIE3
>   case PCIE3:
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE3], val);
> - set_devices_ns_access(_dev[CSU_CSLX_PCIE3_IO], val);
> + set_devices_ns_access(CSU_CSLX_PCIE3, val);
> + set_devices_ns_access(CSU_CSLX_PCIE3_IO, val);
>   return;
>   #endif
>   default:
> diff --git a/include/fsl_csu.h b/include/fsl_csu.h
> index 8582ac0..027a811 100644
> --- a/include/fsl_csu.h
> +++ b/include/fsl_csu.h
> @@ -30,7 +30,7 @@ struct csu_ns_dev {
>   };
>   
>   void enable_layerscape_ns_access(void);
> -void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
> +void set_devices_ns_access(unsigned long, u16 val);
>   void set_pcie_ns_access(int pcie, u16 val);
>   
>   #endif
> 

Zhiqiang,

Your subject and commit message both say fixing the workaround for 
A010315 but the change is for non-secure access. Did you mismatch them?

York
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Re: [U-Boot] [PATCH v0 21/20] efi_loader: hack for archs that cannot do unaligned accesses

[Mark Kettenis]

> From: Alexander Graf 
> Date: Mon, 7 Aug 2017 21:19:37 +0100
> 
> On 05.08.17 21:31, Rob Clark wrote:
> > On Sat, Aug 5, 2017 at 4:05 PM, Heinrich Schuchardt  
> > wrote:
> >> On 08/05/2017 08:43 PM, Rob Clark wrote:
> >>> On Sat, Aug 5, 2017 at 1:06 PM, Rob Clark  wrote:
>  On Sat, Aug 5, 2017 at 12:52 PM, Heinrich Schuchardt 
>   wrote:
> > On 08/05/2017 06:16 PM, Rob Clark wrote:
> >> On Sat, Aug 5, 2017 at 12:12 PM, Heinrich Schuchardt 
> >>  wrote:
> >>> On 08/05/2017 05:58 PM, Rob Clark wrote:
>  Some arch's have trouble with unaligned accesses.  Technically
>  EFI device-path structs should be byte aligned, and the next node
>  in the path starts immediately after the previous.  Meaning that
>  a pointer to an 'struct efi_device_path' is not necessarily word
>  aligned.  See section 10.3.1 in v2.7 of UEFI spec.
> 
>  This causes problems not just for u-boot, but also most/all EFI
>  payloads loaded by u-boot on these archs.  Fortunately the common
>  practice for traversing a device path is to rely on the length
>  field in the header, rather than the specified length of the
>  particular device path type+subtype.  So the EFI_DP_PAD() macro
>  will add the specified number of bytes to the tail of device path
>  structs to pad them to word alignment.
> 
>  Technically this is non-compliant, BROKEN_UNALIGNED should *only*
>  be defined on archs that cannot do unaligned accesses.
> 
>  Signed-off-by: Rob Clark 
>  ---
>  I'm not sure if there are other arch's that need -DBROKEN_UNALIGNED
> 
>  Mark, this is untested but I think it should solve your crash on the
>  Banana Pi.  Could you give it a try when you get a chance?
> 
>    arch/arm/config.mk   |  2 +-
>    include/efi_api.h| 30 
>  ++
>    lib/efi_loader/efi_device_path.c |  3 +++
>    3 files changed, 34 insertions(+), 1 deletion(-)
> 
>  diff --git a/arch/arm/config.mk b/arch/arm/config.mk
>  index 1a9db4..067dc93a9d 100644
>  --- a/arch/arm/config.mk
>  +++ b/arch/arm/config.mk
>  @@ -28,7 +28,7 @@ LLVMS_RELFLAGS  := $(call 
>  cc-option,-mllvm,) \
> $(call cc-option,-arm-use-movt=0,)
>    PLATFORM_RELFLAGS+= $(LLVM_RELFLAGS)
> 
>  -PLATFORM_CPPFLAGS += -D__ARM__
>  +PLATFORM_CPPFLAGS += -D__ARM__ -DBROKEN_UNALIGNED
> >>>
> >>> NAK
> >>>
> >>> We have more then ARM. And other architectures also create exceptions
> >>> for unaligned access.
> >>>
> >>> I hate platform specific code. It should not be used outside /arch.
> >>>
> >>> To play it save you should not use _packed at all!
> >>> Use memcpy to transfer between aligned and unaligned memory.
> >>
> >> except for reasons I explained in the thread on the patch that added
> >> the __packed in the first place.  Sorry, this is ugly but we have to
> >> do it.
> >>
> >> BR,
> >> -R
> >
> > According to the UEFI standard the nodes in paths are not to be assumed
> > to be aligned.
> >
> > So even if you use padding bytes in paths that you pass to the EFI
> > application you should not expect that the EFI application does the
> > same. Expect the EFI application either to remove them or send new nodes
> > without padding.
> >
> > To the idea of padding bytes and __packed does not make sense.
> 
>  Ok, to be fair, you are right about device-paths passed too u-boot.
>  On BROKEN_UNALIGNED archs, we should sanitise with a copy to an
>  aligned device-path in *addition* to what I proposed.  I can make a
>  patch to add a helper to do this a bit later.
> >>>
> >>> so thinking about this a bit, I have two options in mind:
> >>>
> >>>   + efi_dp_sanitize() + efi_dp_free() helpers that are no-ops on
> >>> archs that can do unaligned access, but efi_dp_sanitize() always
> >>> allocates and copies on BROKEN_UNALIGNED archs and efi_dp_free()
> >>> always free's on BROKEN_UNALIGNED archs, even if the dp passed
> >>> from efi payload doesn't require it.
> >>>
> >>>   + efi_dp_sanitize() that is no-op on archs that can do unaligned
> >>> access but only allocates/copies when passed a device path that
> >>> would result in unaligned access, plus hook some mechanism to
> >>> auto-free on EFI_EXIT().. which is slightly tricky w/ nesting of
> >>> efi calls, but not impossible and at least avoids the problem
> >>> of missing calls to free the dup'd device-path.. which is the
> >>> sort of 

Re: [U-Boot] [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl applied

[York Sun]

On 06/28/2017 10:47 PM, Santan Kumar wrote:
> In fsl_mc_ldpaa_exit(), in case of mc is booted and
> dpl is applied, it should return earlier without executing
> dpbp_exit()
> 
> Signed-off-by: Santan Kumar 
> ---
> This piece of code is mistakenly removed in below patch.
>   
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F756038%2F=01%7C01%7Cyork.sun%40nxp.com%7C67ffe48248b14183512708d4beb2434e%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0=PvzNEpCqJ8MOLT9vRSNuNLTeH9hjxLxQi97ngEkrXf0%3D=0
> 
>   drivers/net/fsl-mc/mc.c | 11 +--
>   1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
> index 8bf25c7..3a30c03 100644
> --- a/drivers/net/fsl-mc/mc.c
> +++ b/drivers/net/fsl-mc/mc.c
> @@ -1336,14 +1336,18 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
>   {
>   int err = 0;
>   bool is_dpl_apply_status = false;
> + bool mc_boot_status = false;
>   
>   if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
>   mc_apply_dpl(mc_lazy_dpl_addr);
>   mc_lazy_dpl_addr = 0;
>   }
>   
> + if (!get_mc_boot_status())
> + mc_boot_status = true;
> +
>   /* MC is not loaded intentionally, So return success. */
> - if (bd && get_mc_boot_status() != 0)
> + if (bd && !mc_boot_status)
>   return 0;
>   
>   /* If DPL is deployed, set is_dpl_apply_status as TRUE. */
> @@ -1354,11 +1358,14 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
>* For case MC is loaded but DPL is not deployed, return success and
>* print message on console. Else FDT fix-up code execution hanged.
>*/
> - if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
> + if (bd && mc_boot_status && !is_dpl_apply_status) {
>   printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
>   return 0;
>   }
>   
> + if (bd && mc_boot_status && is_dpl_apply_status)
> + return 0;
> +
>   err = dpbp_exit();
>   if (err < 0) {
>   printf("dpbp_exit() failed: %d\n", err);
> 

Yogesh and Priyanka,

Please review this patch. Thanks.

York
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Re: [U-Boot] Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/796444/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: phy: micrel: add an option to disable gigabit for the KSZ9031

[Joe Hershberger]

Hi Sebastien,

https://patchwork.ozlabs.org/patch/796357/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] Move PHYLIB to Kconfig

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/796600/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] [PATCH 1/1] board/ls2081ardb: Some updates like flash type

[York Sun]

Santan,

Please rephrase your subject. It is too vague, probably because you are 
making unrelated changes in one patch.

On 06/23/2017 03:08 AM, Santan Kumar wrote:
> Patch makes below changes:
> -Update QSPI flash type
>   As per updated board design,
>   different QSPI flash is connected on boards,
>   hence change QSPI flash type from
>   Micron n25q512a device to spansion s25fs512s
>   device in dts and config.
> -Update QIXIS_QMAP_MASK value from 0x07 to 0x70

Was it wrong before? What's the symptom?

> -Update checkboard()
>   display of boot source and board information

This is not what your change does.

> -Correct DSPI flash config selection
> -Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE

Please rework your commit message. It is there to explain why you make 
the changes, not only what you  do. It is not a slide show. Please write 
in paragraphs, and wrap back at or before 70 characters.

Please separate your patch to make it do logically one thing in a patch.

> 
> Signed-off-by: Santan Kumar 
> Signed-off-by: Yogesh Gaur 
> Signed-off-by: Priyanka Jain 
> ---
> This patch is split version of another patch
>   
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F773670%2F=01%7C01%7Cyork.sun%40nxp.com%7Ce620c3f6c991446d58cd08d4ba1fba19%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0=TqaRlYcYT2NtQWFfPYy7sMC5DpghSD%2BA4EgaqSFe0W0%3D=0
> 

Don't see how it is split in this patch.

York
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Re: [U-Boot] net: phy: Remove duplicate Kconfig selection for Micrel KSZ9021

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/785708/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[York Sun]

On 06/20/2017 11:54 PM, Priyanka Jain wrote:
> 
> 
>> -Original Message-
>> From: York Sun
>> Sent: Wednesday, June 14, 2017 2:16 AM
>> To: Santan Kumar ; u-boot@lists.denx.de
>> Cc: Priyanka Jain 
>> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
>> programming
>>
>> On 06/08/2017 11:16 PM, Santan Kumar wrote:
>>> LS2080ARDB/LS2088ARDB updated RevF boards do not have smart voltage
>>> translator, so no need to program GPIO for LS2088ARDB boards The GPIO
>>> programming is required only for LS2081ARDB.
>>>
>>> Signed-off-by: Santan Kumar 
>>> Signed-off-by: Priyanka Jain 
>>> ---
>>>board/freescale/ls2080ardb/ls2080ardb.c | 18 ++
>>>1 file changed, 2 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
>>> b/board/freescale/ls2080ardb/ls2080ardb.c
>>> index df2d768..210142c 100644
>>> --- a/board/freescale/ls2080ardb/ls2080ardb.c
>>> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
>>> @@ -257,31 +257,17 @@ int board_early_init_f(void)
>>>
>>>int misc_init_r(void)
>>>{
>>> -#ifdef CONFIG_FSL_QIXIS
>>> -   /*
>>> -* LS2081ARDB has smart voltage translator which needs
>>> -* to be programmed as below
>>> -*/
>>> -#ifndef CONFIG_TARGET_LS2081ARDB
>>> -   u8 sw;
>>> -
>>> -   sw = QIXIS_READ(arch);
>>> /*
>>> -* LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
>>> +* LS2081ARDB RevF board has smart voltage translator
>>>  * which needs to be programmed to enable high speed SD interface
>>>  * by setting GPIO4_10 output to zero
>>>  */
>>> -   if ((sw & 0xf) == 0x5) {
>>> -#endif
>>> +#ifdef CONFIG_TARGET_LS2081ARDB
>>> out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
>>> in_le32(GPIO4_GPDIR_ADDR)));
>>> out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
>>> in_le32(GPIO4_GPDAT_ADDR))); -
>> #ifndef
>>> CONFIG_TARGET_LS2081ARDB
>>> -   }
>>> -#endif
>>>#endif
>>> -
>>> if (hwconfig("sdhc"))
>>> config_board_mux(MUX_TYPE_SDHC);
>>>
>>>
>>
>> This change is not backward-compatible, is it?
>>
>> York
> Yes, It is backward compatible. As per updated board designs and the 
> manufactured boards, GPIO programming is required only for LS2081ARDB boards.

Priyanka,

I looked at this patch again. Before this change, LS2080ARDB rev F and 
LS2081ARDB both have the smart voltage translator enabled. After this 
change, rev F no longer enables this voltage translator. You still 
consider it backward-compatible?

York
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Re: [U-Boot] [PATCH v2 1/2] LS2080ARDB: QSPI boot: Secure Boot image validation

[York Sun]

On 05/27/2017 01:33 AM, Udit Agarwal wrote:
> Validates the images in the ESBC phase for (QSPI boot) using
> esbc_validate command. Add images validation in default
> environment under mcinitcmd prior to MC initialization.
> 
> Adds header address for PPA to be validated during ESBC phase for
> ARCH_LS2088 and QSPI_BOOT.
> 
> Moves sec_init prior to ppa_init as for validation of PPA, sec must
> be initialised before the PPA is initialised.
> 
> Signed-off-by: Udit Agarwal 
> ---
> Dependent Patch Set:
>   
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F756260%2F=01%7C01%7Cyork.sun%40nxp.com%7C7310d05ffaf04e43cd3a08d4a4db0bb5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0=nGcmJzlXOejWhpjtRqQC1K85azWQkLohtPuQvF8nh70%3D=0
> Changes in v2:
> Updates the MAINTAINERS file and reverses the order of
> secure boot patches for LS2080 QSPI Boot.
> 

Please rebase your patch. It has conflict on the 
CONFIG_EXTRA_ENV_SETTINGS. Please note, your dependency patch needs a 
rework. You may want to work together with Sumit Garg to sync your code 
base.

York
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Re: [U-Boot] net: phy: micrel: Remove ksz90x1 drivers from micrel_ksz8xxx

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/785712/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: usb: r8152: fix "duplicate 'const' declaration specifier"

[Joe Hershberger]

Hi Philipp,

https://patchwork.ozlabs.org/patch/780519/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: Use packed structures for networking

[Joe Hershberger]

Hi Denis,

https://patchwork.ozlabs.org/patch/792238/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: move Broadcom SF2 driver to Kconfig

[Joe Hershberger]

Hi Steve,

https://patchwork.ozlabs.org/patch/786395/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: phy: Add AFE settings to the Broadcom Cygnus phy

[Joe Hershberger]

Hi Arun,

https://patchwork.ozlabs.org/patch/791280/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: Fix compile failure in net.c

[Joe Hershberger]

Hi Holger,

https://patchwork.ozlabs.org/patch/791559/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/785710/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: ag7xxx: Propagate errors on phy access

[Joe Hershberger]

Hi Joe,

https://patchwork.ozlabs.org/patch/780856/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: ag7xxx: Comment register names

[Joe Hershberger]

Hi Joe,

https://patchwork.ozlabs.org/patch/780854/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: phy: Hide Micrel KSZ9021 and KSZ9031 Kconfig options

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/785711/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] configs: Replace deprecated Micrel defines with PHY_MICREL_KSZ90X1

[Joe Hershberger]

Hi Alexandru,

https://patchwork.ozlabs.org/patch/785831/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: tftp: silence a subscript above array bounds compile time warning

[Joe Hershberger]

Hi Vladimir,

https://patchwork.ozlabs.org/patch/781896/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: add static to do_tftpput()

[Joe Hershberger]

Hi Masahiro,

https://patchwork.ozlabs.org/patch/779383/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] net: Get mac address from driver as seed

[Joe Hershberger]

Hi Jimmy,

https://patchwork.ozlabs.org/patch/772007/ was applied to u-boot-net.git.

Thanks!
-Joe
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Re: [U-Boot] drivers/net/phy/fixed: do not overwrite addr

[Joe Hershberger]

Hi Christian,

https://patchwork.ozlabs.org/patch/771848/ was applied to u-boot-net.git.

Thanks!
-Joe
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[U-Boot] Pull request: u-boot-net.git master

[Joe Hershberger]

Hi Tom,

The following changes since commit eaa90e5df2a4a1cb12fb73571978a9379242d0b5:

  common/env_embedded.c: rename PPCENV/PPCTEXT macros (2017-08-04 20:38:39 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-net.git master

for you to fetch changes up to da3b9e7fd6a1e38af3cf0dff0248427c9df583ff:

  Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig (2017-08-07 15:22:29 -0500)


Alexandru Gagniuc (7):
  net: phy: Remove duplicate Kconfig selection for Micrel KSZ9021
  net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers
  configs: Replace deprecated Micrel defines with PHY_MICREL_KSZ90X1
  net: phy: micrel: Remove ksz90x1 drivers from micrel_ksz8xxx
  net: phy: Hide Micrel KSZ9021 and KSZ9031 Kconfig options
  Move PHYLIB to Kconfig
  Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig

Arun Parameswaran (1):
  net: phy: Add AFE settings to the Broadcom Cygnus phy

Christian Gmeiner (1):
  drivers/net/phy/fixed: do not overwrite addr

Denis Pynkin (1):
  net: Use packed structures for networking

Holger Dengler (1):
  net: Fix compile failure in net.c

Jimmy Du (1):
  net: Get mac address from driver as seed

Joe Hershberger (2):
  net: ag7xxx: Comment register names
  net: ag7xxx: Propagate errors on phy access

Masahiro Yamada (1):
  net: add static to do_tftpput()

Philipp Tomsich (1):
  net: usb: r8152: fix "duplicate 'const' declaration specifier"

Sebastien Bourdelin (1):
  net: phy: micrel: add an option to disable gigabit for the KSZ9031

Suji Velupillai (1):
  net: move Broadcom SF2 driver to Kconfig

Vladimir Zapolskiy (1):
  net: tftp: silence a subscript above array bounds compile time warning

 arch/arm/Kconfig   |   3 +
 arch/arm/include/asm/arch-bcmcygnus/configs.h  |   6 +-
 arch/arm/mach-mvebu/include/mach/config.h  |   1 -
 arch/powerpc/include/asm/config.h  |   5 -
 cmd/net.c  |   2 +-
 configs/B4420QDS_NAND_defconfig|   1 +
 configs/B4420QDS_SPIFLASH_defconfig|   1 +
 configs/B4420QDS_defconfig |   1 +
 configs/B4860QDS_NAND_defconfig|   1 +
 configs/B4860QDS_SECURE_BOOT_defconfig |   1 +
 configs/B4860QDS_SPIFLASH_defconfig|   1 +
 configs/B4860QDS_SRIO_PCIE_BOOT_defconfig  |   1 +
 configs/B4860QDS_defconfig |   1 +
 configs/BSC9131RDB_NAND_SYSCLK100_defconfig|   1 +
 configs/BSC9131RDB_NAND_defconfig  |   1 +
 configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig|   1 +
 configs/BSC9131RDB_SPIFLASH_defconfig  |   1 +
 configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig |   1 +
 configs/BSC9132QDS_NAND_DDRCLK100_defconfig|   1 +
 configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig |   1 +
 configs/BSC9132QDS_NAND_DDRCLK133_defconfig|   1 +
 configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig  |   1 +
 configs/BSC9132QDS_NOR_DDRCLK100_defconfig |   1 +
 configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig  |   1 +
 configs/BSC9132QDS_NOR_DDRCLK133_defconfig |   1 +
 .../BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig   |   1 +
 configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig  |   1 +
 .../BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig   |   1 +
 configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig  |   1 +
 .../BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig |   1 +
 configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig|   1 +
 .../BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig |   1 +
 configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig|   1 +
 configs/C29XPCIE_NAND_defconfig|   1 +
 configs/C29XPCIE_NOR_SECBOOT_defconfig |   1 +
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig|   1 +
 configs/C29XPCIE_SPIFLASH_defconfig|   1 +
 configs/C29XPCIE_defconfig |   1 +
 configs/Cyrus_P5020_defconfig  |   3 +
 configs/Cyrus_P5040_defconfig  |   3 +
 configs/MPC8308RDB_defconfig   |   1 +
 configs/MPC8313ERDB_33_defconfig   |   1 +
 configs/MPC8313ERDB_66_defconfig   |   1 +
 configs/MPC8313ERDB_NAND_33_defconfig  |   1 +
 configs/MPC8313ERDB_NAND_66_defconfig  |   1 +
 configs/MPC8315ERDB_defconfig  |   1 +
 configs/MPC8349EMDS_defconfig  |   1 +
 configs/MPC8349ITXGP_defconfig |   1 +
 configs/MPC8349ITX_LOWBOOT_defconfig   |   1 +
 configs/MPC8349ITX_defconfig   |   1 +
 configs/MPC837XEMDS_HOST_defconfig |   1 +
 configs/MPC837XEMDS_defconfig  |   1 +
 configs/MPC837XERDB_defconfig  |   1 +
 

Re: [U-Boot] [PATCH] igep00x0: merge igep0020 and igep0030 defconfigs to igep00x0_defconfig

[Ladislav Michl]

Hello Pau,

On Sun, Aug 06, 2017 at 12:51:38PM +0200, Pau Pajuelo wrote:
> Update igep00x0 code with the following features:
> - Add board and revision detection for the boards:
>   - IGEP0020-RF
>   - IGEP0020-RC
>   - IGEP0030-RG
>   - IGEP0030-RE

(it would be great to see this page updated:
http://labs.isee.biz/index.php/IGEP_Technology_devices_revisions)

> - Merge IGEP0020 and IGEP0030 mux tables
> - Add suport to use GPIO_126, GPIO_127 and GPIO_129
> - board_name environment variable displays board and revision information

nice idea!

> Signed-off-by: Pau Pajuelo 

Reviewed-by: Ladislav Michl 

Btw, once here, it would be nice to detect also CPU family as OMAP3530
devices cannot boot with omap3-igep0020.dtb and patch bellow is needed
(unless there is a better solution, I'll provide patch):
 
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi 
b/arch/arm/boot/dts/omap3-igep.dtsi
index c16d17efe38e..1cafae7d8468 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -10,7 +10,7 @@
  */
 /dts-v1/;
 
-#include "omap36xx.dtsi"
+#include "omap34xx.dtsi"
 
 / {
memory@8000 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts 
b/arch/arm/boot/dts/omap3-igep0020.dts
index cc09842ad21b..0fa4ad499bec 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -13,7 +13,7 @@
 
 / {
model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
-   compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
+   compatible = "isee,omap3-igep0020", "ti,omap3430", "ti,omap3";
 
vmmcsdio_fixed: fixedregulator-mmcsdio {
compatible = "regulator-fixed";
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Re: [U-Boot] [PATCH v0 21/20] efi_loader: hack for archs that cannot do unaligned accesses

[Alexander Graf]

On 05.08.17 21:31, Rob Clark wrote:

On Sat, Aug 5, 2017 at 4:05 PM, Heinrich Schuchardt  wrote:

On 08/05/2017 08:43 PM, Rob Clark wrote:

On Sat, Aug 5, 2017 at 1:06 PM, Rob Clark  wrote:

On Sat, Aug 5, 2017 at 12:52 PM, Heinrich Schuchardt  wrote:

On 08/05/2017 06:16 PM, Rob Clark wrote:

On Sat, Aug 5, 2017 at 12:12 PM, Heinrich Schuchardt  wrote:

On 08/05/2017 05:58 PM, Rob Clark wrote:

Some arch's have trouble with unaligned accesses.  Technically
EFI device-path structs should be byte aligned, and the next node
in the path starts immediately after the previous.  Meaning that
a pointer to an 'struct efi_device_path' is not necessarily word
aligned.  See section 10.3.1 in v2.7 of UEFI spec.

This causes problems not just for u-boot, but also most/all EFI
payloads loaded by u-boot on these archs.  Fortunately the common
practice for traversing a device path is to rely on the length
field in the header, rather than the specified length of the
particular device path type+subtype.  So the EFI_DP_PAD() macro
will add the specified number of bytes to the tail of device path
structs to pad them to word alignment.

Technically this is non-compliant, BROKEN_UNALIGNED should *only*
be defined on archs that cannot do unaligned accesses.

Signed-off-by: Rob Clark 
---
I'm not sure if there are other arch's that need -DBROKEN_UNALIGNED

Mark, this is untested but I think it should solve your crash on the
Banana Pi.  Could you give it a try when you get a chance?

  arch/arm/config.mk   |  2 +-
  include/efi_api.h| 30 ++
  lib/efi_loader/efi_device_path.c |  3 +++
  3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 1a9db4..067dc93a9d 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -28,7 +28,7 @@ LLVMS_RELFLAGS  := $(call cc-option,-mllvm,) \
   $(call cc-option,-arm-use-movt=0,)
  PLATFORM_RELFLAGS+= $(LLVM_RELFLAGS)

-PLATFORM_CPPFLAGS += -D__ARM__
+PLATFORM_CPPFLAGS += -D__ARM__ -DBROKEN_UNALIGNED


NAK

We have more then ARM. And other architectures also create exceptions
for unaligned access.

I hate platform specific code. It should not be used outside /arch.

To play it save you should not use _packed at all!
Use memcpy to transfer between aligned and unaligned memory.


except for reasons I explained in the thread on the patch that added
the __packed in the first place.  Sorry, this is ugly but we have to
do it.

BR,
-R


According to the UEFI standard the nodes in paths are not to be assumed
to be aligned.

So even if you use padding bytes in paths that you pass to the EFI
application you should not expect that the EFI application does the
same. Expect the EFI application either to remove them or send new nodes
without padding.

To the idea of padding bytes and __packed does not make sense.


Ok, to be fair, you are right about device-paths passed too u-boot.
On BROKEN_UNALIGNED archs, we should sanitise with a copy to an
aligned device-path in *addition* to what I proposed.  I can make a
patch to add a helper to do this a bit later.


so thinking about this a bit, I have two options in mind:

  + efi_dp_sanitize() + efi_dp_free() helpers that are no-ops on
archs that can do unaligned access, but efi_dp_sanitize() always
allocates and copies on BROKEN_UNALIGNED archs and efi_dp_free()
always free's on BROKEN_UNALIGNED archs, even if the dp passed
from efi payload doesn't require it.

  + efi_dp_sanitize() that is no-op on archs that can do unaligned
access but only allocates/copies when passed a device path that
would result in unaligned access, plus hook some mechanism to
auto-free on EFI_EXIT().. which is slightly tricky w/ nesting of
efi calls, but not impossible and at least avoids the problem
of missing calls to free the dup'd device-path.. which is the
sort of leak I might miss since I'm not using EFI_LOADER on any
BROKEN_UNALIGNED arch

anyone who cares about armv7 + efi have a preference between always
doing an extra alloc+copy+free vs EFI_EXIT() magic?



Please, go for the simplest code.


well, the source of my question was there are two definitions of
"simplest" here, ie "simplest to use" and "simplest helpers".. I'm
mostly worried about future patches that use the helpers introducing
leaks.  But actually I think a reasonable middle ground is "simplest
helpers plus always make the helpers not no-ops for DEBUG builds"..


I cannot imagine that copying takes more than 10ms for starting grub on
any architecture. So the user will not notice it anyway.
Assume every architecture requiring alignment for which you do not have
proof of the contrary.

Even on ARM64 there are op codes that fail without alignment.


iirc the restrictions where mostly about device memory, and atomics.
Which 

Re: [U-Boot] [PATCH] arm64: ls2088ardb: Add distro secure boot support

[York Sun]

On 06/11/2017 09:16 PM, Vinitha Pillai-B57223 wrote:
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Also enable "secureboot=y"
> flag in environment for ARM based platforms instead of bootcmd.
> 
> Signed-off-by: Vinitha Pillai 
> Signed-off-by: Sumit Garg 
> ---
> 

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [U-Boot, v4, 60/66] rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368

[Dr. Philipp Tomsich]

Tom,

> On 07 Aug 2017, at 16:05, Tom Rini  wrote:
> 
> On Mon, Aug 07, 2017 at 10:48:12AM +0200, Dr. Philipp Tomsich wrote:
>> +Tom
>> 
>> Ok, so the problem is 'scripts/setlocalversion’, which does the following:
>>> if test -e include/config/auto.conf; then
>>>. include/config/auto.conf
>>> else
>>>echo "Error: kernelrelease not valid - run 'make prepare' to update 
>>> it"
>>>exit 1
>>> fi
>> in order to access the variables needed for:
>>> # CONFIG_LOCALVERSION and LOCALVERSION (if set)
>>> res="${res}${CONFIG_LOCALVERSION}${LOCALVERSION}"
>>> 
>>> # scm version string if not at a tagged commit
>>> if test "$CONFIG_LOCALVERSION_AUTO" = "y"; then
>>># full scm version string
>>>res="$res$(scm_version)"
>>> else
>>># append a plus sign if the repository is not in a clean
>>># annotated or signed tagged state (as git describe only
>>># looks at signed or annotated tags - git tag -a/-s) and
>>># LOCALVERSION= is not specified
>>>if test "${LOCALVERSION+set}" != "set"; then
>>>scm=$(scm_version --short)
>>>res="$res${scm:++}"
>>>fi
>>> fi
>> 
>> So nothing wrong with the changes to Kconfig, but we’re triggering a 
>> weakness in our
>> build infrastructure here.
>> 
>> I guess we’ll have to implement a save version of scripts/localversion that 
>> does not
>> allow for the execution of arbitrary script code from auto.conf ...
> 
> Masahiro, do you have any ideas here?  Thanks!

I had been thinking of sanitising this by either
(a) using sed to rewrite any patterns that might trigger command execution,
but should really just be environment substitution, back to “do the 
right thing”
(b) reduce the file to just CONFIG_LOCALVERSION, LOCALVERSION and
CONFIG_LOCALVERSION_AUTO using grep before sourcing
Let me know if either of these sounds like a reasonable fix for the time 
being...

On a different note: I suppose I should hold off with a pull-request for
u-boot-rockchip until this is resolved?

> 
>> 
>>> On 07 Aug 2017, at 10:38, Andy Yan  wrote:
>>> 
>>> Hi Philipp:
>>> 
>>> 
>>> On 2017年08月07日 16:24, Dr. Philipp Tomsich wrote:
 Andy,
 
 Doing a non-buildman defconfig + make works fine.
 I’ve seen this too (I did a full buildman for all arm, x86 and powerpc 
 boards) and it seems as if a shell-script is trying to source the 
 generated auto.config file.
 I couldn’t spot where in buildman that happens, so I’ll need to leave this 
 to someone with more insight into buildman to figure out…
>>> 
>>> 
>>>   I build with : make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- 
>>> firefly-rk3288_defconfig all
>>> Also can see the waring: inclue/config/auto.conf: line 209: ARCH: command 
>>> not found.
 
 Regards,
 Phil.
 
> On 07 Aug 2017, at 03:19, Andy Yan  wrote:
> 
> Hi :
> 
>   When run buildman rockchip on the master branch of current 
> u-boot-rockchip tree, I got warnings about 16 rockchip arm32 based boards:
> 
>  include/config/auto.config: line x: ARCH: command not found.
> 
>  the line x is the definition of the: SPL_LDSCRITP 
> "arch/$(ARCH)/cpu/u-boot-spl.lds"
> 
>  not sure is there somethings wrong about this series change.
> 
> 
> On 2017年08月07日 01:18, Philipp Tomsich wrote:
>>> Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our
>>> header file.
>>> 
>>> Signed-off-by: Philipp Tomsich 
>>> Reviewed-by: Simon Glass 
>>> ---
>>> 
>>> Changes in v4:
>>> - (added) sets TPL_LDSCRIPT via Kconfig
>>> 
>>> Changes in v3: None
>>> Changes in v2: None
>>> 
>>> arch/arm/mach-rockchip/Kconfig  | 7 +++
>>> include/configs/rk3368_common.h | 2 --
>>> 2 files changed, 7 insertions(+), 2 deletions(-)
>>> 
>> Applied to u-boot-rockchip, thanks!
>> 
>> 
>> 
> 
 
 
 
>>> 
>>> 
>> 
> 
> -- 
> Tom

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Re: [U-Boot] [PATCH] arm64: ls2088ardb: Add distro boot support

[York Sun]

On 06/04/2017 08:07 PM, ying.zhang22...@nxp.com wrote:
> From: Zhang Ying-22455 
> 
> Include common config_distro_defaults.h and config_distro_bootcmd.h
> for u-boot enviroments to support automatical distro boot which
> scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
> and execute autoboot script. Tested on ls2088ardb with automatically
> boot Ubuntu from SD card or USB disk, if it fails to detect external
> storage disk, fall back to nor/qspi boot.
> 
> Signed-off-by: Zhang Ying-22455 
> ---

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH] arm: ls1021atwr: Add distro secure boot support

[York Sun]

On 06/05/2017 08:54 PM, Sumit Garg wrote:
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Disable fall back option to
> qspi boot in case of secure boot. Also enable "secureboot=y" flag
> in environment for ARM based platforms instead of bootcmd.
> 
> Signed-off-by: Sumit Garg 
> Tested-by: Vinitha Pillai 
> ---

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH] arm64: ls1046ardb: Add distro secure boot support

[York Sun]

On 06/05/2017 08:53 PM, Sumit Garg wrote:
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Disable fall back option to
> qspi boot in case of secure boot. Also enable "secureboot=y" flag
> in environment for ARM based platforms instead of bootcmd.
> 
> Signed-off-by: Sumit Garg 
> Tested-by: Vinitha Pillai 
> ---

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH] arm64: ls1043ardb: Add distro secure boot support

[York Sun]

On 06/04/2017 11:54 PM, Sumit Garg wrote:
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Disable fall back option to
> nor/qspi boot in case of secure boot. Also enable "secureboot=y"
> flag in environment for ARM based platforms instead of bootcmd.
> 
> Signed-off-by: Sumit Garg 
> Tested-by: Vinitha Pillai 
> ---

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [Patch v2 2/2] arm64: ls1046ardb: Add distro boot support

[York Sun]

On 06/14/2017 08:26 PM, Gong Qianyu wrote:
> Tested on ls1046ardb with automatically boot Ubuntu from SD card or
> USB disk, if it fails to detect external storage disk, fall back to
> qspi boot.
> 
> Signed-off-by: Shengzhou Liu 
> Signed-off-by: Gong Qianyu 
> ---
> v2:
>   - No change.

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [Patch v2 1/2] armv8: ls1046a: move CONFIG_CMD_USB to defconfig

[York Sun]

On 06/14/2017 08:26 PM, Gong Qianyu wrote:
> Move the macro to defconfig to take effect globally.
> 
> Signed-off-by: Gong Qianyu 
> ---
> v2:
>   - Reordered the macro.
> 

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH v4] arm64: ls1043ardb: Add distro boot support

[York Sun]

On 06/08/2017 01:15 AM, Shengzhou Liu wrote:
> Include common config_distro_defaults.h and config_distro_bootcmd.h
> for u-boot enviroments to support automatical distro boot which
> scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
> and execute autoboot script. Tested on ls1043ardb with automatically
> boot Ubuntu from SD card or USB disk, if it fails to detect external
> storage disk, fall back to nor/qspi boot.
> 
> Signed-off-by: Shengzhou Liu 
> ---
> v3: updated to load_addr for installer
> v4: fix a typo in initrd_high

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH 1/1] soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> Update SVR as per the SOC document.
>   -LS2081A: 0x870919 -> 0x870918
>   -LS2041A: 0x870915 -> 0x870914
> 
> Signed-off-by: Santan Kumar 
> Signed-off-by: Priyanka Jain 
> Signed-off-by: Hou Zhiqiang 
> ---

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH 1/1] fsl/usb: enable errata-a010151 for ls2088a and ls2081a

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> Signed-off-by: Santan Kumar 
> ---
>   drivers/usb/common/fsl-errata.c | 4 
>   1 file changed, 4 insertions(+)
> 

Applied to fsl-qoriq master. Thanks.

York
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Re: [U-Boot] [PATCH 1/1] board/ls2080aqds, SD-boot: Update env offset

[York Sun]

On 06/08/2017 11:15 PM, Santan Kumar wrote:
> As per new memory layout, Update env offset
> from 0x20 to 0x30
> 
> Signed-off-by: Santan Kumar 
> ---

Applied to fsl-qoriq master. Thanks.

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Re: [U-Boot] [PATCH] armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64

[York Sun]

On 06/08/2017 01:31 AM, Alison Wang wrote:
> The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed.
> The definitions in  are used.
> 
> According to this modification, the comparison between os arch and cpu
> arch is done in C programming instead of ASM programming.
> 
> Signed-off-by: Alison Wang 

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH 1/1] spi: fsl_qspi: Pet watchdog even more

[York Sun]

On 06/13/2017 10:49 PM, Alexander Stein wrote:
> On Tuesday 13 June 2017 20:36:35, York Sun wrote:
>> On 06/01/2017 04:26 AM, Alexander Stein wrote:
>>> Pet the watchdog once upon each command call (qspi_xfer) and during
>>> each loop iteration in several commands.
>>>
>>> This fixes a watchdog reset especially during erase command.
>>
>> Funny you keep petting the watchdog for this driver. I am curious what
>> watchdog are you using? Why no one else suffer the reset.
> 
> We use a SP706T with a timeout of 1.6s. Propably this short timeout causes the
> problem for me only.
> 


Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH] arm: ls1021atwr: Add distro boot support

[York Sun]

On 05/26/2017 01:01 AM, Alison Wang wrote:
> This patch includes common config_distro_defaults.h and
> config_distro_bootcmd.h for u-boot enviroments to support distro boot
> which automatically scan boot.scr from storage devices(e.g.
> SD/USB/SATA/SCSI disk) and execute autoboot script on LS1021ATWR board.
> 
> Signed-off-by: Shengzhou Liu 
> Signed-off-by: Alison Wang 
> ---

Applied to fsl-qoriq master. Thanks.

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[U-Boot] [PATCH v2] dm: core: also parse chosen node

[Rob Clark]

This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark 
---
v2: simplify a bit (and fix incorrect handling of pre_reloc_only) by
calling dm_scan_fdt_node() recursively to handle chosen node; add
to sandbox tests as suggested by Simon

 arch/sandbox/dts/test.dts |  7 +++
 drivers/core/root.c   | 12 
 test/dm/bus.c |  2 +-
 test/dm/test-fdt.c|  2 +-
 4 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 65b2f8ecda..5aed470741 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -476,6 +476,13 @@
wdt0: wdt@0 {
compatible = "sandbox,wdt";
};
+
+   chosen {
+   chosen-test {
+   compatible = "denx,u-boot-fdt-test";
+   reg = <9 1>;
+   };
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/drivers/core/root.c b/drivers/core/root.c
index d691d6ff94..023e6abce8 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -266,6 +266,18 @@ static int dm_scan_fdt_node(struct udevice *parent, const 
void *blob,
for (offset = fdt_first_subnode(blob, offset);
 offset > 0;
 offset = fdt_next_subnode(blob, offset)) {
+
+   /* "chosen" node isn't a device itself but may contain some: */
+   if (!strcmp(fdt_get_name(blob, offset, NULL), "chosen")) {
+   dm_dbg("parsing subnodes of \"chosen\"\n");
+
+   err = dm_scan_fdt_node(parent, blob, offset,
+  pre_reloc_only);
+   if (err && !ret)
+   ret = err;
+   continue;
+   }
+
if (pre_reloc_only &&
!dm_fdt_pre_reloc(blob, offset))
continue;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 7006d4163d..1da398ae3a 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -105,7 +105,7 @@ UCLASS_DRIVER(testbus) = {
 /* Test that we can probe for children */
 static int dm_test_bus_children(struct unit_test_state *uts)
 {
-   int num_devices = 6;
+   int num_devices = 7;
struct udevice *bus;
struct uclass *uc;
 
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index dcc2ef8b65..920ccbf016 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -167,7 +167,7 @@ int dm_check_devices(struct unit_test_state *uts, int 
num_devices)
 /* Test that FDT-based binding works correctly */
 static int dm_test_fdt(struct unit_test_state *uts)
 {
-   const int num_devices = 6;
+   const int num_devices = 7;
struct udevice *dev;
struct uclass *uc;
int ret;
-- 
2.13.0

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[U-Boot] Please pull u-boot-video/master

[Anatolij Gustschin]

Hi Tom,

The following changes since commit eaa90e5df2a4a1cb12fb73571978a9379242d0b5:

  common/env_embedded.c: rename PPCENV/PPCTEXT macros (2017-08-04 20:38:39 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-video.git master

for you to fetch changes up to b713bc8a2dbaf40ea24dbccf6da4ed02a0035eb6:

  rockchip: video: defconfig: Add mipi dsi support for evb-rk3288 (2017-08-07 
21:38:47 +0200)


Bin Meng (4):
  video: Drop the l5f31188 driver
  video: Drop the sed156x driver
  video: Drop the sm501 driver
  video: Drop the ct69000 driver

eric@rock-chips.com (6):
  rockchip: defconfig: Increase max video resolution for mipi panel
  rockchip: video: mipi: Split mipi driver into common and specific parts
  rockchop: video: mipi: Makefile: Add soc specfic driver for rk3399 mipi 
dsi
  rockchip: video: mipi: Add rk3288 soc specific driver for mipi dsi
  rockchip: video: Makefile: Add soc specific driver for rk3288 mipi dsi
  rockchip: video: defconfig: Add mipi dsi support for evb-rk3288

 configs/evb-rk3288_defconfig |5 +
 configs/evb-rk3399_defconfig |1 +
 drivers/video/Kconfig|   31 +-
 drivers/video/Makefile   |4 -
 drivers/video/cfb_console.c  |   10 -
 drivers/video/ct69000.c  | 1168 --
 drivers/video/l5f31188.c |  192 --
 drivers/video/rockchip/Makefile  |4 +-
 drivers/video/rockchip/rk3288_mipi.c |  191 ++
 drivers/video/rockchip/rk3399_mipi.c |  182 ++
 drivers/video/rockchip/rk_mipi.c |  170 +
 drivers/video/rockchip/rk_mipi.h |   32 +
 drivers/video/sed156x.c  |  546 
 drivers/video/sm501.c|  225 ---
 include/sed156x.h|   26 -
 include/sm501.h  |   35 -
 scripts/config_whitelist.txt |1 -
 17 files changed, 422 insertions(+), 2401 deletions(-)
 delete mode 100644 drivers/video/ct69000.c
 delete mode 100644 drivers/video/l5f31188.c
 create mode 100644 drivers/video/rockchip/rk3288_mipi.c
 create mode 100644 drivers/video/rockchip/rk3399_mipi.c
 create mode 100644 drivers/video/rockchip/rk_mipi.h
 delete mode 100644 drivers/video/sed156x.c
 delete mode 100644 drivers/video/sm501.c
 delete mode 100644 include/sed156x.h
 delete mode 100644 include/sm501.h

Please pull. Thanks!

Anatolij
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[U-Boot] [PATCH v4] usb: kbd: don't fail with iomux

[Rob Clark]

stdin might not be set, which would cause iomux_doenv() to fail
therefore causing probe_usb_keyboard() to fail.  Furthermore if we do
have iomux enabled, the sensible thing (in terms of user experience)
would be to simply add ourselves to the list of stdin devices.

This fixes an issue with usbkbd on dragonboard410c with distro-
bootcmd, where stdin is not set (so stdinname is null).

Signed-off-by: Rob Clark 
---
v2: address Bin's review comments
v3: fix fail with free()ing if usbkbd is already in stdin env variable
pointed out by Simon
v4: use if (CONFIG_IS_ENABLED(CONSOLE_MUX)) { ... }

 common/usb_kbd.c  | 46 +++---
 include/console.h |  2 --
 2 files changed, 31 insertions(+), 17 deletions(-)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index d2d29cc98f..8edeb6c4f5 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -516,23 +516,39 @@ static int probe_usb_keyboard(struct usb_device *dev)
return error;
 
stdinname = getenv("stdin");
-#if CONFIG_IS_ENABLED(CONSOLE_MUX)
-   error = iomux_doenv(stdin, stdinname);
-   if (error)
-   return error;
-#else
-   /* Check if this is the standard input device. */
-   if (strcmp(stdinname, DEVNAME))
-   return 1;
+   if (CONFIG_IS_ENABLED(CONSOLE_MUX)) {
+   char *devname = DEVNAME;
+   char *newstdin = NULL;
+   /*
+* stdin might not be set yet.. either way, with console-
+* mux the sensible thing to do is add ourselves to the
+* list of stdio devices:
+*/
+   if (stdinname && !strstr(stdinname, DEVNAME)) {
+   newstdin = malloc(strlen(stdinname) +
+ strlen(","DEVNAME) + 1);
+   sprintf(newstdin, "%s,"DEVNAME, stdinname);
+   stdinname = newstdin;
+   } else if (!stdinname) {
+   stdinname = devname;
+   }
+   error = iomux_doenv(stdin, stdinname);
+   free(newstdin);
+   if (error)
+   return error;
+   } else {
+   /* Check if this is the standard input device. */
+   if (strcmp(stdinname, DEVNAME))
+   return 1;
 
-   /* Reassign the console */
-   if (overwrite_console())
-   return 1;
+   /* Reassign the console */
+   if (overwrite_console())
+   return 1;
 
-   error = console_assign(stdin, DEVNAME);
-   if (error)
-   return error;
-#endif
+   error = console_assign(stdin, DEVNAME);
+   if (error)
+   return error;
+   }
 
return 0;
 }
diff --git a/include/console.h b/include/console.h
index cea29ed6dc..7dfd36d7d1 100644
--- a/include/console.h
+++ b/include/console.h
@@ -57,8 +57,6 @@ int console_announce_r(void);
 /*
  * CONSOLE multiplexing.
  */
-#ifdef CONFIG_CONSOLE_MUX
 #include 
-#endif
 
 #endif
-- 
2.13.0

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Re: [U-Boot] [PATCH v3 3/3] rockchip: video: defconfig: Add mipi dsi support for evb-rk3288

[Anatolij Gustschin]

On Wed, 21 Jun 2017 11:22:03 +0800
Eric Gao eric@rock-chips.com wrote:

> Add support for rk3288 mipi dsi.
> 
> Signed-off-by: Eric Gao 
> Reviewed-by: Simon Glass 
> 
> ---
> 
> Changes in v2: None
> Changes in v1:
> -Make the subject more intelligible.
> 
>  configs/evb-rk3288_defconfig | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)

Applied to u-boot-video/master after rebasing, thanks!

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Re: [U-Boot] [PATCH v3 2/3] rockchip: video: Makefile: Add soc specific driver for rk3288 mipi dsi

[Anatolij Gustschin]

On Wed, 21 Jun 2017 11:22:02 +0800
Eric Gao eric@rock-chips.com wrote:

> Signed-off-by: Eric Gao 
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  drivers/video/rockchip/Makefile | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
> index 600743c..8005003 100644
> --- a/drivers/video/rockchip/Makefile
> +++ b/drivers/video/rockchip/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
>  obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
>  obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o
>  obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
> +obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o
>  obj-mipi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_mipi.o
>  obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o $(obj-mipi-y)
>  endif

Applied to u-boot-video/master, thanks!

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Re: [U-Boot] [PATCH v3 1/3] rockchip: video: mipi: Add rk3288 soc specific driver for mipi dsi

[Anatolij Gustschin]

On Wed, 21 Jun 2017 11:22:01 +0800
Eric Gao eric@rock-chips.com wrote:

> Add rk3288 soc specific driver for mipi dsi.
> 
> Signed-off-by: Eric Gao 
> Reviewed-by: Simon Glass 
> 
> ---
> 
> Changes in v2:
> -Cancel the force convert for dev_read_addr return value type.
> -Change regs type from "void __iomem" to "uintptr_t".
> 
> Changes in v1:
> -Change function name from rk_display_enable to rk_mipi_enable.
> -Use IS_ERR to judge the return status.
> -Use dev_read_addr to replace devfdt_get_addr.
> 
>  drivers/video/rockchip/rk3288_mipi.c | 191 
> +++
>  drivers/video/rockchip/rk_mipi.h |   2 +-
>  2 files changed, 192 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/video/rockchip/rk3288_mipi.c

Applied to u-boot-video/master after rebasing, thanks!

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[U-Boot] [PATCH] travis-ci: Emulate 'make tests'

[Tom Rini]

The 'tests' target will run sandbox, sandbox_spl and sandbox_flattree in
test.py and in the case of sandbox_spl ensure that we just run the
specific tests for that build.  Update our matrix to perform similar
test.py runs.

Signed-off-by: Tom Rini 
---
 .travis.yml | 9 +
 1 file changed, 9 insertions(+)

diff --git a/.travis.yml b/.travis.yml
index 7b9ec1eb5a6d..ea560b936007 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -264,6 +264,15 @@ matrix:
   BUILDMAN="^sandbox$"
   TOOLCHAIN="x86_64"
 - env:
+- TEST_PY_BD="sandbox_spl"
+  TEST_PY_TEST_SPEC="test_ofplatdata"
+  BUILDMAN="^sandbox$"
+  TOOLCHAIN="x86_64"
+- env:
+- TEST_PY_BD="sandbox_flattree"
+  BUILDMAN="^sandbox_flattree$"
+  TOOLCHAIN="x86_64"
+- env:
 - TEST_PY_BD="vexpress_ca15_tc2"
   TEST_PY_ID="--id qemu"
   QEMU_TARGET="arm-softmmu"
-- 
1.9.1

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Re: [U-Boot] [PATCH v0 01/20] fs: add fs_readdir()

[Rob Clark]

On Mon, Aug 7, 2017 at 2:19 PM, Brüns, Stefan
 wrote:
> On Freitag, 4. August 2017 21:31:43 CEST Rob Clark wrote:
>> Needed to support efi file protocol.  The fallback.efi loader wants
>> to be able to read the contents of the /EFI directory to find an OS
>> to boot.
>>
>> For reference, the expected EFI semantics are described in (v2.7 of UEFI
>> spec) in section 13.5 (page 609).  Or for convenience, see:
>>
>>   http://wiki.phoenix.com/wiki/index.php/EFI_FILE_PROTOCOL#Read.28.29
>>
>> The EFI level semantics are implemented in a later patch, so they are
>> not too important to the understanding of this patch.
>>
>> Signed-off-by: Rob Clark 
>> ---
>>  fs/fs.c  | 25 +
>>  include/fs.h | 21 +
>>  2 files changed, 46 insertions(+)
>
> Still, the commit message is in no way helpful when trying to understand what
> your changes are actually doing.

You were the one that wanted a reference to the relevant EFI protocol,
even though it is not terribly useful for understanding this patch ;-)

> You introduce an arbitrary new API in the filesystem level (you neither expose
> an existing API, nor are you implementing the API requested by EFI, nor
> anything roughly resembling it).

I am exposing the API needed to implement the EFI API.  I am not sure
why you describe it as arbitrary.  I would describe it as posix
readdir() ported to fs's stateless design.  Ie. not quite the same,
neither are any of fs's other APIs.

> The API you expose adds an index-based directory lookup, while EFI wants an
> POSIX-like directory stream. After reading through both the EFI spec and U-
> Boots file system code, its clear you want to have some matching layer between
> the mostly stateless U-Boot filesystem layer and the stateful EFI API.

What EFI wants and the way the u-boot filesystem API works are two
completely different things.  The u-boot fs APIs are stateless.  EFI
is not, not just for directories but also for file read/write.  Please
see patch 16/20.

> Please provide a thorough description why you create this new API in the fs
> layer, state that it is a hack to achieve what you want. If sometime later
> someone else wants to clean this up (both the FAT implementation, and the
> API), she/he should not have to go through all the code.

The fat implementation is a hack, but the API is not.  Ie. it does
exactly what the comment in fs.h describes.  (I might do it
differently if u-boot had a concept of file handles that were
stateful.  But that is a bit of a departure from how u-boot's fs
works.)

BR,
-R
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Re: [U-Boot] [PATCH v4 2/3] rockchip: video: mipi: Split mipi driver into common and specific parts

[Anatolij Gustschin]

On Mon,  7 Aug 2017 20:59:26 +0200
Anatolij Gustschin ag...@denx.de wrote:

> From: "eric@rock-chips.com" 
> 
> To compatible with different rockchip soc, we split the mipi dirver into
> common and soc specific parts, and all the soc share the common
> functions from common driver part.
> 
> Signed-off-by: Eric Gao 
> Acked-by: Philipp Tomsich 
> [agust: fix build breakage and warnings]
> Signed-off-by: Anatolij Gustschin 
> ---
>  drivers/video/rockchip/rk3399_mipi.c | 182 
> +++
>  drivers/video/rockchip/rk_mipi.c | 170 ++--
>  drivers/video/rockchip/rk_mipi.h |  32 ++
>  3 files changed, 220 insertions(+), 164 deletions(-)
>  create mode 100644 drivers/video/rockchip/rk3399_mipi.c
>  create mode 100644 drivers/video/rockchip/rk_mipi.h

Applied to u-boot-video/master.

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Re: [U-Boot] [PATCH v3 2/3] rockchip: video: mipi: Split mipi driver into common and specific parts

[Anatolij Gustschin]

On Mon, 7 Aug 2017 19:40:49 +0200
Anatolij Gustschin ag...@denx.de wrote:
... 
> 
> Applied to u-boot-video/master, thanks!

this breaks building, dropped.

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[U-Boot] [PATCH v4 2/3] rockchip: video: mipi: Split mipi driver into common and specific parts

[Anatolij Gustschin]

From: "eric@rock-chips.com" 

To compatible with different rockchip soc, we split the mipi dirver into
common and soc specific parts, and all the soc share the common
functions from common driver part.

Signed-off-by: Eric Gao 
Acked-by: Philipp Tomsich 
[agust: fix build breakage and warnings]
Signed-off-by: Anatolij Gustschin 
---
 drivers/video/rockchip/rk3399_mipi.c | 182 +++
 drivers/video/rockchip/rk_mipi.c | 170 ++--
 drivers/video/rockchip/rk_mipi.h |  32 ++
 3 files changed, 220 insertions(+), 164 deletions(-)
 create mode 100644 drivers/video/rockchip/rk3399_mipi.c
 create mode 100644 drivers/video/rockchip/rk_mipi.h

Changes in v4:
- fix build warnings:
drivers/video/rockchip/rk_mipi.c: In function ?rk_mipi_dsi_enable?:
drivers/video/rockchip/rk_mipi.c:85:19: warning: initialization makes integer 
from pointer without a cast [-Wint-conversion]
drivers/video/rockchip/rk_mipi.c: In function ?rk_mipi_phy_enable?:
drivers/video/rockchip/rk_mipi.c:202:19: warning: initialization makes integer 
from pointer without a cast [-Wint-conversion]
...
drivers/video/rockchip/rk3399_mipi.c: In function ‘rk_mipi_ofdata_to_platdata’:
drivers/video/rockchip/rk3399_mipi.c:136:13: warning: assignment makes pointer 
from integer without a cast [-Wint-conversion]

- fix build breakage in debug();


diff --git a/drivers/video/rockchip/rk3399_mipi.c 
b/drivers/video/rockchip/rk3399_mipi.c
new file mode 100644
index 000..9ef202b
--- /dev/null
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "rk_mipi.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Select mipi dsi source, big or little vop */
+static int rk_mipi_dsi_source_select(struct udevice *dev)
+{
+   struct rk_mipi_priv *priv = dev_get_priv(dev);
+   struct rk3399_grf_regs *grf = priv->grf;
+   struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
+
+   /* Select the video source */
+   switch (disp_uc_plat->source_id) {
+   case VOP_B:
+   rk_clrsetreg(>soc_con20, GRF_DSI0_VOP_SEL_MASK,
+GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
+   break;
+   case VOP_L:
+   rk_clrsetreg(>soc_con20, GRF_DSI0_VOP_SEL_MASK,
+GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
+   break;
+   default:
+   debug("%s: Invalid VOP id\n", __func__);
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+/* Setup mipi dphy working mode */
+static void rk_mipi_dphy_mode_set(struct udevice *dev)
+{
+   struct rk_mipi_priv *priv = dev_get_priv(dev);
+   struct rk3399_grf_regs *grf = priv->grf;
+   int val;
+
+   /* Set Controller as TX mode */
+   val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
+   rk_clrsetreg(>soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
+
+   /* Exit tx stop mode */
+   val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
+   rk_clrsetreg(>soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
+
+   /* Disable turnequest */
+   val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
+   rk_clrsetreg(>soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
+}
+
+/*
+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
+ * enable backlight.
+ */
+static int rk_display_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *timing)
+{
+   int ret;
+   struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+   /* Fill the mipi controller parameter */
+   priv->ref_clk = 24 * MHz;
+   priv->sys_clk = priv->ref_clk;
+   priv->pix_clk = timing->pixelclock.typ;
+   priv->phy_clk = priv->pix_clk * 6;
+   priv->txbyte_clk = priv->phy_clk / 8;
+   priv->txesc_clk = 20 * MHz;
+
+   /* Select vop port, big or little */
+   rk_mipi_dsi_source_select(dev);
+
+   /* Set mipi dphy work mode */
+   rk_mipi_dphy_mode_set(dev);
+
+   /* Config  and enable mipi dsi according to timing */
+   ret = rk_mipi_dsi_enable(dev, timing);
+   if (ret) {
+   debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
+ __func__, ret);
+   return ret;
+   }
+
+   /* Config and enable mipi phy */
+   ret = rk_mipi_phy_enable(dev);
+   if (ret) {
+   debug("%s: 

[U-Boot] [PATCH] i2c: designware: Allow sending restart conditions

[Marek Vasut]

Allow sending restart conditions upon direction change as this is
required by some chips.

Signed-off-by: Marek Vasut 
Cc: Stefan Roese 
Cc: Alexey Brodkin 
Cc: Heiko Schocher 
---
 drivers/i2c/designware_i2c.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index d4df35a69a..8cfed2194c 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -374,7 +374,8 @@ static void __dw_i2c_init(struct i2c_regs *i2c_base, int 
speed, int slaveaddr)
/* Disable i2c */
dw_i2c_enable(i2c_base, false);
 
-   writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), _base->ic_con);
+   writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
+  _base->ic_con);
writel(IC_RX_TL, _base->ic_rx_tl);
writel(IC_TX_TL, _base->ic_tx_tl);
writel(IC_STOP_DET, _base->ic_intr_mask);
-- 
2.11.0

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Re: [U-Boot] [PATCH v0 01/20] fs: add fs_readdir()

[Brüns , Stefan]

On Freitag, 4. August 2017 21:31:43 CEST Rob Clark wrote:
> Needed to support efi file protocol.  The fallback.efi loader wants
> to be able to read the contents of the /EFI directory to find an OS
> to boot.
> 
> For reference, the expected EFI semantics are described in (v2.7 of UEFI
> spec) in section 13.5 (page 609).  Or for convenience, see:
> 
>   http://wiki.phoenix.com/wiki/index.php/EFI_FILE_PROTOCOL#Read.28.29
> 
> The EFI level semantics are implemented in a later patch, so they are
> not too important to the understanding of this patch.
> 
> Signed-off-by: Rob Clark 
> ---
>  fs/fs.c  | 25 +
>  include/fs.h | 21 +
>  2 files changed, 46 insertions(+)

Still, the commit message is in no way helpful when trying to understand what 
your changes are actually doing.

You introduce an arbitrary new API in the filesystem level (you neither expose 
an existing API, nor are you implementing the API requested by EFI, nor 
anything roughly resembling it).

The API you expose adds an index-based directory lookup, while EFI wants an 
POSIX-like directory stream. After reading through both the EFI spec and U-
Boots file system code, its clear you want to have some matching layer between 
the mostly stateless U-Boot filesystem layer and the stateful EFI API.

Please provide a thorough description why you create this new API in the fs 
layer, state that it is a hack to achieve what you want. If sometime later 
someone else wants to clean this up (both the FAT implementation, and the 
API), she/he should not have to go through all the code.

Regards,

Stefan


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[U-Boot] [PATCH 2/2] Convert CONFIG_SYS_I2C_OMAP24XX to Kconfig

[Adam Ford]

This converts the following to Kconfig:
   CONFIG_SYS_I2C_OMAP24XX

Signed-off-by: Adam Ford 
---
 arch/arm/mach-omap2/Kconfig| 5 +
 configs/ti816x_evm_defconfig   | 1 +
 drivers/i2c/Kconfig| 6 ++
 include/configs/am3517_crane.h | 1 -
 include/configs/am3517_evm.h   | 1 -
 include/configs/bur_am335x_common.h| 1 -
 include/configs/cm_t35.h   | 1 -
 include/configs/cm_t3517.h | 1 -
 include/configs/cm_t54.h   | 1 -
 include/configs/devkit8000.h   | 2 --
 include/configs/kc1.h  | 1 -
 include/configs/mcx.h  | 1 -
 include/configs/nokia_rx51.h   | 1 -
 include/configs/omap3_evm.h| 1 -
 include/configs/omap3_logic.h  | 1 -
 include/configs/omap3_overo.h  | 1 -
 include/configs/omap3_pandora.h| 3 ---
 include/configs/omap3_zoom1.h  | 3 ---
 include/configs/siemens-am33x-common.h | 1 -
 include/configs/sniper.h   | 1 -
 include/configs/tam3517-common.h   | 1 -
 include/configs/tao3530.h  | 1 -
 include/configs/ti_armv7_omap.h| 1 -
 include/configs/ti_omap4_common.h  | 1 -
 include/configs/tricorder.h| 1 -
 scripts/config_whitelist.txt   | 1 -
 26 files changed, 12 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 013586e..89c91d1 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -22,6 +22,7 @@ config OMAP34XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+   imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply TWL4030_POWER
 
@@ -40,6 +41,7 @@ config OMAP44XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+   imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
 
 config OMAP54XX
@@ -59,6 +61,7 @@ config OMAP54XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+   imply SYS_I2C_OMAP24XX
 
 config TI814X
bool "TI814X SoC"
@@ -82,6 +85,7 @@ config AM43XX
imply SPL_OF_TRANSLATE
imply SPL_SEPARATE_BSS
imply SPL_SYS_MALLOC_SIMPLE
+   imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
help
  Support for AM43xx SOC from Texas Instruments.
@@ -92,6 +96,7 @@ config AM43XX
 
 config AM33XX
bool "AM33XX SoC"
+   imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply USE_TINY_PRINTF
help
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 0f9b905..9d4be2a 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -39,6 +39,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
 # CONFIG_USE_PRIVATE_LIBGCC is not set
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 8ac1cc6..720e82d 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -145,6 +145,12 @@ config SYS_I2C_MXC
  channels and operating on standard mode upto 100 kbits/s and fast
  mode upto 400 kbits/s.
 
+config SYS_I2C_OMAP24XX
+   bool "TI OMAP2+ I2C driver"
+   depends on ARCH_OMAP2PLUS
+   help
+ Add support for the OMAP2+ I2C driver.
+
 config SYS_I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index eb1fa5f..aeba61e 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -103,7 +103,6 @@
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED10
 #define CONFIG_SYS_OMAP24_I2C_SLAVE1
-#define CONFIG_SYS_I2C_OMAP24XX
 
 /*
  * Board NAND Info.
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 42e4053..60460c8 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -91,7 +91,6 @@
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED10
 #define CONFIG_SYS_OMAP24_I2C_SLAVE1
-#define CONFIG_SYS_I2C_OMAP24XX
 
 /* Ethernet */
 #define CONFIG_DRIVER_TI_EMAC
diff --git a/include/configs/bur_am335x_common.h 
b/include/configs/bur_am335x_common.h
index 8d0e0ea..c199d64 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED10
 #define CONFIG_SYS_OMAP24_I2C_SLAVE1
-#define CONFIG_SYS_I2C_OMAP24XX
 
 /*
  * Our platforms make use of SPL to initalize the hardware (primarily
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 1fae294..f8f3c92 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -93,7 +93,6 @@
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED10
 #define