There is a bug that uboot can't load LZO compressed data extent while
kernel can handle it without any problem.
It turns out to be a page boundary case. The 3nd patch is the proper
fix, cross-ported from btrfs-progs.
The first patch is just to make my eyes less hurt.
The second patch is to make
For certain btrfs files with compressed file extent, uboot will fail to
load it:
btrfs_read_extent_reg: disk_bytenr=14229504 disk_len=73728 offset=0
nr_bytes=131
072
decompress_lzo: tot_len=70770
decompress_lzo: in_len=1389
decompress_lzo: in_len=2400
decompress_lzo: in_len=3002
Just a cleanup. These immediate numbers make my eyes hurt.
Signed-off-by: Qu Wenruo
Cc: Marek Behun
---
fs/btrfs/compression.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index
Although in theory u-boot fs driver could easily support more sector
sizes, current code base doesn't have good enough way to grab sector
size yet.
This would cause problem for later LZO fixes which rely on sector size.
And considering that most u-boot boards are using 4K page size, which is
On 3/26/20 1:09 AM, Matthias Brugger wrote:
>
>
> On 24/03/2020 23:58, Jaehoon Chung wrote:
>> Enable SDHCI_SDMA configuration.
>>
>> Signed-off-by: Jaehoon Chung
>> Reviewed-by: Peng Fan
>> Reviewed-by: Minkyu Kang
>> ---
>> configs/rpi_4_32b_defconfig | 1 +
>> 1 file changed, 1
On Wed, Mar 25, 2020 at 02:46:56PM +, Andre Przywara wrote:
> The U-Boot documentation explains that variables ending with "_r" hold
> addresses in DRAM, while those without that ending point to flash/ROM.
> The default variables for the Juno board pointing to the kernel and DTB
> load
On Thu, Mar 26, 2020 at 12:46 AM Andy Shevchenko
wrote:
>
> USB 3 host controller may be described in ACPI to allow users alter
> the properties or other features. Describe it for Intel Tangier SoC.
>
> Signed-off-by: Andy Shevchenko
> ---
> .../asm/arch-tangier/acpi/southcluster.asl| 38
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: Configure FMC2 nCS4 for SRAM as well
---
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: Configure FMC2 nCS4 for SRAM as well
---
Add usb.h file into the USB list.
Signed-off-by: Marek Vasut
Cc: Tom Rini
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 92dda40a85..9c1543f17d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -937,6 +937,7 @@ T: git
On 3/25/20 2:27 PM, Jan Kiszka wrote:
> From: Jan Kiszka
>
> We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid
> access errors like
>
> CACHE: Misaligned operation at range [be0231e0, be0235e0]
>
> seen on the MCIMX7SABRE.
>
> Fixes: d5aee659f217 ("fs: ext4: cache
On Wed, Mar 25, 2020 at 09:27:51PM +0100, Jan Kiszka wrote:
> From: Jan Kiszka
>
> We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid
> access errors like
>
> CACHE: Misaligned operation at range [be0231e0, be0235e0]
>
> seen on the MCIMX7SABRE.
>
> Fixes: d5aee659f217
From: Jan Kiszka
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid
access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
Fixes: d5aee659f217 ("fs: ext4: cache extent data")
Signed-off-by: Jan Kiszka
---
fs/ext4/ext4fs.c
-Original Message-
From: Stephen Warren
Sent: Wednesday, March 25, 2020 12:31 PM
To: Tom Warren
Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding
; Jonathan Hunter ;
tomcwarren3...@gmail.com
Subject: Re: [PATCH] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
On 25.03.20 21:01, Stephen Warren wrote:
On 3/25/20 1:11 PM, Jan Kiszka wrote:
On 25.03.20 16:00, Tom Rini wrote:
On Wed, Mar 25, 2020 at 07:32:30AM +0100, Jan Kiszka wrote:
On 20.03.20 19:21, Tom Rini wrote:
On Mon, Mar 16, 2020 at 08:09:53PM +0100, Jan Kiszka wrote:
Hi all,
=> ls mmc 0:1
On 3/25/20 1:11 PM, Jan Kiszka wrote:
> On 25.03.20 16:00, Tom Rini wrote:
>> On Wed, Mar 25, 2020 at 07:32:30AM +0100, Jan Kiszka wrote:
>>> On 20.03.20 19:21, Tom Rini wrote:
On Mon, Mar 16, 2020 at 08:09:53PM +0100, Jan Kiszka wrote:
> Hi all,
>
> => ls mmc 0:1
On 3/24/20 1:03 PM, twar...@nvidia.com wrote:
> From: Tom Warren
>
> The Jetson Nano Developer Kit is a Tegra X1-based development board. It
> is similar to Jetson TX1 but it is not pin compatible. It features 4GB
> of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
> used
On 25.03.20 16:00, Tom Rini wrote:
On Wed, Mar 25, 2020 at 07:32:30AM +0100, Jan Kiszka wrote:
On 20.03.20 19:21, Tom Rini wrote:
On Mon, Mar 16, 2020 at 08:09:53PM +0100, Jan Kiszka wrote:
Hi all,
=> ls mmc 0:1 /usr/lib/linux-image-4.9.11-1.3.0-dirty
CACHE: Misaligned operation at range
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 66 ++
Convert CONFIG_KS8851_MLL and CONFIG_KS8851_MLL_BASEADDR to Kconfig
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
configs/at91sam9n12ek_mmc_defconfig | 2 ++
configs/at91sam9n12ek_nandflash_defconfig | 2 ++
configs/at91sam9n12ek_spiflash_defconfig | 2 ++
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat. It is however necessary to cache RXFC value, because
reading that one out clears it.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc:
Add support for U-Boot DM and DT probing.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 103 +++
1 file changed, 103 insertions(+)
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 60 +---
1 file changed, 44 insertions(+), 16
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 257
There is only one chip ID in the table of chip IDs for this chip.
Read out the chip ID instead and mask off the last "revision" bit
to check the chip ID, this works for all chips in the family. Then
drop the chip ID passing around.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe
The packet status and length information should be extracted from the
FIFO per-packet. Adjust the code such that it reads the packet meta
data and then the packet afterward, if applicable.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 36
Most of the entries in the structure are useless, remove them. Inline
the rest of uses where applicable.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 70 ++--
1 file changed, 9 insertions(+), 61
Fix various checkpatch complaints.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index
Per KS8851-16MLL, the RXQCR is a 16bit register. Use 16bit accessors
to it consistently and drop the ks_wrreg8() function altogether, as
it is not used anymore.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 17 -
1 file
The cached RXQCR value is never updated, remove the cache and just use
the bits in the cache directly in the code.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
---
drivers/net/ks8851_mll.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced. Moreover, remove
printf() in the fail path, as it is useless, and return proper -ENOMEM
return code.
Signed-off-by: Marek Vasut
Cc: Eugen Hristev
Cc: Joe Hershberger
On Wed, Mar 25, 2020 at 06:28:20PM +, Tom Warren wrote:
>
>
> -Original Message-
> From: Tom Rini
> Sent: Wednesday, March 25, 2020 11:26 AM
> To: Tom Warren
> Cc: Peter Robinson ; u-boot@lists.denx.de; Stephen
> Warren ; Thierry Reding ; Jonathan
> Hunter ;
-Original Message-
From: Tom Rini
Sent: Wednesday, March 25, 2020 11:26 AM
To: Tom Warren
Cc: Peter Robinson ; u-boot@lists.denx.de; Stephen Warren
; Thierry Reding ; Jonathan Hunter
; tomcwarren3...@gmail.com
Subject: Re: [PATCH] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit
On Wed, Mar 25, 2020 at 06:24:43PM +, Tom Warren wrote:
> > That is strange, please re-post them and we'll see what happens. If they
> > don't show up right away I can poke people. Thanks!
>
> Just resent the Nano patch via:
>
> git send-email 0001*.patch --to u-boot@lists.denx.de
> That is strange, please re-post them and we'll see what happens. If they
> don't show up right away I can poke people. Thanks!
Just resent the Nano patch via:
git send-email 0001*.patch --to u-boot@lists.denx.de --confirm always
--annotate --from tomcwarren3...@gmail.com --cc
From: Tom Warren
The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.
HDMI 2.0 or DP 1.2 are available for display,
On Wed, 25 Mar 2020 18:48:50 +0100
Marek Behun wrote:
> One thing that may need reworking (to become compatible with Linux) is
> the comphy driver. Linux' comphy driver for this SOC uses smccc calls
> to ARM Trusted Firmware, but U-Boot does not, and instead initializes
> SERDESes on its own.
On Wed, Mar 25, 2020 at 05:44:25PM +, Tom Warren wrote:
> -Original Message-
> From: Peter Robinson
> Sent: Wednesday, March 25, 2020 5:53 AM
> To: Tom Warren
> Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding
> ; Jonathan Hunter ;
> tomcwarren3...@gmail.com
> Subject:
Hi,
mainline U-Boot should work for Armada 3720, although I haven't tested
recent master (so I don't know if there are some regressions). But
Turris Mox uses cca 1 year old upstream with just few Mox specific
patches atop (which I plan to get merged soon). You can find it here:
-Original Message-
From: Peter Robinson
Sent: Wednesday, March 25, 2020 5:53 AM
To: Tom Warren
Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding
; Jonathan Hunter ;
tomcwarren3...@gmail.com
Subject: Re: [PATCH] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
External
Add support for U-Boot DM and DT probing. Furthermore, build the
SMC911x standalone EEPROM example only for the non-DM case, as it
is not converted yet.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: Drop the board-specific bits
Hide SMC911X_BASE from Kconfig if
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
V4: Repair the calloc
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
Acked-by: Joe Hershberger
---
V2: Add AB from Joe
V3: No change
V4: No change
---
drivers/net/smc911x.c | 57
Invert the status handling logic in smc911x_recv(), to make the
function easier to read, no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: Simplify RX_FIFO_INF_RXSUSED mask handling
s@Invest@Invert@
V3: No change
V4: No change
---
Convert the IO accessors to standard ones instead of using volatile
void pointers, as those do not cover all the bus access details.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
V4: No change
---
drivers/net/smc911x.c | 13 +++--
1
On 3/25/20 5:14 PM, Harald Seiler wrote:
[...]
>> @@ -421,51 +436,52 @@ static int smc911x_initialize_mii(struct eth_device
>> *dev)
>> int smc911x_initialize(u8 dev_num, int base_addr)
>> {
>> unsigned long addrl, addrh;
>> -struct eth_device *dev;
>> +struct smc911x_priv *priv;
These accessors are not overridden by any board, and even if they were,
this is something which should be handled via DM now, so remove the
weak alias option. Moreover, drop the inline keyword, as the compiler
can decide better.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
Pull the MII interface registration into separate function to avoid the
ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such
that we use goto labels.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: New patch
V3: No change
V4: No change
---
Inline all the functions from the header file, as they are not used
outside of the driver or the standalone EEPROM example.
Note that this does introduce considerable amount of duplication in
the standalone EEPROM example, however that one has to be rewritten
anyway, roughly such that the SMC911x
Fix memleak in the init fail path, where if allocation or registration
of MDIO bus fails, then ethernet interface is not unregistered and the
private data are not freed, yet the probe function reports a failure.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No
Invert the logic in the aforementioned functions to reduce indent,
no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
V4: No change
---
drivers/net/smc911x.c | 27 ---
1 file changed, 16
Perform DM conversion of the SMC911x driver.
Note that the DT compatible is set only for 9115 , so this might need
to be changed.
Marek Vasut (13):
net: smc911x: Remove pkt_data_{push,pull}
net: smc911x: Replace malloc()+memset() with calloc()
net: smc911x: Rename smc911x_rx() to
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: - Use kzalloc()
- Return -ENOMEM on alloc fail
V3: - Switch back to calloc(), it's not
Rename the function to keep the naming scheme consistent,
no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
V4: No change
---
drivers/net/smc911x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
These functions are never used and are likely a pre-DM remnant
from times long past, just remove them.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
V4: No change
---
drivers/net/smc911x.c | 9 ++---
1 file changed, 2 insertions(+), 7
USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.
Signed-off-by: Andy Shevchenko
---
.../asm/arch-tangier/acpi/southcluster.asl| 38 +++
1 file changed, 38 insertions(+)
diff --git
Hi Moritz,
On 25.03.20 16:05, Moritz Berghof wrote:
My Name is Moritz and we evaluate the Marvell Armada 88F3720
on the Marvell ESPRESSObin and the TURRIS MOX.
Does someone know, where is the actual or latest u-boot branch
for Marvell Armada 88F3720 placed? At the u-boot master or a
marvell
Hi Marek,
On Wed, 2020-03-25 at 16:36 +0100, Marek Vasut wrote:
> Introduce a private data structure for this driver with embedded
> struct eth_device and pass it around. This prepares the driver to
> work with both DM and non-DM systems.
>
> Signed-off-by: Marek Vasut
> Cc: Joe Hershberger
>
On 3/25/20 4:57 PM, Patrick DELAUNAY wrote:
> Hi,
Hi,
>> From: Marek Vasut
>> Sent: mercredi 25 mars 2020 00:39
>>
>> Hi,
>>
>> I was looking at the STM32MP1 boot time and I noticed it takes about 2
>> seconds
>> to get to U-Boot.
>
> Thanks for the feedback.
>
> To be clear, the SPL is not
On 24/03/2020 23:58, Jaehoon Chung wrote:
> Enable SDHCI_SDMA configuration.
>
> Signed-off-by: Jaehoon Chung
> Reviewed-by: Peng Fan
> Reviewed-by: Minkyu Kang
> ---
> configs/rpi_4_32b_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/configs/rpi_4_32b_defconfig
Hi,
> From: Marek Vasut
> Sent: mercredi 25 mars 2020 00:39
>
> Hi,
>
> I was looking at the STM32MP1 boot time and I noticed it takes about 2 seconds
> to get to U-Boot.
Thanks for the feedback.
To be clear, the SPL is not the ST priority as we have many limitation (mainly
on
power
Add support for U-Boot DM and DT probing. Furthermore, build the
SMC911x standalone EEPROM example only for the non-DM case, as it
is not converted yet.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: Drop the board-specific bits
Hide SMC911X_BASE from Kconfig if
From: Suniel Mahesh
roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports
(HOST1 and HOST2). For end devices to work we need to enable USB hub
so that HOST detects there presence and enumerates them accordingly.
This requires explicit pinctrl within gpio enablement.
Signed-off-by:
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
Acked-by: Joe Hershberger
---
V2: Add AB from Joe
V3: No change
---
drivers/net/smc911x.c | 57
Invert the status handling logic in smc911x_recv(), to make the
function easier to read, no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: Simplify RX_FIFO_INF_RXSUSED mask handling
s@Invest@Invert@
V3: No change
---
drivers/net/smc911x.c |
Inline all the functions from the header file, as they are not used
outside of the driver or the standalone EEPROM example.
Note that this does introduce considerable amount of duplication in
the standalone EEPROM example, however that one has to be rewritten
anyway, roughly such that the SMC911x
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
---
drivers/net/smc911x.c
These accessors are not overridden by any board, and even if they were,
this is something which should be handled via DM now, so remove the
weak alias option. Moreover, drop the inline keyword, as the compiler
can decide better.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
Pull the MII interface registration into separate function to avoid the
ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such
that we use goto labels.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: New patch
V3: No change
---
drivers/net/smc911x.c
Invert the logic in the aforementioned functions to reduce indent,
no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
---
drivers/net/smc911x.c | 27 ---
1 file changed, 16 insertions(+), 11
Fix memleak in the init fail path, where if allocation or registration
of MDIO bus fails, then ethernet interface is not unregistered and the
private data are not freed, yet the probe function reports a failure.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No
Rename the function to keep the naming scheme consistent,
no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
---
drivers/net/smc911x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: - Use kzalloc()
- Return -ENOMEM on alloc fail
V3: - Switch back to calloc(), it's not
These functions are never used and are likely a pre-DM remnant
from times long past, just remove them.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
---
drivers/net/smc911x.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
Convert the IO accessors to standard ones instead of using volatile
void pointers, as those do not cover all the bus access details.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Masahiro Yamada
---
V2: No change
V3: No change
---
drivers/net/smc911x.c | 13 +++--
1 file changed,
Perform DM conversion of the SMC911x driver.
Note that the DT compatible is set only for 9115 , so this might need
to be changed.
Marek Vasut (13):
net: smc911x: Remove pkt_data_{push,pull}
net: smc911x: Replace malloc()+memset() with calloc()
net: smc911x: Rename smc911x_rx() to
On 3/24/20 2:41 AM, Adam Ford wrote:
> On Sat, Mar 21, 2020 at 11:57 AM Marek Vasut wrote:
>>
>> On 3/17/20 7:17 AM, Masahiro Yamada wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Mon, Mar 16, 2020 at 1:59 AM Marek Vasut wrote:
Perform DM conversion of the SMC911x driver. Note that as I do
On 3/22/20 6:38 PM, Masahiro Yamada wrote:
> On Sun, Mar 22, 2020 at 2:06 AM Marek Vasut wrote:
>>
>> Replace combination of malloc()+memset() with calloc() as the behavior
>
> calloc() -> kzalloc()
>
> to sync with the actual code.
>
> Please fix the subject as well.
I'm switching this back
Dear U-Boot developers,
My Name is Moritz and we evaluate the Marvell Armada 88F3720 on the Marvell
ESPRESSObin and the TURRIS MOX.
Does someone know, where is the actual or latest u-boot branch for Marvell
Armada 88F3720 placed? At the u-boot master or a marvell custodian tree or
somewhere
On Wed, Mar 25, 2020 at 07:32:30AM +0100, Jan Kiszka wrote:
> On 20.03.20 19:21, Tom Rini wrote:
> > On Mon, Mar 16, 2020 at 08:09:53PM +0100, Jan Kiszka wrote:
> > > Hi all,
> > >
> > > => ls mmc 0:1 /usr/lib/linux-image-4.9.11-1.3.0-dirty
> > > CACHE: Misaligned operation at range [bdfff998,
Even though the PL011 UART driver claims to be DM compliant, it does not
really a good job with parsing DT nodes. U-Boot seems to adhere to a
non-standard binding, either requiring to have a "skip-init" property in
the node, or to have an extra "clock" property holding the base
*frequency* value
CONFIG_SEMIHOSTING is selected for the VFP target by the means of
Kconfig already, there is no need to check this in the header file.
Signed-off-by: Andre Przywara
---
include/configs/vexpress_aemv8a.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/include/configs/vexpress_aemv8a.h
So far the Juno board wasn't implementing reset. Let's just use the
already existing PSCI_RESET based method to avoid any extra code.
Signed-off-by: Andre Przywara
Acked-by: Liviu Dudau
---
arch/arm/Kconfig | 2 ++
board/armltd/vexpress64/vexpress64.c | 4 +---
2 files
The Juno board features a standard compliant EHCI/OHCI USB host
controller pair, which we can just enable.
The platform data is taken from the device tree.
This allows to use USB mass storage (the only storage on a Juno r0)
for loading.
Signed-off-by: Andre Przywara
Acked-by: Liviu Dudau
---
The Arm Juno board was still somewhat stuck in "hardcoded land", even
though there are stable DTs around, and one happens to actually be on
the memory mapped NOR flash.
Enable the configuration options to let the board use OF_CONTROL, and
add a routine to find the address of the DTB partition in
The UART base clock rate was typo-ed in the header file, probably because
the reference (the Linux .dts) was also wrong[1].
Fix the number to make the baud rate more correct.
Signed-off-by: Andre Przywara
[1]
The U-Boot documentation explains that variables ending with "_r" hold
addresses in DRAM, while those without that ending point to flash/ROM.
The default variables for the Juno board pointing to the kernel and DTB
load addresses were not complying with this scheme: they lack the
extension, but
Hi,
The Juno port in U-Boot didn't see much love lately, so it has fallen
a bit behind. We already get a build warning for using an old network
driver, but there is more:
- The port is using hardcoded information, even though we have quite
decent DTs available to find things at runtime.
- There
Hi Stefan,
On 3/25/20 3:13 PM, Stefan Roese wrote:
+config CMD_LSBLK
+ depends on HAVE_BLOCK_DEVICE
You depend on CONFIG_HAVE_BLOCK_DEVICE here...
+
+#if CONFIG_IS_ENABLED(HAVE_BLOCK_DEVICE)
... so this #ifdef should not be necessary, right?
Oops, you are right... I forgot to take
Hi,
does anyone know, if there is a SPI driver for Raspberry Pi 4 in U-Boot?
I want to communicate with a TPM 2.0 via hardware SPI. So far I've compiled
mainline U-Boot with TPM driver support. However, the SPI driver seems to be
missing.
The linux kernel ships the driver
Hi Niel,
On 25.03.20 14:46, Niel Fourie wrote:
Add a command to print a list of available block device drivers,
and for each, the list of known block devices.
Signed-off-by: Niel Fourie
---
cmd/Kconfig | 8
cmd/Makefile| 1 +
cmd/lsblk.c
Add a command to print a list of available block device drivers,
and for each, the list of known block devices.
Signed-off-by: Niel Fourie
---
cmd/Kconfig | 8
cmd/Makefile| 1 +
cmd/lsblk.c | 83 +
Expand warnings printed by Makefile after compile when legacy
drivers are in use. These include:
- CONFIG_HAVE_BLOCK_DEVICE without CONFIG_BLK
- CONFIG_BOOTCOUNT_LIMIT without CONFIG_DM_BOOTCOUNT
- CONFIG_MTD without CONFIG_DM_MTD
- CONFIG_PHYLIB without CONFIG_DM_MDIO
- CONFIG_POWER, also
Reset stored ping IP address before leaving the netloop to ensure that
the subsequent calls to the netloop, especially for the other protocols,
won't be interrupted by the received ICMP_ECHO_REPLY packet.
Signed-off-by: Marek Szyprowski
---
net/ping.c | 5 -
1 file changed, 4 insertions(+),
Hi Andy,
On Wed, Mar 25, 2020 at 7:41 PM Andy Shevchenko
wrote:
>
> On Wed, Mar 25, 2020 at 9:15 AM Bin Meng wrote:
> >
> > On Sat, Mar 21, 2020 at 1:46 AM Andy Shevchenko
> > wrote:
> > >
> > > There is established way to provide I²C timings, or actually counters,
> > > to the OS via ACPI.
Hi Tom,
Do you have this and the other patches you've posted on a git branch
somewhere, for some reason they're not showing up in patchwork [1]
which makes it less straight forward to test.
Peter
[1] http://patchwork.ozlabs.org/project/uboot/list/?q=tegra
On Tue, Mar 24, 2020 at 7:03 PM
On Wed, Mar 25, 2020 at 9:15 AM Bin Meng wrote:
>
> On Sat, Mar 21, 2020 at 1:46 AM Andy Shevchenko
> wrote:
> >
> > There is established way to provide I²C timings, or actually counters,
> > to the OS via ACPI. Fill them for Intel Merrifield platform.
> >
> > Signed-off-by: Andy Shevchenko
> >
On 25/03/2020 08.50, Wolfgang Denk wrote:
> Dear Rasmus Villemoes,
>
> In message <9c03710e-5eec-da6e-6c15-2f8a14cfc...@prevas.dk> you wrote:
>>
>> Can I ask whether you request changes to this patch series or if my
>> answers to your various comments have been satisfactory?
>
> I think you did
On 2020/3/25 下午7:00, Marek Behun wrote:
> On Wed, 25 Mar 2020 16:27:16 +0800
> Qu Wenruo wrote:
>
>> On 2020/3/25 下午4:09, Marek Behun wrote:
>>> On Thu, 19 Mar 2020 20:33:19 +0800
>>> Qu Wenruo wrote:
>>>
[BUG]
>>>
>>> The subject line should not contain uboot keyword. If you check
On Wed, 25 Mar 2020 12:00:20 +0100
Marek Behun wrote:
> I also did not collaborate with Linux btrfs authors when writing this
> driver. These are the reasons why I don't see much point in adding
> linux-btrfs mailing list to Cc, since they may have never seen the
> codebase.
On the other hand
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