Re: [PATCH v2] arm: dts: kirkwood: Enable upstream DT on Kirkwood boards
On Thu, 28 Mar 2024 at 07:49, Tony Dinh wrote: > > Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the > DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build > DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi > files from arch/arm/dts/ directory. > > Background: > > Hi Stefan, > Hi Michael, > > I did a survey and we currently have 28 Kirkwood boards. Using some > commands and filters, here are the finding. > > git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 > | xargs -n1 sh -c 'diff -qs arch/arm/dts/$1.dts > dts/upstream/src/arm/marvell/$1.dts' sh | grep differ > > diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file > or directory > diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such > file or directory > > Files arch/arm/dts/kirkwood-dockstar.dts and > dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ > Files arch/arm/dts/kirkwood-dreamplug.dts and > dts/upstream/src/arm/marvell/kirkwood-dreamplug.dts differ > Files arch/arm/dts/kirkwood-goflexnet.dts and > dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ > Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and > dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ > Files arch/arm/dts/kirkwood-iconnect.dts and > dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ > Files arch/arm/dts/kirkwood-net2big.dts and > dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ > Files arch/arm/dts/kirkwood-ns2max.dts and > dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ > Files arch/arm/dts/kirkwood-ns2mini.dts and > dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ > Files arch/arm/dts/kirkwood-nsa310s.dts and > dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ > Files arch/arm/dts/kirkwood-nsa325.dts and > dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ > Files arch/arm/dts/kirkwood-openrd-client.dts and > dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ > > diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep > ".dtsi " > > Files arch/arm/dts/kirkwood-6192.dtsi and > dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ > Files arch/arm/dts/kirkwood-6281.dtsi and > dts/upstream/src/arm/marvell/kirkwood-6281.dtsi differ > Files arch/arm/dts/kirkwood-98dx4122.dtsi and > dts/upstream/src/arm/marvell/kirkwood-98dx4122.dtsi differ > Files arch/arm/dts/kirkwood-dnskw.dtsi and > dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ > Files arch/arm/dts/kirkwood.dtsi and > dts/upstream/src/arm/marvell/kirkwood.dtsi differ > Files arch/arm/dts/kirkwood-lsxl.dtsi and > dts/upstream/src/arm/marvell/kirkwood-lsxl.dtsi differ > Files arch/arm/dts/kirkwood-nsa3x0-common.dtsi and > dts/upstream/src/arm/marvell/kirkwood-nsa3x0-common.dtsi differ > Files arch/arm/dts/kirkwood-synology.dtsi and > dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ > > And after reviewing these differences, the following are my observation. > > OF_LIST is not used in these Kirkwood boards. > > 1. Boards that have only u-boot DTS that should be opt-out for now with > "#CONFIG_OF_UPSTREAM is not set" > > diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file > or directory > diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such > file or directory > > 2. DTS and DTSI files that have only cosmetic, style, or binding changes > (safe to take) > > Files arch/arm/dts/kirkwood-dockstar.dts and > dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ > Files arch/arm/dts/kirkwood-goflexnet.dts and > dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ > Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and > dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ > Files arch/arm/dts/kirkwood-iconnect.dts and > dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ > Files arch/arm/dts/kirkwood-net2big.dts and > dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ > Files arch/arm/dts/kirkwood-ns2max.dts and > dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ > Files arch/arm/dts/kirkwood-ns2mini.dts and > dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ > Files arch/arm/dts/kirkwood-nsa325.dts and > dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ > Files arch/arm/dts/kirkwood-openrd-client.dts and > dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ > > Files arch/arm/dts/kirkwood-dnskw.dtsi and > dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ > Files arch/arm/dts/kirkwood.dtsi and > dts/upstream/src/arm/marvell/kirkwood.dtsi differ > Files arch/arm/dts/kirkwood-synology.dtsi and > dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ > > 3. DTS files that are newer in upstream (safe to take with regression test) > > Files arch/arm/dts/kirkwood-nsa310s.dts and >
Re: [PATCH v2 4/6] board: starfive: support Milk-V Mars board
Hi Heinrich,
On Thu, Mar 21, 2024 at 07:11:47PM +0100, Heinrich Schuchardt wrote:
> The differences between the Milk-V Mars board and the VisionFive 2 board
> are small enough that we can support both using the same U-Boot build.
>
> * The model and compatible property are taken from proposed Linux patches.
> * The EEPROM is atmel,24c02 according to the vendor U-Boot.
> * The second Ethernet port is not available.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> do not overwrite /soc/i2c@1205/eeprom@50/compatible
>
> ---
> board/starfive/visionfive2/spl.c | 99
> 1 file changed, 87 insertions(+), 12 deletions(-)
>
> diff --git a/board/starfive/visionfive2/spl.c
> b/board/starfive/visionfive2/spl.c
> index 1b49945d11b..e0e33cb37ba 100644
> --- a/board/starfive/visionfive2/spl.c
> +++ b/board/starfive/visionfive2/spl.c
> @@ -67,6 +87,49 @@ static const struct starfive_vf2_pro starfive_verb[] = {
> "tx-internal-delay-ps", "0"},
> };
>
> +void spl_fdt_fixup_mars(void *fdt)
> +{
> + static const char compat[] = "milkv,mars\0starfive,jh7110";
> + u32 phandle;
> + u8 i;
> + int offset;
> + int ret;
> +
> + fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat,
> sizeof(compat));
> + fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model",
> +"Milk-V Mars");
> +
> + /* gmac0 */
> + offset = fdt_path_offset(fdt, "/soc/clock-controller@1700");
> + phandle = fdt_get_phandle(fdt, offset);
> + offset = fdt_path_offset(fdt, "/soc/ethernet@1603");
> +
> + fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle);
> + fdt_appendprop_u32(fdt, offset, "assigned-clocks",
> JH7110_AONCLK_GMAC0_TX);
> + fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle);
> + fdt_appendprop_u32(fdt, offset, "assigned-clock-parents",
> +JH7110_AONCLK_GMAC0_RMII_RTX);
> +
> + /* gmac1 */
> + fdt_setprop_string(fdt, fdt_path_offset(fdt, "/soc/ethernet@1604"),
> +"status", "disabled");
> +
> + for (i = 0; i < ARRAY_SIZE(milk_v_mars); i++) {
> + offset = fdt_path_offset(fdt, milk_v_mars[i].path);
> +
> + if (starfive_verb[i].value)
Should this be milk_v_mars[i].value ?
> + ret = fdt_setprop_u32(fdt, offset, milk_v_mars[i].name,
> + dectoul(milk_v_mars[i].value,
> NULL));
> + else
> + ret = fdt_setprop_empty(fdt, offset,
> milk_v_mars[i].name);
> +
> + if (ret) {
> + pr_err("%s set prop %s fail.\n", __func__,
> milk_v_mars[i].name);
> + break;
> + }
> + }
> +}
> +
Re: [PATCH] starfive: visionfive2: switch to standard boot
Hi, does this standard boot no longer try to boot from the configured EFI list? I have a boot listing (for Debian's grub EFI loader) configured with u-boot eficonfig but it does not seem to be attempting EFI boot anymore, there is a message about card select error but I think that must be trying the eMMC (mmc 1) and not the SD Card (mmc 0). StarFive # mmc list mmc@1601: 0 (SD) mmc@1602: 1 StarFive # help bootflow bootflow - Boot flows Usage: bootflow scan - boot first available bootflow StarFive # bootflow scan Card did not respond to voltage select! : -110 No working controllers found ethernet@1603 Waiting for PHY auto negotiation to complete... done BOOTP broadcast 1 StarFive # bootefi bootmgr Card did not respond to voltage select! : -110 Booting: Debian bootloader GRUB error: no suitable video mode found. "GNU GRUB version 2.12-1+b1"... The documentation for bootflow command seems to have a lot more options than what I'm seeing now?
[PATCH v4 4/5] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v4 3/5] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_get_cpu_rate(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- ulong rate;
- int ret;
-
- ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
- (sc_pm_clock_rate_t *));
-
[PATCH v4 2/5] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v4 1/5] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those nodes could be dropped after upstream linux supports them. To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Mathieu: please help test the boards you maintain when you have time. Thanks, Peng. To: Sébastien Szymanski To: Stefano Babic To: Fabio Estevam To: "NXP i.MX U-Boot Team" To: Mathieu Othacehe Cc: u-boot@lists.denx.de Signed-off-by: Peng Fan Changes in v4: - Convert all i.MX93 boards - Link to v3: https://lore.kernel.org/r/20240328-imx93-of-v3-0-4e7f341ed...@nxp.com Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (5): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base imx93: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 arch/arm/dts/imx93-11x11-evk.dts| 322 - arch/arm/dts/imx93-phyboard-segin.dts | 117 --- arch/arm/dts/imx93-phycore-som.dtsi | 126 arch/arm/dts/imx93-pinfunc.h| 623 arch/arm/dts/imx93-u-boot.dtsi | 80 +++ arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + arch/arm/dts/imx93-var-som-symphony.dts | 323 - arch/arm/dts/imx93-var-som.dtsi | 111 --- arch/arm/dts/imx93.dtsi | 906 arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93-phyboard-segin_defconfig | 2 +- configs/imx93_11x11_evk_defconfig | 2 +- configs/imx93_11x11_evk_ld_defconfig| 2 +- configs/imx93_var_som_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 208 -- include/dt-bindings/power/fsl,imx93-power.h | 15 - 22 files changed, 273 insertions(+), 2990 deletions(-) --- base-commit: 280f34ba7d68bb50c0b8eaa040322c1f3b37d46e change-id: 20240328-imx93-of-v2-f879efef737d Best regards, -- Peng Fan
Re: [PATCH v2 3/6] riscv: set fdtfile on Milk-V Mars
On Thu, Mar 21, 2024 at 07:11:46PM +0100, Heinrich Schuchardt wrote: > Set environment variable fdtfile to the correct value for the Milk-V Mars > board. > > Signed-off-by: Heinrich Schuchardt > --- > v2: > rebase patch > --- > .../visionfive2/starfive_visionfive2.c| 43 +-- > 1 file changed, 30 insertions(+), 13 deletions(-) Reviewed-by: Leo Yu-Chi Liang
Re: [PATCH v2 5/6] riscv: starfive: avoid including common.h
On Thu, Mar 21, 2024 at 07:11:48PM +0100, Heinrich Schuchardt wrote: > The usage of common.h is deprecated. Remove it from board files. > > Signed-off-by: Heinrich Schuchardt > --- > v2: > no change > --- > board/starfive/visionfive2/spl.c| 1 - > board/starfive/visionfive2/starfive_visionfive2.c | 1 - > board/starfive/visionfive2/visionfive2-i2c-eeprom.c | 1 - > 3 files changed, 3 deletions(-) Reviewed-by: Leo Yu-Chi Liang
[PATCH v2] arm: dts: kirkwood: Enable upstream DT on Kirkwood boards
Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi files from arch/arm/dts/ directory. Background: Hi Stefan, Hi Michael, I did a survey and we currently have 28 Kirkwood boards. Using some commands and filters, here are the finding. git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 | xargs -n1 sh -c 'diff -qs arch/arm/dts/$1.dts dts/upstream/src/arm/marvell/$1.dts' sh | grep differ diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file or directory diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such file or directory Files arch/arm/dts/kirkwood-dockstar.dts and dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ Files arch/arm/dts/kirkwood-dreamplug.dts and dts/upstream/src/arm/marvell/kirkwood-dreamplug.dts differ Files arch/arm/dts/kirkwood-goflexnet.dts and dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ Files arch/arm/dts/kirkwood-iconnect.dts and dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ Files arch/arm/dts/kirkwood-net2big.dts and dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ Files arch/arm/dts/kirkwood-ns2max.dts and dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ Files arch/arm/dts/kirkwood-ns2mini.dts and dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ Files arch/arm/dts/kirkwood-nsa310s.dts and dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ Files arch/arm/dts/kirkwood-nsa325.dts and dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ Files arch/arm/dts/kirkwood-openrd-client.dts and dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep ".dtsi " Files arch/arm/dts/kirkwood-6192.dtsi and dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ Files arch/arm/dts/kirkwood-6281.dtsi and dts/upstream/src/arm/marvell/kirkwood-6281.dtsi differ Files arch/arm/dts/kirkwood-98dx4122.dtsi and dts/upstream/src/arm/marvell/kirkwood-98dx4122.dtsi differ Files arch/arm/dts/kirkwood-dnskw.dtsi and dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ Files arch/arm/dts/kirkwood.dtsi and dts/upstream/src/arm/marvell/kirkwood.dtsi differ Files arch/arm/dts/kirkwood-lsxl.dtsi and dts/upstream/src/arm/marvell/kirkwood-lsxl.dtsi differ Files arch/arm/dts/kirkwood-nsa3x0-common.dtsi and dts/upstream/src/arm/marvell/kirkwood-nsa3x0-common.dtsi differ Files arch/arm/dts/kirkwood-synology.dtsi and dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ And after reviewing these differences, the following are my observation. OF_LIST is not used in these Kirkwood boards. 1. Boards that have only u-boot DTS that should be opt-out for now with "#CONFIG_OF_UPSTREAM is not set" diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file or directory diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such file or directory 2. DTS and DTSI files that have only cosmetic, style, or binding changes (safe to take) Files arch/arm/dts/kirkwood-dockstar.dts and dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ Files arch/arm/dts/kirkwood-goflexnet.dts and dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ Files arch/arm/dts/kirkwood-iconnect.dts and dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ Files arch/arm/dts/kirkwood-net2big.dts and dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ Files arch/arm/dts/kirkwood-ns2max.dts and dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ Files arch/arm/dts/kirkwood-ns2mini.dts and dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ Files arch/arm/dts/kirkwood-nsa325.dts and dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ Files arch/arm/dts/kirkwood-openrd-client.dts and dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ Files arch/arm/dts/kirkwood-dnskw.dtsi and dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ Files arch/arm/dts/kirkwood.dtsi and dts/upstream/src/arm/marvell/kirkwood.dtsi differ Files arch/arm/dts/kirkwood-synology.dtsi and dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ 3. DTS files that are newer in upstream (safe to take with regression test) Files arch/arm/dts/kirkwood-nsa310s.dts and dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ 4. DTSI files that have additional PCI-related bindings in upstream (safe to take with regression test) Files arch/arm/dts/kirkwood-6192.dtsi and dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ Files
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS)
> wrote:
>
> > + {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <40>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <_lpi2c2>;
> > + pinctrl-1 = <_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
>
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
Just gave a check on linux-next/master, the nodes are not there.
Thanks,
Peng
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
>
> Please don't ignore review comments.
[PATCH v2 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX8MP EVK
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mp-evk.dts | 684
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mp_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 686 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 56623d01240..7b7788f7550 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1101,7 +1101,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
- imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
- reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1>;
- reset-deassert-us = <8>;
- realtek,clkout-disable;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
-
[PATCH v2 3/4] imx: imx8mn-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MN-EVK and i.MX8MN-DDR4-EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 2 -
arch/arm/dts/imx8mn-ddr4-evk.dts | 160 --
arch/arm/dts/imx8mn-evk.dts | 128 --
arch/arm/mach-imx/imx8m/Kconfig | 2 +
configs/imx8mn_ddr4_evk_defconfig | 2 +-
configs/imx8mn_evk_defconfig | 2 +-
6 files changed, 4 insertions(+), 292 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b7992491389..56623d01240 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1085,9 +1085,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-verdin-wifi-dev.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
- imx8mn-ddr4-evk.dtb \
imx8mq-cm.dtb \
- imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
deleted file mode 100644
index d8ce217c601..000
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-evk.dtsi"
-
-/ {
- model = "NXP i.MX8MNano DDR4 EVK board";
- compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-600M {
- opp-hz = /bits/ 64 <6>;
- };
- };
-};
-
- {
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <135>;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <300>;
- regulator-max-microvolt = <330>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <80>;
- regulator-max-microvolt = <140>;
- regulator-boot-on;
- regulator-always-on;
-
[PATCH v2 2/4] imx: imx8mm_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MM EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mm-evk.dts | 128
arch/arm/dts/imx8mm-evk.dtsi | 615 --
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mm_evk_defconfig | 2 +-
configs/imx8mm_evk_fspi_defconfig | 2 +-
6 files changed, 3 insertions(+), 746 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b76ee4d609b..b7992491389 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1074,7 +1074,6 @@ dtb-$(CONFIG_ARCH_IMX8ULP) += \
dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-data-modul-edm-sbc.dtb \
- imx8mm-evk.dtb \
imx8mm-icore-mx8mm-ctouch2.dtb \
imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-kontron-bl.dtb \
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts
deleted file mode 100644
index a2b24d4d4e3..000
--- a/arch/arm/dts/imx8mm-evk.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019-2020 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mm-evk.dtsi"
-
-/ {
- model = "FSL i.MX8MM EVK board";
- compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
-
- aliases {
- spi0 =
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- assigned-clocks = < IMX8MM_CLK_USDHC3_ROOT>;
- assigned-clock-rates = <4>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <_usdhc3>;
- pinctrl-1 = <_usdhc3_100mhz>;
- pinctrl-2 = <_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
- {
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d4
-
[PATCH v2 1/4] imx: imx8mq_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MQ EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mq-evk.dts | 712
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mq_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 714 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..b76ee4d609b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1090,7 +1090,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-cm.dtb \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
- imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts
deleted file mode 100644
index 82387b9cb80..000
--- a/arch/arm/dts/imx8mq-evk.dts
+++ /dev/null
@@ -1,712 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2017 NXP
- * Copyright (C) 2017-2018 Pengutronix, Lucas Stach
- */
-
-/dts-v1/;
-
-#include "imx8mq.dtsi"
-
-/ {
- model = "NXP i.MX8MQ EVK";
- compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
-
- chosen {
- stdout-path =
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x 0x4000 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_pcie1: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie1_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 10 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-vsd-3v3 {
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2>;
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- buck2_reg: regulator-buck2 {
- pinctrl-names = "default";
- pinctrl-0 = <_buck2>;
- compatible = "regulator-gpio";
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <100>;
- gpios = < 13 GPIO_ACTIVE_HIGH>;
- states = <100 0x0
- 90 0x1>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = < 12 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <_ir>;
- linux,autosuspend-period = <125>;
- };
-
- audio_codec_bt_sco: audio-codec-bt-sco {
- compatible = "linux,bt-sco";
- #sound-dai-cells = <1>;
- };
-
- wm8524: audio-codec {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8524";
- wlf,mute-gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- sound-bt-sco {
- compatible = "simple-audio-card";
- simple-audio-card,name = "bt-sco-audio";
- simple-audio-card,format = "dsp_a";
- simple-audio-card,bitclock-inversion;
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
-
- btcpu: simple-audio-card,cpu {
- sound-dai = <>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <16>;
- };
-
- simple-audio-card,codec {
- sound-dai = <_codec_bt_sco 1>;
- };
- };
-
- sound-wm8524 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8524-audio";
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
- simple-audio-card,widgets =
- "Line", "Left Line Out Jack",
- "Line", "Right Line Out Jack";
- simple-audio-card,routing =
- "Left Line Out Jack", "LINEVOUTL",
- "Right Line Out Jack", "LINEVOUTR";
-
- cpudai: simple-audio-card,cpu {
- sound-dai = <>;
- };
-
- link_codec: simple-audio-card,codec {
-
[PATCH v2 0/4] imx8m: convert i.MX8MM/Q/N/P-EVK to OF_UPSTREAM
This patchset is to convert NXP i.MX8M[Q,M,N,P] EVK boards to OF_UPSTREAM Signed-off-by: Peng Fan --- Changes in v2: - Sorry for the quick respin. - Drop the dtb build in arch/arm/dts/Makefile - Link to v1: https://lore.kernel.org/r/20240328-imx8m-v1-0-2be5e6657...@nxp.com --- Peng Fan (4): imx: imx8mq_evk: convert to OF_UPSTREAM imx: imx8mm_evk: convert to OF_UPSTREAM imx: imx8mn-evk: convert to OF_UPSTREAM imx: imx8mp_evk: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx8mm-evk.dts | 128 --- arch/arm/dts/imx8mm-evk.dtsi | 615 arch/arm/dts/imx8mn-ddr4-evk.dts | 160 - arch/arm/dts/imx8mn-evk.dts | 128 --- arch/arm/dts/imx8mp-evk.dts | 684 arch/arm/dts/imx8mq-evk.dts | 712 -- arch/arm/mach-imx/imx8m/Kconfig | 5 + configs/imx8mm_evk_defconfig | 2 +- configs/imx8mm_evk_fspi_defconfig | 2 +- configs/imx8mn_ddr4_evk_defconfig | 2 +- configs/imx8mn_evk_defconfig | 2 +- configs/imx8mp_evk_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- 14 files changed, 11 insertions(+), 2438 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240328-imx8m-b6e89715c5dc Best regards, -- Peng Fan
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to > OF_UPSTREAM > > Hi Peng, > > On Wed, Mar 27, 2024 at 9:40 PM Peng Fan wrote: > > > I could help convert all imx93 boards, but I could only test nxp > > imx93 boards, not able to test others. > > Just copy the board maintainers in your patch and they could help test the > conversion to OF_UPSTREAM. ok, I need use v6.9-rc1-dts for the dts upstream. Some dts not in v6.8-dts. Thanks, Peng. > > Thanks!
RE: [PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM > > Hi Peng, > > On Wed, Mar 27, 2024 at 10:27 PM Peng Fan (OSS) > wrote: > > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -1105,7 +1105,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ > > imx8mp-dhcom-pdk2.dtb \ > > imx8mp-dhcom-pdk3.dtb \ > > imx8mp-dhcom-pdk3-overlay-rev100.dtbo \ > > - imx8mp-evk.dtb \ > > Here you removed imx8mp-evk.dtb from the Makefile, which is correct. > > You should do the same on the other patches. Oh, yes. > > Have you boot-tested all these boards? Tested imx8m/n/p evk. Not have imx8mq evk at hand. But checked dts for imx8mq, there is no difference that would affect uboot boot. Regards, Peng.
Re: [PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
Hi Peng, On Wed, Mar 27, 2024 at 10:27 PM Peng Fan (OSS) wrote: > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1105,7 +1105,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ > imx8mp-dhcom-pdk2.dtb \ > imx8mp-dhcom-pdk3.dtb \ > imx8mp-dhcom-pdk3-overlay-rev100.dtbo \ > - imx8mp-evk.dtb \ Here you removed imx8mp-evk.dtb from the Makefile, which is correct. You should do the same on the other patches. Have you boot-tested all these boards?
[PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX8MP EVK
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mp-evk.dts | 684
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mp_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 686 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..55e9ab0725e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1105,7 +1105,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
- imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
- reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1>;
- reset-deassert-us = <8>;
- realtek,clkout-disable;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
-
[PATCH 3/4] imx: imx8mn-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MN-EVK and i.MX8MN-DDR4-EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mn-ddr4-evk.dts | 160 --
arch/arm/dts/imx8mn-evk.dts | 128 --
arch/arm/mach-imx/imx8m/Kconfig | 2 +
configs/imx8mn_ddr4_evk_defconfig | 2 +-
configs/imx8mn_evk_defconfig | 2 +-
5 files changed, 4 insertions(+), 290 deletions(-)
diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
deleted file mode 100644
index d8ce217c601..000
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-evk.dtsi"
-
-/ {
- model = "NXP i.MX8MNano DDR4 EVK board";
- compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-600M {
- opp-hz = /bits/ 64 <6>;
- };
- };
-};
-
- {
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <135>;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <300>;
- regulator-max-microvolt = <330>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <80>;
- regulator-max-microvolt = <140>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <160>;
- regulator-max-microvolt = <330>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "ldo2";
- regulator-min-microvolt =
[PATCH 2/4] imx: imx8mm_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MM EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-evk.dts | 128
arch/arm/dts/imx8mm-evk.dtsi | 615 --
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mm_evk_defconfig | 2 +-
configs/imx8mm_evk_fspi_defconfig | 2 +-
5 files changed, 3 insertions(+), 745 deletions(-)
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts
deleted file mode 100644
index a2b24d4d4e3..000
--- a/arch/arm/dts/imx8mm-evk.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019-2020 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mm-evk.dtsi"
-
-/ {
- model = "FSL i.MX8MM EVK board";
- compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
-
- aliases {
- spi0 =
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- assigned-clocks = < IMX8MM_CLK_USDHC3_ROOT>;
- assigned-clock-rates = <4>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <_usdhc3>;
- pinctrl-1 = <_usdhc3_100mhz>;
- pinctrl-2 = <_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
- {
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d4
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
-
[PATCH 1/4] imx: imx8mq_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MQ EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk.dts | 712
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mq_evk_defconfig| 2 +-
3 files changed, 2 insertions(+), 713 deletions(-)
diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts
deleted file mode 100644
index 82387b9cb80..000
--- a/arch/arm/dts/imx8mq-evk.dts
+++ /dev/null
@@ -1,712 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2017 NXP
- * Copyright (C) 2017-2018 Pengutronix, Lucas Stach
- */
-
-/dts-v1/;
-
-#include "imx8mq.dtsi"
-
-/ {
- model = "NXP i.MX8MQ EVK";
- compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
-
- chosen {
- stdout-path =
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x 0x4000 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_pcie1: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie1_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 10 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-vsd-3v3 {
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2>;
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- buck2_reg: regulator-buck2 {
- pinctrl-names = "default";
- pinctrl-0 = <_buck2>;
- compatible = "regulator-gpio";
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <100>;
- gpios = < 13 GPIO_ACTIVE_HIGH>;
- states = <100 0x0
- 90 0x1>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = < 12 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <_ir>;
- linux,autosuspend-period = <125>;
- };
-
- audio_codec_bt_sco: audio-codec-bt-sco {
- compatible = "linux,bt-sco";
- #sound-dai-cells = <1>;
- };
-
- wm8524: audio-codec {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8524";
- wlf,mute-gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- sound-bt-sco {
- compatible = "simple-audio-card";
- simple-audio-card,name = "bt-sco-audio";
- simple-audio-card,format = "dsp_a";
- simple-audio-card,bitclock-inversion;
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
-
- btcpu: simple-audio-card,cpu {
- sound-dai = <>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <16>;
- };
-
- simple-audio-card,codec {
- sound-dai = <_codec_bt_sco 1>;
- };
- };
-
- sound-wm8524 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8524-audio";
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
- simple-audio-card,widgets =
- "Line", "Left Line Out Jack",
- "Line", "Right Line Out Jack";
- simple-audio-card,routing =
- "Left Line Out Jack", "LINEVOUTL",
- "Right Line Out Jack", "LINEVOUTR";
-
- cpudai: simple-audio-card,cpu {
- sound-dai = <>;
- };
-
- link_codec: simple-audio-card,codec {
- sound-dai = <>;
- clocks = < IMX8MQ_CLK_SAI2_ROOT>;
- };
- };
-
- sound-spdif {
- compatible = "fsl,imx-audio-spdif";
- model = "imx-spdif";
- spdif-controller = <>;
- spdif-out;
- spdif-in;
- };
-
- sound-hdmi-arc {
- compatible = "fsl,imx-audio-spdif";
- model =
[PATCH 0/4] imx8m: convert i.MX8MM/Q/N/P-EVK to OF_UPSTREAM
This patchset is to convert NXP i.MX8M[Q,M,N,P] EVK boards to OF_UPSTREAM Signed-off-by: Peng Fan --- Peng Fan (4): imx: imx8mq_evk: convert to OF_UPSTREAM imx: imx8mm_evk: convert to OF_UPSTREAM imx: imx8mn-evk: convert to OF_UPSTREAM imx: imx8mp_evk: convert to OF_UPSTREAM arch/arm/dts/Makefile | 1 - arch/arm/dts/imx8mm-evk.dts | 128 --- arch/arm/dts/imx8mm-evk.dtsi | 615 arch/arm/dts/imx8mn-ddr4-evk.dts | 160 - arch/arm/dts/imx8mn-evk.dts | 128 --- arch/arm/dts/imx8mp-evk.dts | 684 arch/arm/dts/imx8mq-evk.dts | 712 -- arch/arm/mach-imx/imx8m/Kconfig | 5 + configs/imx8mm_evk_defconfig | 2 +- configs/imx8mm_evk_fspi_defconfig | 2 +- configs/imx8mn_ddr4_evk_defconfig | 2 +- configs/imx8mn_evk_defconfig | 2 +- configs/imx8mp_evk_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- 14 files changed, 11 insertions(+), 2434 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240328-imx8m-b6e89715c5dc Best regards, -- Peng Fan
Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
Hi Peng, On Wed, Mar 27, 2024 at 9:40 PM Peng Fan wrote: > I could help convert all imx93 boards, but I could only test nxp > imx93 boards, not able to test others. Just copy the board maintainers in your patch and they could help test the conversion to OF_UPSTREAM. Thanks!
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS)
> wrote:
>
> > + {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <40>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <_lpi2c2>;
> > + pinctrl-1 = <_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
>
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
I could help convert all imx93 boards, but I could only test nxp
imx93 boards, not able to test others.
Thanks,
Peng.
>
> Please don't ignore review comments.
Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) wrote:
> + {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <40>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <_lpi2c2>;
> + pinctrl-1 = <_lpi2c2>;
> + status = "okay";
> +
> + pmic@25 {
> + adp5585gpio: gpio@34 {
> + compatible = "adp5585";
> + reg = <0x34>;
> + gpio-controller;
> + #gpio-cells = <2>;
Please add a comment saying these nodes are already available in 6.9-rc1.
> --- a/arch/arm/mach-imx/imx9/Kconfig
> +++ b/arch/arm/mach-imx/imx9/Kconfig
> @@ -31,6 +31,7 @@ choice
> config TARGET_IMX93_11X11_EVK
> bool "imx93_11x11_evk"
> select IMX93
> + imply OF_UPSTREAM
Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this one.
Please don't ignore review comments.
Re: [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP
On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) wrote: > + struct lpuart_serial_plat *plat = dev_get_plat(dev); > struct clk per_clk; Please rename from "per_clk" to "clk".
[PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ pcal6524: gpio@22 {
+ compatible = "nxp,pcal6524";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcal6524>;
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
[PATCH v3 5/6] dt-bindings: imx93: sync clock header
From: Peng Fan Sync clock header with kernel 6.8 Signed-off-by: Peng Fan --- include/dt-bindings/clock/imx93-clock.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 35a1f62053a..787c9e74dc9 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -203,6 +203,7 @@ #define IMX93_CLK_ARM_PLL 198 #define IMX93_CLK_A55_SEL 199 #define IMX93_CLK_A55_CORE 200 -#define IMX93_CLK_END 201 +#define IMX93_CLK_PDM_IPG 201 +#define IMX93_CLK_END 202 #endif -- 2.35.3
[PATCH v3 4/6] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v3 3/6] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_get_cpu_rate(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- ulong rate;
- int ret;
-
- ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
- (sc_pm_clock_rate_t *));
-
[PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v3 1/6] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. imx93.dtsi still kept because other boards still use it as of now. Signed-off-by: Peng Fan --- Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (6): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base dt-bindings: imx93: sync clock header imx: imx93-11x11-evk: convert to OF_UPSTREAM arch/arm/dts/Makefile| 1 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++ arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 ++ arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 - drivers/gpio/imx_rgpio2p.c | 42 +++- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 3 +- 12 files changed, 185 insertions(+), 556 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240327-imx93-of-56ef2b96f2e2 Best regards, -- Peng Fan
RE: [PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
Please ignore this patchset. I need resend. Thanks. > -Original Message- > From: Peng Fan (OSS) > Sent: Thursday, March 28, 2024 8:47 AM > To: Stefano Babic ; Fabio Estevam ; > dl-uboot-imx > Cc: Sumit Garg ; Tom Rini ; u- > b...@lists.denx.de; Peng Fan > Subject: [PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM > > To support OF_UPSTREAM, a few driver changes are included. > For TMU, still use U-Boot node, I will prepare a kernel update, then back to > U- > Boot support. > Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. > imx93.dtsi still kept because other boards still use it as of now. > > Signed-off-by: Peng Fan > --- > Changes in v2: > - Add a new patch to sync clock header to avoid breaking > - Drop the Makefile change which change including order > - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0- > afab6b314...@nxp.com > > --- > Peng Fan (6): > gpio: imx_rgpio2p: support one address > serial: lpuart: use ipg clk for i.MX7ULP > cpu: drop imx9_cpu > clk: imx93: fix anatop base > dt-bindings: imx93: sync clock header > imx: imx93-11x11-evk: convert to OF_UPSTREAM > > arch/arm/dts/Makefile| 1 - > arch/arm/dts/imx8mp-evk.dts | 684 > --- > arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 ++ > arch/arm/dts/imx93-11x11-evk.dts | 322 --- > arch/arm/dts/imx93-u-boot.dtsi | 15 + > arch/arm/mach-imx/imx9/Kconfig | 1 + > configs/imx93_11x11_evk_defconfig| 2 +- > configs/imx93_11x11_evk_ld_defconfig | 2 +- > drivers/clk/imx/clk-imx93.c | 2 +- > drivers/cpu/imx9_cpu.c | 224 -- > drivers/gpio/imx_rgpio2p.c | 42 +- > drivers/serial/serial_lpuart.c | 9 +- > include/dt-bindings/clock/imx93-clock.h | 3 +- > 13 files changed, 185 insertions(+), 1240 deletions(-) > --- > base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 > change-id: 20240327-imx93-of-56ef2b96f2e2 > > Best regards, > -- > Peng Fan
[PATCH v2 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ pcal6524: gpio@22 {
+ compatible = "nxp,pcal6524";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcal6524>;
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
[PATCH v2 5/6] dt-bindings: imx93: sync clock header
From: Peng Fan
Sync clock header with kernel 6.8
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mp-evk.dts | 684
include/dt-bindings/clock/imx93-clock.h | 3 +-
2 files changed, 2 insertions(+), 685 deletions(-)
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
- reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1>;
- reset-deassert-us = <8>;
- realtek,clkout-disable;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
-
[PATCH v2 4/6] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v2 3/6] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_get_cpu_rate(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- ulong rate;
- int ret;
-
- ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
- (sc_pm_clock_rate_t *));
-
[PATCH v2 2/6] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v2 1/6] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. imx93.dtsi still kept because other boards still use it as of now. Signed-off-by: Peng Fan --- Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (6): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base dt-bindings: imx93: sync clock header imx: imx93-11x11-evk: convert to OF_UPSTREAM arch/arm/dts/Makefile| 1 - arch/arm/dts/imx8mp-evk.dts | 684 --- arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 ++ arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 + arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 3 +- 13 files changed, 185 insertions(+), 1240 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240327-imx93-of-56ef2b96f2e2 Best regards, -- Peng Fan
RE: [PATCH] warp7: Convert to watchdog driver model
> Subject: [PATCH] warp7: Convert to watchdog driver model
>
> Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
> the 'reset' command in U-Boot to not cause a board reset.
>
> Fix it by switching to the watchdog driver model via sysreset, which is the
> preferred method for implementing the watchdog reset.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> arch/arm/dts/imx7s-warp-u-boot.dtsi | 10 ++
> configs/warp7_defconfig | 3 +++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-
> u-boot.dtsi
> index 4f44598c9a27..98784fd7a2ef 100644
> --- a/arch/arm/dts/imx7s-warp-u-boot.dtsi
> +++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi
> @@ -7,6 +7,12 @@
> chosen {
> stdout-path =
> };
> +
> + wdt-reboot {
> + compatible = "wdt-reboot";
> + wdt = <>;
> + bootph-pre-ram;
> + };
> };
>
> {
> @@ -24,3 +30,7 @@
> {
> bootph-all;
> };
> +
> + {
> + bootph-pre-ram;
> +};
> diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index
> 9b518a121be6..48042b702c22 100644
> --- a/configs/warp7_defconfig
> +++ b/configs/warp7_defconfig
> @@ -67,6 +67,8 @@ CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y
> CONFIG_MXC_UART=y
> +CONFIG_SYSRESET=y
> +CONFIG_SYSRESET_WATCHDOG=y
> CONFIG_IMX_THERMAL=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> @@ -80,5 +82,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y
> CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
> +CONFIG_IMX_WATCHDOG=y
> CONFIG_OPTEE_TZDRAM_SIZE=0x300
> CONFIG_BOOTM_OPTEE=y
> --
> 2.34.1
Re: [PATCH v2 0/3] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Drive-by fixes
On Wed, Mar 27, 2024 at 07:49:38AM +0100, Stefan Wahren wrote: > Hi, > > [add Peter and Ivan] > > Am 26.03.24 um 20:58 schrieb Laurent Pinchart: > > Hello, > > > > This small series includes a few drive-by fixes for DT validation > > errors. > > > > The first patch has been posted previously in v1 ([1], and now addresses > > a small review comment. I think it's good to go. > > > > The next two patches address the same issue as "[PATCH 1/2] dt-bindings: > > arm: bcm: raspberrypi,bcm2835-firmware: Add missing properties" ([2]), > > but this time with a (hopefully) correct approach. Patch 2/3 starts by > > fixing the raspberrypi-bcm2835-firmware driver, removing the need for DT > > properties that are specified in bcm2835-rpi.dtsi but not documented in > > the corresponding bindings. Patch 3/3 can then drop those properties, > > getting rid of the warnings. > > since this series drops properties from the device tree, does anyone > have the chance to test it with a recent U-Boot? I don't have U-Boot running with my RPi, so I would appreciate if someone could help :-) > > [1] > > https://lore.kernel.org/linux-arm-kernel/20240326004902.17054-3-laurent.pinch...@ideasonboard.com/ > > [2] > > https://lore.kernel.org/linux-arm-kernel/20240326004902.17054-2-laurent.pinch...@ideasonboard.com/ > > > > Laurent Pinchart (3): > >dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add gpio child > > node > >firmware: raspberrypi: Use correct device for DMA mappings > >ARM: dts: bcm283x: Drop unneeded properties in the bcm2835-firmware > > node > > > > .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 30 +++ > > .../gpio/raspberrypi,firmware-gpio.txt| 30 --- > > arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi | 4 --- > > drivers/firmware/raspberrypi.c| 7 +++-- > > 4 files changed, 34 insertions(+), 37 deletions(-) > > delete mode 100644 > > Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt > > -- Regards, Laurent Pinchart
Re: [PATCH] mx6cuboxi: fix ethernet after synchronise device-tree
On Wed, Mar 27, 2024 at 6:04 PM Fabio Estevam wrote:
> I took Josua's patch and modified it a bit.
>
> Does the attached patch fix Ethernet?
I forgot to delete the old ethernet-phy nodes.
Please try this one instead.
If it works in U-Boot, please also test Ethernet in Linux as we are
touching ft_board_setup().
From 5af15e698ad89fac3cc3433ac4ac87bb10bc014d Mon Sep 17 00:00:00 2001
From: Josua Mayer
Date: Wed, 27 Mar 2024 17:58:47 -0300
Subject: [PATCH] mx6cuboxi: Fix Ethernet after DT sync with Linux
The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
addresses. U-Boot needs to auto-detect which phy is actually present,
and at which address it is responding.
Auto-detection from multiple phy nodes specified in device-tree does not
currently work correct. As a work-around merge all three possible phys
into one node with the special address 0x which indicates to the
generic phy driver to probe all addresses.
Also fixup this fake address before booting Linux, *if* booting with
U-Boot's internal dtb.
Signed-off-by: Josua Mayer
[fabio: Added the changes to imx6qdl-sr-som-u-boot.dtsi.]
Signed-off-by: Fabio Estevam
---
...qdl-hummingboard2-emmc-som-v15-u-boot.dtsi | 1 +
arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi | 40 +++
board/solidrun/mx6cuboxi/mx6cuboxi.c | 8 +++-
3 files changed, 48 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
index e9b188ed6587..358cf8abc4ff 100644
--- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include "imx6qdl-u-boot.dtsi"
+#include "imx6qdl-sr-som-u-boot.dtsi"
/ {
board-detect {
diff --git a/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
new file mode 100644
index ..4c5f043ea92a
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_microsom_enet_ar8035>;
+ phy-handle = <>;
+ phy-mode = "rgmii-id";
+
+ /*
+ * The PHY seems to require a long-enough reset duration to avoid
+ * some rare issues where the PHY gets stuck in an inconsistent and
+ * non-functional state at boot-up. 10ms proved to be fine .
+ */
+ phy-reset-duration = <10>;
+ phy-reset-gpios = < 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /delete-node/ ethernet-phy@1;
+ /delete-node/ ethernet-phy@4;
+
+ phy: ethernet-phy@0 {
+ /*
+ * The PHY can appear either:
+ * - AR8035: at address 0 or 4
+ * - ADIN1300: at address 1
+ * Actual address being detected at runtime.
+ */
+ reg = <0x>;
+ qca,clk-out-frequency = <12500>;
+ qca,smarteee-tw-us-1g = <24>;
+ adi,phy-output-clock = "125mhz-free-running";
+ };
+ };
+};
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 8edabf4404c2..fbab39e800a6 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -447,7 +447,7 @@ static int find_ethernet_phy(void)
*/
int ft_board_setup(void *fdt, struct bd_info *bd)
{
- int node_phy0, node_phy1, node_phy4;
+ int node_phy, node_phy0, node_phy1, node_phy4;
int ret, phy;
bool enable_phy0 = false, enable_phy1 = false, enable_phy4 = false;
enum board_type board;
@@ -479,6 +479,12 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
return 0;
}
+ // update U-Boot's own unified phy node phy address, if present
+ node_phy = fdt_path_offset(fdt, "/soc/bus@210/ethernet@2188000/mdio/phy");
+ ret = fdt_setprop_u32(fdt, node_phy, "reg", phy);
+ if (ret < 0)
+ pr_err("%s: failed to update unified PHY node address\n", __func__);
+
// update all phy nodes status
node_phy0 = fdt_path_offset(fdt, "/soc/bus@210/ethernet@2188000/mdio/ethernet-phy@0");
ret = fdt_setprop_string(fdt, node_phy0, "status", enable_phy0 ? "okay" : "disabled");
--
2.34.1
[PATCH] tpm-v2: allow algo name to be conigured for pcr_read and pcr_extend
For pcr_read and pcr_extend commands allow the digest algo to be
specified by an additional argument. If not specified it will default to
SHA256 for backwards compatibility.
A follow-on to this could be to extend all PCR banks with the detected
algo when the argument is 'auto'.
Signed-off-by: Tim Harvey
---
cmd/tpm-v2.c | 51 +++-
include/tpm-v2.h | 17
lib/tpm-v2.c | 46 +++
3 files changed, 100 insertions(+), 14 deletions(-)
diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c
index 7e479b9dfe36..52d232c3ea7d 100644
--- a/cmd/tpm-v2.c
+++ b/cmd/tpm-v2.c
@@ -99,11 +99,20 @@ static int do_tpm2_pcr_extend(struct cmd_tbl *cmdtp, int
flag, int argc,
struct tpm_chip_priv *priv;
u32 index = simple_strtoul(argv[1], NULL, 0);
void *digest = map_sysmem(simple_strtoul(argv[2], NULL, 0), 0);
+ int algo_len = TPM2_SHA256_DIGEST_SIZE;
+ int algo = TPM2_ALG_SHA256;
int ret;
u32 rc;
- if (argc != 3)
+ if (argc < 3 || argc > 4)
return CMD_RET_USAGE;
+ if (argc == 4) {
+ algo = tpm2_algo_len(argv[3], _len);
+ if (algo < 0) {
+ printf("Error: invalid algo\n");
+ return CMD_RET_USAGE;
+ }
+ }
ret = get_tpm();
if (ret)
@@ -116,8 +125,12 @@ static int do_tpm2_pcr_extend(struct cmd_tbl *cmdtp, int
flag, int argc,
if (index >= priv->pcr_count)
return -EINVAL;
- rc = tpm2_pcr_extend(dev, index, TPM2_ALG_SHA256, digest,
-TPM2_DIGEST_LEN);
+ rc = tpm2_pcr_extend(dev, index, algo, digest, algo_len);
+ if (!rc) {
+ printf("PCR #%u extended with %d byte %s digest\n", index,
+ algo_len, tpm2_algo_name(algo));
+ print_byte_string(digest, algo_len);
+ }
unmap_sysmem(digest);
@@ -127,6 +140,8 @@ static int do_tpm2_pcr_extend(struct cmd_tbl *cmdtp, int
flag, int argc,
static int do_tpm_pcr_read(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
+ int algo_len = TPM2_SHA256_DIGEST_SIZE;
+ int algo = TPM2_ALG_SHA256;
struct udevice *dev;
struct tpm_chip_priv *priv;
u32 index, rc;
@@ -134,8 +149,15 @@ static int do_tpm_pcr_read(struct cmd_tbl *cmdtp, int
flag, int argc,
void *data;
int ret;
- if (argc != 3)
+ if (argc < 3 || argc > 4)
return CMD_RET_USAGE;
+ if (argc == 4) {
+ algo = tpm2_algo_len(argv[3], _len);
+ if (algo < 0) {
+ printf("Error: invalid algo\n");
+ return CMD_RET_USAGE;
+ }
+ }
ret = get_tpm();
if (ret)
@@ -151,11 +173,12 @@ static int do_tpm_pcr_read(struct cmd_tbl *cmdtp, int
flag, int argc,
data = map_sysmem(simple_strtoul(argv[2], NULL, 0), 0);
- rc = tpm2_pcr_read(dev, index, priv->pcr_select_min, TPM2_ALG_SHA256,
- data, TPM2_DIGEST_LEN, );
+ rc = tpm2_pcr_read(dev, index, priv->pcr_select_min, algo,
+ data, algo_len, );
if (!rc) {
- printf("PCR #%u content (%u known updates):\n", index, updates);
- print_byte_string(data, TPM2_DIGEST_LEN);
+ printf("PCR #%u %s %d byte content (%u known updates):\n",
index,
+ tpm2_algo_name(algo), algo_len, updates);
+ print_byte_string(data, algo_len);
}
unmap_sysmem(data);
@@ -415,14 +438,14 @@ U_BOOT_CMD(tpm2, CONFIG_SYS_MAXARGS, 1, do_tpm, "Issue a
TPMv2.x command",
" is one of:\n"
"* TPM2_RH_LOCKOUT\n"
"* TPM2_RH_PLATFORM\n"
-"pcr_extend \n"
-"Extend PCR # with digest at .\n"
+"pcr_extend []\n"
+"Extend PCR # with digest at with digest_algo.\n"
": index of the PCR\n"
-": address of a 32-byte SHA256 digest\n"
-"pcr_read \n"
-"Read PCR # to memory address .\n"
+": address of digest of digest_algo type (defaults to
SHA256)\n"
+"pcr_read []\n"
+"Read PCR # to memory address with .\n"
": index of the PCR\n"
-": address to store the a 32-byte SHA256 digest\n"
+": address of digest of digest_algo type (defaults to
SHA256)\n"
"get_capability\n"
"Read and display entries indexed by /.\n"
"Values are 4 bytes long and are written at .\n"
diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 33dd103767c4..07d3ca5e6c83 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -965,4 +965,21 @@ u32 tpm2_enable_nvcommits(struct udevice *dev, uint
vendor_cmd,
*/
u32 tpm2_auto_start(struct udevice *dev);
+/**
+ * tpm2_algo_len() - Return an algo value and length given a algorithm name
+ *
+ * @name: algorithm name
+ * @rwlen: pointer to integer to
[PATCH v2] tpm: display warning if using gpio reset with TPM
Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM display a warning that
having a gpio reset on a TPM should not be used for a secure production
device.
TCG TIS spec [1] says:
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the
platform CPU Reset signal such that it complies with the requirements
specified in section 1.2.7 HOST Platform Reset in the PC Client
Implementation Specification for Conventional BIOS."
The reasoning is that you should not be able to toggle a GPIO and reset
the TPM without resetting the CPU as well because if an attacker can
break into your OS via an OS level security flaw they can then reset the
TPM via GPIO and replay the measurements required to unseal keys
that you have otherwise protected.
[1]
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf
Signed-off-by: Tim Harvey
---
v2: change the message to a warning and update commit desc/log
---
drivers/tpm/tpm2_tis_spi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
index de9cf8f21e07..c9c83f6f0fc8 100644
--- a/drivers/tpm/tpm2_tis_spi.c
+++ b/drivers/tpm/tpm2_tis_spi.c
@@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev)
/* legacy reset */
ret = gpio_request_by_name(dev, "gpio-reset", 0,
_gpio, GPIOD_IS_OUT);
- if (ret) {
- log(LOGC_NONE, LOGL_NOTICE,
- "%s: missing reset GPIO\n", __func__);
+ if (ret)
goto init;
- }
log(LOGC_NONE, LOGL_NOTICE,
"%s: gpio-reset is deprecated\n", __func__);
}
+ log(LOGC_NONE, LOGL_WARNING,
+ "%s: TPM gpio reset should not be used on secure production
devices\n",
+ dev->name);
dm_gpio_set_value(_gpio, 1);
mdelay(1);
dm_gpio_set_value(_gpio, 0);
--
2.25.1
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
On Wed, Mar 27, 2024 at 10:06 AM Ilias Apalodimas
wrote:
>
> On Wed, 27 Mar 2024 at 18:32, Tim Harvey wrote:
> >
> > On Wed, Mar 27, 2024 at 8:46 AM Ilias Apalodimas
> > wrote:
> > >
> > > Hi both,
> > >
> > > On Wed, 27 Mar 2024 at 17:22, Eddie James wrote:
> > > >
> > > >
> > > > On 3/26/24 11:15, Tim Harvey wrote:
> > > > > On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
> > > > > wrote:
> > > > >> Hi Tim,
> > > > >>
> > > > >> On Tue, 26 Mar 2024 at 03:15, Tim Harvey
> > > > >> wrote:
> > > > >>> Greetings,
> > > > >>>
> > > > >>> I'm unable to understand why tcg2_platform_get_log is failing to
> > > > >>> read
> > > > >>> a memory region.
> > > > >>>
> > > > >>> For example the following diffs:
> > > > >> I am not really sure what those nodes are supposed to do in sandbox.
> > > > >> Pehaps Eddie remembers.
> > > > >> What exactly are you trying to achieve here? Read the eventlog from
> > > > >> TF-A?
> > > > >>
> > > > > Hi Ilias,
> > > > >
> > > > > I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
> > > > > a tpm on my board but ran into an issue when I couldn't get the
> > > > > memory-region I added for testing to be recognized with the current
> > > > > code in tcg2_platform_get_log().
> > > > >
> > > > > I wonder if an event log should be required for measured boot - it
> > > > > sounds like that was something required for EFI, so I was thinking of
> > > > > submitting the following:
> > > > > commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD ->
> > > > > master-venice)
> > > > > Author: Tim Harvey
> > > > > Date: Tue Mar 26 08:49:07 2024 -0700
> > > > >
> > > > > tpm: allow measured boot without an event log
> > > > >
> > > > > Currently an event log is required for measured boot. Remove this
> > > > > requirement.
> > > > >
> > > > > Signed-off-by: Tim Harvey
> > > > >
> > > > > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > > > > index 68eaaa639f89..994f8089ba34 100644
> > > > > --- a/lib/tpm-v2.c
> > > > > +++ b/lib/tpm-v2.c
> > > > > @@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
> > > > > tcg2_event_log *elog, u32 pcr_index,
> > > > > u32 event_size;
> > > > > u8 *log;
> > > > >
> > > > > - event_size = size + tcg2_event_get_size(digest_list);
> > > > > - if (elog->log_position + event_size > elog->log_size) {
> > > > > - printf("%s: log too large: %u + %u > %u\n", __func__,
> > > > > - elog->log_position, event_size,
> > > > > elog->log_size);
> > > > > - return -ENOBUFS;
> > > > > - }
> > > > > + if (elog->log_size) {
> > > > > + event_size = size + tcg2_event_get_size(digest_list);
> > > > > + if (elog->log_position + event_size > elog->log_size)
> > > > > {
> > > > > + printf("%s: log too large: %u + %u > %u\n",
> > > > > __func__,
> > > > > + elog->log_position, event_size,
> > > > > elog->log_size);
> > > > > + return -ENOBUFS;
> > > > > + }
> > > > >
> > > > > - log = elog->log + elog->log_position;
> > > > > - elog->log_position += event_size;
> > > > > + log = elog->log + elog->log_position;
> > > > > + elog->log_position += event_size;
> > > > >
> > > > > - tcg2_log_append(pcr_index, event_type, digest_list, size,
> > > > > event, log);
> > > > > + tcg2_log_append(pcr_index, event_type, digest_list,
> > > > > size, event, log);
> > > > > + }
> > > > >
> > > > > return 0;
> > > > > }
> > > > > @@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
> > > > > struct tcg2_event_log *elog,
> > > > > return rc;
> > > > >
> > > > > rc = tcg2_log_prepare_buffer(*dev, elog,
> > > > > ignore_existing_log);
> > > > > - if (rc) {
> > > > > + if (rc)
> > > > > tcg2_measurement_term(*dev, elog, true);
> > > > > - return rc;
> > > > > - }
> > > > >
> > > > > rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
> > > > > strlen(version_string) + 1,
> > > > >
> > > > > Would you agree with removing the requirement for the event log?
> > > >
> > > >
> > > > No, the log is required, otherwise it's fairly meaningless work. You
> > > > need the log in your OS to verify the contents of the TPM.
> > >
> > > It's the other way around. You trust the TPM and replay the event log
> > > in memory to verify it's correct.
> > > That being said, I do agree the event log is pretty useful when trying
> > > to understand how and what the platform measured. In any case, I'd
> > > rather fix any issues rather than sidestep them.
> > >
> >
> > Why do you need a log to verify the contents of the TPM? If the PCR's
> > are not correct you can't get your secrets from the TPM and if they
> > are you can regardless of a log. Where
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
On Wed, 27 Mar 2024 at 20:47, Tim Harvey wrote:
>
> On Wed, Mar 27, 2024 at 10:26 AM Ilias Apalodimas
> wrote:
> >
> > [...]
> >
> > > >
> > > > missing an invalid property?
> > > >
> > > > I deal with users all the time that think things like that are
> > > > 'errors' and contact tech support. In this case its not an error
> > > > because there is no gpio reset in the official dt-bindings for the tpm
> > > > and its generally considered bad form to add non official properties.
> > > >
> > > > And from what your explaining we shouldn't have a GPIO connected to
> > > > the TPM so perhaps we should remove the reset completely and perhaps
> > > > even spit out a warning if present:
> > > > ignore Invalid DT property gpio reset to conform with the TCG
> > > > specification
> > >
> > > We should, but those changes predate me being appointed as a TPM
> > > maintainer. If I had to guess, I would say that was added for TPM that
> > > are connected on an external SPI bus (e.g the RPI).
> > > So what about not printing the error message, keeping the code so we
> > > won't break 'test' devices, and print a warning message like "This
> > > shouldn't be used on secure production devices"?
> >
> > Unless we can get a list of the devices that *currently* use it. If
> > they aren't that many I am fine getting rid of the reset overall (and
> > I can test it on the RPI4)
> >
>
> Adding Miquel who authored commit a174f0001f592 ("tpm2: tis_spi: add
> the possibility to reset the chip with a gpio"):
> On some designs, the reset line could not be connected to the SoC reset
> line, in this case, request the GPIO and ensure the chip gets reset.
>
> Adding Jorge who athoried commit cc5afabc9d329 ("drivers: tpm2: update
> reset gpio semantics"):
> Use the more generic reset-gpios property name.
>
> I looked through all dts in U-Boot matching 'tpm' as well as Linux to
> see who's using it:
> Adding Adam who has a 'reset-gpios' in
> arch/arm/dts/imx8mp-beacon-kit.dts (and somehow snuck it in upstream
> as well)
> Adding Rasmus who has a suspicious 'regulatot-tpm0-rst' (but no gpio
> reset in tpm) in arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dtso
>
> As there is at least one board that clearly uses a gpio reset for the
> TPM in the tpm node I think we leave the tpm reset support, eliminate
> the warning if its missing and print a message like "Warning: TPM gpio
> reset should not be used on secure production device"
>
> I'll send a v2 of my patch for review
Thanks. It's a bit unfortunate we ended up with broken devices, but if
we remove the GPIO reset I am pretty sure the side effect will be
having an unusable TPM after warm resets since PCRs will retain the
pre-reboot values...
/Ilias
>
> Best Regards,
>
> Tim
> [1]
> https://patchwork.ozlabs.org/project/uboot/patch/20240321180219.1039622-1-thar...@gateworks.com/
>
> > Cheers
> > /Ilias
> > >
> > > Regards
> > > /Ilias
> > > >
> > > > Best regards,
> > > >
> > > > Tim
> > > >
> > > > >
> > > > > Thanks
> > > > > /Ilias
> > > > > >
> > > > > > Best Regards,
> > > > > >
> > > > > > Tim
> > > > > > [1]
> > > > > > https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf
> > > > > >
> > > > > >
> > > > > > > Thanks
> > > > > > > /Ilias
> > > > > > > >
> > > > > > > > Signed-off-by: Tim Harvey
> > > > > > > > ---
> > > > > > > > drivers/tpm/tpm2_tis_spi.c | 8
> > > > > > > > 1 file changed, 4 insertions(+), 4 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/tpm/tpm2_tis_spi.c
> > > > > > > > b/drivers/tpm/tpm2_tis_spi.c
> > > > > > > > index de9cf8f21e07..944540f7a711 100644
> > > > > > > > --- a/drivers/tpm/tpm2_tis_spi.c
> > > > > > > > +++ b/drivers/tpm/tpm2_tis_spi.c
> > > > > > > > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct
> > > > > > > > udevice *dev)
> > > > > > > > /* legacy reset */
> > > > > > > > ret = gpio_request_by_name(dev,
> > > > > > > > "gpio-reset", 0,
> > > > > > > >_gpio,
> > > > > > > > GPIOD_IS_OUT);
> > > > > > > > - if (ret) {
> > > > > > > > - log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > > - "%s: missing reset GPIO\n",
> > > > > > > > __func__);
> > > > > > > > + if (ret)
> > > > > > > > goto init;
> > > > > > > > - }
> > > > > > > > log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > > "%s: gpio-reset is deprecated\n",
> > > > > > > > __func__);
> > > > > > > > }
> > > > > > > > + log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > > + "%s: performing 1ms reset on %s:%d\n",
> > > > > > > > dev->name,
> > > > > > > > + reset_gpio.dev->name, reset_gpio.offset);
> > > > > > >
Re: [PATCH] mx6cuboxi: fix ethernet after synchronise device-tree
Hi Christian,
On Wed, Mar 27, 2024 at 4:29 PM Fabio Estevam wrote:
> Please make these changes in a new imx6qdl-sr-som-u-boot.dtsi file instead.
I took Josua's patch and modified it a bit.
Does the attached patch fix Ethernet?
From 24f57c3cd8b1a2b113bcffad26e2bb1b9b582e35 Mon Sep 17 00:00:00 2001
From: Josua Mayer
Date: Wed, 27 Mar 2024 17:58:47 -0300
Subject: [PATCH] mx6cuboxi: Fix Ethernet after DT sync with Linux
The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
addresses. U-Boot needs to auto-detect which phy is actually present,
and at which address it is responding.
Auto-detection from multiple phy nodes specified in device-tree does not
currently work correct. As a work-around merge all three possible phys
into one node with the special address 0x which indicates to the
generic phy driver to probe all addresses.
Also fixup this fake address before booting Linux, *if* booting with
U-Boot's internal dtb.
Signed-off-by: Josua Mayer
[fabio: Added the changes to imx6qdl-sr-som-u-boot.dtsi.]
Signed-off-by: Fabio Estevam
---
...qdl-hummingboard2-emmc-som-v15-u-boot.dtsi | 1 +
arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi | 76 +++
board/solidrun/mx6cuboxi/mx6cuboxi.c | 8 +-
3 files changed, 84 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
index e9b188ed6587..358cf8abc4ff 100644
--- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include "imx6qdl-u-boot.dtsi"
+#include "imx6qdl-sr-som-u-boot.dtsi"
/ {
board-detect {
diff --git a/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
new file mode 100644
index ..3f2d92be7061
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_microsom_enet_ar8035>;
+ phy-handle = <>;
+ phy-mode = "rgmii-id";
+
+ /*
+ * The PHY seems to require a long-enough reset duration to avoid
+ * some rare issues where the PHY gets stuck in an inconsistent and
+ * non-functional state at boot-up. 10ms proved to be fine .
+ */
+ phy-reset-duration = <10>;
+ phy-reset-gpios = < 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+
+ phy: ethernet-phy@0 {
+ /*
+ * The PHY can appear either:
+ * - AR8035: at address 0 or 4
+ * - ADIN1300: at address 1
+ * Actual address being detected at runtime.
+ */
+ reg = <0x>;
+ qca,clk-out-frequency = <12500>;
+ qca,smarteee-tw-us-1g = <24>;
+ adi,phy-output-clock = "125mhz-free-running";
+ };
+ };
+};
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 8edabf4404c2..fbab39e800a6 100644
---
Re: [PATCH] mx6cuboxi: fix ethernet after synchronise device-tree
Hi Christian, On Wed, Mar 27, 2024 at 9:06 AM Josua Mayer wrote: > > Cc: christian.gmei...@gmail.com > > Hi Christian, > > please take a look at this patch, I suspect it will (hack-)fix your > ethernet issue. > > Unfortunately I had no time to revisit this yet and implement a correct > solution. > > arch/arm/dts/imx6qdl-sr-som.dtsi | 30 +--- > > board/solidrun/mx6cuboxi/mx6cuboxi.c | 6 +- > > 2 files changed, 14 insertions(+), 22 deletions(-) > > > > diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi > > b/arch/arm/dts/imx6qdl-sr-som.dtsi > > index ce543e325c..2d7cbc26b3 100644 > > ---_a/arch/arm/dts/imx6qdl-sr-som.dtsi > > +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi Please make these changes in a new imx6qdl-sr-som-u-boot.dtsi file instead. This way, the changes will not get lost after a new sync with Linux or if OF_UPSTREAM is used.
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
On Wed, Mar 27, 2024 at 10:26 AM Ilias Apalodimas
wrote:
>
> [...]
>
> > >
> > > missing an invalid property?
> > >
> > > I deal with users all the time that think things like that are
> > > 'errors' and contact tech support. In this case its not an error
> > > because there is no gpio reset in the official dt-bindings for the tpm
> > > and its generally considered bad form to add non official properties.
> > >
> > > And from what your explaining we shouldn't have a GPIO connected to
> > > the TPM so perhaps we should remove the reset completely and perhaps
> > > even spit out a warning if present:
> > > ignore Invalid DT property gpio reset to conform with the TCG
> > > specification
> >
> > We should, but those changes predate me being appointed as a TPM
> > maintainer. If I had to guess, I would say that was added for TPM that
> > are connected on an external SPI bus (e.g the RPI).
> > So what about not printing the error message, keeping the code so we
> > won't break 'test' devices, and print a warning message like "This
> > shouldn't be used on secure production devices"?
>
> Unless we can get a list of the devices that *currently* use it. If
> they aren't that many I am fine getting rid of the reset overall (and
> I can test it on the RPI4)
>
Adding Miquel who authored commit a174f0001f592 ("tpm2: tis_spi: add
the possibility to reset the chip with a gpio"):
On some designs, the reset line could not be connected to the SoC reset
line, in this case, request the GPIO and ensure the chip gets reset.
Adding Jorge who athoried commit cc5afabc9d329 ("drivers: tpm2: update
reset gpio semantics"):
Use the more generic reset-gpios property name.
I looked through all dts in U-Boot matching 'tpm' as well as Linux to
see who's using it:
Adding Adam who has a 'reset-gpios' in
arch/arm/dts/imx8mp-beacon-kit.dts (and somehow snuck it in upstream
as well)
Adding Rasmus who has a suspicious 'regulatot-tpm0-rst' (but no gpio
reset in tpm) in arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dtso
As there is at least one board that clearly uses a gpio reset for the
TPM in the tpm node I think we leave the tpm reset support, eliminate
the warning if its missing and print a message like "Warning: TPM gpio
reset should not be used on secure production device"
I'll send a v2 of my patch for review
Best Regards,
Tim
[1]
https://patchwork.ozlabs.org/project/uboot/patch/20240321180219.1039622-1-thar...@gateworks.com/
> Cheers
> /Ilias
> >
> > Regards
> > /Ilias
> > >
> > > Best regards,
> > >
> > > Tim
> > >
> > > >
> > > > Thanks
> > > > /Ilias
> > > > >
> > > > > Best Regards,
> > > > >
> > > > > Tim
> > > > > [1]
> > > > > https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf
> > > > >
> > > > >
> > > > > > Thanks
> > > > > > /Ilias
> > > > > > >
> > > > > > > Signed-off-by: Tim Harvey
> > > > > > > ---
> > > > > > > drivers/tpm/tpm2_tis_spi.c | 8
> > > > > > > 1 file changed, 4 insertions(+), 4 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/tpm/tpm2_tis_spi.c
> > > > > > > b/drivers/tpm/tpm2_tis_spi.c
> > > > > > > index de9cf8f21e07..944540f7a711 100644
> > > > > > > --- a/drivers/tpm/tpm2_tis_spi.c
> > > > > > > +++ b/drivers/tpm/tpm2_tis_spi.c
> > > > > > > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice
> > > > > > > *dev)
> > > > > > > /* legacy reset */
> > > > > > > ret = gpio_request_by_name(dev,
> > > > > > > "gpio-reset", 0,
> > > > > > >_gpio,
> > > > > > > GPIOD_IS_OUT);
> > > > > > > - if (ret) {
> > > > > > > - log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > - "%s: missing reset GPIO\n",
> > > > > > > __func__);
> > > > > > > + if (ret)
> > > > > > > goto init;
> > > > > > > - }
> > > > > > > log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > "%s: gpio-reset is deprecated\n",
> > > > > > > __func__);
> > > > > > > }
> > > > > > > + log(LOGC_NONE, LOGL_NOTICE,
> > > > > > > + "%s: performing 1ms reset on %s:%d\n",
> > > > > > > dev->name,
> > > > > > > + reset_gpio.dev->name, reset_gpio.offset);
> > > > > > > dm_gpio_set_value(_gpio, 1);
> > > > > > > mdelay(1);
> > > > > > > dm_gpio_set_value(_gpio, 0);
> > > > > > > --
> > > > > > > 2.25.1
> > > > > > >
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
[...]
> >
> > missing an invalid property?
> >
> > I deal with users all the time that think things like that are
> > 'errors' and contact tech support. In this case its not an error
> > because there is no gpio reset in the official dt-bindings for the tpm
> > and its generally considered bad form to add non official properties.
> >
> > And from what your explaining we shouldn't have a GPIO connected to
> > the TPM so perhaps we should remove the reset completely and perhaps
> > even spit out a warning if present:
> > ignore Invalid DT property gpio reset to conform with the TCG specification
>
> We should, but those changes predate me being appointed as a TPM
> maintainer. If I had to guess, I would say that was added for TPM that
> are connected on an external SPI bus (e.g the RPI).
> So what about not printing the error message, keeping the code so we
> won't break 'test' devices, and print a warning message like "This
> shouldn't be used on secure production devices"?
Unless we can get a list of the devices that *currently* use it. If
they aren't that many I am fine getting rid of the reset overall (and
I can test it on the RPI4)
Cheers
/Ilias
>
> Regards
> /Ilias
> >
> > Best regards,
> >
> > Tim
> >
> > >
> > > Thanks
> > > /Ilias
> > > >
> > > > Best Regards,
> > > >
> > > > Tim
> > > > [1]
> > > > https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf
> > > >
> > > >
> > > > > Thanks
> > > > > /Ilias
> > > > > >
> > > > > > Signed-off-by: Tim Harvey
> > > > > > ---
> > > > > > drivers/tpm/tpm2_tis_spi.c | 8
> > > > > > 1 file changed, 4 insertions(+), 4 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
> > > > > > index de9cf8f21e07..944540f7a711 100644
> > > > > > --- a/drivers/tpm/tpm2_tis_spi.c
> > > > > > +++ b/drivers/tpm/tpm2_tis_spi.c
> > > > > > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice
> > > > > > *dev)
> > > > > > /* legacy reset */
> > > > > > ret = gpio_request_by_name(dev,
> > > > > > "gpio-reset", 0,
> > > > > >_gpio,
> > > > > > GPIOD_IS_OUT);
> > > > > > - if (ret) {
> > > > > > - log(LOGC_NONE, LOGL_NOTICE,
> > > > > > - "%s: missing reset GPIO\n",
> > > > > > __func__);
> > > > > > + if (ret)
> > > > > > goto init;
> > > > > > - }
> > > > > > log(LOGC_NONE, LOGL_NOTICE,
> > > > > > "%s: gpio-reset is deprecated\n",
> > > > > > __func__);
> > > > > > }
> > > > > > + log(LOGC_NONE, LOGL_NOTICE,
> > > > > > + "%s: performing 1ms reset on %s:%d\n",
> > > > > > dev->name,
> > > > > > + reset_gpio.dev->name, reset_gpio.offset);
> > > > > > dm_gpio_set_value(_gpio, 1);
> > > > > > mdelay(1);
> > > > > > dm_gpio_set_value(_gpio, 0);
> > > > > > --
> > > > > > 2.25.1
> > > > > >
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
On Wed, 27 Mar 2024 at 18:49, Tim Harvey wrote:
>
> On Wed, Mar 27, 2024 at 9:16 AM Ilias Apalodimas
> wrote:
> >
> > Hi Tim,
> >
> > On Wed, 27 Mar 2024 at 17:29, Tim Harvey wrote:
> > >
> > > On Wed, Mar 27, 2024 at 7:44 AM Ilias Apalodimas
> > > wrote:
> > > >
> > > > Hi Tim,
> > > >
> > > > On Thu, 21 Mar 2024 at 20:02, Tim Harvey wrote:
> > > > >
> > > > > Instead of displaying what looks like an error message if a
> > > > > gpio-reset dt prop is missing for a TPM dipslay a more
> > > > > informative message about resetting the TPM if the gpio is found:
> > > > >
> > > > > before:
> > > > > tpm_tis_spi_probe: missing reset GPIO
> > > > >
> > > > > after:
> > > > > tpm@0: performing 1ms reset on gpio@3021:12
> > > > >
> > > > > Note that the reset dt binding prop used in this driver is not
> > > > > dt-compliant; it does not exist in the Linux dt-bindings documentation
> > > > > and the reset is not done by the Linux driver.
> > > >
> > > > Probably for a good reason. You aren't supposed to be able to reset a
> > > > TPM without resetting the CPUI as well no?
> > >
> > > Hi Ilias,
> > >
> > > Could you clarify what you know about TPM reset? We use the ATTPM20P
> > > [1] which states in the datasheet under the reset pin: "To be
> > > compliant with TCG requirements, this pin needs to be tied to system
> > > reset. TPM_Init is indicated by asserting this pin."
> >
> > In short, you shouldn't be able to toggle a GPIO and reset the TPM
> > without resetting the CPU as well.
> > An attacker could boot -> log into the OS -> reset the TPM -> replay
> > measurements and unseal keys that he shouldn't.
>
> I suppose that makes sense. So consider someone gets into your OS and
> also has access to your board and electrically isolates the TPM reset
> from POR# (cut the trace) then with a probe resets the TPM? At least
> in that case they have to have physical presence as well so we should
> connect TPM RST# to POR# to not make it easier on them.
Yes, physical attacks are completely different (and we also have TPM
interposer attacks, which can sniff secrets).
>
> I'm always wanting to allow GPIO access to various chip resets to deal
> with issues discovered down the line that require a full chip level
> reset - probably not the right thing to do in the case of a security
> device!
>
> Thanks for explaining.
You're welcome and yes being able to reset the TPM without bringing
the CPU down as well is not a good idea
>
> I'm still learning about the TPM capabilities. If using the TPM to
> store a key that is used for FDE you can use 'tpm2_unseal -c $OBJECT
> -p pcr:sha1:0,1 -o fs.key' to get your key. There must be a concept of
> re-sealing this object so that it can only be unsealed again with a
> power cycle or something?
You don't need to reseal it. The spec defines separator events that
can be used to protect the key leaking.
Once you unseal the key and decrypt your rootfs, you can do something
along the lines of
for i in {0..7}; do
tpm2_pcrextend
$i:sha256=;
done
Any attempts to read the key after the separator event will fail since
PCRs won't match the sealing policy anymore.
>
> >
> > >
> > > Our boards have a resistor loading option which routes the TPM RST# to
> > > an SoC GPIO or alternately to a POR# (hardware power on reset provided
> > > by power supply and/or PMIC). Could you point me to where in the spec
> > > it explains what the TPM reset should be connected to?
> >
> > I am aware of the the TCG TIS spec [0] which says
> > "The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the platform
> > CPU
> > Reset signal such that it complies with the requirements specified in
> > section 1.2.7 HOST
> > Platform Reset in the PC Client Implementation Specification for
> > Conventional BIOS."
> > There might be other TCG specs defining this as well.
> >
> > [0]
> > https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf
> >
>
> Thanks!
>
> > >
> > > > That being said, printing that the TPM was reset is pointless imho.
> > > > OTOH the existing error message at least points out a potential
> > > > problem in the DT.
> > > >
> > >
> > > I'm not sure if you are NAK'ing this patch or asking me to change it.
> > >
> > > Displaying a 'missing GPIO' message is not helpful when there is no
> > > GPIO in the dt bindings to begin with.
> >
> > I am not NAKing it. But isn't that message more useful than printing
> > the TPM did a reset? At least you get a hint of something that's
> > missing from your DT
>
> missing an invalid property?
>
> I deal with users all the time that think things like that are
> 'errors' and contact tech support. In this case its not an error
> because there is no gpio reset in the official dt-bindings for the tpm
> and its generally considered bad form to add non official properties.
>
> And from what your explaining we shouldn't have a GPIO
[PATCH] net: ti: am65-cpsw-nuss: Don't crash in am65_cpsw_phy_init()
From: Alexander Sverdlin
am65_cpsw_ofdata_parse_phy() tries to handle the case when PHY is not
specified in DT gracefully:
am65_cpsw_nuss_port ethernet@800port@1: can't parse phy-handle port 1 (-2)
am65_cpsw_mdio_init() is turn is prepared for this, checks
if priv->has_phy == 0 and bails out (leaving cpsw_common->bus == NULL).
am65_cpsw_phy_init() however is not prepared for this and calls
phy_connect(cpsw_common->bus, ...) unconditionally, which leads to:
"Synchronous Abort" handler, esr 0x860d, far 0x0
elr: 808ab000 lr : 8083bde4 (reloc)
where lr points to the instruction right after bus->read() in get_phy_id().
Fixes: 9d0dca1199d1 ("net: ethernet: ti: Introduce am654 gigabit eth switch
subsystem driver")
Signed-off-by: Alexander Sverdlin
---
drivers/net/ti/am65-cpsw-nuss.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 6da018c0f9d5..d1e452b6b43c 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -722,6 +722,9 @@ static int am65_cpsw_phy_init(struct udevice *dev)
u32 supported = PHY_GBIT_FEATURES;
int ret;
+ if (!priv->has_phy || !cpsw_common->bus)
+ return 0;
+
phydev = phy_connect(cpsw_common->bus,
priv->phy_addr,
priv->dev,
--
2.44.0
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
On Wed, 27 Mar 2024 at 18:32, Tim Harvey wrote:
>
> On Wed, Mar 27, 2024 at 8:46 AM Ilias Apalodimas
> wrote:
> >
> > Hi both,
> >
> > On Wed, 27 Mar 2024 at 17:22, Eddie James wrote:
> > >
> > >
> > > On 3/26/24 11:15, Tim Harvey wrote:
> > > > On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
> > > > wrote:
> > > >> Hi Tim,
> > > >>
> > > >> On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
> > > >>> Greetings,
> > > >>>
> > > >>> I'm unable to understand why tcg2_platform_get_log is failing to read
> > > >>> a memory region.
> > > >>>
> > > >>> For example the following diffs:
> > > >> I am not really sure what those nodes are supposed to do in sandbox.
> > > >> Pehaps Eddie remembers.
> > > >> What exactly are you trying to achieve here? Read the eventlog from
> > > >> TF-A?
> > > >>
> > > > Hi Ilias,
> > > >
> > > > I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
> > > > a tpm on my board but ran into an issue when I couldn't get the
> > > > memory-region I added for testing to be recognized with the current
> > > > code in tcg2_platform_get_log().
> > > >
> > > > I wonder if an event log should be required for measured boot - it
> > > > sounds like that was something required for EFI, so I was thinking of
> > > > submitting the following:
> > > > commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
> > > > Author: Tim Harvey
> > > > Date: Tue Mar 26 08:49:07 2024 -0700
> > > >
> > > > tpm: allow measured boot without an event log
> > > >
> > > > Currently an event log is required for measured boot. Remove this
> > > > requirement.
> > > >
> > > > Signed-off-by: Tim Harvey
> > > >
> > > > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > > > index 68eaaa639f89..994f8089ba34 100644
> > > > --- a/lib/tpm-v2.c
> > > > +++ b/lib/tpm-v2.c
> > > > @@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
> > > > tcg2_event_log *elog, u32 pcr_index,
> > > > u32 event_size;
> > > > u8 *log;
> > > >
> > > > - event_size = size + tcg2_event_get_size(digest_list);
> > > > - if (elog->log_position + event_size > elog->log_size) {
> > > > - printf("%s: log too large: %u + %u > %u\n", __func__,
> > > > - elog->log_position, event_size, elog->log_size);
> > > > - return -ENOBUFS;
> > > > - }
> > > > + if (elog->log_size) {
> > > > + event_size = size + tcg2_event_get_size(digest_list);
> > > > + if (elog->log_position + event_size > elog->log_size) {
> > > > + printf("%s: log too large: %u + %u > %u\n",
> > > > __func__,
> > > > + elog->log_position, event_size,
> > > > elog->log_size);
> > > > + return -ENOBUFS;
> > > > + }
> > > >
> > > > - log = elog->log + elog->log_position;
> > > > - elog->log_position += event_size;
> > > > + log = elog->log + elog->log_position;
> > > > + elog->log_position += event_size;
> > > >
> > > > - tcg2_log_append(pcr_index, event_type, digest_list, size,
> > > > event, log);
> > > > + tcg2_log_append(pcr_index, event_type, digest_list,
> > > > size, event, log);
> > > > + }
> > > >
> > > > return 0;
> > > > }
> > > > @@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
> > > > struct tcg2_event_log *elog,
> > > > return rc;
> > > >
> > > > rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
> > > > - if (rc) {
> > > > + if (rc)
> > > > tcg2_measurement_term(*dev, elog, true);
> > > > - return rc;
> > > > - }
> > > >
> > > > rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
> > > > strlen(version_string) + 1,
> > > >
> > > > Would you agree with removing the requirement for the event log?
> > >
> > >
> > > No, the log is required, otherwise it's fairly meaningless work. You
> > > need the log in your OS to verify the contents of the TPM.
> >
> > It's the other way around. You trust the TPM and replay the event log
> > in memory to verify it's correct.
> > That being said, I do agree the event log is pretty useful when trying
> > to understand how and what the platform measured. In any case, I'd
> > rather fix any issues rather than sidestep them.
> >
>
> Why do you need a log to verify the contents of the TPM? If the PCR's
> are not correct you can't get your secrets from the TPM and if they
> are you can regardless of a log. Where is this log requirement in the
> TCG specification?
Yes, as I said you *validate* the eventlog by looking at the TPM PCRs,
not the other way around.
The problem with the TCG spec is
- EFI_TCG2_PROTOCOL.GetEventLog can only returns either EFI_SUCCESS or
EFI_INVALID_PARAMETER. There's no EFI_UNSUPPORTED
- EFI_TCG2_PROTOCOL.HashLogExtendEvent has a flag
[PATCH] mx6cuboxi: Do not print devicetree model
The mx6cuboxi_defconfig target supports several board variants. All of these variants use the hummingboard devicetree in U-Boot. Currently, the devicetree model as well as the board variant name are shown: U-Boot 2024.04-rc5-3-g774ec4fda8 (Mar 27 2024 - 16:48:35 +0100) ... Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc) Board: MX6 Cubox-i ... Printing the devicetree model that is used internally by U-Boot may confuse users. Unselect the CONFIG_DISPLAY_BOARDINFO option so that only the board name is printed instead. Signed-off-by: Fabio Estevam --- configs/mx6cuboxi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 27ceb22599a6..e3aba715aa58 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" CONFIG_SYS_PBSIZE=532 +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_FS_EXT4=y -- 2.34.1
Re: [PATCH] mx6cuboxi: fix ethernet after synchronise device-tree
Am 27.03.24 um 16:55 schrieb Christian Gmeiner:
> Hi Josua
>
>>> Hi Josua
>>>
>>> My bisect showed me that after a device-tree sync the ethernet broke.
>>>
please take a look at this patch, I suspect it will (hack-)fix your
ethernet issue.
>>> Yes.. it fixes the problem I am seeing.
>>>
Unfortunately I had no time to revisit this yet and implement a correct
solution.
>>> Would it be okay for you if I look into a proper solution?
>> Sure. I am swamped by other products at the moment.
>>
>> However I will provide a rough overview what needs to be done:
>>
>> Background: i.MX6 SoMs originally had a an atheros phy at unstable address,
>> either 0 or 4 depending on electrical noise on floating configuration
>> signals.
>>
> Would it be possible to set those configuration signals from the MX6
> to a defined state and
> then toggle the PHY reset , to force correct PHY address?
There is no cpu control over the signals responsible for phy address.
>
>> Linux had solved this by placing 2 phy nodes in device-tree.
>> During boot the kernel would attempt in order to probe the phys,
>> then link the successful one to the ethernet netdev.
>> As a side-effect there is always an error in the kernel log for one of the
>> addresses.
>>
>> U-Boot had something similar in that with a special address (I think 0xff)
>> in device-tree, the code will probe mdio bus for all addresses, but only
>> for a single phy node in dts.
>>
>> With release of SoM 2.0 we changed to an analog devices phy at address 1,
>> which most importantly uses a different driver, and requires a different
>> description
>> in device-tree.
>>
>> When adding this new phy, as a third node in device-tree, kernel maintainers
>> requested a better solution, and we got u-boot to runtime patch dtb to update
>> status properties of the dtb for linux, after probing mdio bus for phys.
>>
> Got it.
>
>> Now - what u-boot needs to do is probe the mdio bus, and then runtime-patch
>> its own DTB.
>> Either with status properties, or for adding the phy-handle property (not
>> sure which method will work).
>>
> We could patch DTB in SPL for U-Boot proper but doing a mdio scan in
> SPL looks like a lot of work.
In SPL I agree this would be quite painful.
Maybe it can be done in u-boot proper, at the right moment.
We basically need to intersept the place where ethernet (controller?) driver
is looking for the phy-handle property or probing a phy.
Maybe there is already a call-back for board-specific code,
or one could be added.
> Do
> you know if there is a pull up/down resistor etc. that I could use to
> detect pre SoM 2.0 and SoM 2.0?
>
> Is this what board_type() does?
> Is HummingBoard2 == SoM 2.0?
No, this is carrier-board detection.
For the SoM we have nothing.
PHY mdio address is actually the best indication we have.
>
>> This somehow has to happen after probing mdio driver, but before probing
>> ethernet driver.
>>
>>> I have a
>>> handful of such devices here
>>> that are already or will be used in a CI farm so I am interested in
>>> using the latest U-Boot for them.
>>>
sincerely
Josua Mayer
Am 28.07.22 um 09:08 schrieb Josua Mayer:
> Please hold off merging this patch until someone tested it, I can not do
> so this week.
> @Tom Can you confirm if this fixes the networking on your Cubox?
> Also note that the phy-handle property may or may not be required, I am
> not sure.
>
> sincerely
> Josua Mayer
>
> On Thu, Jul 28, 2022 at 7:05 AM Josua Mayer wrote:
>
> The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
> addresses. U-Boot needs to auto-detect which phy is actually present,
> and at which address it is responding.
>
> Auto-detection from multiple phy nodes specified in device-tree does
> not
> currently work correct. As a work-around merge all three possible phys
> into one node with the special address 0x which indicates to
> the
> generic phy driver to probe all addresses.
> Also fixup this fake address before booting Linux, *if* booting with
> U-Boot's internal dtb.
>
> Signed-off-by: Josua Mayer
> Fixes: d0399a46e7cd
> ---
> arch/arm/dts/imx6qdl-sr-som.dtsi | 30
> +---
> board/solidrun/mx6cuboxi/mx6cuboxi.c | 6 +-
> 2 files changed, 14 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi
> b/arch/arm/dts/imx6qdl-sr-som.dtsi
> index ce543e325c..2d7cbc26b3 100644
> ---_a/arch/arm/dts/imx6qdl-sr-som.dtsi
> +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi
> @@ -53,6 +53,7 @@
> {
> pinctrl-names = "default";
> pinctrl-0 = <_microsom_enet_ar8035>;
> + phy-handle = <>;
> phy-mode = "rgmii-id";
>
> /*
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
On Wed, Mar 27, 2024 at 9:16 AM Ilias Apalodimas wrote: > > Hi Tim, > > On Wed, 27 Mar 2024 at 17:29, Tim Harvey wrote: > > > > On Wed, Mar 27, 2024 at 7:44 AM Ilias Apalodimas > > wrote: > > > > > > Hi Tim, > > > > > > On Thu, 21 Mar 2024 at 20:02, Tim Harvey wrote: > > > > > > > > Instead of displaying what looks like an error message if a > > > > gpio-reset dt prop is missing for a TPM dipslay a more > > > > informative message about resetting the TPM if the gpio is found: > > > > > > > > before: > > > > tpm_tis_spi_probe: missing reset GPIO > > > > > > > > after: > > > > tpm@0: performing 1ms reset on gpio@3021:12 > > > > > > > > Note that the reset dt binding prop used in this driver is not > > > > dt-compliant; it does not exist in the Linux dt-bindings documentation > > > > and the reset is not done by the Linux driver. > > > > > > Probably for a good reason. You aren't supposed to be able to reset a > > > TPM without resetting the CPUI as well no? > > > > Hi Ilias, > > > > Could you clarify what you know about TPM reset? We use the ATTPM20P > > [1] which states in the datasheet under the reset pin: "To be > > compliant with TCG requirements, this pin needs to be tied to system > > reset. TPM_Init is indicated by asserting this pin." > > In short, you shouldn't be able to toggle a GPIO and reset the TPM > without resetting the CPU as well. > An attacker could boot -> log into the OS -> reset the TPM -> replay > measurements and unseal keys that he shouldn't. I suppose that makes sense. So consider someone gets into your OS and also has access to your board and electrically isolates the TPM reset from POR# (cut the trace) then with a probe resets the TPM? At least in that case they have to have physical presence as well so we should connect TPM RST# to POR# to not make it easier on them. I'm always wanting to allow GPIO access to various chip resets to deal with issues discovered down the line that require a full chip level reset - probably not the right thing to do in the case of a security device! Thanks for explaining. I'm still learning about the TPM capabilities. If using the TPM to store a key that is used for FDE you can use 'tpm2_unseal -c $OBJECT -p pcr:sha1:0,1 -o fs.key' to get your key. There must be a concept of re-sealing this object so that it can only be unsealed again with a power cycle or something? > > > > > Our boards have a resistor loading option which routes the TPM RST# to > > an SoC GPIO or alternately to a POR# (hardware power on reset provided > > by power supply and/or PMIC). Could you point me to where in the spec > > it explains what the TPM reset should be connected to? > > I am aware of the the TCG TIS spec [0] which says > "The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the platform CPU > Reset signal such that it complies with the requirements specified in > section 1.2.7 HOST > Platform Reset in the PC Client Implementation Specification for > Conventional BIOS." > There might be other TCG specs defining this as well. > > [0] > https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf > Thanks! > > > > > That being said, printing that the TPM was reset is pointless imho. > > > OTOH the existing error message at least points out a potential > > > problem in the DT. > > > > > > > I'm not sure if you are NAK'ing this patch or asking me to change it. > > > > Displaying a 'missing GPIO' message is not helpful when there is no > > GPIO in the dt bindings to begin with. > > I am not NAKing it. But isn't that message more useful than printing > the TPM did a reset? At least you get a hint of something that's > missing from your DT missing an invalid property? I deal with users all the time that think things like that are 'errors' and contact tech support. In this case its not an error because there is no gpio reset in the official dt-bindings for the tpm and its generally considered bad form to add non official properties. And from what your explaining we shouldn't have a GPIO connected to the TPM so perhaps we should remove the reset completely and perhaps even spit out a warning if present: ignore Invalid DT property gpio reset to conform with the TCG specificaiton Best regards, Tim > > Thanks > /Ilias > > > > Best Regards, > > > > Tim > > [1] > > https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf > > > > > > > Thanks > > > /Ilias > > > > > > > > Signed-off-by: Tim Harvey > > > > --- > > > > drivers/tpm/tpm2_tis_spi.c | 8 > > > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c > > > > index de9cf8f21e07..944540f7a711 100644 > > > > --- a/drivers/tpm/tpm2_tis_spi.c > > > > +++ b/drivers/tpm/tpm2_tis_spi.c > > > > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev) > > > >
Re: [PATCH] mx6cuboxi: Convert to watchdog driver model
On 2024-03-27 14:18, Fabio Estevam wrote:
> Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
> the 'reset' command in U-Boot to not cause a board reset.
>
> Fix it by switching to the watchdog driver model via sysreset, which
> is the preferred method for implementing the watchdog reset.
>
> Signed-off-by: Fabio Estevam
> ---
> Christian,
>
> Can you test this, please?
>
Sure.
Before the patch:
U-Boot 2024.04-rc5-3-g774ec4fda8 (Mar 27 2024 - 16:48:35 +0100)
CPU: Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 36C
Reset cause: POR
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
Board: MX6 Cubox-i
DRAM: 2 GiB
Core: 82 devices, 17 uclasses, devicetree: fit
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default
environment
In:serial
Out: serial
Err: serial
Net: eth0: ethernet@2188000
Hit any key to stop autoboot: 0
=>
=> reset
resetting ...
=>
=>
=> reset
resetting ...
=>
=>
After the patch:
U-Boot 2024.04-rc5-3-g3988fdb94c (Mar 27 2024 - 17:00:03 +0100)
CPU: Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 36C
Reset cause: POR
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
Board: MX6 Cubox-i
DRAM: 2 GiB
Core: 84 devices, 19 uclasses, devicetree: fit
WDT: Started watchdog@20bc000 with servicing every 1000ms (128s
timeout)
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default
environment
In:serial
Out: serial
Err: serial
Net: eth0: ethernet@2188000
Hit any key to stop autoboot: 0
=>
=>
=> reset
resetting ...
U-Boot SPL 2024.04-rc5-3-g3988fdb94c (Mar 27 2024 - 17:00:03 +0100)
WDT: Started watchdog@20bc000 with servicing every 1000ms (128s
timeout)
...
Tested-by: Christian Gmeiner
Thanks & Regards,
Christian
Re: [PATCH 1/2] rockchip: rk3588: Add support for ATAG parsing
On Wed, Mar 27, 2024 at 04:21:49PM +0200, Eugen Hristev wrote: > On 3/27/24 15:32, Chris Morgan wrote: > > On Wed, Mar 27, 2024 at 06:32:06PM +0800, Kever Yang wrote: > >> Hi Chris, > >> > >> The ATAGS is used for passing parameter from bootloader to kernel at > >> first, which has been replaced by DTB now for ARM platform. > >> > >> And Rockchip using ATAGs for passing parameter like dram memory > >> size/board uart in different boot process like DRAM init binary/ TPL/SPL to > >> U-Boot since 2018. > >> > >> And almost at the same time, Simon add bloblist for mainline U-Boot > >> which for similar purpose. > >> > >> So I'm not sure if this ATAGS should be accept in mainline U-Boot or > >> not, even for rockchip platform only seems some kind of regression for this > >> feature support. > >> > >> > >> Hi Simon and Tom, > >> > >> Could you help to give some suggestion for this? > >> > > > > I really meant to do this as an "RFC", so I apologize in advance for > > possibly causing more work in treating this as a full-fledged patch. > > > > The problem I'm trying to solve is that I've got 2 boards, a Rock 5B > > as well as an Indiedroid Nova both with 16GB of RAM. I noticed that > > without the memory holes the Rock 5B defined in my Indiedroid it would > > also fail to boot. I've got 2 other boards as well with less than 16GB > > of RAM which seem to work fine without any holes (a 4GB Indiedroid Nova > > prototype and a GameForce Ace with 12GB of RAM). > > Hi, > > When I initially added these holes in the memory, I tried to ask Rockchip > what are > the holes for. I didn't get any answer, however the patches to reserve the > holes > were accepted. > If we could get more information about why the holes are there, if that area > is > specific to something, or that it's fixed in a per-SoC basis, we could > reserve it > by hardcoding in the Linux DT, without the need for ATAGs. > Without real information, we cannot be sure that for other variants of the > SoC or > some other bootrom configuration, the holes will not change/move. > > Eugen It's not *just* about the holes, but also making sure we use the full extent of the RAM. For example on my 4GB Indiedroid Nova the existing logic ignores about 256MB of RAM that's otherwise present. When we use the existing code the RAM map reported by Linux is as follows: [0.00] Early memory node ranges [0.00] node 0: [mem 0x0020-0xefff] Whereas when we do ATAGS parsing to set the banks we get the following: [0.00] Early memory node ranges [0.00] node 0: [mem 0x0020-0xefff] [0.00] node 0: [mem 0x0001f000-0x0001] So basically the issue is two-fold... one we need to create the memory holes when necessary, and two the current method of defining memory banks leaves some RAM unallocated. Parsing the ATAGS does both of these, I'm just curious if it's the RIGHT way or there's something else I'm missing... Thank you, Chris. > > > > > The "RFC" part for which I'm really requesting guidance/comments is > > a question of "is it appropriate to use ATAGS" to get the RAM banks > > on this SoC, or is there a different way we should be doing it? If > > we can/should use the ATAGS, then I guess this can be pared down and > > refactored to just be RK3588 specific. If so, we can possibly add > > something like this to the RK3588 SoC specific code, guard it with > > an #ifdef ROCKCHIP_TPL to only call it when using the Rockchip > > specific RAM init (in the hopes that maybe one day we get our own > > RAM init), and then replace existing code for boards like the Rock 5B > > so that it no longer reserves these memory banks. > > > > Thank you, > > Chris. > > > >> > >> Thanks, > >> - Kever > >> On 2024/3/27 04:49, Chris Morgan wrote: > >>> From: Chris Morgan > >>> > >>> Add support for parsing the ATAGs created by the Rockchip binary > >>> RAM init. This ATAG parsing code was taken from the Rockchip BSP > >>> U-Boot source and tested only on parsing the RAM specific ATAGs > >>> for the RK3588. > >>> > >>> Signed-off-by: Chris Morgan > >>> --- > >>> arch/arm/include/asm/arch-rockchip/atags.h | 222 + > >>> arch/arm/mach-rockchip/Makefile| 1 + > >>> arch/arm/mach-rockchip/atags.c | 99 + > >>> 3 files changed, 322 insertions(+) > >>> create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h > >>> create mode 100644 arch/arm/mach-rockchip/atags.c > >>> > >>> diff --git a/arch/arm/include/asm/arch-rockchip/atags.h > >>> b/arch/arm/include/asm/arch-rockchip/atags.h > >>> new file mode 100644 > >>> index 00..9bae66d7f8 > >>> --- /dev/null > >>> +++ b/arch/arm/include/asm/arch-rockchip/atags.h > >>> @@ -0,0 +1,222 @@ > >>> +/* SPDX-License-Identifier: GPL-2.0+ */ > >>> +/* > >>> + * (C) Copyright 2018 Rockchip Electronics Co., Ltd > >>> + * > >>> + */ > >>> + > >>>
Re: [PATCH 1/2] rockchip: rk3588: Add support for ATAG parsing
On Wed, Mar 27, 2024 at 06:32:06PM +0800, Kever Yang wrote:
> Hi Chris,
>
> The ATAGS is used for passing parameter from bootloader to kernel at
> first, which has been replaced by DTB now for ARM platform.
>
> And Rockchip using ATAGs for passing parameter like dram memory
> size/board uart in different boot process like DRAM init binary/ TPL/SPL to
> U-Boot since 2018.
>
> And almost at the same time, Simon add bloblist for mainline U-Boot
> which for similar purpose.
>
> So I'm not sure if this ATAGS should be accept in mainline U-Boot or
> not, even for rockchip platform only seems some kind of regression for this
> feature support.
>
>
> Hi Simon and Tom,
>
> Could you help to give some suggestion for this?
>
I really meant to do this as an "RFC", so I apologize in advance for
possibly causing more work in treating this as a full-fledged patch.
The problem I'm trying to solve is that I've got 2 boards, a Rock 5B
as well as an Indiedroid Nova both with 16GB of RAM. I noticed that
without the memory holes the Rock 5B defined in my Indiedroid it would
also fail to boot. I've got 2 other boards as well with less than 16GB
of RAM which seem to work fine without any holes (a 4GB Indiedroid Nova
prototype and a GameForce Ace with 12GB of RAM).
The "RFC" part for which I'm really requesting guidance/comments is
a question of "is it appropriate to use ATAGS" to get the RAM banks
on this SoC, or is there a different way we should be doing it? If
we can/should use the ATAGS, then I guess this can be pared down and
refactored to just be RK3588 specific. If so, we can possibly add
something like this to the RK3588 SoC specific code, guard it with
an #ifdef ROCKCHIP_TPL to only call it when using the Rockchip
specific RAM init (in the hopes that maybe one day we get our own
RAM init), and then replace existing code for boards like the Rock 5B
so that it no longer reserves these memory banks.
Thank you,
Chris.
>
> Thanks,
> - Kever
> On 2024/3/27 04:49, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > Add support for parsing the ATAGs created by the Rockchip binary
> > RAM init. This ATAG parsing code was taken from the Rockchip BSP
> > U-Boot source and tested only on parsing the RAM specific ATAGs
> > for the RK3588.
> >
> > Signed-off-by: Chris Morgan
> > ---
> > arch/arm/include/asm/arch-rockchip/atags.h | 222 +
> > arch/arm/mach-rockchip/Makefile| 1 +
> > arch/arm/mach-rockchip/atags.c | 99 +
> > 3 files changed, 322 insertions(+)
> > create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h
> > create mode 100644 arch/arm/mach-rockchip/atags.c
> >
> > diff --git a/arch/arm/include/asm/arch-rockchip/atags.h
> > b/arch/arm/include/asm/arch-rockchip/atags.h
> > new file mode 100644
> > index 00..9bae66d7f8
> > --- /dev/null
> > +++ b/arch/arm/include/asm/arch-rockchip/atags.h
> > @@ -0,0 +1,222 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * (C) Copyright 2018 Rockchip Electronics Co., Ltd
> > + *
> > + */
> > +
> > +#ifndef __RK_ATAGS_H_
> > +#define __RK_ATAGS_H_
> > +
> > +/* Tag magic */
> > +#define ATAG_CORE 0x54410001
> > +#define ATAG_NONE 0x
> > +
> > +#define ATAG_SERIAL0x54410050
> > +#define ATAG_BOOTDEV 0x54410051
> > +#define ATAG_DDR_MEM 0x54410052
> > +#define ATAG_TOS_MEM 0x54410053
> > +#define ATAG_RAM_PARTITION 0x54410054
> > +#define ATAG_ATF_MEM 0x54410055
> > +#define ATAG_PUB_KEY 0x54410056
> > +#define ATAG_SOC_INFO 0x54410057
> > +#define ATAG_BOOT1_PARAM 0x54410058
> > +#define ATAG_PSTORE0x54410059
> > +#define ATAG_FWVER 0x5441005a
> > +#define ATAG_MAX 0x544100ff
> > +
> > +/* Tag size and offset */
> > +#define ATAGS_SIZE (0x2000)/* 8K */
> > +#define ATAGS_OFFSET (0x20 - ATAGS_SIZE)/* [2M-8K, 2M] */
> > +#define ATAGS_PHYS_BASE(CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
> > +
> > +/* tag_fwver.ver[fwid][] */
> > +#define FWVER_LEN 36
> > +
> > +enum fwid {
> > + FW_DDR,
> > + FW_SPL,
> > + FW_ATF,
> > + FW_TEE,
> > + FW_MAX,
> > +};
> > +
> > +struct tag_serial {
> > + u32 version;
> > + u32 enable;
> > + u64 addr;
> > + u32 baudrate;
> > + u32 m_mode;
> > + u32 id;
> > + u32 reserved[2];
> > + u32 hash;
> > +} __packed;
> > +
> > +struct tag_bootdev {
> > + u32 version;
> > + u32 devtype;
> > + u32 devnum;
> > + u32 mode;
> > + u32 sdupdate;
> > + u32 reserved[6];
> > + u32 hash;
> > +} __packed;
> > +
> > +struct tag_ddr_mem {
> > + u32 count;
> > + u32 version;
> > + u64 bank[20];
> > + u32 flags;
> > + u32 data[2];
> > + u32 hash;
> > +} __packed;
> > +
> > +struct tag_tos_mem {
> > + u32 version;
> > + struct {
> > + char name[8];
> > + u64 phy_addr;
> > +
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
On Wed, Mar 27, 2024 at 8:46 AM Ilias Apalodimas
wrote:
>
> Hi both,
>
> On Wed, 27 Mar 2024 at 17:22, Eddie James wrote:
> >
> >
> > On 3/26/24 11:15, Tim Harvey wrote:
> > > On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
> > > wrote:
> > >> Hi Tim,
> > >>
> > >> On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
> > >>> Greetings,
> > >>>
> > >>> I'm unable to understand why tcg2_platform_get_log is failing to read
> > >>> a memory region.
> > >>>
> > >>> For example the following diffs:
> > >> I am not really sure what those nodes are supposed to do in sandbox.
> > >> Pehaps Eddie remembers.
> > >> What exactly are you trying to achieve here? Read the eventlog from TF-A?
> > >>
> > > Hi Ilias,
> > >
> > > I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
> > > a tpm on my board but ran into an issue when I couldn't get the
> > > memory-region I added for testing to be recognized with the current
> > > code in tcg2_platform_get_log().
> > >
> > > I wonder if an event log should be required for measured boot - it
> > > sounds like that was something required for EFI, so I was thinking of
> > > submitting the following:
> > > commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
> > > Author: Tim Harvey
> > > Date: Tue Mar 26 08:49:07 2024 -0700
> > >
> > > tpm: allow measured boot without an event log
> > >
> > > Currently an event log is required for measured boot. Remove this
> > > requirement.
> > >
> > > Signed-off-by: Tim Harvey
> > >
> > > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > > index 68eaaa639f89..994f8089ba34 100644
> > > --- a/lib/tpm-v2.c
> > > +++ b/lib/tpm-v2.c
> > > @@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
> > > tcg2_event_log *elog, u32 pcr_index,
> > > u32 event_size;
> > > u8 *log;
> > >
> > > - event_size = size + tcg2_event_get_size(digest_list);
> > > - if (elog->log_position + event_size > elog->log_size) {
> > > - printf("%s: log too large: %u + %u > %u\n", __func__,
> > > - elog->log_position, event_size, elog->log_size);
> > > - return -ENOBUFS;
> > > - }
> > > + if (elog->log_size) {
> > > + event_size = size + tcg2_event_get_size(digest_list);
> > > + if (elog->log_position + event_size > elog->log_size) {
> > > + printf("%s: log too large: %u + %u > %u\n",
> > > __func__,
> > > + elog->log_position, event_size,
> > > elog->log_size);
> > > + return -ENOBUFS;
> > > + }
> > >
> > > - log = elog->log + elog->log_position;
> > > - elog->log_position += event_size;
> > > + log = elog->log + elog->log_position;
> > > + elog->log_position += event_size;
> > >
> > > - tcg2_log_append(pcr_index, event_type, digest_list, size, event,
> > > log);
> > > + tcg2_log_append(pcr_index, event_type, digest_list,
> > > size, event, log);
> > > + }
> > >
> > > return 0;
> > > }
> > > @@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
> > > struct tcg2_event_log *elog,
> > > return rc;
> > >
> > > rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
> > > - if (rc) {
> > > + if (rc)
> > > tcg2_measurement_term(*dev, elog, true);
> > > - return rc;
> > > - }
> > >
> > > rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
> > > strlen(version_string) + 1,
> > >
> > > Would you agree with removing the requirement for the event log?
> >
> >
> > No, the log is required, otherwise it's fairly meaningless work. You
> > need the log in your OS to verify the contents of the TPM.
>
> It's the other way around. You trust the TPM and replay the event log
> in memory to verify it's correct.
> That being said, I do agree the event log is pretty useful when trying
> to understand how and what the platform measured. In any case, I'd
> rather fix any issues rather than sidestep them.
>
Why do you need a log to verify the contents of the TPM? If the PCR's
are not correct you can't get your secrets from the TPM and if they
are you can regardless of a log. Where is this log requirement in the
TCG specification?
Please see Linux commit 805fa88e0780b ("tpm: Don't make log failures
fatal") which has a commit log of:
If a TPM is in disabled state, it's reasonable for it to have an empty
log. Bailing out of probe in this case means that the PPI interface
isn't available, so there's no way to then enable the TPM from the OS.
In general it seems reasonable to ignore log errors - they shouldn't
interfere with any other TPM functionality.
That last sentence makes sense to me; Sure the log may be 'useful' to
some but I feel like it's not a requirement and it certainly is not a
requirement for Linux.
>
[PATCH u-boot-mvebu v3 18/18] arm: mvebu: turris_omnia: Enable rng command in defconfig
Now that Turris Omnia has a rng driver provided in the MCU driver, enable the rng command in defconfig. Signed-off-by: Marek Behún --- configs/turris_omnia_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 4c21635ec9..f2b39115fe 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -73,6 +73,7 @@ CONFIG_CMD_WDT=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_AES=y CONFIG_CMD_HASH=y CONFIG_CMD_BTRFS=y -- 2.43.2
[PATCH u-boot-mvebu v3 17/18] misc: turris_omnia_mcu: Add support for rng provided by MCU
Add support for true random number generator provided by the MCU on
Turris Omnia. The MCU firmware supports TRNG if the FEAT_TRNG bit is set
in features. In that case we bind the rng driver.
Signed-off-by: Marek Behún
---
configs/turris_omnia_defconfig | 1 +
drivers/misc/Kconfig| 1 +
drivers/misc/turris_omnia_mcu.c | 57 +
3 files changed, 59 insertions(+)
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 0df0f3c90b..4c21635ec9 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -107,6 +107,7 @@ CONFIG_NVME_PCI=y
CONFIG_PCI_MVEBU=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_38X=y
+CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
CONFIG_SERIAL_PROBE_ALL=y
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 844a21be47..a08f02196f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -509,6 +509,7 @@ config TURRIS_OMNIA_MCU
bool "Enable Turris Omnia MCU driver"
depends on DM_I2C
depends on DM_GPIO
+ depends on DM_RNG
depends on SYSRESET
default y if TARGET_TURRIS_OMNIA
help
diff --git a/drivers/misc/turris_omnia_mcu.c b/drivers/misc/turris_omnia_mcu.c
index 77a0424d61..6b2f17c000 100644
--- a/drivers/misc/turris_omnia_mcu.c
+++ b/drivers/misc/turris_omnia_mcu.c
@@ -5,15 +5,20 @@
*/
#include
+#include
#include
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
+#define CMD_TRNG_MAX_ENTROPY_LEN 64
+
struct turris_omnia_mcu_info {
u32 features;
};
@@ -282,6 +287,49 @@ U_BOOT_DRIVER(turris_omnia_mcu_sysreset) = {
.ops= _sysreset_ops,
};
+static int omnia_rng_read(struct udevice *dev, void *data, size_t count)
+{
+ u8 buf[1 + CMD_TRNG_MAX_ENTROPY_LEN];
+ size_t len;
+ int ret;
+
+ while (count) {
+ ret = dm_i2c_read(dev->parent, CMD_TRNG_COLLECT_ENTROPY, buf,
+ sizeof(buf));
+ if (ret)
+ return ret;
+
+ len = min_t(size_t, buf[0],
+ min_t(size_t, CMD_TRNG_MAX_ENTROPY_LEN, count));
+
+ if (!len) {
+ /* wait 500ms (fail if interrupted), then try again */
+ for (int i = 0; i < 5; ++i) {
+ mdelay(100);
+ if (ctrlc())
+ return -EINTR;
+ }
+ continue;
+ }
+
+ memcpy(data, [1], len);
+ data += len;
+ count -= len;
+ }
+
+ return 0;
+}
+
+static const struct dm_rng_ops omnia_rng_ops = {
+ .read = omnia_rng_read,
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu_trng) = {
+ .name = "turris-omnia-mcu-trng",
+ .id = UCLASS_RNG,
+ .ops= _rng_ops,
+};
+
static int turris_omnia_mcu_bind(struct udevice *dev)
{
/* bind MCU GPIOs as a child device */
@@ -336,6 +384,15 @@ static int turris_omnia_mcu_probe(struct udevice *dev)
return ret;
}
+ /* bind rng if trng is supported */
+ if (info->features & FEAT_TRNG) {
+ ret = device_bind_driver_to_node(dev, "turris-omnia-mcu-trng",
+"turris-omnia-mcu-trng",
+dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
return 0;
}
--
2.43.2
[PATCH u-boot-mvebu v3 16/18] cmd: rng: Print "Abort" on -EINTR
In the rng command, print
Abort
instead of
Reading RNG failed
if the error number is -EINTR, which can happen if the user pressed
CTRL-C.
Signed-off-by: Marek Behún
---
cmd/rng.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/cmd/rng.c b/cmd/rng.c
index 52f722c7af..48ba67061b 100644
--- a/cmd/rng.c
+++ b/cmd/rng.c
@@ -17,7 +17,7 @@ static int do_rng(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
u8 buf[64];
int devnum;
struct udevice *dev;
- int ret = CMD_RET_SUCCESS;
+ int ret = CMD_RET_SUCCESS, err;
switch (argc) {
case 1:
@@ -46,8 +46,9 @@ static int do_rng(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
n = min(n, sizeof(buf));
- if (dm_rng_read(dev, buf, n)) {
- printf("Reading RNG failed\n");
+ err = dm_rng_read(dev, buf, n);
+ if (err) {
+ puts(err == -EINTR ? "Abort\n" : "Reading RNG failed\n");
ret = CMD_RET_FAILURE;
} else {
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, n);
--
2.43.2
[PATCH u-boot-mvebu v3 15/18] arm: mvebu: turris_omnia: Enable poweroff command via sysreset in defconfig
Enable support for the poweroff command via sysreset for Turris Omnia. Signed-off-by: Marek Behún --- configs/turris_omnia_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 9d5171c6a8..0df0f3c90b 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -65,6 +65,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -114,6 +115,7 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_CMD_POWEROFF=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y -- 2.43.2
[PATCH u-boot-mvebu v3 14/18] gpio: turris_omnia_mcu: Add support for system power off via sysreset
Add support for system power off via UCLASS_SYSRESET. Newer versions of
Turris Omnia MCU firmware can power off the board (MCU will disable
almost all voltage regulators and go into low power mode).
Move the MCU driver into drivers/misc and register it under UCLASS_MISC.
The sysreset and gpio device are bound as child devices of the MCU device.
Signed-off-by: Marek Behún
---
configs/turris_omnia_defconfig| 1 +
drivers/gpio/Kconfig | 7 -
drivers/gpio/Makefile | 1 -
drivers/misc/Kconfig | 10 ++
drivers/misc/Makefile | 1 +
drivers/{gpio => misc}/turris_omnia_mcu.c | 150 --
6 files changed, 120 insertions(+), 50 deletions(-)
rename drivers/{gpio => misc}/turris_omnia_mcu.c (60%)
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 39e15043df..9d5171c6a8 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -113,6 +113,7 @@ CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
+CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2df3dc42d0..020c6ae74c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -662,13 +662,6 @@ config SLG7XL45106_I2C_GPO
8-bit gpo expander, all gpo lines are controlled by writing
value into data register.
-config TURRIS_OMNIA_MCU
- bool "Turris Omnia MCU GPIO driver"
- depends on DM_GPIO
- default y if TARGET_TURRIS_OMNIA
- help
- Support for GPIOs on MCU connected to Turris Omnia via i2c.
-
config FTGPIO010
bool "Faraday Technology FTGPIO010 driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index da3da5da2b..d637895c7a 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -73,7 +73,6 @@ obj-$(CONFIG_$(SPL_)MAX77663_GPIO)+= max77663_gpio.o
obj-$(CONFIG_SL28CPLD_GPIO)+= sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
-obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_FTGPIO010)+= ftgpio010.o
obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o
obj-$(CONFIG_RZG2L_GPIO) += rzg2l-gpio.o
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f11ce72525..844a21be47 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -505,6 +505,16 @@ config TEST_DRV
model. This should only be enabled for testing as it is not useful for
anything else.
+config TURRIS_OMNIA_MCU
+ bool "Enable Turris Omnia MCU driver"
+ depends on DM_I2C
+ depends on DM_GPIO
+ depends on SYSRESET
+ default y if TARGET_TURRIS_OMNIA
+ help
+ This enables support for Turris Omnia MCU connected GPIOs and
+ board power off.
+
config USB_HUB_USB251XB
tristate "USB251XB Hub Controller Configuration Driver"
depends on I2C
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0432db6ed1..3cd8e2fd48 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
obj-$(CONFIG_TEST_DRV) += test_drv.o
+obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/misc/turris_omnia_mcu.c
similarity index 60%
rename from drivers/gpio/turris_omnia_mcu.c
rename to drivers/misc/turris_omnia_mcu.c
index 40ced261e3..77a0424d61 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/misc/turris_omnia_mcu.c
@@ -1,9 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
-// (C) 2022 Pali Rohár
+/*
+ * Copyright (C) 2022 Pali Rohár
+ * Copyright (C) 2024 Marek Behún
+ */
#include
#include
+#include
#include
+#include
#include
#include
#include
@@ -13,9 +18,9 @@ struct turris_omnia_mcu_info {
u32 features;
};
-static int turris_omnia_mcu_get_function(struct udevice *dev, uint offset)
+static int omnia_gpio_get_function(struct udevice *dev, uint offset)
{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
switch (offset) {
/* bank 0 */
@@ -49,9 +54,9 @@ static int turris_omnia_mcu_get_function(struct udevice *dev,
uint offset)
}
}
-static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
+static int omnia_gpio_get_value(struct udevice *dev, uint offset)
{
- struct turris_omnia_mcu_info *info =
[PATCH u-boot-mvebu v3 13/18] gpio: turris_omnia_mcu: Update firmware features reading
Update firmware features reading to try reading 32 bits of features and
fallback to reading 16 bits.
Signed-off-by: Marek Behún
---
drivers/gpio/turris_omnia_mcu.c | 32 ++--
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index c441d07d69..40ced261e3 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -10,7 +10,7 @@
#include
struct turris_omnia_mcu_info {
- u16 features;
+ u32 features;
};
static int turris_omnia_mcu_get_function(struct udevice *dev, uint offset)
@@ -228,25 +228,37 @@ static int turris_omnia_mcu_probe(struct udevice *dev)
{
struct turris_omnia_mcu_info *info = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- u16 val;
+ u32 dword;
+ u16 word;
int ret;
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, (void *), sizeof(val));
+ ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, (void *),
sizeof(word));
if (ret < 0) {
printf("Error: turris_omnia_mcu CMD_GET_STATUS_WORD failed:
%d\n",
ret);
return ret;
}
- if (le16_to_cpu(val) & STS_FEATURES_SUPPORTED) {
- ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *),
- sizeof(val));
+ if (le16_to_cpu(word) & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *),
+ sizeof(dword));
if (ret < 0) {
- printf("Error: turris_omnia_mcu CMD_GET_FEATURES
failed: %d\n",
- ret);
- return ret;
+ /* try read 16-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *),
+ sizeof(word));
+ if (ret < 0) {
+ printf("Error: turris_omnia_mcu
CMD_GET_FEATURES failed: %d\n",
+ ret);
+ return ret;
+ }
+
+ info->features = le16_to_cpu(word);
+ } else {
+ info->features = le32_to_cpu(dword);
+ if (info->features & FEAT_FROM_BIT_16_INVALID)
+ info->features &= GENMASK(15, 0);
}
- info->features = le16_to_cpu(val);
}
uc_priv->bank_name = "mcu_";
--
2.43.2
[PATCH u-boot-mvebu v3 12/18] gpio: turris_omnia_mcu: Use byteorder conversion functions
Use byteorder conversion function instead of manually assembling data
from/to MCU.
Signed-off-by: Marek Behún
---
drivers/gpio/turris_omnia_mcu.c | 80 +++--
1 file changed, 46 insertions(+), 34 deletions(-)
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index da9a6efe6d..c441d07d69 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -5,6 +5,7 @@
#include
#include
#include
+#include
#include
#include
@@ -51,27 +52,31 @@ static int turris_omnia_mcu_get_function(struct udevice
*dev, uint offset)
static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
{
struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
+ u32 val32;
+ u16 val16;
int ret;
switch (offset) {
/* bank 0 */
case 0 ... 15:
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, val16, 2);
+ ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, (void *),
+ sizeof(val16));
if (ret)
return ret;
- return u16)val16[1] << 8) | val16[0]) >> offset) & 0x1;
+
+ return !!(le16_to_cpu(val16) & BIT(offset));
/* bank 1 - supported only when FEAT_EXT_CMDS is set */
case (16 + 0) ... (16 + 31):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_STATUS_DWORD, val32, 4);
+
+ ret = dm_i2c_read(dev, CMD_GET_EXT_STATUS_DWORD, (void *),
+ sizeof(val32));
if (ret)
return ret;
- return u32)val32[3] << 24) | ((u32)val32[2] << 16) |
-((u32)val32[1] << 8) | val32[0]) >> (offset - 16)) &
0x1;
+
+ return !!(le32_to_cpu(val32) & BIT(offset - 16));
/* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is
set */
case (16 + 32 + 0) ... (16 + 32 + 15):
@@ -79,10 +84,13 @@ static int turris_omnia_mcu_get_value(struct udevice *dev,
uint offset)
return -EINVAL;
if (!(info->features & FEAT_PERIPH_MCU))
return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS, val16, 2);
+
+ ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS,
+ (void *), sizeof(val16));
if (ret)
return ret;
- return u16)val16[1] << 8) | val16[0]) >> (offset - 16 -
32)) & 0x1;
+
+ return !!(le16_to_cpu(val16) & BIT(offset - 16 - 32));
default:
return -EINVAL;
@@ -92,30 +100,33 @@ static int turris_omnia_mcu_get_value(struct udevice *dev,
uint offset)
static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int
value)
{
struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
+ u16 valmask16[2];
+ u8 valmask8[2];
switch (offset) {
/* bank 0 */
case 0 ... 15:
switch (offset) {
case ilog2(STS_USB30_PWRON):
- val16[1] = CTL_USB30_PWRON;
+ valmask8[1] = CTL_USB30_PWRON;
break;
case ilog2(STS_USB31_PWRON):
- val16[1] = CTL_USB31_PWRON;
+ valmask8[1] = CTL_USB31_PWRON;
break;
case ilog2(STS_ENABLE_4V5):
- val16[1] = CTL_ENABLE_4V5;
+ valmask8[1] = CTL_ENABLE_4V5;
break;
case ilog2(STS_BUTTON_MODE):
- val16[1] = CTL_BUTTON_MODE;
+ valmask8[1] = CTL_BUTTON_MODE;
break;
default:
return -EINVAL;
}
- val16[0] = value ? val16[1] : 0;
- return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16,
sizeof(val16));
+
+ valmask8[0] = value ? valmask8[1] : 0;
+
+ return dm_i2c_write(dev, CMD_GENERAL_CONTROL, valmask8,
+ sizeof(valmask8));
/* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is
set */
case (16 + 32 + 0) ... (16 + 32 + 15):
@@ -123,11 +134,12 @@ static int turris_omnia_mcu_set_value(struct udevice
*dev, uint offset, int valu
return -EINVAL;
if (!(info->features & FEAT_PERIPH_MCU))
return -EINVAL;
- val32[3] = BIT(offset - 16 - 32) >> 8;
- val32[2] = BIT(offset - 16 - 32) & 0xff;
- val32[1] = value ? val32[3] : 0;
- val32[0] = value ?
[PATCH u-boot-mvebu v3 10/18] arm: mvebu: system-controller: Select mvebu-reset if DM_RESET && PCI_MVEBU
The mvebu-reset driver is only needed by the mvebu PCIe driver, but currently it is automatically selected if DM_RESET is enabled. Add the condition of PCI_MVEBU also being enabled for mvebu-reset to be selected. Signed-off-by: Marek Behún --- arch/arm/mach-mvebu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 62a2bc5958..623432a60e 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -18,7 +18,7 @@ config ARMADA_32BIT select TOOLS_KWBIMAGE if SPL select SPL_SYS_NO_VECTOR_TABLE if SPL select ARCH_VERY_EARLY_INIT - select ARMADA_32BIT_SYSCON_RESET if DM_RESET + select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU # ARMv7 SoCs... config ARMADA_375 -- 2.43.2
[PATCH u-boot-mvebu v3 11/18] arm: mvebu: system-controller: Add support for SYSRESET
Add driver model support for sysreset via mvebu system controller. This is
currently only available for U-Boot proper.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/Kconfig | 18 +-
arch/arm/mach-mvebu/Makefile| 2 +-
arch/arm/mach-mvebu/cpu.c | 2 +
arch/arm/mach-mvebu/system-controller.c | 74 +++--
4 files changed, 89 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 623432a60e..f15d3cc5ed 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -19,6 +19,7 @@ config ARMADA_32BIT
select SPL_SYS_NO_VECTOR_TABLE if SPL
select ARCH_VERY_EARLY_INIT
select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
+ select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
# ARMv7 SoCs...
config ARMADA_375
@@ -457,16 +458,29 @@ config SF_DEFAULT_MODE
default 0x0
depends on MVEBU_SPL_BOOT_DEVICE_SPI
+config ARMADA_32BIT_SYSCON
+ bool
+ depends on ARMADA_32BIT
+ select REGMAP
+ select SYSCON
+
config ARMADA_32BIT_SYSCON_RESET
bool "Support Armada XP/375/38x/39x reset controller"
depends on ARMADA_32BIT
depends on DM_RESET
- select REGMAP
- select SYSCON
+ select ARMADA_32BIT_SYSCON
help
Build support for Armada XP/375/38x/39x reset controller. This is
needed for PCIe support.
+config ARMADA_32BIT_SYSCON_SYSRESET
+ bool "Support Armada XP/375/38x/39x sysreset via driver model"
+ depends on ARMADA_32BIT
+ depends on SYSRESET
+ select ARMADA_32BIT_SYSCON
+ help
+ Build support for Armada XP/375/38x/39x system reset via driver model.
+
source "board/solidrun/clearfog/Kconfig"
source "board/kobol/helios4/Kconfig"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index d44ca3a0df..329c2e4915 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -28,7 +28,7 @@ obj-$(CONFIG_ARMADA_38X) +=
../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o
-obj-$(CONFIG_ARMADA_32BIT_SYSCON_RESET) += system-controller.o
+obj-$(CONFIG_ARMADA_32BIT_SYSCON) += system-controller.o
ifdef CONFIG_ARMADA_38X
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 8e0de93538..7c62a5dbb6 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -52,6 +52,7 @@ void lowlevel_init(void)
*/
}
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
void reset_cpu(void)
{
struct mvebu_system_registers *reg =
@@ -62,6 +63,7 @@ void reset_cpu(void)
while (1)
;
}
+#endif
u32 get_boot_device(void)
{
diff --git a/arch/arm/mach-mvebu/system-controller.c
b/arch/arm/mach-mvebu/system-controller.c
index c5c05922f2..b5f8afb96d 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -10,11 +10,24 @@
#include
#include
#include
+#include
#include
-#define MVEBU_SOC_CONTROL_1_REG 0x4
+#define MVEBU_SOC_CONTROL_1_REG0x4
-#define MVEBU_PCIE_ID 0
+#if defined(CONFIG_ARMADA_375)
+# define MVEBU_RSTOUTN_MASK_REG0x54
+# define MVEBU_SYS_SOFT_RST_REG0x58
+#else
+# define MVEBU_RSTOUTN_MASK_REG0x60
+# define MVEBU_SYS_SOFT_RST_REG0x64
+#endif
+
+#define MVEBU_GLOBAL_SOFT_RST_BIT BIT(0)
+
+#define MVEBU_PCIE_ID 0
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET)
static int mvebu_reset_of_xlate(struct reset_ctl *rst,
struct ofnode_phandle_args *args)
@@ -90,11 +103,64 @@ U_BOOT_DRIVER(mvebu_reset) = {
.ops = _reset_ops,
};
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET) */
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
+
+static int mvebu_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct regmap *regmap = syscon_get_regmap(dev->parent);
+ uint bit;
+
+ if (type != SYSRESET_COLD)
+ return -EPROTONOSUPPORT;
+
+ bit = MVEBU_GLOBAL_SOFT_RST_BIT;
+
+ regmap_update_bits(regmap, MVEBU_RSTOUTN_MASK_REG, bit, bit);
+ regmap_update_bits(regmap, MVEBU_SYS_SOFT_RST_REG, bit, bit);
+
+ while (1)
+ ;
+
+ return 0;
+}
+
+static struct sysreset_ops mvebu_sysreset_ops = {
+ .request = mvebu_sysreset_request,
+};
+
+U_BOOT_DRIVER(mvebu_sysreset) = {
+ .name = "mvebu-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = _sysreset_ops,
+};
+
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET) */
+
static int mvebu_syscon_bind(struct udevice *dev)
{
+ int ret = 0;
+
/* bind also mvebu-reset, with the
[PATCH u-boot-mvebu v3 09/18] arm: mvebu: system-controller: Rework to use UCLASS_SYSCON
The system-controller driver for 32-bit Armada is currently registered
as UCLASS_RESET, since it only provides enabling/disabling PCIe ports.
Rework it as UCLASS_SYSCON and bind mvebu-reset as a child device.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/Kconfig | 11
arch/arm/mach-mvebu/Makefile| 2 +-
arch/arm/mach-mvebu/system-controller.c | 76 ++---
3 files changed, 54 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 2058c95ca2..62a2bc5958 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -18,6 +18,7 @@ config ARMADA_32BIT
select TOOLS_KWBIMAGE if SPL
select SPL_SYS_NO_VECTOR_TABLE if SPL
select ARCH_VERY_EARLY_INIT
+ select ARMADA_32BIT_SYSCON_RESET if DM_RESET
# ARMv7 SoCs...
config ARMADA_375
@@ -456,6 +457,16 @@ config SF_DEFAULT_MODE
default 0x0
depends on MVEBU_SPL_BOOT_DEVICE_SPI
+config ARMADA_32BIT_SYSCON_RESET
+ bool "Support Armada XP/375/38x/39x reset controller"
+ depends on ARMADA_32BIT
+ depends on DM_RESET
+ select REGMAP
+ select SYSCON
+ help
+ Build support for Armada XP/375/38x/39x reset controller. This is
+ needed for PCIe support.
+
source "board/solidrun/clearfog/Kconfig"
source "board/kobol/helios4/Kconfig"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index ef790d97fe..d44ca3a0df 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -28,7 +28,7 @@ obj-$(CONFIG_ARMADA_38X) +=
../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o
-obj-$(CONFIG_DM_RESET) += system-controller.o
+obj-$(CONFIG_ARMADA_32BIT_SYSCON_RESET) += system-controller.o
ifdef CONFIG_ARMADA_38X
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
diff --git a/arch/arm/mach-mvebu/system-controller.c
b/arch/arm/mach-mvebu/system-controller.c
index 7cdde11cbd..c5c05922f2 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -1,19 +1,21 @@
// SPDX-License-Identifier: GPL-2.0+
-// (C) 2021 Pali Rohár
+/*
+ * Copyright (C) 2021 Pali Rohár
+ * Copyright (C) 2024 Marek Behún
+ */
#include
#include
+#include
+#include
#include
+#include
#include
#define MVEBU_SOC_CONTROL_1_REG 0x4
#define MVEBU_PCIE_ID 0
-struct mvebu_reset_data {
- void *base;
-};
-
static int mvebu_reset_of_xlate(struct reset_ctl *rst,
struct ofnode_phandle_args *args)
{
@@ -46,46 +48,33 @@ static int mvebu_reset_free(struct reset_ctl *rst)
static int mvebu_reset_assert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- clrbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), 0);
}
static int mvebu_reset_deassert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- setbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), BIT(rst->data));
}
static int mvebu_reset_status(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
+ uint val;
+ int ret;
- return !(readl(data->base + MVEBU_SOC_CONTROL_1_REG) & BIT(rst->data));
-}
-
-static int mvebu_reset_of_to_plat(struct udevice *dev)
-{
- struct mvebu_reset_data *data = dev_get_priv(dev);
+ ret = regmap_read(regmap, MVEBU_SOC_CONTROL_1_REG, );
+ if (ret < 0)
+ return ret;
- data->base = dev_read_addr_ptr(dev);
- if (!data->base)
- return -EINVAL;
-
- return 0;
+ return !(val & BIT(rst->data));
}
-static const struct udevice_id mvebu_reset_of_match[] = {
- { .compatible = "marvell,armada-370-xp-system-controller" },
- { .compatible = "marvell,armada-375-system-controller" },
- { .compatible = "marvell,armada-380-system-controller" },
- { .compatible = "marvell,armada-390-system-controller" },
- { },
-};
-
static const struct reset_ops mvebu_reset_ops = {
.of_xlate = mvebu_reset_of_xlate,
.request = mvebu_reset_request,
@@ -98,8 +87,27 @@ static const struct reset_ops mvebu_reset_ops = {
U_BOOT_DRIVER(mvebu_reset) = {
.name = "mvebu-reset",
.id = UCLASS_RESET,
- .of_match = mvebu_reset_of_match,
[PATCH u-boot-mvebu v3 08/18] arm: mvebu: spl: Do not build mvebu-reset in SPL
Commit 35e29e89a386 ("arm: mvebu: Implement simple mvebu-reset driver
for enabling/disabling PCIe ports") made it so that the mvebu reset
driver for enabling/disabling PCIe ports is build if CONFIG_DM_RESET is
enabled. This is because PCI_MVEBU depends on DM_RESET.
But the driver should not be built for SPL. Indeed the PCI_MVEBU driver
is not supported in SPL now, and so the mvebu-reset driver is not needed.
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 0584ed2be5..ef790d97fe 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -22,13 +22,14 @@ else # CONFIG_ARCH_KIRKWOOD
obj-y = cpu.o
obj-y += dram.o
obj-y += lowlevel.o
-obj-$(CONFIG_DM_RESET) += system-controller.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o
+obj-$(CONFIG_DM_RESET) += system-controller.o
+
ifdef CONFIG_ARMADA_38X
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
endif
--
2.43.2
[PATCH u-boot-mvebu v3 07/18] arm: mvebu: turris_omnia: Disable Atmel SHA node if not present
If the FEAT_CRYPTO feature bit is present in MCU features, the board
crypto is implemented by MCU and the Atmel SHA chip is not present.
Disable Atmel SHA device-tree node in that case.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index b2f0088e5e..3b7a71bdad 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -1007,6 +1007,25 @@ static int fixup_mcu_gpio_in_eth_wan_node(void *blob)
return 0;
}
+static void fixup_atsha_node(void *blob)
+{
+ int node;
+
+ if (!omnia_mcu_has_feature(FEAT_CRYPTO))
+ return;
+
+ node = fdt_node_offset_by_compatible(blob, -1, "atmel,atsha204a");
+ if (node < 0) {
+ printf("Cannot find ATSHA204A node!\n");
+ return;
+ }
+
+ if (fdt_status_disabled(blob, node) < 0)
+ printf("Cannot disable ATSHA204A node!\n");
+ else
+ debug("Disabled ATSHA204A node\n");
+}
+
#endif
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
@@ -1020,6 +1039,8 @@ int board_fix_fdt(void *blob)
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
@@ -1211,6 +1232,8 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
--
2.43.2
[PATCH u-boot-mvebu v3 06/18] arm: mvebu: turris_omnia: Print board ECDSA public key if available
If MCU supports the FEAT_CRYPTO feature, read board ECDSA public key
from MCU and print it.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 25 +++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index f63640ad64..b2f0088e5e 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -253,6 +253,24 @@ static int omnia_mcu_board_info(char *serial, u8 *mac,
char *version)
return 0;
}
+static int omnia_mcu_get_board_public_key(char pub_key[static 67])
+{
+ u8 reply[34];
+ int ret;
+
+ ret = omnia_mcu_read(CMD_CRYPTO_GET_PUBLIC_KEY, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 33)
+ return -EBADMSG;
+
+ bin2hex(pub_key, [1], 33);
+ pub_key[66] = '\0';
+
+ return 0;
+}
+
static void enable_a385_watchdog(unsigned int timeout_minutes)
{
struct sar_freq_modes sar_freq;
@@ -1032,7 +1050,7 @@ int board_late_init(void)
int checkboard(void)
{
- char serial[17], version[4];
+ char serial[17], version[4], pub_key[67];
bool has_version;
int err;
@@ -1051,6 +1069,11 @@ int checkboard(void)
printf(" Board version: %s\n", has_version ? version : "unknown");
printf(" Serial Number: %s\n", !err ? serial : "unknown");
+ if (omnia_mcu_has_feature(FEAT_CRYPTO)) {
+ err = omnia_mcu_get_board_public_key(pub_key);
+ printf(" ECDSA Public Key: %s\n", !err ? pub_key : "unknown");
+ }
+
return 0;
}
--
2.43.2
[PATCH u-boot-mvebu v3 05/18] arm: mvebu: turris_omnia: Implement getting board information from MCU
Implement reading board serial number, first MAC address and board
version from MCU. MCU supports board information if the FEAT_BOARD_INFO
feature bit is set in MCU features.
Prefer getting board information from MCU if supported, fallback to
Atmel SHA chip.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_atsha_otp.c | 27 +--
board/CZ.NIC/turris_omnia/Makefile | 2 +-
board/CZ.NIC/turris_omnia/turris_omnia.c | 94 +++-
3 files changed, 93 insertions(+), 30 deletions(-)
diff --git a/board/CZ.NIC/turris_atsha_otp.c b/board/CZ.NIC/turris_atsha_otp.c
index a29fe36231..85eebcdf18 100644
--- a/board/CZ.NIC/turris_atsha_otp.c
+++ b/board/CZ.NIC/turris_atsha_otp.c
@@ -11,6 +11,7 @@
#include
#include "turris_atsha_otp.h"
+#include "turris_common.h"
#define TURRIS_ATSHA_OTP_VERSION 0
#define TURRIS_ATSHA_OTP_SERIAL1
@@ -32,26 +33,6 @@ static struct udevice *get_atsha204a_dev(void)
return dev;
}
-static void increment_mac(u8 *mac)
-{
- int i;
-
- for (i = 5; i >= 3; i--) {
- mac[i] += 1;
- if (mac[i])
- break;
- }
-}
-
-static void set_mac_if_invalid(int i, u8 *mac)
-{
- u8 oldmac[6];
-
- if (is_valid_ethaddr(mac) &&
- !eth_env_get_enetaddr_by_index("eth", i, oldmac))
- eth_env_set_enetaddr_by_index("eth", i, mac);
-}
-
int turris_atsha_otp_init_mac_addresses(int first_idx)
{
struct udevice *dev = get_atsha204a_dev();
@@ -84,11 +65,7 @@ int turris_atsha_otp_init_mac_addresses(int first_idx)
mac[4] = mac1[2];
mac[5] = mac1[3];
- set_mac_if_invalid((first_idx + 0) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 1) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 2) % 3, mac);
+ turris_init_mac_addresses(first_idx, mac);
return 0;
}
diff --git a/board/CZ.NIC/turris_omnia/Makefile
b/board/CZ.NIC/turris_omnia/Makefile
index dc39b44ae1..341378b4e5 100644
--- a/board/CZ.NIC/turris_omnia/Makefile
+++ b/board/CZ.NIC/turris_omnia/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2017 Marek Behún
-obj-y := turris_omnia.o ../turris_atsha_otp.o
+obj-y := turris_omnia.o ../turris_atsha_otp.o ../turris_common.o
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 6dfde5ee7a..f63640ad64 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -25,12 +26,14 @@
#include
#include
#include
+#include
#include
#include
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
#include <../serdes/a38x/high_speed_env_spec.h>
#include "../turris_atsha_otp.h"
+#include "../turris_common.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -186,6 +189,70 @@ static bool omnia_mcu_has_feature(u32 feature)
return feature & features;
}
+static u32 omnia_mcu_crc32(const void *p, size_t len)
+{
+ u32 val, crc = 0;
+
+ compiletime_assert(!(len % 4), "length has to be a multiple of 4");
+
+ while (len) {
+ val = bitrev32(get_unaligned_le32(p));
+ crc = crc32(crc, (void *), 4);
+ p += 4;
+ len -= 4;
+ }
+
+ return ~bitrev32(crc);
+}
+
+/* Can only be called after relocation, since it needs cleared BSS */
+static int omnia_mcu_board_info(char *serial, u8 *mac, char *version)
+{
+ static u8 reply[17];
+ static bool cached;
+
+ if (!cached) {
+ u8 csum;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_BOARD_INFO_GET, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 16)
+ return -EBADMSG;
+
+ csum = reply[16];
+ reply[16] = 0;
+
+ if ((omnia_mcu_crc32([1], 16) & 0xff) != csum)
+ return -EBADMSG;
+
+ cached = true;
+ }
+
+ if (serial) {
+ const char *serial_env;
+
+ serial_env = env_get("serial#");
+ if (serial_env && strlen(serial_env) == 16) {
+ strcpy(serial, serial_env);
+ } else {
+ sprintf(serial, "%016llX",
+ get_unaligned_le64([1]));
+ env_set("serial#", serial);
+ }
+ }
+
+ if (mac)
+ memcpy(mac, [9], ETH_ALEN);
+
+ if (version)
+ sprintf(version, "%u", reply[15]);
+
+ return 0;
+}
+
static void enable_a385_watchdog(unsigned int timeout_minutes)
{
struct sar_freq_modes sar_freq;
@@ -965,13 +1032,23 @@ int board_late_init(void)
int checkboard(void)
{
- char serial[17];
+ char serial[17], version[4];
+
[PATCH u-boot-mvebu v3 04/18] arm: mvebu: turris_omnia: Update MCU status and features reading
Refactor MCU status word and MCU firmware features reading to make it
simpler to use.
Try reading 32 bits of features, if that fails, read 16 bits. Older MCU
firmware supports only 16-bit wide features, and if more bytes are read,
either 0xff is sent or I2C transaction fails. Handle both cases.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 100 +++
1 file changed, 68 insertions(+), 32 deletions(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 87e33d88c4..6dfde5ee7a 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -133,6 +133,59 @@ static int omnia_mcu_write(u8 cmd, const void *buf, int
len)
return dm_i2c_write(chip, cmd, buf, len);
}
+static int omnia_mcu_get_sts_and_features(u16 *psts, u32 *pfeatures)
+{
+ u16 sts, feat16;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, , sizeof(sts));
+ if (ret)
+ return ret;
+
+ if (psts)
+ *psts = sts;
+
+ if (!pfeatures)
+ return 0;
+
+ if (sts & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, pfeatures,
+sizeof(*pfeatures));
+ if (ret) {
+ /* try read 16-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, ,
+sizeof());
+ if (ret)
+ return ret;
+
+ *pfeatures = feat16;
+ } else {
+ if (*pfeatures & FEAT_FROM_BIT_16_INVALID)
+ *pfeatures &= GENMASK(15, 0);
+ }
+ } else {
+ *pfeatures = 0;
+ }
+
+ return 0;
+}
+
+static int omnia_mcu_get_sts(u16 *sts)
+{
+ return omnia_mcu_get_sts_and_features(sts, NULL);
+}
+
+static bool omnia_mcu_has_feature(u32 feature)
+{
+ u32 features;
+
+ if (omnia_mcu_get_sts_and_features(NULL, ))
+ return false;
+
+ return feature & features;
+}
+
static void enable_a385_watchdog(unsigned int timeout_minutes)
{
struct sar_freq_modes sar_freq;
@@ -194,7 +247,7 @@ static bool disable_mcu_watchdog(void)
static bool omnia_detect_sata(const char *msata_slot)
{
int ret;
- u16 stsword;
+ u16 sts;
puts("MiniPCIe/mSATA card detection... ");
@@ -210,24 +263,24 @@ static bool omnia_detect_sata(const char *msata_slot)
}
}
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, , sizeof(stsword));
+ ret = omnia_mcu_get_sts();
if (ret) {
printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe
card\n",
ret);
return false;
}
- if (!(stsword & STS_CARD_DET)) {
+ if (!(sts & STS_CARD_DET)) {
puts("none\n");
return false;
}
- if (stsword & STS_MSATA_IND)
+ if (sts & STS_MSATA_IND)
puts("mSATA\n");
else
puts("MiniPCIe\n");
- return stsword & STS_MSATA_IND;
+ return sts & STS_MSATA_IND;
}
static bool omnia_detect_wwan_usb3(const char *wwan_slot)
@@ -355,14 +408,14 @@ static int omnia_get_ram_size_gb(void)
static const char * const omnia_get_mcu_type(void)
{
static char result[] = "xxx (with peripheral resets)";
- u16 stsword, features;
+ u16 sts;
int ret;
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, , sizeof(stsword));
+ ret = omnia_mcu_get_sts();
if (ret)
return "unknown";
- switch (stsword & STS_MCU_TYPE_MASK) {
+ switch (sts & STS_MCU_TYPE_MASK) {
case STS_MCU_TYPE_STM32:
strcpy(result, "STM32");
break;
@@ -377,11 +430,8 @@ static const char * const omnia_get_mcu_type(void)
break;
}
- if (stsword & STS_FEATURES_SUPPORTED) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, ,
sizeof(features));
- if (ret == 0 && (features & FEAT_PERIPH_MCU))
- strcat(result, " (with peripheral resets)");
- }
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU))
+ strcat(result, " (with peripheral resets)");
return result;
}
@@ -660,9 +710,6 @@ int board_early_init_f(void)
void spl_board_init(void)
{
- u16 val;
- int ret;
-
/*
* If booting from UART, disable MCU watchdog in SPL, since uploading
* U-Boot proper can take too much time and trigger it. Instead enable
@@ -679,12 +726,8 @@ void spl_board_init(void)
* resets then LAN eth switch is initialized automatically by bootstrap
* pins when A385 is released from the reset.
[PATCH u-boot-mvebu v3 02/18] arm: mvebu: turris_omnia: Add header containing MCU command interface and use it
Add header containing all MCU command definitions and use it in board
code and in MCU driver.
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 81 +++-
drivers/gpio/turris_omnia_mcu.c | 54 +
include/turris-omnia-mcu-interface.h | 248 +++
3 files changed, 272 insertions(+), 111 deletions(-)
create mode 100644 include/turris-omnia-mcu-interface.h
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index adeb69a205..6c2d7da528 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -59,46 +60,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define A385_WD_RSTOUT_UNMASK MVEBU_REGISTER(0x20704)
#define A385_WD_RSTOUT_UNMASK_GLOBAL BIT(8)
-enum mcu_commands {
- CMD_GET_STATUS_WORD = 0x01,
- CMD_GET_RESET = 0x09,
- CMD_GET_FW_VERSION_APP = 0x0a,
- CMD_WATCHDOG_STATE = 0x0b,
- CMD_GET_FW_VERSION_BOOT = 0x0e,
-
- /* available if STS_FEATURES_SUPPORTED bit set in status word */
- CMD_GET_FEATURES= 0x10,
-
- /* available if EXT_CMD bit set in features */
- CMD_EXT_CONTROL = 0x12,
-};
-
-enum status_word_bits {
- STS_MCU_TYPE_MASK = GENMASK(1, 0),
- STS_MCU_TYPE_STM32 = 0,
- STS_MCU_TYPE_GD32 = 1,
- STS_MCU_TYPE_MKL= 2,
- STS_MCU_TYPE_UNKN = 3,
- STS_FEATURES_SUPPORTED = BIT(2),
- CARD_DET_STSBIT = 0x0010,
- MSATA_IND_STSBIT= 0x0020,
-};
-
-/* CMD_GET_FEATURES */
-enum features_e {
- FEAT_PERIPH_MCU = BIT(0),
- FEAT_EXT_CMDS = BIT(1),
-};
-
-/* CMD_EXT_CONTROL */
-enum ext_ctl_e {
- EXT_CTL_nRES_LAN= BIT(1),
- EXT_CTL_nRES_PHY= BIT(2),
- EXT_CTL_nPERST0 = BIT(3),
- EXT_CTL_nPERST1 = BIT(4),
- EXT_CTL_nPERST2 = BIT(5),
-};
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
@@ -219,7 +180,7 @@ static bool disable_mcu_watchdog(void)
puts("Disabling MCU watchdog... ");
- ret = omnia_mcu_write(CMD_WATCHDOG_STATE, "\x00", 1);
+ ret = omnia_mcu_write(CMD_SET_WATCHDOG_STATE, "\x00", 1);
if (ret) {
printf("omnia_mcu_write failed: %i\n", ret);
return false;
@@ -256,17 +217,17 @@ static bool omnia_detect_sata(const char *msata_slot)
return false;
}
- if (!(stsword & CARD_DET_STSBIT)) {
+ if (!(stsword & STS_CARD_DET)) {
puts("none\n");
return false;
}
- if (stsword & MSATA_IND_STSBIT)
+ if (stsword & STS_MSATA_IND)
puts("mSATA\n");
else
puts("MiniPCIe\n");
- return stsword & MSATA_IND_STSBIT ? true : false;
+ return stsword & STS_MSATA_IND;
}
static bool omnia_detect_wwan_usb3(const char *wwan_slot)
@@ -393,18 +354,7 @@ static int omnia_get_ram_size_gb(void)
static const char * const omnia_get_mcu_type(void)
{
- static const char * const mcu_types[] = {
- [STS_MCU_TYPE_STM32] = "STM32",
- [STS_MCU_TYPE_GD32] = "GD32",
- [STS_MCU_TYPE_MKL] = "MKL",
- [STS_MCU_TYPE_UNKN] = "unknown",
- };
- static const char * const mcu_types_with_perip_resets[] = {
- [STS_MCU_TYPE_STM32] = "STM32 (with peripheral resets)",
- [STS_MCU_TYPE_GD32] = "GD32 (with peripheral resets)",
- [STS_MCU_TYPE_MKL] = "MKL (with peripheral resets)",
- [STS_MCU_TYPE_UNKN] = "unknown (with peripheral resets)",
- };
+ static char result[] = "xxx (with peripheral resets)";
u16 stsword, features;
int ret;
@@ -412,13 +362,28 @@ static const char * const omnia_get_mcu_type(void)
if (ret)
return "unknown";
+ switch (stsword & STS_MCU_TYPE_MASK) {
+ case STS_MCU_TYPE_STM32:
+ strcpy(result, "STM32");
+ break;
+ case STS_MCU_TYPE_GD32:
+ strcpy(result, "GD32");
+ break;
+ case STS_MCU_TYPE_MKL:
+ strcpy(result, "MKL");
+ break;
+ default:
+ strcpy(result, "unknown");
+ break;
+ }
+
if (stsword & STS_FEATURES_SUPPORTED) {
ret = omnia_mcu_read(CMD_GET_FEATURES, ,
sizeof(features));
if (ret == 0 && (features & FEAT_PERIPH_MCU))
- return mcu_types_with_perip_resets[stsword &
STS_MCU_TYPE_MASK];
+ strcat(result, " (with peripheral resets)");
}
- return mcu_types[stsword & STS_MCU_TYPE_MASK];
+ return result;
}
static
[PATCH u-boot-mvebu v3 03/18] arm: mvebu: turris_{omnia, mox}: Don't print model two times
Since commit 8cd4bf7dc9ba ("turris: Use checkboard() instead of
show_board_info()") the model is show two times during boot:
Model: Turris Omnia
Model: Turris Omnia
This is because the common function show_board_info() shows it, and
Turris' checkboard() also does.
Remove the second print.
Fixes: 8cd4bf7dc9ba ("turris: Use checkboard() instead of show_board_info()")
Signed-off-by: Marek Behún
---
board/CZ.NIC/turris_mox/turris_mox.c | 5 +
board/CZ.NIC/turris_omnia/turris_omnia.c | 1 -
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c
b/board/CZ.NIC/turris_mox/turris_mox.c
index 3489bdd74b..1a2f60e3d1 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -565,13 +565,10 @@ static void handle_reset_button(void)
int checkboard(void)
{
int i, ret, board_version, ram_size, is_sd;
- const char *pub_key, *model;
+ const char *pub_key;
const u8 *topology;
u64 serial_number;
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- printf("Model: %s\n", model);
-
ret = mbox_sp_get_board_info(_number, NULL, NULL, _version,
_size, NULL);
if (ret < 0) {
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 6c2d7da528..87e33d88c4 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -933,7 +933,6 @@ int checkboard(void)
int err;
err = turris_atsha_otp_get_serial_number(serial);
- printf("Model: Turris Omnia\n");
printf(" MCU type: %s\n", omnia_get_mcu_type());
printf(" MCU version: %s\n", omnia_get_mcu_version());
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
--
2.43.2
[PATCH u-boot-mvebu v3 01/18] arm: mvebu: turris_omnia: Enable LTO by default on Turris Omnia
U-Boot builds for Turris Omnia are approaching the limit of 0xf bytes, which is the size of the U-Boot partition on Omnia. Enable LTO to get more size optimized binaries. Signed-off-by: Marek Behún --- configs/turris_omnia_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 29148402a1..39e15043df 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -31,6 +31,7 @@ CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_MEMTEST_START=0x0080 CONFIG_SYS_MEMTEST_END=0x00ff +CONFIG_LTO=y CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=983040 CONFIG_FIT=y -- 2.43.2
[PATCH u-boot-mvebu v3 00/18] Turris Omnia - New board revision support
Hi Stefan,
this is v3 of series adding support for new board revision of Turris
Omnia.
Changes since v2:
- patch 2: updated MCU command interface header
- patch 6: fixed bug setting \0 as end of string in src array instead
of dst array after bin2hex() call
- patch 16: updated commit message (added the bit about ctrl+c)
v1 and v2 at:
https://patchwork.ozlabs.org/project/uboot/cover/20240304152148.3847-1-ka...@kernel.org/
https://patchwork.ozlabs.org/project/uboot/cover/20240323180711.5498-1-ka...@kernel.org/
Marek Behún (18):
arm: mvebu: turris_omnia: Enable LTO by default on Turris Omnia
arm: mvebu: turris_omnia: Add header containing MCU command interface
and use it
arm: mvebu: turris_{omnia, mox}: Don't print model two times
arm: mvebu: turris_omnia: Update MCU status and features reading
arm: mvebu: turris_omnia: Implement getting board information from MCU
arm: mvebu: turris_omnia: Print board ECDSA public key if available
arm: mvebu: turris_omnia: Disable Atmel SHA node if not present
arm: mvebu: spl: Do not build mvebu-reset in SPL
arm: mvebu: system-controller: Rework to use UCLASS_SYSCON
arm: mvebu: system-controller: Select mvebu-reset if DM_RESET &&
PCI_MVEBU
arm: mvebu: system-controller: Add support for SYSRESET
gpio: turris_omnia_mcu: Use byteorder conversion functions
gpio: turris_omnia_mcu: Update firmware features reading
gpio: turris_omnia_mcu: Add support for system power off via sysreset
arm: mvebu: turris_omnia: Enable poweroff command via sysreset in
defconfig
cmd: rng: Print "Abort" on -EINTR
misc: turris_omnia_mcu: Add support for rng provided by MCU
arm: mvebu: turris_omnia: Enable rng command in defconfig
arch/arm/mach-mvebu/Kconfig | 25 ++
arch/arm/mach-mvebu/Makefile | 3 +-
arch/arm/mach-mvebu/cpu.c| 2 +
arch/arm/mach-mvebu/system-controller.c | 144 ++--
board/CZ.NIC/turris_atsha_otp.c | 27 +-
board/CZ.NIC/turris_mox/turris_mox.c | 5 +-
board/CZ.NIC/turris_omnia/Makefile | 2 +-
board/CZ.NIC/turris_omnia/turris_omnia.c | 310 -
cmd/rng.c| 7 +-
configs/turris_omnia_defconfig | 6 +
drivers/gpio/Kconfig | 7 -
drivers/gpio/Makefile| 1 -
drivers/gpio/turris_omnia_mcu.c | 316 -
drivers/misc/Kconfig | 11 +
drivers/misc/Makefile| 1 +
drivers/misc/turris_omnia_mcu.c | 411 +++
include/turris-omnia-mcu-interface.h | 248 ++
17 files changed, 1044 insertions(+), 482 deletions(-)
delete mode 100644 drivers/gpio/turris_omnia_mcu.c
create mode 100644 drivers/misc/turris_omnia_mcu.c
create mode 100644 include/turris-omnia-mcu-interface.h
--
2.43.2
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
Hi Tim,
On Wed, 27 Mar 2024 at 17:29, Tim Harvey wrote:
>
> On Wed, Mar 27, 2024 at 7:44 AM Ilias Apalodimas
> wrote:
> >
> > Hi Tim,
> >
> > On Thu, 21 Mar 2024 at 20:02, Tim Harvey wrote:
> > >
> > > Instead of displaying what looks like an error message if a
> > > gpio-reset dt prop is missing for a TPM dipslay a more
> > > informative message about resetting the TPM if the gpio is found:
> > >
> > > before:
> > > tpm_tis_spi_probe: missing reset GPIO
> > >
> > > after:
> > > tpm@0: performing 1ms reset on gpio@3021:12
> > >
> > > Note that the reset dt binding prop used in this driver is not
> > > dt-compliant; it does not exist in the Linux dt-bindings documentation
> > > and the reset is not done by the Linux driver.
> >
> > Probably for a good reason. You aren't supposed to be able to reset a
> > TPM without resetting the CPUI as well no?
>
> Hi Ilias,
>
> Could you clarify what you know about TPM reset? We use the ATTPM20P
> [1] which states in the datasheet under the reset pin: "To be
> compliant with TCG requirements, this pin needs to be tied to system
> reset. TPM_Init is indicated by asserting this pin."
In short, you shouldn't be able to toggle a GPIO and reset the TPM
without resetting the CPU as well.
An attacker could boot -> log into the OS -> reset the TPM -> replay
measurements and unseal keys that he shouldn't.
>
> Our boards have a resistor loading option which routes the TPM RST# to
> an SoC GPIO or alternately to a POR# (hardware power on reset provided
> by power supply and/or PMIC). Could you point me to where in the spec
> it explains what the TPM reset should be connected to?
I am aware of the the TCG TIS spec [0] which says
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the platform CPU
Reset signal such that it complies with the requirements specified in
section 1.2.7 HOST
Platform Reset in the PC Client Implementation Specification for
Conventional BIOS."
There might be other TCG specs defining this as well.
[0]
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf
>
> > That being said, printing that the TPM was reset is pointless imho.
> > OTOH the existing error message at least points out a potential
> > problem in the DT.
> >
>
> I'm not sure if you are NAK'ing this patch or asking me to change it.
>
> Displaying a 'missing GPIO' message is not helpful when there is no
> GPIO in the dt bindings to begin with.
I am not NAKing it. But isn't that message more useful than printing
the TPM did a reset? At least you get a hint of something that's
missing from your DT
Thanks
/Ilias
>
> Best Regards,
>
> Tim
> [1]
> https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf
>
>
> > Thanks
> > /Ilias
> > >
> > > Signed-off-by: Tim Harvey
> > > ---
> > > drivers/tpm/tpm2_tis_spi.c | 8
> > > 1 file changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
> > > index de9cf8f21e07..944540f7a711 100644
> > > --- a/drivers/tpm/tpm2_tis_spi.c
> > > +++ b/drivers/tpm/tpm2_tis_spi.c
> > > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev)
> > > /* legacy reset */
> > > ret = gpio_request_by_name(dev, "gpio-reset", 0,
> > >_gpio,
> > > GPIOD_IS_OUT);
> > > - if (ret) {
> > > - log(LOGC_NONE, LOGL_NOTICE,
> > > - "%s: missing reset GPIO\n", __func__);
> > > + if (ret)
> > > goto init;
> > > - }
> > > log(LOGC_NONE, LOGL_NOTICE,
> > > "%s: gpio-reset is deprecated\n", __func__);
> > > }
> > > + log(LOGC_NONE, LOGL_NOTICE,
> > > + "%s: performing 1ms reset on %s:%d\n", dev->name,
> > > + reset_gpio.dev->name, reset_gpio.offset);
> > > dm_gpio_set_value(_gpio, 1);
> > > mdelay(1);
> > > dm_gpio_set_value(_gpio, 0);
> > > --
> > > 2.25.1
> > >
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
Hi Tim,
On Tue, 26 Mar 2024 at 18:15, Tim Harvey wrote:
>
> On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
> wrote:
> >
> > Hi Tim,
> >
> > On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
> > >
> > > Greetings,
> > >
> > > I'm unable to understand why tcg2_platform_get_log is failing to read
> > > a memory region.
> > >
> > > For example the following diffs:
> >
> > I am not really sure what those nodes are supposed to do in sandbox.
> > Pehaps Eddie remembers.
> > What exactly are you trying to achieve here? Read the eventlog from TF-A?
> >
>
> Hi Ilias,
>
> I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
> a tpm on my board but ran into an issue when I couldn't get the
> memory-region I added for testing to be recognized with the current
> code in tcg2_platform_get_log().
>
> I wonder if an event log should be required for measured boot - it
> sounds like that was something required for EFI, so I was thinking of
> submitting the following:
> commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
> Author: Tim Harvey
> Date: Tue Mar 26 08:49:07 2024 -0700
>
> tpm: allow measured boot without an event log
>
> Currently an event log is required for measured boot. Remove this
> requirement.
>
> Signed-off-by: Tim Harvey
>
> diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> index 68eaaa639f89..994f8089ba34 100644
> --- a/lib/tpm-v2.c
> +++ b/lib/tpm-v2.c
> @@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
> tcg2_event_log *elog, u32 pcr_index,
> u32 event_size;
> u8 *log;
>
> - event_size = size + tcg2_event_get_size(digest_list);
> - if (elog->log_position + event_size > elog->log_size) {
> - printf("%s: log too large: %u + %u > %u\n", __func__,
> - elog->log_position, event_size, elog->log_size);
> - return -ENOBUFS;
> - }
> + if (elog->log_size) {
> + event_size = size + tcg2_event_get_size(digest_list);
> + if (elog->log_position + event_size > elog->log_size) {
> + printf("%s: log too large: %u + %u > %u\n", __func__,
> + elog->log_position, event_size,
> elog->log_size);
> + return -ENOBUFS;
> + }
>
> - log = elog->log + elog->log_position;
> - elog->log_position += event_size;
> + log = elog->log + elog->log_position;
> + elog->log_position += event_size;
>
> - tcg2_log_append(pcr_index, event_type, digest_list, size, event, log);
> + tcg2_log_append(pcr_index, event_type, digest_list,
> size, event, log);
> + }
>
> return 0;
> }
> @@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
> struct tcg2_event_log *elog,
> return rc;
>
> rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
> - if (rc) {
> + if (rc)
> tcg2_measurement_term(*dev, elog, true);
> - return rc;
> - }
>
> rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
> strlen(version_string) + 1,
>
> Would you agree with removing the requirement for the event log?
>
> I have another question that perhaps you may have some feedback on.
> The tpm commands such as pcr_extend, pcr_read currently require a
> 32-byte SHA256 digest and I wish to extend that as my TPM supports
> only SHA1. The tpm2_pcr_extend and tpm2_pcr_read functions were
> extended to function to allow the digest type and length to be passed
> in and I'm wondering what the best way to extend the tpm extend/read
> commands would be to support that.
We could add the argument of the algorithm of the PCR bank we want to
use on the command line. So do_tpm_pcr_read() etc could have an extra
argument for the chosen algorithm.
But we could also auto-detect the enabled PCR banks and extend/print
all of those without adding any extra arguments. That depends on what
functionality you are after (see below)
>
> The tcg2_create_digest function creates a digest based on the
> capabilities of the tpm and the tcg2_pcr_extend loops over those
> calling tpm2_pcr_extend for each digtest supported (and same for
> tcg2_pcr_read looping over tpm2_pcr_read) and I'm assuming TPM's can
> support multiple algos so I suppose a parameter needs to be added to
> the pcr_read and pcr_extend commands. Would you agree with that?
So you want to extend different PCR banks with different measurements?
The TCG spec for measured boot requires all active PCR banks to be
extended with measurements [0]. Specifically, it says
"The function SHALL successfully send the TPM2_PCR_Extend command to the TPM
to extend the PCR indicated by EfiTcgEvent.Header.PCRIndex with the measurement
digest. If the command cannot be sent successfully, the function SHALL return
EFI_DEVICE_ERROR. Firmware SHALL extend digests for all active PCR banks".
Re: [PATCH] mx6cuboxi: fix ethernet after synchronise device-tree
Hi Josua
> > Hi Josua
> >
> > My bisect showed me that after a device-tree sync the ethernet broke.
> >
> >> please take a look at this patch, I suspect it will (hack-)fix your
> >> ethernet issue.
> >>
> > Yes.. it fixes the problem I am seeing.
> >
> >> Unfortunately I had no time to revisit this yet and implement a correct
> >> solution.
> >>
> > Would it be okay for you if I look into a proper solution?
>
> Sure. I am swamped by other products at the moment.
>
> However I will provide a rough overview what needs to be done:
>
> Background: i.MX6 SoMs originally had a an atheros phy at unstable address,
> either 0 or 4 depending on electrical noise on floating configuration signals.
>
Would it be possible to set those configuration signals from the MX6
to a defined state and
then toggle the PHY reset , to force correct PHY address?
> Linux had solved this by placing 2 phy nodes in device-tree.
> During boot the kernel would attempt in order to probe the phys,
> then link the successful one to the ethernet netdev.
> As a side-effect there is always an error in the kernel log for one of the
> addresses.
>
> U-Boot had something similar in that with a special address (I think 0xff)
> in device-tree, the code will probe mdio bus for all addresses, but only
> for a single phy node in dts.
>
> With release of SoM 2.0 we changed to an analog devices phy at address 1,
> which most importantly uses a different driver, and requires a different
> description
> in device-tree.
>
> When adding this new phy, as a third node in device-tree, kernel maintainers
> requested a better solution, and we got u-boot to runtime patch dtb to update
> status properties of the dtb for linux, after probing mdio bus for phys.
>
Got it.
>
> Now - what u-boot needs to do is probe the mdio bus, and then runtime-patch
> its own DTB.
> Either with status properties, or for adding the phy-handle property (not
> sure which method will work).
>
We could patch DTB in SPL for U-Boot proper but doing a mdio scan in
SPL looks like a lot of work. Do
you know if there is a pull up/down resistor etc. that I could use to
detect pre SoM 2.0 and SoM 2.0?
Is this what board_type() does?
Is HummingBoard2 == SoM 2.0?
> This somehow has to happen after probing mdio driver, but before probing
> ethernet driver.
>
> > I have a
> > handful of such devices here
> > that are already or will be used in a CI farm so I am interested in
> > using the latest U-Boot for them.
> >
> >> sincerely
> >> Josua Mayer
> >>
> >> Am 28.07.22 um 09:08 schrieb Josua Mayer:
> >>> Please hold off merging this patch until someone tested it, I can not do
> >>> so this week.
> >>> @Tom Can you confirm if this fixes the networking on your Cubox?
> >>> Also note that the phy-handle property may or may not be required, I am
> >>> not sure.
> >>>
> >>> sincerely
> >>> Josua Mayer
> >>>
> >>> On Thu, Jul 28, 2022 at 7:05 AM Josua Mayer wrote:
> >>>
> >>> The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
> >>> addresses. U-Boot needs to auto-detect which phy is actually present,
> >>> and at which address it is responding.
> >>>
> >>> Auto-detection from multiple phy nodes specified in device-tree does
> >>> not
> >>> currently work correct. As a work-around merge all three possible phys
> >>> into one node with the special address 0x which indicates to
> >>> the
> >>> generic phy driver to probe all addresses.
> >>> Also fixup this fake address before booting Linux, *if* booting with
> >>> U-Boot's internal dtb.
> >>>
> >>> Signed-off-by: Josua Mayer
> >>> Fixes: d0399a46e7cd
> >>> ---
> >>> arch/arm/dts/imx6qdl-sr-som.dtsi | 30
> >>> +---
> >>> board/solidrun/mx6cuboxi/mx6cuboxi.c | 6 +-
> >>> 2 files changed, 14 insertions(+), 22 deletions(-)
> >>>
> >>> diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi
> >>> b/arch/arm/dts/imx6qdl-sr-som.dtsi
> >>> index ce543e325c..2d7cbc26b3 100644
> >>> ---_a/arch/arm/dts/imx6qdl-sr-som.dtsi
> >>> +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi
> >>> @@ -53,6 +53,7 @@
> >>> {
> >>> pinctrl-names = "default";
> >>> pinctrl-0 = <_microsom_enet_ar8035>;
> >>> + phy-handle = <>;
> >>> phy-mode = "rgmii-id";
> >>>
> >>> /*
> >>> @@ -68,30 +69,17 @@
> >>> #address-cells = <1>;
> >>> #size-cells = <0>;
> >>>
> >>> - /*
> >>> -* The PHY can appear at either address 0 or 4 due to
> >>> the
> >>> -* configuration (LED) pin not being pulled
> >>> sufficiently.
> >>> -*/
> >>> - ethernet-phy@0 {
> >>> - reg = <0>;
> >>> + phy: ethernet-phy@0 {
> >>> + /*
> >>> +* The PHY can appear either:
> >>> +
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
Hi both,
On Wed, 27 Mar 2024 at 17:22, Eddie James wrote:
>
>
> On 3/26/24 11:15, Tim Harvey wrote:
> > On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
> > wrote:
> >> Hi Tim,
> >>
> >> On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
> >>> Greetings,
> >>>
> >>> I'm unable to understand why tcg2_platform_get_log is failing to read
> >>> a memory region.
> >>>
> >>> For example the following diffs:
> >> I am not really sure what those nodes are supposed to do in sandbox.
> >> Pehaps Eddie remembers.
> >> What exactly are you trying to achieve here? Read the eventlog from TF-A?
> >>
> > Hi Ilias,
> >
> > I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
> > a tpm on my board but ran into an issue when I couldn't get the
> > memory-region I added for testing to be recognized with the current
> > code in tcg2_platform_get_log().
> >
> > I wonder if an event log should be required for measured boot - it
> > sounds like that was something required for EFI, so I was thinking of
> > submitting the following:
> > commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
> > Author: Tim Harvey
> > Date: Tue Mar 26 08:49:07 2024 -0700
> >
> > tpm: allow measured boot without an event log
> >
> > Currently an event log is required for measured boot. Remove this
> > requirement.
> >
> > Signed-off-by: Tim Harvey
> >
> > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > index 68eaaa639f89..994f8089ba34 100644
> > --- a/lib/tpm-v2.c
> > +++ b/lib/tpm-v2.c
> > @@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
> > tcg2_event_log *elog, u32 pcr_index,
> > u32 event_size;
> > u8 *log;
> >
> > - event_size = size + tcg2_event_get_size(digest_list);
> > - if (elog->log_position + event_size > elog->log_size) {
> > - printf("%s: log too large: %u + %u > %u\n", __func__,
> > - elog->log_position, event_size, elog->log_size);
> > - return -ENOBUFS;
> > - }
> > + if (elog->log_size) {
> > + event_size = size + tcg2_event_get_size(digest_list);
> > + if (elog->log_position + event_size > elog->log_size) {
> > + printf("%s: log too large: %u + %u > %u\n",
> > __func__,
> > + elog->log_position, event_size,
> > elog->log_size);
> > + return -ENOBUFS;
> > + }
> >
> > - log = elog->log + elog->log_position;
> > - elog->log_position += event_size;
> > + log = elog->log + elog->log_position;
> > + elog->log_position += event_size;
> >
> > - tcg2_log_append(pcr_index, event_type, digest_list, size, event,
> > log);
> > + tcg2_log_append(pcr_index, event_type, digest_list,
> > size, event, log);
> > + }
> >
> > return 0;
> > }
> > @@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
> > struct tcg2_event_log *elog,
> > return rc;
> >
> > rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
> > - if (rc) {
> > + if (rc)
> > tcg2_measurement_term(*dev, elog, true);
> > - return rc;
> > - }
> >
> > rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
> > strlen(version_string) + 1,
> >
> > Would you agree with removing the requirement for the event log?
>
>
> No, the log is required, otherwise it's fairly meaningless work. You
> need the log in your OS to verify the contents of the TPM.
It's the other way around. You trust the TPM and replay the event log
in memory to verify it's correct.
That being said, I do agree the event log is pretty useful when trying
to understand how and what the platform measured. In any case, I'd
rather fix any issues rather than sidestep them.
The return value of ofnode_get_addr_size() depends on a couple Kconfig
options. Any chance those differ from the ones Eddie is using?
Thanks
/Ilias
>
> Here is the device tree reserved memory stuff we're using, perhaps it
> will help.
>
> diff --git a/arch/arm/dts/ast2600-p10bmc.dts
> b/arch/arm/dts/ast2600-p10bmc.dts
> index 1d0f88bf96..8fbfeaa0d7 100755
> --- a/arch/arm/dts/ast2600-p10bmc.dts
> +++ b/arch/arm/dts/ast2600-p10bmc.dts
> @@ -13,6 +13,17 @@
> reg = <0x8000 0x4000>;
> };
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + event_log: tcg_event_log@b3d0 {
> + no-map;
> + reg = <0xb3d0 0x10>;
> + };
> + };
> +
> chosen {
> stdout-path =
> };
> @@ -113,6 +124,7 @@
> tpm@2e {
> compatible = "nuvoton,npct75x";
> reg = <0x2e>;
> + memory-region = <_log>;
> };
>
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
On 3/26/24 11:15, Tim Harvey wrote:
On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
wrote:
Hi Tim,
On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
Greetings,
I'm unable to understand why tcg2_platform_get_log is failing to read
a memory region.
For example the following diffs:
I am not really sure what those nodes are supposed to do in sandbox.
Pehaps Eddie remembers.
What exactly are you trying to achieve here? Read the eventlog from TF-A?
Would you agree with removing the requirement for the event log?
No, the log is required, otherwise it's fairly meaningless work. You
need the log in your OS to verify the contents of the TPM.
Here is the device tree reserved memory stuff we're using, perhaps it
will help.
diff --git a/arch/arm/dts/ast2600-p10bmc.dts
b/arch/arm/dts/ast2600-p10bmc.dts
index 1d0f88bf96..8fbfeaa0d7 100755
--- a/arch/arm/dts/ast2600-p10bmc.dts
+++ b/arch/arm/dts/ast2600-p10bmc.dts
@@ -13,6 +13,17 @@
reg = <0x8000 0x4000>;
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ event_log: tcg_event_log@b3d0 {
+ no-map;
+ reg = <0xb3d0 0x10>;
+ };
+ };
+
chosen {
stdout-path =
};
@@ -113,6 +124,7 @@
tpm@2e {
compatible = "nuvoton,npct75x";
reg = <0x2e>;
+ memory-region = <_log>;
};
};
I have another question that perhaps you may have some feedback on.
The tpm commands such as pcr_extend, pcr_read currently require a
32-byte SHA256 digest and I wish to extend that as my TPM supports
only SHA1. The tpm2_pcr_extend and tpm2_pcr_read functions were
extended to function to allow the digest type and length to be passed
in and I'm wondering what the best way to extend the tpm extend/read
commands would be to support that.
The tcg2_create_digest function creates a digest based on the
capabilities of the tpm and the tcg2_pcr_extend loops over those
calling tpm2_pcr_extend for each digtest supported (and same for
tcg2_pcr_read looping over tpm2_pcr_read) and I'm assuming TPM's can
support multiple algos so I suppose a parameter needs to be added to
the pcr_read and pcr_extend commands. Would you agree with that?
Best Regards,
Tim
Thanks
/Ilias
diff --git a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
index 7b2130dbdb21..57b3c227ceaf 100644
--- a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
@@ -112,6 +112,7 @@
compatible = "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <3600>;
+ memory-region = <_log>;
};
};
diff --git a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
index c305e325d007..697fd1148785 100644
--- a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
@@ -13,6 +13,17 @@
reg = <0x0 0x4000 0 0x8000>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ event_log: tcg_event_log {
+ no-map;
+ reg = <0 0x4000 0x2000>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
And at runtime:
u-boot=> fdt addr $fdtcontroladdr
u-boot=> fdt list
/soc@0/bus@3080/spba-bus@3080/spi@3083/tpm@1/
tpm@1 {
compatible = "tcg,tpm_tis-spi";
reg = <0x0001>;
spi-max-frequency = <0x02255100>;
memory-region = <0x0025>;
};
u-boot=> fdt list /reserved-memory/
reserved-memory {
#address-cells = <0x0002>;
#size-cells = <0x0002>;
ranges;
tcg_event_log {
};
};
u-boot=> fdt list /reserved-memory/tcg_event_log
tcg_event_log {
no-map;
reg = <0x 0x4000 0x2000>;
phandle = <0x0025>;
};
So why does the following code in tcg2_platform_get_log() return
-ENOMEM?
if (dev_read_phandle_with_args(dev, "memory-region", NULL, 0,
0, ))
return -ENODEV;
a = ofnode_get_addr_size(args.node, "reg", );
if (a == FDT_ADDR_T_NONE)
return -ENOMEM;
debugging shows that dev_read_phandle_with_args returns non-zero but
args.args_count is 0.
I feel like the construct of using dev_read_phandle_with_args followed
by the ofnode_get_addr_size is just wrong but I don't understand why
nor do I understand how my dt changes differ from what is in
arch/sandbox/dts/test.dts (other than its using address-size=1 which
doesn't appear to be the issue in my testing). The abstraction of the
ofnode and fdt stuff always trip me up... very confusing.
Can anyone explain the issue here?
Best Regards,
Tim
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
On Wed, Mar 27, 2024 at 7:44 AM Ilias Apalodimas
wrote:
>
> Hi Tim,
>
> On Thu, 21 Mar 2024 at 20:02, Tim Harvey wrote:
> >
> > Instead of displaying what looks like an error message if a
> > gpio-reset dt prop is missing for a TPM dipslay a more
> > informative message about resetting the TPM if the gpio is found:
> >
> > before:
> > tpm_tis_spi_probe: missing reset GPIO
> >
> > after:
> > tpm@0: performing 1ms reset on gpio@3021:12
> >
> > Note that the reset dt binding prop used in this driver is not
> > dt-compliant; it does not exist in the Linux dt-bindings documentation
> > and the reset is not done by the Linux driver.
>
> Probably for a good reason. You aren't supposed to be able to reset a
> TPM without resetting the CPUI as well no?
Hi Ilias,
Could you clarify what you know about TPM reset? We use the ATTPM20P
[1] which states in the datasheet under the reset pin: "To be
compliant with TCG requirements, this pin needs to be tied to system
reset. TPM_Init is indicated by asserting this pin."
Our boards have a resistor loading option which routes the TPM RST# to
an SoC GPIO or alternately to a POR# (hardware power on reset provided
by power supply and/or PMIC). Could you point me to where in the spec
it explains what the TPM reset should be connected to?
> That being said, printing that the TPM was reset is pointless imho.
> OTOH the existing error message at least points out a potential
> problem in the DT.
>
I'm not sure if you are NAK'ing this patch or asking me to change it.
Displaying a 'missing GPIO' message is not helpful when there is no
GPIO in the dt bindings to begin with.
Best Regards,
Tim
[1]
https://ww1.microchip.com/downloads/en/DeviceDoc/ATTPM20P-Trusted-Platform-Module-TPM-2.0-SPI-Interface-Summary-Data-Sheet-DS40002082A.pdf
> Thanks
> /Ilias
> >
> > Signed-off-by: Tim Harvey
> > ---
> > drivers/tpm/tpm2_tis_spi.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
> > index de9cf8f21e07..944540f7a711 100644
> > --- a/drivers/tpm/tpm2_tis_spi.c
> > +++ b/drivers/tpm/tpm2_tis_spi.c
> > @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev)
> > /* legacy reset */
> > ret = gpio_request_by_name(dev, "gpio-reset", 0,
> >_gpio,
> > GPIOD_IS_OUT);
> > - if (ret) {
> > - log(LOGC_NONE, LOGL_NOTICE,
> > - "%s: missing reset GPIO\n", __func__);
> > + if (ret)
> > goto init;
> > - }
> > log(LOGC_NONE, LOGL_NOTICE,
> > "%s: gpio-reset is deprecated\n", __func__);
> > }
> > + log(LOGC_NONE, LOGL_NOTICE,
> > + "%s: performing 1ms reset on %s:%d\n", dev->name,
> > + reset_gpio.dev->name, reset_gpio.offset);
> > dm_gpio_set_value(_gpio, 1);
> > mdelay(1);
> > dm_gpio_set_value(_gpio, 0);
> > --
> > 2.25.1
> >
Re: tcg2_platform_get_log failing to read address and size of memory-region via ofnode_get_addr_size
On 3/26/24 11:15, Tim Harvey wrote:
On Tue, Mar 26, 2024 at 2:24 AM Ilias Apalodimas
wrote:
Hi Tim,
On Tue, 26 Mar 2024 at 03:15, Tim Harvey wrote:
Greetings,
I'm unable to understand why tcg2_platform_get_log is failing to read
a memory region.
For example the following diffs:
I am not really sure what those nodes are supposed to do in sandbox.
Pehaps Eddie remembers.
What exactly are you trying to achieve here? Read the eventlog from TF-A?
Hi Ilias,
I was trying to get measured boot (CONFIG_MEASURED_BOOT=y) working on
a tpm on my board but ran into an issue when I couldn't get the
memory-region I added for testing to be recognized with the current
code in tcg2_platform_get_log().
I wonder if an event log should be required for measured boot - it
sounds like that was something required for EFI, so I was thinking of
submitting the following:
commit b3f336c2f863168219a93cd1c7ac922396e0fad5 (HEAD -> master-venice)
Author: Tim Harvey
Date: Tue Mar 26 08:49:07 2024 -0700
tpm: allow measured boot without an event log
Currently an event log is required for measured boot. Remove this
requirement.
Signed-off-by: Tim Harvey
diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
index 68eaaa639f89..994f8089ba34 100644
--- a/lib/tpm-v2.c
+++ b/lib/tpm-v2.c
@@ -175,17 +175,19 @@ static int tcg2_log_append_check(struct
tcg2_event_log *elog, u32 pcr_index,
u32 event_size;
u8 *log;
- event_size = size + tcg2_event_get_size(digest_list);
- if (elog->log_position + event_size > elog->log_size) {
- printf("%s: log too large: %u + %u > %u\n", __func__,
- elog->log_position, event_size, elog->log_size);
- return -ENOBUFS;
- }
+ if (elog->log_size) {
+ event_size = size + tcg2_event_get_size(digest_list);
+ if (elog->log_position + event_size > elog->log_size) {
+ printf("%s: log too large: %u + %u > %u\n", __func__,
+ elog->log_position, event_size, elog->log_size);
+ return -ENOBUFS;
+ }
- log = elog->log + elog->log_position;
- elog->log_position += event_size;
+ log = elog->log + elog->log_position;
+ elog->log_position += event_size;
- tcg2_log_append(pcr_index, event_type, digest_list, size, event, log);
+ tcg2_log_append(pcr_index, event_type, digest_list,
size, event, log);
+ }
return 0;
}
@@ -613,10 +615,8 @@ int tcg2_measurement_init(struct udevice **dev,
struct tcg2_event_log *elog,
return rc;
rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log);
- if (rc) {
+ if (rc)
tcg2_measurement_term(*dev, elog, true);
- return rc;
- }
rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
strlen(version_string) + 1,
Would you agree with removing the requirement for the event log?
No, the log is required, otherwise it's fairly meaningless work. You
need the log in your OS to verify the contents of the TPM.
Here is the device tree reserved memory stuff we're using, perhaps it
will help.
diff --git a/arch/arm/dts/ast2600-p10bmc.dts
b/arch/arm/dts/ast2600-p10bmc.dts
index 1d0f88bf96..8fbfeaa0d7 100755
--- a/arch/arm/dts/ast2600-p10bmc.dts
+++ b/arch/arm/dts/ast2600-p10bmc.dts
@@ -13,6 +13,17 @@
reg = <0x8000 0x4000>;
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ event_log: tcg_event_log@b3d0 {
+ no-map;
+ reg = <0xb3d0 0x10>;
+ };
+ };
+
chosen {
stdout-path =
};
@@ -113,6 +124,7 @@
tpm@2e {
compatible = "nuvoton,npct75x";
reg = <0x2e>;
+ memory-region = <_log>;
};
};
I have another question that perhaps you may have some feedback on.
The tpm commands such as pcr_extend, pcr_read currently require a
32-byte SHA256 digest and I wish to extend that as my TPM supports
only SHA1. The tpm2_pcr_extend and tpm2_pcr_read functions were
extended to function to allow the digest type and length to be passed
in and I'm wondering what the best way to extend the tpm extend/read
commands would be to support that.
The tcg2_create_digest function creates a digest based on the
capabilities of the tpm and the tcg2_pcr_extend loops over those
calling tpm2_pcr_extend for each digtest supported (and same for
tcg2_pcr_read looping over tpm2_pcr_read) and I'm assuming TPM's can
support multiple algos so I suppose a parameter needs to be added to
the pcr_read and pcr_extend commands. Would you agree with that?
Best Regards,
Tim
Thanks
/Ilias
diff --git a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
Re: [PATCH] tpm: display message when using gpio-reset instead of when missing it
Hi Tim,
On Thu, 21 Mar 2024 at 20:02, Tim Harvey wrote:
>
> Instead of displaying what looks like an error message if a
> gpio-reset dt prop is missing for a TPM dipslay a more
> informative message about resetting the TPM if the gpio is found:
>
> before:
> tpm_tis_spi_probe: missing reset GPIO
>
> after:
> tpm@0: performing 1ms reset on gpio@3021:12
>
> Note that the reset dt binding prop used in this driver is not
> dt-compliant; it does not exist in the Linux dt-bindings documentation
> and the reset is not done by the Linux driver.
Probably for a good reason. You aren't supposed to be able to reset a
TPM without resetting the CPUI as well no?
That being said, printing that the TPM was reset is pointless imho.
OTOH the existing error message at least points out a potential
problem in the DT.
Thanks
/Ilias
>
> Signed-off-by: Tim Harvey
> ---
> drivers/tpm/tpm2_tis_spi.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
> index de9cf8f21e07..944540f7a711 100644
> --- a/drivers/tpm/tpm2_tis_spi.c
> +++ b/drivers/tpm/tpm2_tis_spi.c
> @@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev)
> /* legacy reset */
> ret = gpio_request_by_name(dev, "gpio-reset", 0,
>_gpio, GPIOD_IS_OUT);
> - if (ret) {
> - log(LOGC_NONE, LOGL_NOTICE,
> - "%s: missing reset GPIO\n", __func__);
> + if (ret)
> goto init;
> - }
> log(LOGC_NONE, LOGL_NOTICE,
> "%s: gpio-reset is deprecated\n", __func__);
> }
> + log(LOGC_NONE, LOGL_NOTICE,
> + "%s: performing 1ms reset on %s:%d\n", dev->name,
> + reset_gpio.dev->name, reset_gpio.offset);
> dm_gpio_set_value(_gpio, 1);
> mdelay(1);
> dm_gpio_set_value(_gpio, 0);
> --
> 2.25.1
>
Re: [PATCH 3/4] arm: dts: k3-*-binman.dtsi: Clean up and templatize boot binaries
Hi, On Wed Mar 27, 2024 at 8:01 AM CET, Neha Malcom Francis wrote: > On 26/03/24 19:18, Michael Walle wrote: > > On Fri Mar 22, 2024 at 2:10 PM CET, Neha Malcom Francis wrote: > >> Clean up templatized boot binaries for all K3 boards. This includes > >> modifying the k3-binman.dtsi to use SPL_BOARD_DTB, BOARD_DESCRIPTION and > >> UBOOT_BOARD_DESCRIPTION from the files that include it to further reuse > >> code. > >> > >> All k3--binman.dtsi will contain only templates. Only required boot > >> binaries can be built from the templates in the boards' respective > >> -u-boot.dtsi file (or k3--binman.dtsi if it exists). This allows > >> clear distinction between the SoC common stuff vs. what is additionally > >> needed to boot up a specific board. > > > > I appreciate the cleanup. But as far as I can see, a board might > > only have one device tree. How would that work if the uboot proper > > must support multiple device trees? > > > > From the discussions that took place in the mailing list [1] the consensus > seems to be to not focus on multiple devicetree support as it leads to > confusion > for downstream users. What are users in this regard? I don't think you'd confuse developers. Anyway, I'm planning on upstreaming a TI board which will have different memory configurations and different variants of the board. And on top of that, it will just be a base board and there will likely be some carrier device trees (overlay? I'm not sure yet). As far as I can tell, you've put the memory configuration into the device tree, so I'll probably need to switch between them somehow. Also, regarding the board variants, I'll probably need to choose between multiple device trees. That is invisible to the user, because u-boot will choose the correct DTB according a board strapping, which btw. works really fine, see for example (boards/kontron/sl28/spl.c:board_fit_config_name_match). I don't think it makes much sense to hardcode your generic *-binman.dtsi to just one FIT configuration. I'd rather see a split between generic things which are shared across all boards and board specifics, like the FIT configuration. I mean I could just copy all the binman and tiboot3.bin and tispl.bin magic and put it into my own "-u-boot.dtsi". But I'm not sure that will make things any better. -michael
Re: [PATCH 1/2] rockchip: rk3588: Add support for ATAG parsing
On 3/27/24 15:32, Chris Morgan wrote:
> On Wed, Mar 27, 2024 at 06:32:06PM +0800, Kever Yang wrote:
>> Hi Chris,
>>
>> The ATAGS is used for passing parameter from bootloader to kernel at
>> first, which has been replaced by DTB now for ARM platform.
>>
>> And Rockchip using ATAGs for passing parameter like dram memory
>> size/board uart in different boot process like DRAM init binary/ TPL/SPL to
>> U-Boot since 2018.
>>
>> And almost at the same time, Simon add bloblist for mainline U-Boot
>> which for similar purpose.
>>
>> So I'm not sure if this ATAGS should be accept in mainline U-Boot or
>> not, even for rockchip platform only seems some kind of regression for this
>> feature support.
>>
>>
>> Hi Simon and Tom,
>>
>> Could you help to give some suggestion for this?
>>
>
> I really meant to do this as an "RFC", so I apologize in advance for
> possibly causing more work in treating this as a full-fledged patch.
>
> The problem I'm trying to solve is that I've got 2 boards, a Rock 5B
> as well as an Indiedroid Nova both with 16GB of RAM. I noticed that
> without the memory holes the Rock 5B defined in my Indiedroid it would
> also fail to boot. I've got 2 other boards as well with less than 16GB
> of RAM which seem to work fine without any holes (a 4GB Indiedroid Nova
> prototype and a GameForce Ace with 12GB of RAM).
Hi,
When I initially added these holes in the memory, I tried to ask Rockchip what
are
the holes for. I didn't get any answer, however the patches to reserve the holes
were accepted.
If we could get more information about why the holes are there, if that area is
specific to something, or that it's fixed in a per-SoC basis, we could reserve
it
by hardcoding in the Linux DT, without the need for ATAGs.
Without real information, we cannot be sure that for other variants of the SoC
or
some other bootrom configuration, the holes will not change/move.
Eugen
>
> The "RFC" part for which I'm really requesting guidance/comments is
> a question of "is it appropriate to use ATAGS" to get the RAM banks
> on this SoC, or is there a different way we should be doing it? If
> we can/should use the ATAGS, then I guess this can be pared down and
> refactored to just be RK3588 specific. If so, we can possibly add
> something like this to the RK3588 SoC specific code, guard it with
> an #ifdef ROCKCHIP_TPL to only call it when using the Rockchip
> specific RAM init (in the hopes that maybe one day we get our own
> RAM init), and then replace existing code for boards like the Rock 5B
> so that it no longer reserves these memory banks.
>
> Thank you,
> Chris.
>
>>
>> Thanks,
>> - Kever
>> On 2024/3/27 04:49, Chris Morgan wrote:
>>> From: Chris Morgan
>>>
>>> Add support for parsing the ATAGs created by the Rockchip binary
>>> RAM init. This ATAG parsing code was taken from the Rockchip BSP
>>> U-Boot source and tested only on parsing the RAM specific ATAGs
>>> for the RK3588.
>>>
>>> Signed-off-by: Chris Morgan
>>> ---
>>> arch/arm/include/asm/arch-rockchip/atags.h | 222 +
>>> arch/arm/mach-rockchip/Makefile| 1 +
>>> arch/arm/mach-rockchip/atags.c | 99 +
>>> 3 files changed, 322 insertions(+)
>>> create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h
>>> create mode 100644 arch/arm/mach-rockchip/atags.c
>>>
>>> diff --git a/arch/arm/include/asm/arch-rockchip/atags.h
>>> b/arch/arm/include/asm/arch-rockchip/atags.h
>>> new file mode 100644
>>> index 00..9bae66d7f8
>>> --- /dev/null
>>> +++ b/arch/arm/include/asm/arch-rockchip/atags.h
>>> @@ -0,0 +1,222 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * (C) Copyright 2018 Rockchip Electronics Co., Ltd
>>> + *
>>> + */
>>> +
>>> +#ifndef __RK_ATAGS_H_
>>> +#define __RK_ATAGS_H_
>>> +
>>> +/* Tag magic */
>>> +#define ATAG_CORE 0x54410001
>>> +#define ATAG_NONE 0x
>>> +
>>> +#define ATAG_SERIAL0x54410050
>>> +#define ATAG_BOOTDEV 0x54410051
>>> +#define ATAG_DDR_MEM 0x54410052
>>> +#define ATAG_TOS_MEM 0x54410053
>>> +#define ATAG_RAM_PARTITION 0x54410054
>>> +#define ATAG_ATF_MEM 0x54410055
>>> +#define ATAG_PUB_KEY 0x54410056
>>> +#define ATAG_SOC_INFO 0x54410057
>>> +#define ATAG_BOOT1_PARAM 0x54410058
>>> +#define ATAG_PSTORE0x54410059
>>> +#define ATAG_FWVER 0x5441005a
>>> +#define ATAG_MAX 0x544100ff
>>> +
>>> +/* Tag size and offset */
>>> +#define ATAGS_SIZE (0x2000)/* 8K */
>>> +#define ATAGS_OFFSET (0x20 - ATAGS_SIZE)/* [2M-8K, 2M] */
>>> +#define ATAGS_PHYS_BASE(CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
>>> +
>>> +/* tag_fwver.ver[fwid][] */
>>> +#define FWVER_LEN 36
>>> +
>>> +enum fwid {
>>> + FW_DDR,
>>> + FW_SPL,
>>> + FW_ATF,
>>> + FW_TEE,
>>> + FW_MAX,
>>> +};
>>> +
>>> +struct tag_serial {
>>> +
[PATCH] mx6cuboxi: Convert to watchdog driver model
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam
---
Christian,
Can you test this, please?
.../dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi | 10 ++
configs/mx6cuboxi_defconfig| 3 +++
2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
index 23a05773b579..e9b188ed6587 100644
--- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
@@ -13,6 +13,12 @@
4 0
>;
};
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
};
{
@@ -58,3 +64,7 @@
{
bootph-all;
};
+
+ {
+ bootph-pre-ram;
+};
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 66d4aaeda2d9..27ceb22599a6 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -71,6 +71,8 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
@@ -89,3 +91,4 @@ CONFIG_IMX_HDMI=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
+CONFIG_IMX_WATCHDOG=y
--
2.34.1
Re: [PATCH v3 0/6] TEE: minor cleanup
Hi Igor, On Wed, 27 Mar 2024 at 14:13, Igor Opaniuk wrote: > > Ilias, > > On Mon, Mar 4, 2024 at 6:45 PM Igor Opaniuk wrote: >> >> - Address some spelling errors and typos >> - Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests >> - Remove common.h inclusion for drivers/tee >> - Add calls for closing tee session after every read/write operation. >> >> CI build: >> [1] >> https://dev.azure.com/igoropaniuk/u-boot/_build/results?buildId=28=results >> >> Changes in v3: >> - Added calls for closing tee session after every read/write operation >> >> Changes in v2: >> - Fixed chimp_optee.c:37:9: error: implicit declaration of function 'memset' >> - Applied R-b and T-b tags >> >> Igor Opaniuk (6): >> tee: optee: fix description in Kconfig >> tee: sandbox: fix spelling errors >> cmd: optee_rpmb: close tee session >> cmd: optee_rpmb: build cmd for sandbox >> test: py: add optee_rpmb tests >> tee: remove common.h inclusion >> >> cmd/Kconfig| 4 +++- >> cmd/optee_rpmb.c | 23 +-- >> drivers/tee/broadcom/chimp_optee.c | 3 ++- >> drivers/tee/optee/Kconfig | 2 +- >> drivers/tee/optee/core.c | 1 - >> drivers/tee/optee/i2c.c| 1 - >> drivers/tee/optee/rpmb.c | 1 - >> drivers/tee/optee/supplicant.c | 2 +- >> drivers/tee/sandbox.c | 10 +- >> drivers/tee/tee-uclass.c | 1 - >> test/py/tests/test_optee_rpmb.py | 20 >> 11 files changed, 49 insertions(+), 19 deletions(-) >> create mode 100644 test/py/tests/test_optee_rpmb.py >> >> -- >> 2.34.1 >> > > Are there currently any comments/objections that can prevent these cosmetic > changes from being applied? CI is happy now and all tests are passing > successfully. > > If there are any - just let me know, thanks IIRC I did run this version on the CI and everything looked fine. I'll send a PR to Tom with it -- apologies for the delay Regards /Ilias > > Regards, > Igor > > -- > Best regards - Atentamente - Meilleures salutations > > Igor Opaniuk > > mailto: igor.opan...@gmail.com > skype: igor.opanyuk > https://www.linkedin.com/in/iopaniuk
[PATCH 4/4] zlib: Remove incorrect ZLIB_VERSION
Get rid of zlib version which is not correct because of U-Boot related
changes and various CVE backports.
The change in inspired by Linux kernel commit 4f3865fb57a0 ("[PATCH]
zlib_inflate: Upgrade library code to a recent version") which described
ZLIB_VERSION removal as
"This patch also removes ZLIB_VERSION as it no longer has a correct value.
We don't need version checks anyway as the kernel's module handling will
take care of that for us. This removal is also more in keeping with the
zlib author's wishes (http://www.zlib.net/zlib_faq.html#faq24) and I've
added something to the zlib.h header to note its a modified version."
Author describes wish to follow this guidance at
https://www.zlib.net/zlib_faq.html#faq24:
"The license says that altered source versions must be "plainly marked". So
what exactly do I need to do to meet that requirement?
You need to change the ZLIB_VERSION and ZLIB_VERNUM #defines in zlib.h. In
particular, the final version number needs to be changed to f, and an
identification string should be appended to ZLIB_VERSION. Version numbers
x.x.x.f are reserved for modifications to zlib by others than the zlib
maintainers. For example, if the version of the base zlib you are altering
is 1.2.3.4, then in zlib.h you should change ZLIB_VERNUM to 0x123f, and
ZLIB_VERSION to something like 1.2.3.f-zachary-mods-v3. You can also update
the version strings in deflate.c and inftrees.c."
But U-Boot is not exact version that's why following the same style which
has been used by Linux kernel where ZLIB_VERSION is completely removed.
Signed-off-by: Michal Simek
---
---
include/u-boot/zlib.h | 16 ++--
lib/gzip.c| 2 +-
lib/zlib/deflate.c| 13 +++--
lib/zlib/inflate.c| 9 +++--
lib/zlib/zutil.c | 1 -
5 files changed, 13 insertions(+), 28 deletions(-)
diff --git a/include/u-boot/zlib.h b/include/u-boot/zlib.h
index a33cc8780d33..ee19f4609588 100644
--- a/include/u-boot/zlib.h
+++ b/include/u-boot/zlib.h
@@ -49,9 +49,6 @@
extern "C" {
#endif
-#define ZLIB_VERSION "1.2.3"
-#define ZLIB_VERNUM 0x1230
-
/* #include "zconf.h" *//* included directly here */
/* zconf.h -- configuration of the zlib compression library
* Copyright (C) 1995-2005 Jean-loup Gailly.
@@ -484,7 +481,6 @@ typedef gz_header FAR *gz_headerp;
#define Z_DATA_ERROR (-3)
#define Z_MEM_ERROR(-4)
#define Z_BUF_ERROR(-5)
-#define Z_VERSION_ERROR (-6)
/* Return codes for the compression/decompression functions. Negative
* values are errors, positive values are used for special but normal events.
*/
@@ -523,11 +519,11 @@ typedef gz_header FAR *gz_headerp;
ZEXTERN int ZEXPORT deflate OF((z_streamp strm, int flush));
ZEXTERN int ZEXPORT deflateInit_ OF((z_streamp strm, int level,
- const char *version, int stream_size));
+ int stream_size));
ZEXTERN int ZEXPORT deflateEnd OF((z_streamp strm));
ZEXTERN int ZEXPORT deflateInit2_ OF((z_streamp strm, int level, int method,
int windowBits, int memLevel,
- int strategy, const char *version,
+ int strategy,
int stream_size));
ZEXTERN int ZEXPORT deflateReset OF((z_streamp strm));
ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm,
@@ -553,7 +549,7 @@ ZEXTERN int ZEXPORT deflateCopy OF((z_streamp dest,
ZEXTERN int ZEXPORT inflateInit_ OF((z_streamp strm,
- const char *version, int stream_size));
+ int stream_size));
ZEXTERN int ZEXPORT inflate OF((z_streamp strm, int flush));
/*
inflate decompresses as much data as possible, and stops when the input
@@ -743,11 +739,11 @@ ZEXTERN int ZEXPORT uncompress2 OF((Bytef *dest, uLongf
*destLen,
*/
ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits,
- const char *version, int stream_size));
+ int stream_size));
#define inflateInit(strm) \
- inflateInit_((strm), ZLIB_VERSION, sizeof(z_stream))
+ inflateInit_((strm), sizeof(z_stream))
#define inflateInit2(strm, windowBits) \
- inflateInit2_((strm), (windowBits), ZLIB_VERSION, sizeof(z_stream))
+ inflateInit2_((strm), (windowBits), sizeof(z_stream))
#if !defined(ZUTIL_H) && !defined(NO_DUMMY_DECL)
struct internal_state {int dummy;}; /* hack for buggy compilers */
diff --git a/lib/gzip.c b/lib/gzip.c
index 5d9c19598d5e..a9a3df524de1 100644
--- a/lib/gzip.c
+++ b/lib/gzip.c
@@ -67,7 +67,7 @@ int zzip(void *dst, unsigned long *lenp, unsigned char *src,
r = deflateInit2_(, Z_BEST_SPEED, Z_DEFLATED, window,
DEF_MEM_LEVEL, Z_DEFAULT_STRATEGY,
- ZLIB_VERSION, sizeof(z_stream));
+ sizeof(z_stream));
if (r != Z_OK) {
printf ("Error: deflateInit2_() returned %d\n", r);
return
[PATCH 3/4] zlib: Port fix for CVE-2016-9841 to U-Boot
The patch corresponds to zlib commit at
https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3618fc380cecb
which declares that it is fixing CVE-2016-9841.
Here is c description from zlib:
"Use post-increment only in inffast.c.
An old inffast.c optimization turns out to not be optimal anymore
with modern compilers, and furthermore was not compliant with the
C standard, for which decrementing a pointer before its allocated
memory is undefined. Per the recommendation of a security audit of
the zlib code by Trail of Bits and TrustInSoft, in support of the
Mozilla Foundation, this "optimization" was removed, in order to
avoid the possibility of undefined behavior."
Origin patch also updates the code when
INFLATE_ALLOW_INVALID_DISTANCE_TOOFAR_ARRR is present but this code is not
the part of U-Boot hence it is ignored.
Also do not deal with state->sane variable which requires other changes
which are also not the part of zlib.
Commit 92faa8b10918 ("zlib: handle overflow while calculating available
stream input size") is kept in inffast.c too not to break described case.
Signed-off-by: Michal Simek
---
The first attempt to fix this is here.
https://patchwork.ozlabs.org/project/uboot/patch/20220911084637.21513-1-jit.loon@intel.com/
---
lib/zlib/inffast.c | 130 +++--
1 file changed, 42 insertions(+), 88 deletions(-)
diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index bdaa6d0dc51f..5e2a65ad4d27 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -1,5 +1,5 @@
/* inffast.c -- fast decoding
- * Copyright (C) 1995-2004 Mark Adler
+ * Copyright (C) 1995-2008, 2010, 2013 Mark Adler
* For conditions of distribution and use, see copyright notice in zlib.h
*/
@@ -12,25 +12,6 @@
#ifndef ASMINF
-/* Allow machine dependent optimization for post-increment or pre-increment.
- Based on testing to date,
- Pre-increment preferred for:
- - PowerPC G3 (Adler)
- - MIPS R5000 (Randers-Pehrson)
- Post-increment preferred for:
- - none
- No measurable difference:
- - Pentium III (Anderson)
- - M68060 (Nikl)
- */
-#ifdef POSTINC
-# define OFF 0
-# define PUP(a) *(a)++
-#else
-# define OFF 1
-# define PUP(a) *++(a)
-#endif
-
/*
Decode literal, length, and distance codes and write out the resulting
literal and match bytes until either not enough input or output is
@@ -66,12 +47,13 @@
requires strm->avail_out >= 258 for each loop to avoid checking for
output space.
*/
-void inflate_fast(z_streamp strm, unsigned start)
-/* start: inflate()'s starting value for strm->avail_out */
+void ZLIB_INTERNAL inflate_fast(strm, start)
+z_streamp strm;
+unsigned start; /* inflate()'s starting value for strm->avail_out */
{
struct inflate_state FAR *state;
-unsigned char FAR *in; /* local strm->next_in */
-unsigned char FAR *last;/* while in < last, enough input available */
+z_const unsigned char FAR *in; /* local strm->next_in */
+z_const unsigned char FAR *last;/* have enough input while in < last */
unsigned char FAR *out; /* local strm->next_out */
unsigned char FAR *beg; /* inflate()'s initial strm->next_out */
unsigned char FAR *end; /* while out < end, enough space available */
@@ -97,7 +79,7 @@ void inflate_fast(z_streamp strm, unsigned start)
/* copy state to local variables */
state = (struct inflate_state FAR *)strm->state;
-in = strm->next_in - OFF;
+in = strm->next_in;
last = in + (strm->avail_in - 5);
if (in > last && strm->avail_in > 5) {
/*
@@ -107,7 +89,7 @@ void inflate_fast(z_streamp strm, unsigned start)
strm->avail_in = 0x - (uintptr_t)in;
last = in + (strm->avail_in - 5);
}
-out = strm->next_out - OFF;
+out = strm->next_out;
beg = out - (start - strm->avail_out);
end = out + (strm->avail_out - 257);
#ifdef INFLATE_STRICT
@@ -128,9 +110,9 @@ void inflate_fast(z_streamp strm, unsigned start)
input data or output space */
do {
if (bits < 15) {
-hold += (unsigned long)(PUP(in)) << bits;
+hold += (unsigned long)(*in++) << bits;
bits += 8;
-hold += (unsigned long)(PUP(in)) << bits;
+hold += (unsigned long)(*in++) << bits;
bits += 8;
}
here = lcode[hold & lmask];
@@ -143,14 +125,14 @@ void inflate_fast(z_streamp strm, unsigned start)
Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
"inflate: literal '%c'\n" :
"inflate: literal 0x%02x\n", here.val));
-PUP(out) = (unsigned char)(here.val);
+*out++ = (unsigned char)(here.val);
}
else if (op & 16) { /* length base */
len = (unsigned)(here.val);
op &= 15; /* number of extra bits */
if
[PATCH 2/4] zlib: Rename write variable to wnext (window write index)
There is no particular patch/description which described the reason for
this change but it was done as the part of zlib 1.2.3.5 release done by
zlib commit d004b047838a ("zlib 1.2.3.5"). It is preparation for followup
patch.
Signed-off-by: Michal Simek
---
lib/zlib/inffast.c | 20 ++--
lib/zlib/inflate.c | 22 +++---
lib/zlib/inflate.h | 2 +-
3 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index d61cf0e72af4..bdaa6d0dc51f 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -80,7 +80,7 @@ void inflate_fast(z_streamp strm, unsigned start)
#endif
unsigned wsize; /* window size or zero if not using window */
unsigned whave; /* valid bytes in the window */
-unsigned write; /* window write index */
+unsigned wnext; /* window write index */
unsigned char FAR *window; /* allocated sliding window, if wsize != 0 */
unsigned long hold; /* local strm->hold */
unsigned bits; /* local strm->bits */
@@ -115,7 +115,7 @@ void inflate_fast(z_streamp strm, unsigned start)
#endif
wsize = state->wsize;
whave = state->whave;
-write = state->write;
+wnext = state->wnext;
window = state->window;
hold = state->hold;
bits = state->bits;
@@ -201,7 +201,7 @@ void inflate_fast(z_streamp strm, unsigned start)
break;
}
from = window - OFF;
-if (write == 0) { /* very common case */
+if (wnext == 0) { /* very common case */
from += wsize - op;
if (op < len) { /* some from window */
len -= op;
@@ -211,17 +211,17 @@ void inflate_fast(z_streamp strm, unsigned start)
from = out - dist; /* rest from output */
}
}
-else if (write < op) { /* wrap around window */
-from += wsize + write - op;
-op -= write;
+else if (wnext < op) { /* wrap around window */
+from += wsize + wnext - op;
+op -= wnext;
if (op < len) { /* some from end of window */
len -= op;
do {
PUP(out) = PUP(from);
} while (--op);
from = window - OFF;
-if (write < len) { /* some from start of window */
-op = write;
+if (wnext < len) { /* some from start of window */
+op = wnext;
len -= op;
do {
PUP(out) = PUP(from);
@@ -231,7 +231,7 @@ void inflate_fast(z_streamp strm, unsigned start)
}
}
else { /* contiguous in window */
-from += write - op;
+from += wnext - op;
if (op < len) { /* some from window */
len -= op;
do {
@@ -343,7 +343,7 @@ void inflate_fast(z_streamp strm, unsigned start)
inflate_fast() speedups that turned out slower (on a PowerPC G3 750CXe):
- Using bit fields for code structure
- Different op definition to avoid & for extra bits (do & for table bits)
- - Three separate decoding do-loops for direct, window, and write == 0
+ - Three separate decoding do-loops for direct, window, and wnext == 0
- Special case for distance > 1 copies to do overlapped load and store copy
- Explicit branch predictions (based on measured branch probabilities)
- Deferring match copy and interspersed it with decoding subsequent codes
diff --git a/lib/zlib/inflate.c b/lib/zlib/inflate.c
index 8f767b7b9d2d..79c9e991aa33 100644
--- a/lib/zlib/inflate.c
+++ b/lib/zlib/inflate.c
@@ -21,7 +21,7 @@ int ZEXPORT inflateReset(z_streamp strm)
state->head = Z_NULL;
state->wsize = 0;
state->whave = 0;
-state->write = 0;
+state->wnext = 0;
state->hold = 0;
state->bits = 0;
state->lencode = state->distcode = state->next = state->codes;
@@ -115,7 +115,7 @@ local int updatewindow(z_streamp strm, unsigned out)
/* if window not in use yet, initialize */
if (state->wsize == 0) {
state->wsize = 1U << state->wbits;
-state->write = 0;
+state->wnext = 0;
state->whave = 0;
}
@@ -123,22 +123,22 @@ local int updatewindow(z_streamp strm, unsigned out)
copy = out - strm->avail_out;
if (copy >= state->wsize) {
[PATCH 1/4] zlib: Rename this variable to here (current decoding table entry)
There is no particular patch/description which described the reason for
this change but it was done as the part of zlib 1.2.3.5 release done by
zlib commit 639be997883d ("zlib 1.2.3.3") It is preparation for followup
patch.
Signed-off-by: Michal Simek
---
lib/zlib/inffast.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index e3c7f3b892bb..d61cf0e72af4 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -88,7 +88,7 @@ void inflate_fast(z_streamp strm, unsigned start)
code const FAR *dcode; /* local strm->distcode */
unsigned lmask; /* mask for first level of length codes */
unsigned dmask; /* mask for first level of distance codes */
-code this; /* retrieved table entry */
+code here; /* retrieved table entry */
unsigned op;/* code bits, operation, extra bits, or */
/* window position, window bytes to copy */
unsigned len; /* match length, unused bytes */
@@ -133,20 +133,20 @@ void inflate_fast(z_streamp strm, unsigned start)
hold += (unsigned long)(PUP(in)) << bits;
bits += 8;
}
-this = lcode[hold & lmask];
+here = lcode[hold & lmask];
dolen:
-op = (unsigned)(this.bits);
+op = (unsigned)(here.bits);
hold >>= op;
bits -= op;
-op = (unsigned)(this.op);
+op = (unsigned)(here.op);
if (op == 0) { /* literal */
-Tracevv((stderr, this.val >= 0x20 && this.val < 0x7f ?
+Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
"inflate: literal '%c'\n" :
-"inflate: literal 0x%02x\n", this.val));
-PUP(out) = (unsigned char)(this.val);
+"inflate: literal 0x%02x\n", here.val));
+PUP(out) = (unsigned char)(here.val);
}
else if (op & 16) { /* length base */
-len = (unsigned)(this.val);
+len = (unsigned)(here.val);
op &= 15; /* number of extra bits */
if (op) {
if (bits < op) {
@@ -164,14 +164,14 @@ void inflate_fast(z_streamp strm, unsigned start)
hold += (unsigned long)(PUP(in)) << bits;
bits += 8;
}
-this = dcode[hold & dmask];
+here = dcode[hold & dmask];
dodist:
-op = (unsigned)(this.bits);
+op = (unsigned)(here.bits);
hold >>= op;
bits -= op;
-op = (unsigned)(this.op);
+op = (unsigned)(here.op);
if (op & 16) { /* distance base */
-dist = (unsigned)(this.val);
+dist = (unsigned)(here.val);
op &= 15; /* number of extra bits */
if (bits < op) {
hold += (unsigned long)(PUP(in)) << bits;
@@ -297,7 +297,7 @@ void inflate_fast(z_streamp strm, unsigned start)
}
}
else if ((op & 64) == 0) { /* 2nd level distance code */
-this = dcode[this.val + (hold & ((1U << op) - 1))];
+here = dcode[here.val + (hold & ((1U << op) - 1))];
goto dodist;
}
else {
@@ -307,7 +307,7 @@ void inflate_fast(z_streamp strm, unsigned start)
}
}
else if ((op & 64) == 0) { /* 2nd level length code */
-this = lcode[this.val + (hold & ((1U << op) - 1))];
+here = lcode[here.val + (hold & ((1U << op) - 1))];
goto dolen;
}
else if (op & 32) { /* end-of-block */
--
2.44.0
