[EMAIL PROTECTED],
In message [EMAIL PROTECTED] you wrote:
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
drivers/i2c/Makefile | 10 +-
drivers/i2c/fsl_i2c.c |2 --
drivers/i2c/mxc_i2c.c |2 +-
drivers/i2c
-boot and in his private repo
will do folder with names which he choose.
Best regards,
Michal
Best regards
On Sat, Aug 23, 2008 at 15:05, Michal Simek [EMAIL PROTECTED] wrote:
Hi Ricardo, Stefan and Wolfgang,
I looked at patches which Ricardo sent. It is really nice to see that someone
And one more thing. I would like to see readme in one board folder where will be
written what design it is. If you use reference design from xilinx page please
write it. Or if is the design from BSB just write it to this file.
M
Ricardo Ribalda Delgado wrote:
Hi Stefan
First of all: Thanks
to compile u-boot with ll_temac and
test it on qemu every day.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
___
U
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u
communication
+ *
+ * Copyright (C) 2011 - 2012 Stephan Linz l...@li-pro.net
+ * Copyright (C) 2008 - 2011 Michal Simek mon...@monstr.eu
+ * Copyright (C) 2008 - 2011 PetaLogix
+ *
+ * Based on Yoshio Kashiwagi kashiw...@co-nss.co.jp driver
+ * Copyright (C) 2008 Nissin Systems Co.,Ltd.
+ * March 2008
Stephan Linz wrote:
U-Boot's multipple network supports enables to use
several ethernet drivers but microblaze-generic
platform config file select only one driver.
Reported-by: Michal Simek mon...@monstr.eu
Signed-off-by: Stephan Linz l...@li-pro.net
---
include/configs/microblaze-generic.h
here.
Michal
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 214 +++-
1 file changed, 96 insertions(+), 118 deletions(-)
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 26d2443..0d29894 100644
CONFIG_FPGA in past was bitfield where bits
were use for vendor identification.
This fix should be the part of this commit:
Improve configuration of FPGA subsystem
(sha1: 0133502e39ff89b67c26cb4015e0e7e8d9571184)
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 2
On 04/26/2013 12:25 PM, Michal Simek wrote:
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 214
+++-
1 file changed, 96 insertions(+), 118 deletions(-)
There are compilation failures
On 04/29/2013 05:39 AM, Heiko Schocher wrote:
Hello Michal,
AOn 23.04.2013 12:46, Michal Simek wrote:
Support Xilinx Zynq i2c controller.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
CC: Heiko Schocher h...@denx.de
---
Changes
On 04/27/2013 05:35 PM, Simon Glass wrote:
Hi Michal,
On Wed, Apr 24, 2013 at 1:30 AM, Michal Simek mon...@monstr.eu wrote:
Hi Simon,
here is also one small problem if you want to use patman just for one patch
then cover letter contains 0/1 but patch itself doesn't contain 1/1.
I think
On 04/27/2013 05:45 PM, Simon Glass wrote:
Hi Michal,
On Wed, Apr 24, 2013 at 1:27 AM, Michal Simek michal.si...@xilinx.com wrote:
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.
Add gpio driver and change Microblaze reset logic
://www.denx.de/git/u-boot-microblaze.git microblaze
for you to fetch changes up to 0f21f98dd4d6bff72df4eeaca4163779896cb336:
watchdog: Add support for Xilinx Microblaze watchdog (2013-04-30 11:22:43
+0200)
Michal Simek (4
for Xilinx Zynq (2013-04-30 11:39:28 +0200)
David Andrey (3):
arm: zynq: U-Boot udelay 1000 FIX
net: gem: Pass phy address to init
net: gem: Preserve clk on emio interface
Michal Simek (11):
arm: zynq
On 04/30/2013 05:44 PM, Tom Rini wrote:
On Tue, Apr 30, 2013 at 11:26:44AM +0200, Michal Simek wrote:
Hi Tom,
please pull these microblaze changes to your tree.
2 of that patches was reviewed by you.
Thanks,
Michal
The following changes since commit
On 04/30/2013 04:50 PM, Tom Rini wrote:
On Tue, Apr 30, 2013 at 11:49:33AM +0200, Michal Simek wrote:
Hi Tom and Albert,
please pull this patchset related to arm zynq to your tree.
I haven't got any ACK for gem and platform changes but the whole patchset
was reviewed by Tom.
Also not all
comments (fpga)
- Do not use CamelCase for XilinxZynq (fpga)
- Move to fpga series and extend this driver
- New patch in this series
Michal Simek (7):
fpga: Clean coding style
fpga: Fix debug message compilation error
cmd: fpga: Clean coding style
cmd: fpga: Move fpga_loadbitstream to fpga.c
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Fix compilation warnings
drivers/fpga/fpga.c | 216
1 file changed, 98 insertions(+), 118 deletions(-)
diff --git a/drivers/fpga/fpga.c b/drivers
CONFIG_FPGA in past was a bitfield where bits
were use for vendor identification.
This fix should be the part of this commit:
Improve configuration of FPGA subsystem
(sha1: 0133502e39ff89b67c26cb4015e0e7e8d9571184)
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Fix
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
I had to shorten some debug messages and divide them
to two parts to pass checkpatch.
---
common/cmd_fpga.c | 213 +++---
1 file changed, 107
Ensure that wrong bitstream won't be loaded
to current device.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- New patch in this series
drivers/fpga/fpga.c | 20
drivers/fpga/xilinx.c | 2 ++
include/xilinx.h | 1 +
include/zynqpl.h
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
common/cmd_fpga.c | 94
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Fix bugs reported by Tom Rini
- Fix checkpatch warnings (fpga)
- Fix comments (fpga)
- Do not use CamelCase for XilinxZynq (fpga)
- Move to fpga series and extend this driver
This patch was the part of zynq series but I have
There is no reason to include net.h header in fpga code.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
common/cmd_fpga.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index aa14ceb..5e1d037 100644
--- a/common
-generic.c:38:47: warning: operation on '*1073741824u'
may be undefined [-Wsequence-point]
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Use asm-generic/gpio.h file
- Add gpio_set_value()
- Check return value from gpio_get_controller
GPIO support for Microblaze
I want
On 05/01/2013 05:03 PM, Tom Rini wrote:
On Wed, May 01, 2013 at 10:59:20AM +0200, Michal Simek wrote:
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal
On 05/01/2013 05:14 PM, Tom Rini wrote:
On Wed, May 01, 2013 at 10:59:16AM +0200, Michal Simek wrote:
Fpga code is pretty old and none has tried to clean it up.
My attempt is related to new code I want to push to mainline
which is add support for checking bitstream and if bitstream
is valid
-generic.c:38:47: warning: operation on '*1073741824u'
may be undefined [-Wsequence-point]
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Use asm-generic/gpio.h file
- Add gpio_set_value()
- Check return value from gpio_get_controller
GPIO support for Microblaze
I want
(fpga)
- Do not use CamelCase for XilinxZynq (fpga)
- Move to fpga series and extend this driver
- New patch in this series
Michal Simek (9):
fpga: Clean coding style
fpga: Fix debug message compilation error
cmd: fpga: Clean coding style
cmd: fpga: Move fpga_loadbitstream to fpga.c
fpga
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3: None
Changes in v2:
- Fix compilation warnings
drivers/fpga/fpga.c | 216
1 file changed, 98 insertions(+), 118 deletions(-)
diff --git a/drivers
CONFIG_FPGA in past was a bitfield where bits
were use for vendor identification.
This fix should be the part of this commit:
Improve configuration of FPGA subsystem
(sha1: 0133502e39ff89b67c26cb4015e0e7e8d9571184)
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3: None
There is no reason to include net.h header in fpga code.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3: None
Changes in v2: None
common/cmd_fpga.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index aa14ceb..5e1d037 100644
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3: None
Changes in v2: None
I had to shorten some debug messages and divide them
to two parts to pass checkpatch.
---
common/cmd_fpga.c | 213 +++---
1 file
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3:
- Setup fpga_loadbitstream as weak function
Changes in v2
All fpga functions use devnum as int. Only fpga_loadbitstream
is using it as unsinged long dev.
This patch synchronize it.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3:
- New patch in this series
Changes in v2: None
drivers/fpga/fpga.c | 2 +-
drivers/fpga/xilinx.c
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3: None
Changes in v2:
- Fix bugs reported by Tom Rini
- Fix checkpatch warnings (fpga)
- Fix comments (fpga)
- Do not use CamelCase for XilinxZynq (fpga)
- Move to fpga series and extend this driver
This patch was the part of zynq
Ensure that wrong bitstream won't be loaded
to current device.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3:
- Rebase because of change in previous patch
- fpga_validate should be global function
- fix one printf function
- change parameter name according to previous
All these macros are completely unused by any code.
CONFIG_FPGA is not a bitfield anymore.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3:
- New patch in this series
Changes in v2: None
include/altera.h | 17 -
include/configs/M54455EVB.h
Prepare place for new patch.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/microblaze/lib/bootm.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 66d21f4..b992a4d 100644
fdt_initrd add additional information to DTB about initrd
addresses which are later used by kernel.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/microblaze/lib/bootm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib
to b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c:
fpga: Remove all CONFIG_SYS_* fpga related options (2013-05-06 10:41:30 +0200)
Michal Simek (9):
fpga: Clean coding style
fpga: Fix debug message compilation error
cmd: fpga: Clean coding style
On 05/03/2013 09:26 AM, Michal Simek wrote:
fdt_initrd add additional information to DTB about initrd
addresses which are later used by kernel.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/microblaze/lib/bootm.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Prepare place for new patch.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
arch/microblaze/lib/bootm.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 66d21f4
fdt_initrd add additional information to DTB about initrd
addresses which are later used by kernel.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Check return value from fdt_initrd
arch/microblaze/lib/bootm.c | 8
1 file changed, 8 insertions(+)
diff --git
Patman requires python 2.7.4 to run but it doesn't
need to be placed in /usr/bin/python.
Use env to ensure that the interpreter used is
the first one on environment's $PATH on system
with several versions of Python installed.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
tools/patman
I will try to
create patch to support this.
I just want to be sure that I am not doing something
what it is wrong for other platforms.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http
)
Michal Simek (2):
microblaze: bootm: Fix coding style issues
microblaze: bootm: Add support for loading initrd
arch/microblaze/lib/bootm.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID
)
Michal Simek (3):
microblaze: bootm: Fix coding style issues
microblaze: bootm: Add support for loading initrd
gpio: Add support for microblaze xilinx GPIO
arch/microblaze/include/asm/gpio.h | 40 +
arch/microblaze/lib/bootm.c
Remove ARM eabi exception handling tables (for frame unwinding).
AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
more or less just consume space. It should be OK to remove them.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Michal Simek
On 05/09/2013 11:37 PM, Scott Wood wrote:
On 05/06/2013 11:53:52 AM, Michal Simek wrote:
Hi guys,
Zynq supports 8 and 16bit ONFI nand flashes.
We can count number of connected pins and from that
we know if 8bit or 16bit nand flash is used.
I have looked at the code and contains ONFI
On 05/10/2013 09:07 PM, Albert ARIBAUD wrote:
Hi Michal,
On Thu, 9 May 2013 11:35:33 +0200, Michal Simek
michal.si...@xilinx.com wrote:
Remove ARM eabi exception handling tables (for frame unwinding).
AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
more or less
Hi Albert,
On 05/14/2013 05:44 PM, Albert ARIBAUD wrote:
Hi Michal,
On Mon, 13 May 2013 09:45:12 +0200, Michal Simek mon...@monstr.eu
wrote:
On 05/10/2013 09:07 PM, Albert ARIBAUD wrote:
Hi Michal,
On Thu, 9 May 2013 11:35:33 +0200, Michal Simek
michal.si...@xilinx.com wrote
representation
on name filed
= W25Q80BL/W25Q80BV
Just because of longer names which go probably to rodata section.
It is not a problem for me at all.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze
support for N25Q32A
sf: stmicro: Add support for N25Q256A
drivers/mtd/spi/spansion.c |2 +-
drivers/mtd/spi/stmicro.c | 30 ++
drivers/mtd/spi/winbond.c |5 +
3 files changed, 36 insertions(+), 1 deletions(-)
--
Michal Simek, Ing. (M.Eng)
w
: Perform software reset during slave setup
Michal Simek (5):
common: cmd_bdinfo: Fix bdinfo to show all MACs for Microblaze and ARM
board: xilinx: Remove unused ancient i2c driver
board: xilinx: Remove common folder
common: cmd_bdinfo: Fix compilation warning for microblaze
Enable DCC driver for arm zynq platform to be compiled.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
boards.cfg |1 +
include/configs/zynq.h |5 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/boards.cfg b/boards.cfg
index 98f7a14..1d30a18
The patch provides slcr base address initialization support
and a support to reset the cpu through slcr driver,
hence removed the reset_cpu() from board.c.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/cpu/armv7
Do lowlevel initialization directly in C. Zynq do not
require to do it in asm.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/cpu/armv7/zynq/cpu.c | 26 +++-
arch/arm/include/asm/arch-zynq/hardware.h | 46 -
2 files
2013/2/4 Tom Rini tr...@ti.com:
On Mon, Feb 04, 2013 at 12:26:08PM +0100, Michal Simek wrote:
Hi Tom,
please pull all these changes to your tree.
The major change is remove really ancient i2c driver + helper files
for this driver.
Thanks,
Michal
The following changes since commit
Hi,
2013/2/4 Marek Vasut ma...@denx.de:
Dear Michal Simek,
was this ever applied?
I have sent pull request to Tom and Mike. All patches around cf are here.
http://git.denx.de/?p=u-boot/u-boot-microblaze.git;a=shortlog;h=refs/heads/mainline/sf
Interesting that Tom applied this patch
The following changes since commit d62ef5619c9249772247d6af3b8e65207ae0c871:
Jagannadha Sutradharudu Teki (1):
sf: stmicro: Add support for N25Q256A
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git mainline/arm
Michal Simek (3):
xilinx: zynq
Hi Albert and Tom,
can you please look at my pull request?
Thanks,
Michal
2012/9/13 Michal Simek mon...@monstr.eu:
Hi Albert, CC: Joe and Tom
a month ago I have sent 4 Xilinx ARM zynq patches to mailing list (v2)
(reminder yesterday)
and I haven't got any reaction from anybody. The first
option based on what the
controller and chip connected supports. I guess your idea is to
dynamically perform the fastest read/write command based on
fastest command supported by controller and chip. I don't know
how to support this.
Dang, OK.
Any update on this?
Thanks,
Michal
--
Michal
Add support for Spansion S25FL256S SPI flash.
Signed-off-by: Michal Simek mon...@monstr.eu
---
drivers/mtd/spi/spansion.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c
index 9a114ac..32b76e0 100644
These options are just duplicated from arch/arm/cpu/armv7/config.mk
Signed-off-by: Michal Simek mon...@monstr.eu
---
arch/arm/cpu/armv7/highbank/config.mk|1 -
arch/arm/cpu/armv7/omap-common/config.mk |9 -
2 files changed, 0 insertions(+), 10 deletions(-)
delete mode 100644
Hi,
I am sending basic support for new Xilinx Zynq platform.
It is new ARM cortex a9 cpu with programmable logic.
For more information look at www.xilinx.com/zynq.
In future we are going to extend this platform for i2c, spi,
mmc, fpga, nand, nor support, and maybe more.
These drivers will be
Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek mon...@monstr.eu
CC: Joe Hershberger joe.hershber...@gmail.com
---
drivers/net/Makefile |1 +
drivers/net/xilinx_gem.c | 514 ++
include/netdev.h |1 +
3 files changed, 516
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
arch/arm/cpu/armv7/zynq/Makefile | 48
arch/arm/cpu/armv7/zynq/timer.c | 151 ++
2 files changed, 199 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/zynq
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
board/xilinx/zynq/Makefile| 57 +
board/xilinx/zynq/board.c | 64 +
board/xilinx/zynq/lowlevel_init.S | 27
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
drivers/serial/Makefile |1 +
drivers/serial/serial_xpssuart.c | 218 ++
2 files changed, 219 insertions(+), 0 deletions(-)
create mode 100644 drivers
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Forget to also add config file
---
board/xilinx/zynq/Makefile| 57 +
board/xilinx/zynq/board.c | 64 +++
board/xilinx/zynq/lowlevel_init.S | 27
On 08/14/2012 01:42 PM, Michal Simek wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
board/xilinx/zynq/Makefile| 57 +
board/xilinx/zynq/board.c | 64 +
board
On 08/14/2012 05:36 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 6:42 AM, Michal Simek mon...@monstr.eu wrote:
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
arch/arm/cpu/armv7/zynq/Makefile | 48
arch/arm/cpu/armv7/zynq/timer.c | 151
On 08/14/2012 04:09 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 6:42 AM, Michal Simek mon...@monstr.eu wrote:
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
drivers/serial/Makefile |1 +
drivers/serial
Hi Joe,
On 08/14/2012 04:59 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 6:42 AM, Michal Simek mon...@monstr.eu wrote:
Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek mon...@monstr.eu
CC: Joe Hershberger joe.hershber...@gmail.com
---
drivers/net/Makefile
On 08/14/2012 06:41 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 11:28 AM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 05:36 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 6:42 AM, Michal Simek mon...@monstr.eu wrote:
Add timer driver.
Signed-off
On 08/14/2012 06:45 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 11:38 AM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 04:09 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 6:42 AM, Michal Simek mon...@monstr.eu wrote:
The driver is used on Xilinx
On 08/14/2012 07:15 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 12:11 PM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 06:41 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 11:28 AM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 05:36 PM, Joe
On 08/14/2012 08:19 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 12:39 PM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 07:15 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 12:11 PM, Michal Simek mon...@monstr.eu wrote:
On 08/14/2012 06:41 PM, Joe
Hi Joe,
sorry missed this one.
On 08/14/2012 05:48 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 7:15 AM, Michal Simek mon...@monstr.eu wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Forget to also add config file
---
board
Hi Joe,
On 08/15/2012 07:31 PM, Joe Hershberger wrote:
Hi Michal,
On Wed, Aug 15, 2012 at 3:49 AM, Michal Simek mon...@monstr.eu wrote:
Hi Joe,
sorry missed this one.
On 08/14/2012 05:48 PM, Joe Hershberger wrote:
Are you thinking that this will be the one and only Zynq board?
Perhaps
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Use Zynq name instead of Dragonfire and XPSS/XDFUART
Rename driver name
Remove driver description
---
drivers/serial/Makefile |1 +
drivers/serial/serial_zynq.c | 200
Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek mon...@monstr.eu
CC: Joe Hershberger joe.hershber...@gmail.com
---
v2: Remove phylib protection
Rename driver file name xilinx_gem to zynq_gem
Rename XEMACPSS to ZYNQ_GEM
Rename gemac_priv to zynq_gem_priv
Rename gem_regs
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Forget to also add config file
v3: Change name for serial driver
Remove lowlevel_init from board folder
Remove XPSS part from timer baseaddr
Change name for Zynq gem driver
Clean coding style
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Move lowlevel_init.S from board to cpu folder
Remove XPSS prefix
Rename XSCUTIMER - SCUTIMER
Keep timer in zynq folder till ARM custodian comments it.
---
arch/arm/cpu/armv7/zynq/Makefile| 52
On 08/16/2012 07:27 PM, Joe Hershberger wrote:
Hi Michal,
On Thu, Aug 16, 2012 at 1:12 AM, Michal Simek mon...@monstr.eu wrote:
Hi Joe,
On 08/15/2012 07:31 PM, Joe Hershberger wrote:
Hi Michal,
I believe this is a fundamental misunderstanding of the Zynq architecture.
I don't think
://www.denx.de/git/u-boot-microblaze.git master
Michal Simek (10):
block: systemace: Simplify base and width initialization
serial: Support serial multi for Microblaze
serial: uartlite: Init all uartlites for serial multi
microblaze: Add support for device tree driven board
On 08/16/2012 08:30 AM, Michal Simek wrote:
Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek mon...@monstr.eu
CC: Joe Hershberger joe.hershber...@gmail.com
---
v2: Remove phylib protection
Rename driver file name xilinx_gem to zynq_gem
Rename XEMACPSS to ZYNQ_GEM
On 08/16/2012 08:30 AM, Michal Simek wrote:
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Use Zynq name instead of Dragonfire and XPSS/XDFUART
Rename driver name
Remove driver description
---
drivers/serial/Makefile |1
On 08/16/2012 08:30 AM, Michal Simek wrote:
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Move lowlevel_init.S from board to cpu folder
Remove XPSS prefix
Rename XSCUTIMER - SCUTIMER
Keep timer in zynq folder till ARM custodian comments it.
---
arch/arm
On 08/16/2012 08:30 AM, Michal Simek wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Forget to also add config file
v3: Change name for serial driver
Remove lowlevel_init from board folder
Remove XPSS part from timer baseaddr
-avr32
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git master-zynq
Michal Simek (4):
serial: Add Zynq serial driver
net: Add driver for Zynq Gem IP
arm: Support new Xilinx Zynq platform
xilinx: Add new Zynq board
arch/arm/cpu/armv7/zynq
On 09/13/2012 11:32 AM, Marek Vasut wrote:
Dear Michal Simek,
On 08/16/2012 08:30 AM, Michal Simek wrote:
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Move lowlevel_init.S from board to cpu folder
Remove XPSS prefix
Rename XSCUTIMER - SCUTIMER
Keep
On 09/13/2012 11:21 AM, Marek Vasut wrote:
Dear Michal Simek,
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Use Zynq name instead of Dragonfire and XPSS/XDFUART
Rename driver name
Remove driver description
---
drivers/serial
On 09/13/2012 11:31 AM, Marek Vasut wrote:
Dear Michal Simek,
[...]
+#include config.h
+#include linux/linkage.h
+
+ENTRY(lowlevel_init)
+mov pc, lr
+ENDPROC(lowlevel_init)
inline void lowlevel_init(void) {} works as well and you don't need the assembly
file.
:-) yes
On 09/13/2012 11:35 AM, Marek Vasut wrote:
Dear Michal Simek,
[...]
+int board_init(void)
+{
+ icache_enable();
Uh oh ... isn't this on by default when CONFIG_ICACHE_OFF isn't present?
Will check this one.
+ return 0;
+}
+
+int board_late_init(void)
+{
+ return 0
On 09/13/2012 11:28 AM, Marek Vasut wrote:
Dear Michal Simek,
[...]
+static inline int mdio_wait(struct eth_device *dev)
+{
+ struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev-iobase;
+ u32 timeout = 200;
+
+ /* Wait till MDIO interface is ready to accept a new
On 09/13/2012 12:31 PM, Marek Vasut wrote:
Dear Michal Simek,
On 09/13/2012 11:31 AM, Marek Vasut wrote:
Dear Michal Simek,
[...]
+#include config.h
+#include linux/linkage.h
+
+ENTRY(lowlevel_init)
+mov pc, lr
+ENDPROC(lowlevel_init)
inline void lowlevel_init(void) {} works
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