On 3/5/24 12:02, Venkatesh Yadav Abbarapu wrote:
USB4 has been added to the boot targets and
also add support to enable JTAG.
Signed-off-by: Shubhangi Shrikrushna Mahalle
Signed-off-by: Venkatesh Yadav Abbarapu
---
board/xilinx/zynqmp/zynqmp_kria.env | 3 ++-
1 file changed, 2 insertion
On 3/11/24 16:09, Tom Rini wrote:
On Mon, Mar 11, 2024 at 03:52:57PM +0100, Michal Simek wrote:
On 3/11/24 15:39, Tom Rini wrote:
On Mon, Mar 11, 2024 at 02:40:59PM +0530, Love Kumar wrote:
Hi,
On 11/03/24 2:11 pm, Angelo Dureghello wrote:
Hi,
jfyi,
reset support added in qemu
merged
On 3/11/24 15:39, Tom Rini wrote:
On Mon, Mar 11, 2024 at 02:40:59PM +0530, Love Kumar wrote:
Hi,
On 11/03/24 2:11 pm, Angelo Dureghello wrote:
Hi,
jfyi,
reset support added in qemu
merged as commit d3c79c3974.
Regards,
angelo
The other issue was with echo commands:
=> echo $modeboot
$
Describe usb wakeup interrupt.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index daae23c12b79..c19d86e5a0c4 100644
--- a/arch/arm/dts/zynqmp.dtsi
Based on dt schema there is no need to specify flash via additional
compatible string and generic are enough.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sc-revB.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts
All gpio-key descriptionos with dt-schema.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sc-revB.dts| 2 +-
arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts | 2 +-
arch/arm/dts/zynqmp-vpk120-revA.dts| 2 +-
arch/arm/dts/zynqmp-zcu208-revA.dts| 2 +-
arch/arm/dts
On 3/7/24 08:56, Angelo Dureghello wrote:
Hi Tom,
On 07/03/24 1:10 AM, Tom Rini wrote:
On Thu, Mar 07, 2024 at 12:36:42AM +0100, Angelo Dureghello wrote:
Hi,
On 05/03/24 1:34 PM, Michal Simek wrote:
On 3/3/24 22:58, Angelo Dureghello wrote:
Hi Tom,
On Tue, Feb 20, 2024 at 01:11:38PM
On 3/5/24 16:47, Ilias Apalodimas wrote:
On Fri, Feb 23, 2024 at 05:18:42PM +0100, Michal Simek wrote:
There is no reason to describe u-boot.itb on system without SPL. Pretty
much this is cover all systems which are using only boot.bin which contains
all images inside.
Signed-off-by: Michal
On 3/3/24 22:58, Angelo Dureghello wrote:
Hi Tom,
On Tue, Feb 20, 2024 at 01:11:38PM +0530, Love Kumar wrote:
Add a test for reset commands which performs resetting of CPU, It does COLD
reset by default and WARM reset with -w option. Signed-off-by: Love Kumar
Reviewed-by: Tom Rini --- Cha
On 3/1/24 12:12, Venkatesh Yadav Abbarapu wrote:
Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply ignores and switches to hw ecc. So better print
what is being done.
Revert this patch once soft ecc support is fixed in future.
Signed-off-by: Ashok
On 2/14/24 12:52, Michal Simek wrote:
Hi,
enhance MB-V support with SPL configuration to support OpenSBI.
All of that changes are out of generic Risc-V support that's why happy to
take it via my tree. Please let me know if you want this to take via riscv
subtree.
Applied via my xilinx
On 2/26/24 16:54, Michal Simek wrote:
Remove undocumented DT property. Suggested solution was to apply quirk
via glue logic driver that's why make no sense to have it listed in DT.
Signed-off-by: Michal Simek
---
For more information please take a look at:
https://lore.kernel.
On 2/23/24 15:06, Steffen Dirkwinkel wrote:
From: Steffen Dirkwinkel
These are used during sdhci initialization as functions are called with
node_id even if we're not talking to the firmware.
Signed-off-by: Steffen Dirkwinkel
---
configs/xilinx_zynqmp_virt_defconfig | 2 +-
1 file chan
On 2/27/24 09:57, Lukas Funke wrote:
On 27.02.2024 09:45, Michal Simek wrote:
On 2/27/24 09:40, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
Some zynqmp SoCs (the cg series) only have two cpus. Thus, for some
cases the cpu-affinity has to adapted, because cpu3 and cpu4 are
On 2/27/24 09:40, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
Some zynqmp SoCs (the cg series) only have two cpus. Thus, for some
cases the cpu-affinity has to adapted, because cpu3 and cpu4 are
interrupt-affinity right?
missing. By adding a label to the pmu fwnode the cpu
Remove undocumented DT property. Suggested solution was to apply quirk
via glue logic driver that's why make no sense to have it listed in DT.
Signed-off-by: Michal Simek
---
For more information please take a look at:
https://lore.kernel.org/r/1708023665-1441674-1-git-send-
There is no reason to describe u-boot.itb on system without SPL. Pretty
much this is cover all systems which are using only boot.bin which contains
all images inside.
Signed-off-by: Michal Simek
---
board/xilinx/common/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Generate dfu_alt_info generation based on information from MTD partitions.
mtd_found_part() is trying to identify MTD partition which code is running
from. If partitions are not defined and location is not found it is going
to previous behavior.
Signed-off-by: Michal Simek
---
board/xilinx
On 2/22/24 21:05, Sean Anderson wrote:
Currently, when we boot from JTAG we try to boot U-Boot from RAM.
However, this is a bit tricky to time, since the debugger has to wait
for SPL to initialize RAM before it can load U-Boot. This can result in
long waits, since occasionally initializing RAM
On 2/20/24 20:30, Sean Anderson wrote:
On 2/20/24 14:18, Michal Simek wrote:
On 2/20/24 19:43, Sean Anderson wrote:
On 2/20/24 13:24, Michal Simek wrote:
On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24
On 2/20/24 19:43, Sean Anderson wrote:
On 2/20/24 13:24, Michal Simek wrote:
On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24 14:48, Michal Simek wrote:
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24
On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24 14:48, Michal Simek wrote:
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24 14:08, Michal Simek wrote:
On 2/15/24 18:19, Sean Anderson wrote:
Currently
On 2/16/24 14:48, Michal Simek wrote:
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24 14:08, Michal Simek wrote:
On 2/15/24 18:19, Sean Anderson wrote:
Currently, when we boot from JTAG we try to boot U-Boot from RAM.
However, this is a bit tricky to time, since the debugger has to
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24 14:08, Michal Simek wrote:
On 2/15/24 18:19, Sean Anderson wrote:
Currently, when we boot from JTAG we try to boot U-Boot from RAM.
However, this is a bit tricky to time, since the debugger has to wait
for SPL to initialize RAM before it
On 2/15/24 18:19, Sean Anderson wrote:
Currently, when we boot from JTAG we try to boot U-Boot from RAM.
However, this is a bit tricky to time, since the debugger has to wait
for SPL to initialize RAM before it can load U-Boot. This can result in
long waits, since occasionally initializing RAM
- ret = fwu_make_mdata(images, banks, argv + optind, argv[argc - 1]);
+ ret = fwu_make_mdata(images, banks, vendor_file, argv + optind,
+argv[argc - 1]);
if (ret < 0)
fprintf(stderr, "Error: Failed to parse and write image: %s\n",
strerror(-ret));
Tested-by: Michal Simek
Thanks,
Michal
Hi,
On 2/12/24 08:47, Sughosh Ganu wrote:
Migrate the metadata generation tool to generate the version 2
metadata.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Compute location of struct fwu_fw_store_desc using pointer
arithmetic.
tools/mkfwumdata.c | 45 +
O for mini configurations
versal-net:
- Enable LTO for mini configurations
- Fix GIC address to aligned with real silicon
xilinx:
- DTs cleanup and fixups
- Enable HTTP boot
- Add missing spl header to zynqmp.c
--------
Michal Simek (10):
align addresses for both defconfigs.
Signed-off-by: Michal Simek
---
arch/riscv/dts/xilinx-mbv32.dts | 3 +++
board/xilinx/common/board.c | 8
board/xilinx/mbv/Kconfig | 11 +++
board/xilinx/mbv/board.c | 10 ++
co
ff-by: Michal Simek
---
drivers/serial/serial_xuartlite.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/serial_xuartlite.c
b/drivers/serial/serial_xuartlite.c
index b6197da97cc1..35df413321fe 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/s
Hardcode DTB address to specific address.
Signed-off-by: Michal Simek
---
board/xilinx/Kconfig | 1 +
configs/xilinx_mbv32_defconfig | 1 -
configs/xilinx_mbv32_smode_defconfig | 1 -
3 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/board/xilinx/Kconfig b
Create also u-boot.elf out of u-boot ELF. It is better to align it with
other Xilinx SOC where u-boot.elf also exists and tools like bootgen works
only with files with .elf extension.
Signed-off-by: Michal Simek
---
configs/xilinx_mbv32_defconfig | 1 +
configs
Better to align everything with memory map described in DT to avoid
mistakes. Execute both modes form the same address to make address map more
understandable.
Signed-off-by: Michal Simek
---
board/xilinx/mbv/Kconfig | 3 +--
configs/xilinx_mbv32_defconfig | 3 +--
configs
Hi,
enhance MB-V support with SPL configuration to support OpenSBI.
All of that changes are out of generic Risc-V support that's why happy to
take it via my tree. Please let me know if you want this to take via riscv
subtree.
Thanks,
Michal
Michal Simek (5):
riscv: mbv: Align addresses
=block,sync bs=8 2>/dev/null;
+
OBJCOPYFLAGS_u-boot-x86-start16-spl.bin := -O binary -j .start16
$(obj)/u-boot-x86-start16-spl.bin: $(obj)/u-boot-spl FORCE
$(call if_changed,objcopy)
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
On 2/6/24 12:51, Michal Simek wrote:
Previous addresses where used in past in emulation environment but never
gets to silicon that's why use correct addresses.
Signed-off-by: Michal Simek
---
include/configs/xilinx_versal_net.h | 4 ++--
1 file changed, 2 insertions(+), 2 dele
r Opaniuk
---
Changes in v2:
- Dropped "Default n" in Kconfig as Michal Simek suggested
- Adjusted commit message about QEMU validation
arch/arm/cpu/armv8/Kconfig | 4 +
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/sha512_ce_core.S | 210
On 2/11/24 18:26, Igor Opaniuk wrote:
Hi Tom,
On Sun, Feb 11, 2024 at 1:37 AM Tom Rini wrote:
On Sat, Feb 10, 2024 at 01:07:09PM +0100, Igor Opaniuk wrote:
From: Igor Opaniuk
Add support for the SHA-512 Secure Hash Algorithm which uses ARMv8 Crypto
Extensions. The CPU should support AR
On 2/7/24 12:30, Michal Simek wrote:
On 2/7/24 09:33, Venkatesh Yadav Abbarapu wrote:
Add missing prototype to fix the below sparse warning
warning: no previous prototype for 'spl_spi_get_uboot_offs'
[-Wmissing-prototypes]
Signed-off-by: Venkatesh Yadav Abbarapu
---
bo
On 2/7/24 09:33, Venkatesh Yadav Abbarapu wrote:
Add missing prototype to fix the below sparse warning
warning: no previous prototype for 'spl_spi_get_uboot_offs'
[-Wmissing-prototypes]
Signed-off-by: Venkatesh Yadav Abbarapu
---
board/xilinx/zynqmp/zynqmp.c | 1 +
1 file changed
Previous addresses where used in past in emulation environment but never
gets to silicon that's why use correct addresses.
Signed-off-by: Michal Simek
---
include/configs/xilinx_versal_net.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/co
On 2/1/24 13:38, Michal Simek wrote:
fpga-full is not aligned with the latest dt-schema. Generic name
fpga-region should be used.
Signed-off-by: Michal Simek
---
Aligned with fpga-region dt schema
https://lore.kernel.org/all/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530726.git.michal.si
On 1/30/24 15:51, Michal Simek wrote:
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.2
On 1/29/24 08:46, Michal Simek wrote:
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be
about 8KB
reduction in size.
Signed-off-by: Michal Simek
Signed-off-by: Venkatesh Yadav Abbarapu
---
configs/xilinx_versal_mini_ospi_defconfig | 1 +
configs/xilinx_versal_mini_qspi_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/xilinx_versal_mini_ospi_defconfig
b
about 8KB
reduction in size.
Signed-off-by: Michal Simek
Signed-off-by: Venkatesh Yadav Abbarapu
---
configs/xilinx_versal_net_mini_ospi_defconfig | 1 +
configs/xilinx_versal_net_mini_qspi_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs
On 1/26/24 08:24, Michal Simek wrote:
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using
On 1/25/24 09:07, Michal Simek wrote:
From: Saeed Nowshadi
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting. This re-calibration causes a glitch on the output clock. A
On 1/24/24 11:58, Michal Simek wrote:
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip .
Signed-off-by: Michal Simek
---
I am ignoring defconfig sync because it needs to done because of
On 1/23/24 05:57, Venkatesh Yadav Abbarapu wrote:
ID code is added for zu67dr_SE, zu11eg_SE, zu19eg_SE and zu47dr_SE
variants. SE is the select edition of restricted devices with the
capabilities.
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/soc/soc_xilinx_zynqmp.c | 28
usb0 is already updated but forget to also update usb1.
Fixes: 4ff083f09bc2 ("arm64: zynqmp: Do not expose usbhub nodes")
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 3 ++-
arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 2 ++
2 files changed, 4 insertions(+),
When SOM dt is combined with kd240 overlay DPSUB is enabled but kd240 has
no DP wired that's why change disable it via status property.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck
Node name has to be renamed to be aligned with dt-schema and also
xlnx,zynqmp-nvmem-fw switched to fixed-layout.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 125 ---
1 file changed, 64 insertions(+), 61 deletions(-)
diff --git a/arch/arm/dts
There is no dt schema associated with it. Also Linux driver have been
removed in Xilinx Linux tree and never gets to upstream that's why remove
description for it.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 4
1 file changed, 4 deletions(-)
diff --git a/arch/ar
fpga-full is not aligned with the latest dt-schema. Generic name
fpga-region should be used.
Signed-off-by: Michal Simek
---
Aligned with fpga-region dt schema
https://lore.kernel.org/all/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530726.git.michal.si...@amd.com/
---
arch/arm/dts/zynq-7000
ch is not defined.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 14 ++
arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 6 ++
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
b/arch/arm/dts/zynqmp-sck
On 1/28/24 10:20, Heinrich Schuchardt wrote:
On 1/28/24 06:20, Bhumkar, Tejas Arvind wrote:
[AMD Official Use Only - General]
Hi Heinrich,
-Original Message-
From: Heinrich Schuchardt
Sent: Wednesday, January 24, 2024 2:09 AM
To: Bhumkar, Tejas Arvind
Cc: u-boot@lists.denx.de; tr
-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 766f78303eee..b3fc17cbd577 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b
ion Guid: D7CE8A58-CE2C-11ED-81CD-D324E93AC223
Image Guid: 52DA04FB-9D0E-EE11-A57F-637805837C3F
Image Acceptance: yes
Image Guid: 46926007-9E0E-EE11-A23A-A38980B779A1
Image Acceptance: yes
And I think the issue is not with mdata v2 generation but it is with
decoding inside u-boot.
Which ends up in a
solve this issue when occurs.
Reported-by: Sagar Karmarkar
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
On 1/26/24 03:10, Marek Vasut wrote:
On 1/26/24 00:19, Tom Rini wrote:
On Thu, Jan 25, 2024 at 05:38:23PM +0100, Marek Vasut wrote:
On 1/25/24 16:04, Tom Rini wrote:
On Thu, Jan 25, 2024 at 12:54:22PM +0530, Sumit Garg wrote:
[snip]
But at this point we have to move away from apprehension
On 1/19/24 06:33, Venkatesh Yadav Abbarapu wrote:
Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply ignores and switches to hw ecc. So better print
what is being done.
Revert this patch once soft ecc support is fixed in future.
Signed-off-by: Ashok
g a glitch-free clock for
its correct operation. System Controller should skip the re-calibration
step to prevent any clock instability for Versal.
Signed-off-by: Saeed Nowshadi
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 5 +
1 file changed, 5 insertions(+)
di
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip .
Signed-off-by: Michal Simek
---
I am ignoring defconfig sync because it needs to done because of
cda3f81b06f5 ("cmd/flash: Make this default y fo
On 1/23/24 18:58, Tom Rini wrote:
On Tue, Jan 23, 2024 at 08:53:21AM +0100, Michal Simek wrote:
On 1/22/24 23:39, Tom Rini wrote:
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the xilinx_mbv platforms and remove
the otherwise
On 1/22/24 23:39, Tom Rini wrote:
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the xilinx_mbv platforms and remove
the otherwise empty file.
Signed-off-by: Tom Rini
---
Cc: Michal Simek
---
board/xilinx/mbv/Kconfig | 3
On 1/18/24 15:06, Tom Rini wrote:
On Thu, Jan 18, 2024 at 09:56:58AM +0100, neil.armstr...@linaro.org wrote:
Hi,
On 21/11/2023 14:02, Love Kumar wrote:
Abort the dhcp request in the middle by pressing ctrl + c on u-boot
prompt and validate the abort status.
Signed-off-by: Love Kumar
---
C
partition sizes
tools: zynqmpimage: add partition extracting
tools: zynqmpimage: print partition names
Michal Simek (17):
xilinx: Enable DNS/WGET and BLKMAP for http boot
arm64: zynqmp: Describe ethernet phy on kd240
arm64: zynqmp: Fix i2c bus for kd240
arm64: z
On 1/10/24 13:34, Michal Simek wrote:
Remove already disabled node. GPIO connections are handled by pmufw that's
why there is no reason to have it described for non secure firmware.
If someone wants to handle it from OS revert this patch and also update
PMUFW configuration and pinctrl se
On 1/17/24 04:20, Venkatesh Yadav Abbarapu wrote:
Update the kaslr-seed property and enable the config CONFIG_OF_BOARD_SETUP.
Changes in v2:
- Created macro for size variable.
- Removed malloc and created array for rng buffer.
- Added debug logs for all the apis.
Changes in v3:
- Fixed the re
On 1/16/24 05:50, Venkatesh Yadav Abbarapu wrote:
Create a ft_board_setup() api that gets called as part
of bootm/booti before jumping to kernel. In this
ft_board_setup() callback that will inspect the DTB
and insert the device tree blob with the "kaslr-seed" property.
Signed-off-
On 1/11/24 14:49, Michal Simek wrote:
SOMs have HW tpm but previous stages won't start it that's why start it at
U-Boot which will also provide access to random generator and it's usage
with KASLR.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp_kria.env | 5
On 1/9/24 12:26, Michal Simek wrote:
Add missing description for efuse aeskey/pufuser offsets.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 21be909b1abe
On 1/8/24 15:47, Michal Simek wrote:
From: Shubhrajyoti Datta
The pca mux is not added to the i2c0 bus so remove it from the bus.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu1285-revA.dts | 174 ---
1 file changed
On 1/8/24 11:25, Michal Simek wrote:
OCM controller interrupt description hasn't been converted by using macros
that's why fix it now.
Fixes: 6b049190c9c5 ("arm64: zynqmp: Describe interrupts by using macros")
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.
On 1/8/24 11:10, Michal Simek wrote:
There is no reason to have multiple blank lines in DTS files that's why
remove them.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 1 -
arch/arm/dts/zynqmp-sc-vpk120-revB.dtso | 1 -
arch/arm/dts/zynqmp-sc-v
On 1/8/24 10:24, Michal Simek wrote:
Using '_' in node name is not recommended that's why convert them to use
'-' instead.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 4 ++--
arch/arm/dts/zynqmp-e-a2197-00-revA.dts| 2 +-
On 1/5/24 10:55, Michal Simek wrote:
zynqmp-power node is going to be renamed to power-management which should
be generic enough. New name came from dt-binding review that's why there is
no way around. Add support new name but also at the same time check old
name just in case older dt bi
On 1/4/24 10:12, Michal Simek wrote:
Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.
Signed-off-by: Michal Simek
---
Linux patch already reviewed here
https://lore.kernel.org/r
On 1/4/24 11:28, Michal Simek wrote:
Correct IRQ values don't match IRQ line description.
There is one more IRQ (hiber) but it is not described in DT binding spec
that's why value is not described. Just for completeness dwc3_0 has hiber
IRQ at 75 and dwc3_1 at 76.
Signed-off-by: Mi
On 1/12/24 07:10, Venkatesh Yadav Abbarapu wrote:
Create a ft_board_setup() api that gets called as part
of bootm/booti before jumping to kernel. In this
ft_board_setup() callback that will inspect the DTB
and insert the device tree blob with the "kaslr-seed" property.
Signed-off-
r5_proto.h
@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024, Advanced Micro Devices, Inc.
+ * Michal Simek
+ */
Applied.
M
SOMs have HW tpm but previous stages won't start it that's why start it at
U-Boot which will also provide access to random generator and it's usage
with KASLR.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp_kria.env | 5 -
1 file changed, 4 insertions(+), 1 de
On 1/11/24 09:52, Krzysztof Kozlowski wrote:
On 11/01/2024 09:48, Michal Simek wrote:
On 1/11/24 09:18, Krzysztof Kozlowski wrote:
On 11/01/2024 09:10, Michal Simek wrote:
On 1/11/24 08:56, Krzysztof Kozlowski wrote:
On 11/01/2024 08:09, Michal Simek wrote:
On 1/10/24 22:27
On 1/11/24 09:18, Krzysztof Kozlowski wrote:
On 11/01/2024 09:10, Michal Simek wrote:
On 1/11/24 08:56, Krzysztof Kozlowski wrote:
On 11/01/2024 08:09, Michal Simek wrote:
On 1/10/24 22:27, Krzysztof Kozlowski wrote:
On 10/01/2024 14:35, Michal Simek wrote:
Move cells to board dtsi
On 1/11/24 08:56, Krzysztof Kozlowski wrote:
On 11/01/2024 08:09, Michal Simek wrote:
On 1/10/24 22:27, Krzysztof Kozlowski wrote:
On 10/01/2024 14:35, Michal Simek wrote:
Move cells to board dtsi files from generic zynqmp.dtsi. Changes are
related to qspi, spi, nand, i2c and ethernet
First of all I think this should be more RFC.
On 1/11/24 08:10, Venkatesh Yadav Abbarapu wrote:
Usb5744 & usb2244 are Microchip based usbhub and usb-2.0 based SD
controller devices. Integrate these devices into dwc3 driver to bind and
probe the respective drivers to get detected by usb controlle
On 1/10/24 22:27, Krzysztof Kozlowski wrote:
On 10/01/2024 14:35, Michal Simek wrote:
Move cells to board dtsi files from generic zynqmp.dtsi. Changes are
related to qspi, spi, nand, i2c and ethernet nodes.
All errors are generated when dtbs are compiled with W=1.
I don't see any e
Move cells to board dtsi files from generic zynqmp.dtsi. Changes are
related to qspi, spi, nand, i2c and ethernet nodes.
All errors are generated when dtbs are compiled with W=1.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-a2197-revA.dts | 4
arch/arm/dts
ff-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu100-revC.dts | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts
b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 49d5cdbba585..c5945067cd57 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-z
On 1/4/24 19:50, Brandon Maier wrote:
The zynqmpimage_print_header() skips printing the first partition. This
is because the image header can contain duplicate fields as the first
partition. However some fields, like the partition attributes, are only
present in the partition table. It is also
+ */
2.0 only please
+/*
+ *(C) Copyright 2024, Advanced Micro Devices, Inc.
* Copyright (C) 2024, Advanced Micro Devices, Inc.
+ * Michal Simek
please remove line above - not needed and should be amd.com email anyway.
+ */
+
+#ifndef _ASM_ARCH_SYS_R5_PROTO_H
+#define _ASM_ARCH_SYS_
On 1/8/24 15:47, Michal Simek wrote:
Correct IRQ values don't match IRQ line description.
There is one more IRQ (hiber) but it is not described in DT binding spec
that's why value is not described. Just for completeness dwc3_0 has hiber
IRQ at 75 and dwc3_1 at 76.
Signed-off-by: Mi
Add missing description for efuse aeskey/pufuser offsets.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 21be909b1abe..f31f244ba77c 100644
--- a/arch/arm/dts
Correct IRQ values don't match IRQ line description.
There is one more IRQ (hiber) but it is not described in DT binding spec
that's why value is not described. Just for completeness dwc3_0 has hiber
IRQ at 75 and dwc3_1 at 76.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqm
From: Shubhrajyoti Datta
The pca mux is not added to the i2c0 bus so remove it from the bus.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu1285-revA.dts | 174 ---
1 file changed, 174 deletions(-)
diff --git a/arch/arm/dts
OCM controller interrupt description hasn't been converted by using macros
that's why fix it now.
Fixes: 6b049190c9c5 ("arm64: zynqmp: Describe interrupts by using macros")
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 2 +-
1 file changed, 1 insertion(+),
There is no reason to have multiple blank lines in DTS files that's why
remove them.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 1 -
arch/arm/dts/zynqmp-sc-vpk120-revB.dtso | 1 -
arch/arm/dts/zynqmp-sc-vpk180-revA.dtso | 1 -
arch/arm/dts/zynqmp-sc-v
Using '_' in node name is not recommended that's why convert them to use
'-' instead.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 4 ++--
arch/arm/dts/zynqmp-e-a2197-00-revA.dts| 2 +-
arch/arm/dts/zynqmp-mini-emmc0.dts
zynqmp-power node is going to be renamed to power-management which should
be generic enough. New name came from dt-binding review that's why there is
no way around. Add support new name but also at the same time check old
name just in case older dt binding is used.
Signed-off-by: Michal
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