From: Takahiro Kuwano
The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
ECC block being 16 bytes. Under this scheme multi-pass programming to an
ECC block is not allowed. Set the writesize to make sure multi-pass
programming is not attempted on the flash.
Signed-off-by:
From: Takahiro Kuwano
spi_nor_post_sfdp_fixups() was called regardless of if
spi_nor_parse_sfdp() had been called or not. late_init() should be
instead used to initialize the parameters that are not defined in SFDP.
Ideally spi_nor_post_sfdp_fixups() is called only after successful parse
of
From: Takahiro Kuwano
default_init() is wrong, it contributes to the maze of initializing
flash parameters. We'd like to get rid of it because the flash
parameters that it initializes are not really used at SFDP parsing time,
thus they can be initialized later.
Ideally we want SFDP to
From: Takahiro Kuwano
The macronix_octal_fixups should be set only when mfr and flags match.
Fixes: df3d5f9e41 ("mtd: spi-nor: add support for Macronix Octal flash")
Signed-off-by: Takahiro Kuwano
Cc: JaimeLiao
---
drivers/mtd/spi/spi-nor-core.c | 4 +++-
1 file changed, 3 insertions(+), 1
From: Takahiro Kuwano
Some flashes like the Infineon SEMPER NOR flash family use ECC. Under
this ECC scheme, multi-pass writes to an ECC block is not allowed.
In other words, once data is programmed to an ECC block, it can't be
programmed again without erasing it first.
Upper layers like file
From: Takahiro Kuwano
For NOR flashes EC and VID are zeroed out before an erase is issued to
make sure UBI does not mistakenly treat the PEB as used and associate it
with an LEB.
But on some flashes, like the Infineon Semper NOR flash family,
multi-pass page programming is not allowed on the
From: Takahiro Kuwano
This series is equivalent to the one for Linux MTD submitted by
Pratyush Yadav.
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=217759=*
Changes in v2:
- Fix an issue in setting macronix_octal_fixups
- Rework fixup hooks
Takahiro Kuwano (6):
mtd: ubi:
From: Takahiro Kuwano
The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
ECC block being 16 bytes. Under this scheme multi-pass programming to an
ECC block is not allowed. Set the writesize to make sure multi-pass
programming is not attempted on the flash.
Signed-off-by:
From: Takahiro Kuwano
default_init() fixup hook should be used to initialize flash parameters
when its information is not provided in SFDP. To support that case, it
needs to take flash_parameter structure like as other hooks.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c |
From: Takahiro Kuwano
Some flashes like the Infineon SEMPER NOR flash family use ECC. Under
this ECC scheme, multi-pass writes to an ECC block is not allowed.
In other words, once data is programmed to an ECC block, it can't be
programmed again without erasing it first.
Upper layers like file
From: Takahiro Kuwano
For NOR flashes EC and VID are zeroed out before an erase is issued to
make sure UBI does not mistakenly treat the PEB as used and associate it
with an LEB.
But on some flashes, like the Infineon Semper NOR flash family,
multi-pass page programming is not allowed on the
From: Takahiro Kuwano
This series is equivalent to the one for Linux MTD submitted by
Pratyush Yadav.
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=217759=*
Takahiro Kuwano (4):
mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes
mtd: spi-nor: Allow flashes to specify
From: Takahiro Kuwano
The S25FS064S, S25FS128S, and S25FS256S are the same family of SPI NOR
Flash devices with S25FS512S. Some difference depending on the device
densities are taken care in post SFDP fixup.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 24
From: Takahiro Kuwano
The 6th ID byte is needed to distiguish S25FL-S and S25FS-S families.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-ids.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
From: Takahiro Kuwano
The correct 4KB erase opcode should be selected based on the address width
currently used.
Fixes: 562d166a13 ("mtd: spi-nor-core: Add fixups for s25fs512s")
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 4 +++-
1 file changed, 3 insertions(+), 1
From: Takahiro Kuwano
The S25FS064S, S25FS128S, and S25FS256S are the same family of SPI NOR
Flash devices with S25FS512S.
Datasheets:
https://www.infineon.com/dgdl/Infineon-S25FS064S_64_Mb_8_MB_FS-S_Flash_SPI_Multi-I_O_1-DataSheet-v10_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ed526b25412
From: Takahiro Kuwano
The S25FS064S, S25FS128S, and S25FS256S are the same family of SPI NOR
Flash devices with S25FS512S. Some difference depending on the device
densities are taken care in fixup hooks.
Signed-off-by: Takahiro Kuwano
---
Datasheets:
From: Takahiro Kuwano
Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with
Octal interface. It is a dual-die package parts and has same features
with existing S28 series.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
From: Takahiro Kuwano
Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with
From: Takahiro Kuwano
s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size.
s25_post_bfpt_fixup() is doing same thing including multi-die support.
We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup()
into one named s25_s28_post_bfpt_fixup().
In
From: Takahiro Kuwano
s28hx_t_setup() only checks sector layout setting. To support multi-die
package parts like S28HS02GT, it needs to check device size and assign
ready() hook for multi-die package parts. These are covered in s25_setup()
so we can consolidate s28hx_t_setup() and s25_setup()
From: Takahiro Kuwano
s25_mdp_ready() handles status polling for multi-die package parts that
requires to read and check status register for each die. To support
S28HS02GT(dual-die package with Octal DTR support), rename function and
use nor->rdsr_dummy in octal DTR mode.
Signed-off-by:
From: Takahiro Kuwano
Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.
This
From: Takahiro Kuwano
In Infineon multi-die package parts, we need to use Read Any Register op
to read status register in 2nd or further die. Infineon S28HS02GT is
dual-die package and supports Octal DTR interface. To support this,
spansion_read_any_reg() needs to be reworked. Implementation is
From: Takahiro Kuwano
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().
Signed-off-by: Takahiro Kuwano
---
From: Takahiro Kuwano
Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 26
From: Takahiro Kuwano
Infineon S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with Octal
interface. It is a dual-die package parts and has same features with
existing S28 series.
The goal of this series of patches is to add S28HS02GT support. Before
adding device ID to the table, some reworks
From: Takahiro Kuwano
Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with
From: Takahiro Kuwano
Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with
Octal interface. It is a dual-die package parts and has same features
with existing S28 series.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
From: Takahiro Kuwano
s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size.
s25_post_bfpt_fixup() is doing same thing including multi-die support.
We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup()
into one named s25_s28_post_bfpt_fixup().
In
From: Takahiro Kuwano
s28hx_t_setup() only checks sector layout setting. To support multi-die
package parts like S28HS02GT, it needs to check device size and assign
ready() hook for multi-die package parts. These are covered in s25_setup()
so we can consolidate s28hx_t_setup() and s25_setup()
From: Takahiro Kuwano
s25_mdp_ready() handles status polling for multi-die package parts that
requires to read and check status register for each die. To support
S28HS02GT(dual-die package with Octal DTR support), rename function and
use nor->rdsr_dummy in octal DTR mode.
Signed-off-by:
From: Takahiro Kuwano
Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.
This
From: Takahiro Kuwano
In Infineon multi-die package parts, we need to use Read Any Register op
to read status register in 2nd or further die. Infineon S28HS02GT is
dual-die package and supports Octal DTR interface. To support this,
spansion_read_any_reg() needs to be reworked. Implementation is
From: Takahiro Kuwano
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().
Signed-off-by: Takahiro Kuwano
---
From: Takahiro Kuwano
Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes redundant
ones and renames some to have same prefix as others.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 22
From: Takahiro Kuwano
Infineon S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with Octal
interface. It is a dual-die package parts and has same features with
existing S28 series.
The goal of this series of patches is to add S28HS02GT support. Before
adding device ID to the table, some reworks
From: Takahiro Kuwano
Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.
Suggested-by: Tudor Ambarus
Signed-off-by: Takahiro Kuwano
From: Takahiro Kuwano
CFR5[6] is reserved bit and must be always 1. Set it to comply with flash
requirements. While fixing SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN definition,
stop using magic numbers and describe the missing bit fields in CFR5
register. This is useful for both readability and future
From: Takahiro Kuwano
Same fix is needed in Linux MTD [0] and Tudor helped for that [1][2].
This series applies the same changes as Linux MTD.
[0]
https://patchwork.ozlabs.org/project/linux-mtd/patch/20230106030601.6530-1-takahiro.kuw...@infineon.com/
[1]
From: Takahiro Kuwano
CFR5V[6] is reserved bit and must always be 1.
Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash")
Signed-off-by: Takahiro Kuwano
---
include/linux/mtd/spi-nor.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Takahiro Kuwano
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
- 4-byte address mode by factory default
- Quad mode is enabled by factory default
- Supports mixture of 128KB and 64KB sectors by
From: Takahiro Kuwano
Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git
From: Takahiro Kuwano
Infineon S25FS256T is 256Mb QSPI NOR Flash.
https://www.infineon.com/dgdlac/Infineon-S25FS256T_256Mb_SEMPER_Nano_Flash_Quad_SPI_1.8V-DataSheet-v12_00-EN.pdf?fileId=8ac78c8c80027ecd0180740c5a46707a
Tested on Xilinx Zynq-7000 FPGA board.
Takahiro Kuwano (2):
mtd: spi-nor:
From: Takahiro Kuwano
Array index for SCCR 22th DWORD should be 21.
Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c
From: Takahiro Kuwano
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for
From: Takahiro Kuwano
Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
From: Takahiro Kuwano
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
From: Takahiro Kuwano
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index
From: Takahiro Kuwano
For S25hx-T support in Linux (single die package only), flash's internal
address mode is not changed and it is assumed as factory default. Current
implementation of u-boot forces to 4-byte address mode while some parts
are 3-byte address mode by default. That will cause a
From: Takahiro Kuwano
Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt.
These devices have the same functionality as s28hs512t.
In spi-nor-core, use device ID byte to detect S28 family instead of
device name.
Signed-off-by: Takahiro Kuwano
---
From: Takahiro Kuwano
Change configuration macro name to support all other devices in SEMPER S28
family.
Signed-off-by: Takahiro Kuwano
---
configs/j721s2_evm_a72_defconfig | 2 +-
configs/j721s2_evm_r5_defconfig | 2 +-
drivers/mtd/spi/Kconfig | 10 +-
From: Takahiro Kuwano
Change prefix to support all other devices in SEMPER S28 family.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c
From: Takahiro Kuwano
These devices are variants of s28hs512t(1.8V 512Mb) with different
density(1Gb) and power supply voltage(3V).
Datasheet:
From: Takahiro Kuwano
The current S25FS512S support has following issues that need to be fixed.
- Non-uniform sectors by factory default. The setting needs to be
checked and assign erase hook as needed.
- Page size is wrongly advertised in SFDP.
- READ_1_1_2 (3Bh/3Ch), READ_1_1_4
From: Takahiro Kuwano
The S25FL256L is a part of the S25FL-L family and has the same feature set
as S25FL128L except the density.
The datasheet can be found in the following link.
https://www.cypress.com/file/316171/download
The S25FL256L is 32MB NOR Flash that does not support Bank Address
From: Takahiro Kuwano
The current S25FS512S support has following issues that need to be fixed.
- Non-uniform sectors by factory default. The setting needs to be
checked and assign erase hook as needed.
- Page size is wrongly advertised in SFDP.
- READ_1_1_2 (3Bh/3Ch), READ_1_1_4
From: Takahiro Kuwano
The S25FL256L is 32MB NOR Flash that does not support Bank Address
Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and
returns ENOTSUPP in setup() hook to avoid further ops.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 21
From: Takahiro Kuwano
The S25FL256L is a part of the S25FL-L family and has the same feature set
as S25FL128L except the density.
The datasheet can be found in the following link.
https://www.cypress.com/file/316171/download
Tested on Xilinx Zynq-7000 FPGA board.
Signed-off-by: Takahiro
From: Takahiro Kuwano
The S25FL256L is a part of the S25FL-L family and has the same feature set
as S25FL128L except the density.
This device does not support BAR.
Not sure if patch #2 is a good way to avoid BAR. Please advise.
The datasheet can be found in the following link.
From: Takahiro Kuwano
Fixes mode clocks for SPINOR_OP_READ_FAST_4B in tiny.
Signed-off-by: Takahiro Kuwano
---
Changes in v9:
- Rebase on top of u-boot-spi/next
Changes in v8:
- No change
Changes in v7:
- No change
Changes in v6:
- Remove spansion_quad_enable_volatile() per comment
From: Takahiro Kuwano
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.
The nor->quad_enable() sets the volatile QE bit on each die.
The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32
From: Takahiro Kuwano
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.
Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).
This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode
From: Takahiro Kuwano
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
From: Takahiro Kuwano
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush
From: Takahiro Kuwano
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad
From: Takahiro Kuwano
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
The full version can be found in the following links
From: Takahiro Kuwano
This patch adds Cypress manufacturer ID (34h) definition.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush Yadav
---
include/linux/mtd/spi-nor.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
The summary datasheets can be found in the following links.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad
From: Takahiro Kuwano
Fixes mode clocks for SPINOR_OP_READ_FAST_4B in tiny.
Signed-off-by: Takahiro Kuwano
---
Changes in v8:
- No change
Changes in v7:
- No change
Changes in v6:
- Remove spansion_quad_enable_volatile() per comment in
From: Takahiro Kuwano
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.
The nor->quad_enable() sets the volatile QE bit on each die.
The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32
From: Takahiro Kuwano
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.
Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).
This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode
From: Takahiro Kuwano
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush
From: Takahiro Kuwano
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
From: Takahiro Kuwano
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by
From: Takahiro Kuwano
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
The full version can be found in the following links
From: Takahiro Kuwano
This patch adds Cypress manufacturer ID (34h) definition.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush Yadav
---
include/linux/mtd/spi-nor.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index
From: Takahiro Kuwano
Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
bottom, depending on the device configuration, while U-Boot supports
uniform sector layout only.
The spansion_erase_non_uniform() erases overlaid 4KB sectors,
non-overlaid portion of normal sector, and
From: Pratyush Yadav
On devices with non-uniform sector sizes like Spansion S25 or S28 family
of flashes the sector under erase does not necessarily have to be
mtd->erasesize bytes long. For example, on S28 flashes the first 128 KiB
region is composed of 32 4 KiB sectors, then a 128 KiB sector,
From: Pratyush Yadav
Sometimes the information in a flash's SFDP tables is wrong. Sometimes
some information just can't be expressed in the SFDP table. So,
introduce the fixup hooks to allow tailoring settings for a specific
flash.
Three hooks are added: default_init, post_sfdp, and post_bfpt.
From: Pratyush Yadav
These structures will be used in a later commit inside another structure
definition. Also take the declarations out of the ifdef since they won't
affect the final binary anyway and will be used in a later commit.
Signed-off-by: Pratyush Yadav
---
Taken from Pratyush's
From: Pratyush Yadav
nor->setup() can be used by flashes to configure settings in case they
have any peculiarities that can't be easily expressed by the generic
spi-nor framework. This includes things like different opcodes, dummy
cycles, page size, uniform/non-uniform sector sizes, etc.
Move
From: Pratyush Yadav
The SPI NOR core will get new functions in following commits. This has
presented a significant challenge of keeping the SPL size in check on
the x530 platform.
On a previous iteration of the series, adding a set of compile-time
switches got the build working. But rebasing
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
The summary datasheets can be found in the following links.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad
From: Takahiro Kuwano
Fixes mode clocks for SPINOR_OP_READ_FAST_4B in tiny.
Signed-off-by: Takahiro Kuwano
---
Changes in v7:
- No change
Changes in v6:
- Remove spansion_quad_enable_volatile() per comment in
From: Takahiro Kuwano
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.
The nor->quad_enable() sets the volatile QE bit on each die.
The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32
From: Takahiro Kuwano
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.
Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).
This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode
From: Takahiro Kuwano
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush
From: Takahiro Kuwano
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
From: Takahiro Kuwano
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad
From: Takahiro Kuwano
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by
From: Takahiro Kuwano
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
The full version can be found in the following links
From: Takahiro Kuwano
This patch adds Cypress manufacturer ID (34h) definition.
Signed-off-by: Takahiro Kuwano
Reviewed-by: Pratyush Yadav
---
include/linux/mtd/spi-nor.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index
From: Takahiro Kuwano
Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
bottom, depending on the device configuration, while U-Boot supports
uniform sector layout only.
The spansion_erase_non_uniform() erases overlaid 4KB sectors,
non-overlaid portion of normal sector, and
From: Pratyush Yadav
On devices with non-uniform sector sizes like Spansion S25 or S28 family
of flashes the sector under erase does not necessarily have to be
mtd->erasesize bytes long. For example, on S28 flashes the first 128 KiB
region is composed of 32 4 KiB sectors, then a 128 KiB sector,
From: Pratyush Yadav
Sometimes the information in a flash's SFDP tables is wrong. Sometimes
some information just can't be expressed in the SFDP table. So,
introduce the fixup hooks to allow tailoring settings for a specific
flash.
Three hooks are added: default_init, post_sfdp, and post_bfpt.
From: Pratyush Yadav
These structures will be used in a later commit inside another structure
definition. Also take the declarations out of the ifdef since they won't
affect the final binary anyway and will be used in a later commit.
Signed-off-by: Pratyush Yadav
---
Taken from Pratyush's
From: Pratyush Yadav
nor->setup() can be used by flashes to configure settings in case they
have any peculiarities that can't be easily expressed by the generic
spi-nor framework. This includes things like different opcodes, dummy
cycles, page size, uniform/non-uniform sector sizes, etc.
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