As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
RGMII. Don't enable it for the rest of setups.
This has been seen to misconfigure RPi4's PHY when booting Linux.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/net/bcmgenet.c | 5 -
1 file changed, 4 insertions
On Thu, 2020-02-20 at 17:36 +0100, Nicolas Saenz Julienne wrote:
> As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
> RGMII. Don't enable it for the rest of setups.
>
> This has been seen to misconfigure RPi4's PHY when booting Linux.
>
> Signed-off
Hi Matthias,
On Thu, 2020-02-20 at 19:58 +0100, Matthias Brugger wrote:
>
> On 20/02/2020 17:36, Nicolas Saenz Julienne wrote:
> > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
> > RGMII. Don't enable it for the rest of setups.
> >
Hi Florian,
On Thu, 2020-02-20 at 11:05 -0800, Florian Fainelli wrote:
> On 2/20/20 8:36 AM, Nicolas Saenz Julienne wrote:
> > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
> > RGMII. Don't enable it for the rest of setups.
> >
> > This ha
Florian,
On Fri, 2020-02-21 at 11:54 +0100, Nicolas Saenz Julienne wrote:
> Hi Matthias,
>
> On Thu, 2020-02-20 at 19:58 +0100, Matthias Brugger wrote:
> > On 20/02/2020 17:36, Nicolas Saenz Julienne wrote:
> > > As per Linux's driver, ID_MODE_DIS is only se
On Thu, 2020-02-20 at 18:48 +0100, Nicolas Saenz Julienne wrote:
> On Thu, 2020-02-20 at 17:36 +0100, Nicolas Saenz Julienne wrote:
> > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
> > RGMII. Don't enable it for the rest of setups.
> >
&
Hi Bin,
sorry for the late reply but I was off for easter.
On Fri, 2020-04-03 at 13:54 +0800, Bin Meng wrote:
> Hi Nicolas,
> This is probably caused by the required structure setup by U-Boot is
> viewed as buggy by the xHCI controller, hence there is no response to
> the first "enable slot"
Hi All,
I'm working on enabling the VIA805 XCHI controller found on the new Raspberry
Pi 4. The controller sits behind a PCIe bus, which I've already implemented[1]
and will submit once the XCHI issues are resolved, as it's worthless otherwise.
The XHCI initialization gets stuck after issuing the
On Wed, 2020-04-01 at 22:14 +0200, Marek Vasut wrote:
> On 4/1/20 10:13 PM, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-04-01 at 20:50 +0200, Marek Vasut wrote:
> > > On 4/1/20 7:30 PM, Nicolas Saenz Julienne wrote:
> > > > Hi All,
> > >
> >
On Wed, 2020-04-01 at 20:50 +0200, Marek Vasut wrote:
> On 4/1/20 7:30 PM, Nicolas Saenz Julienne wrote:
> > Hi All,
>
> Hi,
>
> > I'm working on enabling the VIA805 XCHI controller found on the new
> > Raspberry
> > Pi 4. The controller sits behind a PCIe bus
On Fri, 2020-04-24 at 18:50 +0200, Sylwester Nawrocki wrote:
> +CONFIG_XHCI_64BIT_DWORD_ACCESS_ONLY=y
This one slipped trough :)
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
> Signed-off-by: Sylwester Nawrocki
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
-by: Marek Szyprowski
> ---
> Changes since RFC:
> - none.
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
es with tabs.
>
> Reviewed-by: Bin Meng
> Signed-off-by: Sylwester Nawrocki
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
On Fri, 2020-04-24 at 18:50 +0200, Sylwester Nawrocki wrote:
> From: Marek Szyprowski
>
> Remove the overlap between DRAM and device's IO area.
>
> Signed-off-by: Marek Szyprowski
> ---
> Changes since RFC:
> - none.
Reviewed-by: Nicolas Saenz Julienne
Regards,
tries are added in order, sorted by ascending
>address values.
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
signature.asc
Description: This is a digitally signed message part
> 32-bits, e.g. 0xabcd1234abcd1234 instead of 0xabcd1234.
>
> Cc: Sergey Temerkhanov
> Signed-off-by: Sylwester Nawrocki
> ---
> Changes since RFC:
> - dropped Kconfig option, switched to not using readq/writeq
>unconditionally.
Reviewed-by: Nicolas Saenz Julienne
sed from dma-ranges DT property and a fixed 4GB region is used.
>
> The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
> USB Host Controller.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Sylwester Nawrocki
> ---
> Changes since RFC:
>
currently
> parsed from dma-ranges DT property and a fixed 4GB region is used.
>
> The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
> USB Host Controller.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Sylwester Nawrocki
> ---
> Chang
.
Patch 2 is a little invasive, but I couldn't find a mechanism in u-boot
similar to Linux's PCI quirks.
Nicolas Saenz Julienne (2):
arm: rpi: Add function to trigger VL805's firmware load
usb: xhci: Load Raspberry Pi 4 VL805's firmware
arch/arm/mach-bcm283x/include/mach/mbox.h | 13
in between the PCIe configuration and xHCI startup.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/usb/host/xhci-pci.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index c1f60da541..5c17ea6932 100644
--- a/drivers/usb/host/xhci
Saenz Julienne
---
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/arm/mach-bcm283x/msg.c | 41 +++
3 files changed, 61 insertions(+)
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h
b/arch
On Wed, 2020-04-22 at 18:42 +0200, Sylwester Nawrocki wrote:
> Hi Nicolas,
>
> On 22.04.2020 11:16, Nicolas Saenz Julienne wrote:
>
> > I see that you based your code on the downstream PCIe driver (the one
> > available
> > in the Raspberry Pi foundation kernel r
Hi Sylwester, Marek
On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> In current code there is no cache flush after initializing the scratchpad
> buffer array with the scratchpad buffer pointers. This leads to a failure
> of the "slot enable" command on the rpi4 board (Broadcom STB
Hi Sylwester,
On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> This patch adds basic driver for the Broadcom STB PCIe host controller.
> The code is based on Linux upstream driver (pcie-brcmtsb.c) with MSI
> handling removed. The inbound access memory region is not currently
>
On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> This patch adds a Kconfig option which allows accessing 64-bit xHCI
> IO registers only with 2 double word accesses rather than using
> a single quad word access. There might be HW configurations where
> single quad word access doesn't
On Wed, 2020-04-22 at 11:54 +0200, Marek Szyprowski wrote:
> Hi Nicolas,
>
> On 22.04.2020 11:46, Nicolas Saenz Julienne wrote:
> > On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> > > From: Marek Szyprowski
> > >
> > > Create a non-cach
On Wed, 2020-04-22 at 17:21 +0800, Bin Meng wrote:
> Hi Nicolas,
>
> On Wed, Apr 22, 2020 at 4:53 PM Nicolas Saenz Julienne
> wrote:
> > Hi Sylwester, Marek
> >
> > On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> > > In current code the
On Wed, 2020-04-22 at 11:26 +0200, Nicolas Saenz Julienne wrote:
> On Wed, 2020-04-22 at 17:21 +0800, Bin Meng wrote:
> > Hi Nicolas,
> >
> > On Wed, Apr 22, 2020 at 4:53 PM Nicolas Saenz Julienne
> > wrote:
> > > Hi Sylwester, Marek
> > >
>
On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> From: Marek Szyprowski
>
> This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
> and USB commands. To get it working one has to call the following commands:
> "pci enum; usb start;", thus such commands have been
On Wed, 2020-04-22 at 14:01 +0200, Sylwester Nawrocki wrote:
> Hi Nicolas,
>
> (fixed Simon's email address, apologies for mistyping it, I will make sure
> it's correct in next iteration)
>
> On 22.04.2020 10:53, Nicolas Saenz Julienne wrote:
> > I've been trying to ge
Hi Sylwester,
On Tue, 2020-04-21 at 18:50 +0200, Sylwester Nawrocki wrote:
> From: Marek Szyprowski
>
> Create a non-cacheable mapping for the 0x6 physical memory region,
> where MMIO registers for the PCIe XHCI controller are instantiated by the
> PCIe bridge.
>
> Signed-off-by: Marek
Hi Peter,
On Wed, 2020-04-22 at 11:50 +0100, Peter Robinson wrote:
> > > This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
> > > and USB commands. To get it working one has to call the following
> > > commands:
> > > "pci enum; usb start;", thus such commands have been added
Saenz Julienne
---
Changes since v1:
- Rename function so it's not mistaken with regular firmware loading
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/arm/mach-bcm283x/msg.c | 43 +++
3 files
.
Note that this builds on top of Sylwester Nawrocki's "USB host support
for Raspberry Pi 4 board" series.
---
Changes since v1:
- Rename function
- Use callback in xhci-pci.c
Nicolas Saenz Julienne (2):
arm: rpi: Add function to trigger VL805's firmware load
usb: xhci: Load Rasp
in between the PCIe configuration and xHCI startup.
Introduce a callback in xhci_pci_probe() to run this platform specific
routine.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v1:
- Create callback
board/raspberrypi/rpi/rpi.c | 12
drivers/usb/host/xhci-pci.c | 6
On Thu, 2020-04-30 at 15:31 +0200, Mark Kettenis wrote:
> > From: Nicolas Saenz Julienne
> > Date: Thu, 30 Apr 2020 15:04:32 +0200
> >
> > On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
> > may either be loaded directly fro
Hi Maerk,
On Tue, 2020-04-28 at 11:49 +0200, Marek Szyprowski wrote:
> Hi All,
>
> On 27.04.2020 15:54, Marek Szyprowski wrote:
> > On 27.04.2020 12:15, Nicolas Saenz Julienne wrote:
> > > On Fri, 2020-04-24 at 18:50 +0200, Sylwester Nawrocki wrote:
> > &g
On Wed, 2020-04-29 at 14:05 +0200, Marek Vasut wrote:
> On 4/29/20 12:10 PM, Nicolas Saenz Julienne wrote:
> > On Tue, 2020-04-28 at 19:59 +0200, Marek Vasut wrote:
> > > On 4/28/20 7:44 PM, Nicolas Saenz Julienne wrote:
> > > > When needed, RPi4's co-pr
On Wed, 2020-04-29 at 14:37 +0200, Marek Vasut wrote:
> On 4/29/20 2:36 PM, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-04-29 at 14:05 +0200, Marek Vasut wrote:
> > > On 4/29/20 12:10 PM, Nicolas Saenz Julienne wrote:
> > > > On Tue, 2020-04-28 at 19:59 +0200, Mar
On Wed, 2020-04-29 at 08:18 +0200, Marek Szyprowski wrote:
> Hi Nicolas,
>
> On 28.04.2020 19:44, Nicolas Saenz Julienne wrote:
> > When needed, RPi4's co-processor (called VideoCore) has to be instructed
> > to load VL805's firmware (the chip providing xHCI support). Vi
On Tue, 2020-04-28 at 19:59 +0200, Marek Vasut wrote:
> On 4/28/20 7:44 PM, Nicolas Saenz Julienne wrote:
> > When needed, RPi4's co-processor (called VideoCore) has to be instructed
> > to load VL805's firmware (the chip providing xHCI support). VideCore's
> > firmware exp
Hi Bin,
On Wed, 2020-04-29 at 14:51 +0800, Bin Meng wrote:
> Hi Nicolas,
>
> On Wed, Apr 29, 2020 at 1:45 AM Nicolas Saenz Julienne
> wrote:
> > When needed, RPi4's co-processor (called VideoCore) has to be instructed
> > to load VL805's firmware (the chip providing x
On Tue, 2020-05-05 at 18:26 +0200, Nicolas Saenz Julienne wrote:
> Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
> loaded explicitly. Earlier versions didn't need that as they where using
> an EEPROM for that purpose. This series takes care of setting up the
&
ename function
- Use callback in xhci-pci.c
Nicolas Saenz Julienne (2):
arm: rpi: Add function to trigger VL805's firmware load
usb: xhci: Load Raspberry Pi 4 VL805's firmware
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/ar
in between the PCIe configuration and xHCI startup.
Introduce a callback in xhci_pci_probe() to run this platform specific
routine.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Get rid of #ifdef CONFIG_BCM2711
- Get rid of redundant error message
Changes since v1:
- Create
Saenz Julienne
---
Changes since v2:
- Correct wrong function name in comment
- Add better comment on rpi_firmware_init_vl805()
Changes since v1:
- Rename function so it's not mistaken with regular firmware loading
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x
On Tue, 2020-05-05 at 15:39 +0200, Matthias Brugger wrote:
>
> On 05/05/2020 14:53, Nicolas Saenz Julienne wrote:
> > Hi Matthias,
> >
> > On Tue, 2020-05-05 at 14:15 +0200, Matthias Brugger wrote:
> > > On 30/04/2020 15:04, Nicolas Saenz Julienne wrote:
> &g
sed from dma-ranges DT property and a fixed 4GB region is used.
>
> The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
> USB Host Controller.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Sylwester Nawrocki
I don't know if it's a little redunda
On Tue, 2020-05-05 at 16:59 +0200, Matthias Brugger wrote:
[...]
> > > > > > +#ifdef CONFIG_BCM2711
> > > > >
> > > > > This won't work with rpi_arm64_defconfig.
> > > > > Can't we just evaluate at runtime if we need to do anything in
> > > > > xhci_pci_fixup.
> > > >
> > > > I can't see why,
.
>
> Thanks,
> Sylwester
I tested the whole series with rpi_4_defconfig and rpi_arm64_defconfig.
Tested-by: Nicolas Saenz Julienne
Regards,
Nicolas
> Marek Szyprowski (4):
> rpi4: shorten a mapping for the DRAM
> rpi4: add a mapping for the PCIe XHCI controller MMIO registers
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB.
Signed-off-by: Nicolas Saenz Julienne
---
Note that rpi_arm64_defconfig already supports USB keyboard. This is to
be applied on top of Sylwester Nawrocki's PCIe
parsed from dma-ranges DT property and a fixed 4GB region is used.
>
> The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
> USB Host Controller.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Sylwester Nawrocki
> ---
If it's OK
Hi Bin,
On Wed, 2020-05-06 at 13:33 +0800, Bin Meng wrote:
> Hi Nicolas,
>
> On Wed, May 6, 2020 at 12:26 AM Nicolas Saenz Julienne
> wrote:
> > On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
> > may either be loaded directly from an E
Hi Jim,
On Fri, 2020-05-08 at 10:25 -0400, Jim Quinlan wrote:
> > > > +static int brcm_pcie_probe(struct udevice *dev)
> > > > +{
> > > > + struct udevice *ctlr = pci_get_controller(dev);
> > > > + struct pci_controller *hose = dev_get_uclass_priv(ctlr);
> > > > + struct
Hi Matthias,
On Tue, 2020-05-05 at 14:15 +0200, Matthias Brugger wrote:
>
> On 30/04/2020 15:04, Nicolas Saenz Julienne wrote:
> > When needed, RPi4's co-processor (called VideoCore) has to be instructed
> > to load VL805's firmware (the chip providing xHCI support). VideoC
[ Adding Matthias as he's the board maintainer ]
On Tue, 2020-05-05 at 19:15 +0800, Bin Meng wrote:
> On Mon, May 4, 2020 at 8:45 PM Sylwester Nawrocki
> wrote:
> > From: Marek Szyprowski
> >
> > This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
> > and USB commands. To
Hi, I'll try to add my two cents.
On Wed, 2020-05-06 at 08:47 -0600, Simon Glass wrote:
> > +config PCI_BRCMSTB
> > + bool "Broadcom STB PCIe controller"
> > + depends on DM_PCI
> > + depends on ARCH_BCM283X
> > + help
> > + Say Y here if you want to enable
On Tue, 2020-05-05 at 18:26 +0200, Nicolas Saenz Julienne wrote:
> Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
> loaded explicitly. Earlier versions didn't need that as they where using
> an EEPROM for that purpose. This series takes care of setting up the
&
On Mon, 2020-06-01 at 12:53 +0200, Marek Vasut wrote:
> On 6/1/20 12:47 PM, Nicolas Saenz Julienne wrote:
> > On Tue, 2020-05-05 at 18:26 +0200, Nicolas Saenz Julienne wrote:
> > > Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
> > > loaded e
On Mon, 2020-06-01 at 13:12 +0200, Marek Vasut wrote:
> On 6/1/20 1:09 PM, Nicolas Saenz Julienne wrote:
> > On Mon, 2020-06-01 at 12:53 +0200, Marek Vasut wrote:
> > > On 6/1/20 12:47 PM, Nicolas Saenz Julienne wrote:
> > > > On Tue, 2020-05-05 at 18:26 +0200
Hi Stefan,
On Sun, 2020-07-19 at 02:37 +0200, Stefan Agner wrote:
> Hi Nicolas,
>
> On 2020-06-29 18:37, Nicolas Saenz Julienne wrote:
> > Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
> > loaded explicitly. Earlier versions didn't need tha
Hi Stefan,
On Sat, 2020-08-01 at 14:25 +0200, Stefan Agner wrote:
> Hi Nicolas,
>
> I do have USB MSD boot working with at least two USB flash drives
> successfully.
>
> I now tried using a USB NVMe enclosure (ICY BOX with a JMicron chip in
> it). It seems that U-Boot has troubles enumerating
This is needed in order to use the cpu_to_*()/*_to_cpu() family of
functions.
Signed-off-by: Nicolas Saenz Julienne
---
IMO the ideal thing would be to squash this into the original patch.
include/linux/bitfield.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/bitfield.h b
This was breaking build on some configurations.
Signed-off-by: Nicolas Saenz Julienne
---
Matthias, I don't know if it's possible at this stage, but I'd ideally squash
this into the offending patch.
drivers/usb/host/xhci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/host
On Tue, 2020-06-16 at 17:31 -0600, Simon Glass wrote:
> Hi Nicolas,
>
> On Tue, 16 Jun 2020 at 08:09, Nicolas Saenz Julienne
> wrote:
> > On Tue, 2020-06-16 at 07:43 -0600, Simon Glass wrote:
> > > Hi Nicolas,
> > >
> > > On Fri, 12 Jun 2020
Hi Marek,
On Mon, 2020-06-22 at 17:34 +0200, Marek Vasut wrote:
> On 6/22/20 5:30 PM, Nicolas Saenz Julienne wrote:
> [...]
>
> > diff --git a/include/usb/xhci.h b/include/usb/xhci.h
> > index 1170c0ac69..7d34103fd5 100644
> > --- a/include/usb/xhci.h
> > +++
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v5:
- Take !CONFIG_IS_ENABLED(DM_RESET
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs/rpi_arm64_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git
-by: Nicolas Saenz Julienne
---
drivers/reset/Kconfig | 10
drivers/reset/Makefile| 1 +
drivers/reset/reset-raspberrypi.c | 60 +++
.../reset/raspberrypi,firmware-reset.h| 13
4 files changed, 84 insertions
nges since v1:
- Rename function
- Use callback in xhci-pci.c
Nicolas Saenz Julienne (4):
arm: rpi: Add function to trigger VL805's firmware load
reset: Add Raspberry Pi 4 firmware reset controller
configs: Enable support for reset controllers on RPi4
usb: xhci: Add reset controller support
a
Saenz Julienne
---
Changes since v1:
- Rename function so it's not mistaken with regular firmware loading
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/arm/mach-bcm283x/msg.c | 46 +++
3 files
On Tue, 2020-06-16 at 07:43 -0600, Simon Glass wrote:
> Hi Nicolas,
>
> On Fri, 12 Jun 2020 at 10:47, Nicolas Saenz Julienne
> wrote:
> > There is no distinction in DT between the PCI controller device and the
> > root bridge, whereas such distinction exists from dm's pe
On Mon, 2020-06-15 at 11:28 +0200, Sylwester Nawrocki wrote:
> Hi,
>
> (Cc: Nicolas and Jim)
Jim, FYI, this relates to u-boot's pcie-brcmstb implementation.
> On 11.06.2020 11:18, Peter Robinson wrote:
> > > > > I am trying to test v4 of your patch series for USB support on rpi4:
> > > > > I am
On Fri, 2020-06-12 at 19:08 +0200, Marek Vasut wrote:
> On 6/12/20 6:46 PM, Nicolas Saenz Julienne wrote:
> > Some atypical users of xhci-pci might need to manually reset their xHCI
> > controller before starting the HCD setup. Check if a reset controller
> > device is ava
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v3:
- Move reset support to xchi core
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs/rpi_arm64_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git
core patch as not needed with correct DT PCI topology
- Move reset support to xchi core
Changes since v3:
- Use reset controller
Changes since v2:
- Correct comment on patch #1
- Address Matthias' comments
Changes since v1:
- Rename function
- Use callback in xhci-pci.c
Nicolas Saen
Saenz Julienne
---
Changes since v1:
- Rename function so it's not mistaken with regular firmware loading
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/arm/mach-bcm283x/msg.c | 46 +++
3 files
-by: Nicolas Saenz Julienne
---
drivers/reset/Kconfig | 10
drivers/reset/Makefile| 1 +
drivers/reset/reset-raspberrypi.c | 60 +++
.../reset/raspberrypi,firmware-reset.h| 13
4 files changed, 84 insertions
kernel.org/patch/11596409/
---
Changes since v3:
- Use reset controller
Changes since v2:
- Correct comment on patch #1
- Address Matthias' comments
Changes since v1:
- Rename function
- Use callback in xhci-pci.c
Nicolas Saenz Julienne (5):
arm: rpi: Add function to trigger VL805's fir
-by: Nicolas Saenz Julienne
---
drivers/reset/Kconfig | 10
drivers/reset/Makefile| 1 +
drivers/reset/reset-raspberrypi.c | 60 +++
.../reset/raspberrypi,firmware-reset.h| 13
4 files changed, 84 insertions
er than expected.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/pci/pci-uclass.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 9ab3539a49..ea27e78465 100644
--- a/drivers/pci/pci-uclass.c
+++ b
Some atypical users of xhci-pci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/usb/host/xhci-pci.c | 38
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs/rpi_arm64_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git
Saenz Julienne
---
Changes since v1:
- Rename function so it's not mistaken with regular firmware loading
---
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++
arch/arm/mach-bcm283x/include/mach/msg.h | 7
arch/arm/mach-bcm283x/msg.c | 46 +++
3 files
On Mon, 2020-06-01 at 17:27 +0200, Marek Vasut wrote:
> On 6/1/20 4:41 PM, Nicolas Saenz Julienne wrote:
> > On Mon, 2020-06-01 at 13:12 +0200, Marek Vasut wrote:
> > > On 6/1/20 1:09 PM, Nicolas Saenz Julienne wrote:
> > > > On Mon, 2020-06-01 at 12:53 +0200, Marek
Hi Peter, sorry for the late reply, but I was on holidays.
On Mon, 2021-01-04 at 13:13 +, Peter Robinson wrote:
> On Sun, Jan 3, 2021 at 5:36 PM Nicolas Saenz Julienne
> wrote:
> >
> > Hi Peter, thanks for taking the time to test this, I'll send a new hopefully
> >
when using
custom ones.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Peter Robinson
Tested-by: Peter Robinson
---
board/raspberrypi/rpi/rpi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index b66698e4a9..abcf41a5a8
ypos in commit messages
- Change DTB file name for RPi400
- Address Matthias' comments
Nicolas Saenz Julienne (13):
rpi: Add identifier for the new RPi400
rpi: Add identifier for the new CM4
pci: pcie-brcmstb: Fix inbound window configurations
dm: Introduce xxx_get_dma_range()
dm: test:
load operation, which is handled by the co-processor after
u-boot has correctly configured the PCIe controller).
Signed-off-by: Nicolas Saenz Julienne
Tested-by: Peter Robinson
---
drivers/pci/pcie_brcmstb.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers
The Raspberry Pi Foundation released the new RPi400 which we want to
detect, so we can enable Ethernet on it and know the correct device tree
file name.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Peter Robinson
Tested-by: Peter Robinson
---
board/raspberrypi/rpi/rpi.c | 5 +
1
Introduce some new nodes in sandbox's test device-tree and dm tests in
order to validate dev_get_dma_range().
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Tested-by: Peter Robinson
---
arch/sandbox/dts/test.dts | 17 ++
test/dm/Makefile | 1 +
test/dm
initialization, parse it before the probe call an provide the
DMA offset in 'struct udevice' for the address translation code to use
it.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Tested-by: Peter Robinson
---
Changes since v5:
- Use dev_has_ofnode()
drivers/core/Kconfig | 10
xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these
limitations, and make sure we don't break non DM users.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Tested-by: Peter Robinson
---
Changes since v5:
- Add missing address tranlation
drivers
are not integrated into the
device model.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Reviewed-by: Stefan Roese
Tested-by: Peter Robinson
---
include/phys2bus.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/phys2bus.h b/include/phys2bus.h
index
By reusing DT nodes already available in sandbox's test DT introduce a
test to validate dev_phys_to_bus()/dev_bus_to_phys().
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Tested-by: Peter Robinson
---
test/dm/Makefile | 1 +
test/dm/phys2bus.c | 37
This will allow us to use DM variants of phys_to_bus()/bus_to_phys()
when relevant.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Tested-by: Peter Robinson
---
drivers/mmc/sdhci.c | 12 +++-
include/mmc.h | 6 ++
2 files changed, 13 insertions(+), 5
The DM_DMA option is needed in order to translate physical address into
bus addresses on a per-device basis.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Simon Glass
Tested-by: Peter Robinson
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs
The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of
'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6
instead of VC4). This has no functional change as far as u-boot driver
is concerned. So simply add the compatible string.
Signed-off-by: Nicolas Saenz Julienne
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