Re: [USRP-users] auto start for e313

2018-05-16 Thread liu Jong via USRP-users
Hi ,Robin, thank you for your reply. best regards Jon 2018-05-15 23:30 GMT+08:00 Robin Coxe : > Hi Jon. First of all, you should not be using a SG1 image with the E313. > All E313s contain E310s with Speed Grade 3 FPGAs. > > The behavior you describe is a result of a

[USRP-users] RFNoC source block with multiple outputs

2018-05-16 Thread Peter Horvath via USRP-users
Hello, I'm trying to hack together an RFNoC source block with two outputs, รก la siggen but with more outputs obviously. Is it correct that I need two AXI wrappers and two cvita_hdr_encoders, and I need to multiplex the outputs of the AXI wrappers? If this is acceptable, what is the best way to

[USRP-users] Request information for UHD on WINDOWS 10

2018-05-16 Thread Disco Daniele via USRP-users
Hi! I would like to know if it is possible to install UHD on Windows 10. Looking here https://files.ettus.com/manual/page_install.html , following the link: http://files.ettus.com/binaries/uhd/latest_release you can find UHD for WINDOWS 7 32/64 bits. I was also thinking to MSYS2 that build a

Re: [USRP-users] Running RFNoC HDL Testbench Timeout

2018-05-16 Thread Peter Horvath via USRP-users
Phillipp, you can ignore this error. It is a confirmed bug in the Xilinx toolchain, supposedly has something to do with WebTalk. One would have to disable WebTalk which is hard to suppress as it will be active every time when a WebPACK license is being used. It is (?) fixed in the 2018.1 release.

Re: [USRP-users] Request information for UHD on WINDOWS 10

2018-05-16 Thread Derek Kozel via USRP-users
Hello Daniele, Yes, UHD installs and runs correctly on Windows 10. The installer is the same for all versions of Windows which are supported. Here is the build guide for Windows. https://kb.ettus.com/Building_and_Installing_the_USRP_Open_Source_Toolchain_(UHD_and_GNU_Radio)_on_Windows Regards,

[USRP-users] RFNoC and MicroBlaze

2018-05-16 Thread Alice Lo Valvo via USRP-users
Hello, I have some questions. I read that there is the possibility to integrate a MicroBlaze into RFNoC project. Do you know something about this? This is a new world for me and I tried to understand which steps to do for adding a MicroBlaze block in the FPGA of USRP X300. There is already a

[USRP-users] Update for uhd in meta-sdr

2018-05-16 Thread Philip Balister via USRP-users
Any chance of getting an update for meta-sdr for uhd to avoid the bbappends in meta-etts/n3xx/rocko? https://github.com/EttusResearch/meta-ettus/blob/rocko/n3xx/recipes-support/uhd/uhd_git.bbappend Would be better handled by update the uhd_3.x.y in meta-sdr. Also, it is beginning to look lke hte

[USRP-users] blocking one of channel in multi usrp

2018-05-16 Thread harfan ryanu via USRP-users
Hi all, Currently I am developing an application with multi usrp using two X310. My current configuration is using all 4 channel in usrp with all subdev enabled (A:0 B:0), both feed by an external clock. However I am curious if we have already issued stream command, is it possible to block one of

Re: [USRP-users] RFNoC source block with multiple outputs

2018-05-16 Thread Ettus Research Support via USRP-users
Hello Peter, Yes, that is correct, you need multiple AXI wrappers and (optionally) multiple header encoders if you are dealing with multiple ports. From the blocks from our codebase, the DDC [1] and DUC [2] have multiple port configuration, which is done on a for loop, but they don't have header