Jan Kiszka wrote:
> Gilles Chanteperdrix wrote:
>
>>Jan Kiszka wrote:
>>
>>>I think implementing coloured caches (with reservations for RT
>>>processes) could be an option as well. Once RT context switches no
>>>longer require full cache flushes, those for non-RT processes could be
>>>made interru
Gilles Chanteperdrix wrote:
> Jan Kiszka wrote:
>> I think implementing coloured caches (with reservations for RT
>> processes) could be an option as well. Once RT context switches no
>> longer require full cache flushes, those for non-RT processes could be
>> made interruptible. But all this would
Jan Kiszka wrote:
> I think implementing coloured caches (with reservations for RT
> processes) could be an option as well. Once RT context switches no
> longer require full cache flushes, those for non-RT processes could be
> made interruptible. But all this would require heavy Linux hacking, I'm
Gilles Chanteperdrix wrote:
> Dmitry Adamushko wrote:
> > On 20/03/07, Gilles Chanteperdrix <[EMAIL PROTECTED]> wrote:
> > > Muruganandam Ganapathy wrote:
> > > > The board is based on the Fujitsu SOC which has the ARM926EJ processor
> > core.
> > > >
> > > > This board has SPI, I2C and 10
Gilles Chanteperdrix wrote:
> Dmitry Adamushko wrote:
> > On 20/03/07, Gilles Chanteperdrix <[EMAIL PROTECTED]> wrote:
> > > Muruganandam Ganapathy wrote:
> > > > The board is based on the Fujitsu SOC which has the ARM926EJ processor
> > core.
> > > >
> > > > This board has SPI, I2C and 10
Dmitry Adamushko wrote:
> On 20/03/07, Gilles Chanteperdrix <[EMAIL PROTECTED]> wrote:
> > Muruganandam Ganapathy wrote:
> > > The board is based on the Fujitsu SOC which has the ARM926EJ processor
> core.
> > >
> > > This board has SPI, I2C and 10/100 ethernet interfaces and it can
> sup
On 20/03/07, Gilles Chanteperdrix <[EMAIL PROTECTED]> wrote:
Muruganandam Ganapathy wrote:
> The board is based on the Fujitsu SOC which has the ARM926EJ processor
core.
>
> This board has SPI, I2C and 10/100 ethernet interfaces and it can
support
> 16/32MB SDRAM
> and 4/8MB flash memory
Muruganandam Ganapathy wrote:
> The board is based on the Fujitsu SOC which has the ARM926EJ processor core.
>
> This board has SPI, I2C and 10/100 ethernet interfaces and it can support
> 16/32MB SDRAM
> and 4/8MB flash memory.
You still do not tell us the name of the board, but it is proba
On 3/16/07, Gilles Chanteperdrix <[EMAIL PROTECTED]> wrote:
Muruganandam Ganapathy wrote:
> Hello,
>
> I am new to Xenomai and trying to understand whether it is suitable for
our
> need.
> We have a board based on ARM926EJ. I would like to know
>
>
> 1. is there Xenomai support for ARM926
Xenom
Muruganandam Ganapathy wrote:
> Hello,
>
> I am new to Xenomai and trying to understand whether it is suitable for our
> need.
> We have a board based on ARM926EJ. I would like to know
>
>
> 1. is there Xenomai support for ARM926
Xenomai supports most ARM processor cores. For example, t
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