On Fri, 23 Oct 2026 04:11:19 GMT, Yasumasa Suenaga <[email protected]> wrote:
> I'm not familiar with RISC-V ISA, but if the problem what I saw in AMD64 > happens on RISC-V, I guess we need to implement similar logic for RISC-V too. Thanks for the background. This does happen on RISC-V, and my PR already handles it in LinuxRISCV64CFrame.java:267. In our os::abort() → abort() case, the saved return address is exactly os::die+0. Looking up PC−1 selects os::abort()’s FDE instead. The existing AMD64/AArch64 code retries with PC−1 only when the exact-PC lookup throws DebuggerException. If that lookup succeeds with the next function’s FDE, no retry occurs. Similarly, with _current_pc <= pc, an exact return address at a CFI row boundary can successfully select post-call rules rather than the call-site rules; again, no exception triggers the retry. Which approach would you prefer? - A. Update AMD64 and AArch64 in this PR using DingliZhang’s patch (https://github.com/openjdk/jdk/pull/33374#issuecomment-6356737835): consistently use `PC−1` for native return-PC lookups, preserve exact top-frame/signal-context/code-cache PCs, and keep `_current_pc <= pc `across architectures. - B. Leave the AMD64/AArch64 Java code untouched and temporarily use an architecture macro in dwarf.cpp: retain `_current_pc < pc` on AMD64/AArch64 and use `_current_pc <= pc` on RISC-V. This preserves their existing behavior rather than fixing it; I would file a follow-up PR to address consistent return-PC handling separately. ------------- PR Comment: https://git.openjdk.org/jdk/pull/33374#issuecomment-6359111170
