Hi, Let me introduce myself first. I am an ASIC developer (Verilog coder) from Ljubljana (Slovenia). A prof of my 1-Wire experience here is my 1-Wire master written in Verilog, with a port of the original Dallas Semiconductors software (everything was tested on a FPGA): https://github.com/jeras/sockit_owm
Dumps: I have access to a logic analyzer at work, and I have a USB/UART based 1-Wire master, and the FPGA based master mentioned above. I also have several 1-Wire devices (thermometers, ADC, GPIO, memory). I can create some dumps, but I need some help with the conversion to *.sr files, since I do not have access to a sigrok compatible device. Currently I have created some binary files (using Verilog simulation), I can probably also export from the logic analyzer into binary (I have not tried yet). Currently I use the next command line: $ sigrok-cli -i onewire.bin -I binary -p 1=OWR -o onewire.sr The problem with the output file is that it is missing a sample rate. How could I specify it? https://github.com/jeras/sigrok-dump/tree/master/onewire/verilog Protocol decoder: I started writing the protocol decoder. https://github.com/jeras/sigrok/tree/master/libsigrokdecode/decoders/onewire But I have issues debugging it. Currently I run configure, "make" and "sudo make install". I was able to run the decoder, but the given error did not help much. How do you debug this decoders (while developing them)? I would like to see the Python error trace, if possible, and avoid installing. Regards, Iztok Jeras ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
