Simh doesn't expose any abstraction of the internal details at the level you 
are mentioning.  Emulation at that level for each processor and/or device was 
never a direct goal.  However, there certainly are some parallels to how the 
original hardware behaved internally which you are welcome to explore using a 
debugger on the simulator itself.  You can set breakpoints at the components 
which reference memory and/or within the code which implements the device 
interface which the operating system expects to see.

In theory, you could add code to the memory reference code path to update a 
blinken light display, but this would horribly impact simulator performance, 
and you still wouldn't have a stepping ability at the bus cycle level.

In theory, you could restructure the PDP11 simulator to execute bus cycles 
instead of instructions.  I think this would be a very significant amount of 
work, and would then still run much slower even if no blinken light display was 
being driven.

On the other hand, if you're not really trying to drive a blinken light 
display, you can get a lot of detailed information from the pdp11 simulator 
using the instruction history capability:
      sim> set cpu history=100
      sim> set bre <someaddr>
      sim> set bre 14302
      sim> b rq0

      Breakpoint, PC: 014302 (JMP 14064)
      sim> show cpu hist
     PC             PSW     src       dst        IR

     032142 030001|               000001  DEC R0
     032144 030005|032144 140010  MOV #0,R2
     032150 030001|024600 000001  MOV R5,R1
     032152 030001|032152 024600  ADD #0,R1
     032156 030000|000000 000040  CMP R0,R2
     032160 030011|                               BCS 32214
     032214 030011|               000040  ASR R2
     032216 030000|000000 000020  CMP R0,R2
     032220 030011|                               BCS 32234
     032234 030011|               000000  ASL R0
     [..etc..]


-          Mark

From: Doug Snyder [mailto:[email protected]]
Sent: Wednesday, September 04, 2013 10:46 PM
To: Mark Pizzolato - Info Comm
Cc: [email protected]
Subject: Re: [Simh] single cycle stepping for pdp11

it would be nice to see the virtual address, physical address, instruction 
space/data space flag and data for each cycle

a perfect result would be any data that would be visible and updated each bus 
cycle by a blinking light front panel such as a pdp11/70

doug




On Wed, Sep 4, 2013 at 10:38 PM, Mark Pizzolato - Info Comm 
<[email protected]<mailto:[email protected]>> wrote:
OK, so the original hardware supported single cycle stepping.

What would expect to happen in the simulator if you stepped single cycles?  
What details would you want to have access to after stepping at the cycle level?

From: [email protected]<mailto:[email protected]> 
[mailto:[email protected]<mailto:[email protected]>] 
On Behalf Of Doug Snyder
Sent: Wednesday, September 04, 2013 10:32 PM
To: Mark Pizzolato - Info Comm
Cc: [email protected]<mailto:[email protected]>
Subject: Re: [Simh] single cycle stepping for pdp11

many (if not all) of the pdp11 models support single cycle stepping.  to more 
accurately model an actual pdp11, it would be nice if simh could model that 
feature.  not being able to model that feature is certainly not the end of the 
world, but it is a noticeable difference.

doug


On Wed, Sep 4, 2013 at 10:15 PM, Mark Pizzolato - Info Comm 
<[email protected]<mailto:[email protected]>> wrote:
On Wednesday, September 04, 2013 at 10:08 PM, Doug Snyder wrote:
> it appears that simh supports single instruction stepping, but not single 
> cycle stepping for the pdp11.
 >
> if this is the case, have there been attempts or requests to add single cycle 
> support?

Hi Doug,

The core behaviors of the simh simulators are built around the execution of 
instructions.  This is the level which things are simulated at.

What problem are you trying to solve or deal with your request to be concerned 
about clock cycles?

- Mark




From: Doug Snyder [mailto:[email protected]]
Sent: Wednesday, September 04, 2013 10:46 PM
To: Mark Pizzolato - Info Comm
Cc: [email protected]
Subject: Re: [Simh] single cycle stepping for pdp11

it would be nice to see the virtual address, physical address, instruction 
space/data space flag and data for each cycle

a perfect result would be any data that would be visible and updated each bus 
cycle by a blinking light front panel such as a pdp11/70

doug




On Wed, Sep 4, 2013 at 10:38 PM, Mark Pizzolato - Info Comm 
<[email protected]<mailto:[email protected]>> wrote:
OK, so the original hardware supported single cycle stepping.

What would expect to happen in the simulator if you stepped single cycles?  
What details would you want to have access to after stepping at the cycle level?

From: [email protected]<mailto:[email protected]> 
[mailto:[email protected]<mailto:[email protected]>] 
On Behalf Of Doug Snyder
Sent: Wednesday, September 04, 2013 10:32 PM
To: Mark Pizzolato - Info Comm
Cc: [email protected]<mailto:[email protected]>
Subject: Re: [Simh] single cycle stepping for pdp11

many (if not all) of the pdp11 models support single cycle stepping.  to more 
accurately model an actual pdp11, it would be nice if simh could model that 
feature.  not being able to model that feature is certainly not the end of the 
world, but it is a noticeable difference.

doug


On Wed, Sep 4, 2013 at 10:15 PM, Mark Pizzolato - Info Comm 
<[email protected]<mailto:[email protected]>> wrote:
On Wednesday, September 04, 2013 at 10:08 PM, Doug Snyder wrote:
> it appears that simh supports single instruction stepping, but not single 
> cycle stepping for the pdp11.
 >
> if this is the case, have there been attempts or requests to add single cycle 
> support?

Hi Doug,

The core behaviors of the simh simulators are built around the execution of 
instructions.  This is the level which things are simulated at.

What problem are you trying to solve or deal with your request to be concerned 
about clock cycles?

- Mark


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