On 2013-09-06 02:11, Doug Snyder wrote:
do you have any examples of what you mean when you say "different models
do different amounts of work in a single cycle"?
Look at
http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/handbooks/PDP11_Handbook1979.pdf,
appendix B.
Example:
MOV (R0)+,(R1)+
11/34: 3 memory cycles
11/44: 2 memory cycles
11/60: 2 memory cycles
11/70: 2 memory cycles
I think most other smaller/slower machines all use 3 memory cycles, but
I would suspect things like the J11 to also only use two memory cycles.
Johnny
On Thu, Sep 5, 2013 at 3:02 AM, Johnny Billquist <[email protected]
<mailto:[email protected]>> wrote:
On 2013-09-05 07:15, Mark Pizzolato - Info Comm wrote:
On Wednesday, September 04, 2013 at 10:08 PM, Doug Snyder wrote:
it appears that simh supports single instruction stepping,
but not single cycle stepping for the pdp11.
>
if this is the case, have there been attempts or requests to
add single cycle support?
Hi Doug,
The core behaviors of the simh simulators are built around the
execution of instructions. This is the level which things are
simulated at.
What problem are you trying to solve or deal with your request
to be concerned about clock cycles?
And even further - single cycle stepping will mean different things
on different models of the PDP-11. Or rather, different models do
different amounts of work in a single cycle.
Johnny
--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: [email protected] <mailto:[email protected]> ||
Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
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--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: [email protected] || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
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