As Joel Sherrill wrote: > FYI the avr .h file has this: > > io4433.h:/* 0x3D..0x3E SP */ > > Is this by convention?
Yes, that's GCC's frame pointer management. We know this is slightly incorrect, but GCC classifies AVRs into a few rather coarse CPU models for its code generation, and the actual size of the accessible SRAM (and thus the stack pointer width) is not part of that classification, so the SPH register is always manipulated. So far, none of the (non-Xmega) AVRs has broken the model of using fixed addresses for SPL, SPH, and SREG. Those devices that only feature SRAM addresses below 0x100 (and thus don't need SPH) have IO location 0x3E as a reserved IO register where writing to it does not harm, and reading from it yields anything which actually nobody cares about (except of writing it back later on). So in light of this technique, simulavrxx should probably by default ignore access attempts to SPH even on CPUs that don't have it. (I know VMlab always complains about it, it can be a little annoying.) -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-) _______________________________________________ Simulavr-devel mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/simulavr-devel
