they are differential line receivers with internal biasing and signal
processing .... it needs to see the inputs at 180 degrees phase
difference and shifting the phase on one side with a filter without
mirroring it on the other input throws the duty cycle off as does
trying to bias it externally, which isn't necessary as the internal
biasing is much better and more complex than a simple voltage divider
to get 1/2 Vcc
If you try to bias one like the onboard comparator you won't get a 50%
duty cycle and that will look the same to a QSD as the quadrature
being out of phase .... 100% = 360 degrees therefore 1% = 3.6 degrees,
so if you have a 49-51% duty cycle you end up with a quadrature error
of 3.6 degrees (remember the QSD actually sees what looks like a 25%
duty cycle using two outputs with 50% duty cycles in quadrature so the
error is only 3.6 degrees and not 7.2 like one would think) ...
essentially the same thing happens if the differential inputs aren't
180 degrees, you get a duty cycle error and hence a quadrature error
Now if you are using a true high speed comparator then you can (must)
externally bias it and you can use only one filter because you don't
need a true differential input like the LDVS receiver ICs we are
talking about
I think a lot of the confusion comes from the article calling it a
comparator, it's not, it's a differential line reciever with signal
processing to clean up a digital signal after the rise time is altered
by the capacitance of a long cable run so it has an effect similar to
a comparator but with much better noise rejection due to the true
differential inputs (although we don't really need the common mode
noise rejection in this case)
JR
--- In [email protected], "johanmaas2001" <[EMAIL PROTECTED]>
wrote:
>
>
> JR and others,
>
> >
> > The reason you must use a filter on each half of the differential
> > input is otherwise you'll lose your 180 degrees difference as one
> side
> > will be phase shifted by the filter and the other side won't ...
> You
> > don't lose the 90 I-Q phasing but instead lose your 50% duty cycle
> > which has a similar effect with a QSD detector
>
>
> My view is a little bit different.
>
> The Iout is fed through the filter and the IoutB is used to gether
> with the Iout to get a DC offset which is fed to the inverting input
> of the comparator.
>
> So, there is no problem of delay times between the two lines!
>
> I think there is another reason of using 4 filters? What is the
> improvement when going from 2 to 4 filters?
>
> Johan PA3GSB
>
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