Module Name:    src
Committed By:   simonb
Date:           Tue Jun 23 05:14:18 UTC 2020

Modified Files:
        src/sys/arch/mips/cavium: octeon_cpunode.c octeon_iobus.c
        src/sys/arch/mips/cavium/dev: octeon_asx.c octeon_ciu.c octeon_fau.c
            octeon_fauvar.h octeon_fpa.c octeon_fpareg.h octeon_fpavar.h
            octeon_usbnreg.h

Log Message:
Minor tweaks and cleanup.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/cavium/octeon_cpunode.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/cavium/octeon_iobus.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/cavium/dev/octeon_asx.c \
    src/sys/arch/mips/cavium/dev/octeon_ciu.c \
    src/sys/arch/mips/cavium/dev/octeon_fau.c \
    src/sys/arch/mips/cavium/dev/octeon_fauvar.h
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/cavium/dev/octeon_fpa.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/cavium/dev/octeon_fpareg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/cavium/dev/octeon_fpavar.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/cavium/dev/octeon_usbnreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/cavium/octeon_cpunode.c
diff -u src/sys/arch/mips/cavium/octeon_cpunode.c:1.12 src/sys/arch/mips/cavium/octeon_cpunode.c:1.13
--- src/sys/arch/mips/cavium/octeon_cpunode.c:1.12	Tue Jan 23 06:57:49 2018
+++ src/sys/arch/mips/cavium/octeon_cpunode.c	Tue Jun 23 05:14:18 2020
@@ -29,7 +29,7 @@
 #define __INTR_PRIVATE
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.12 2018/01/23 06:57:49 maya Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.13 2020/06/23 05:14:18 simonb Exp $");
 
 #include "locators.h"
 #include "cpunode.h"
@@ -63,7 +63,6 @@ struct cpunode_attach_args {
 struct cpunode_softc {
 	device_t sc_dev;
 	device_t sc_wdog_dev;
-	uint64_t sc_fuse;
 };
 
 static int cpunode_mainbus_match(device_t, cfdata_t, void *);
@@ -80,8 +79,6 @@ CFATTACH_DECL_NEW(cpu_cpunode, 0,
 
 kcpuset_t *cpus_booted;
 
-void octeon_reset_vector(void);
-
 static void wdog_cpunode_poke(void *arg);
 
 static int
@@ -109,18 +106,14 @@ void
 cpunode_mainbus_attach(device_t parent, device_t self, void *aux)
 {
 	struct cpunode_softc * const sc = device_private(self);
+	const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE);
 	int cpunum = 0;
 
 	sc->sc_dev = self;
-	sc->sc_fuse = octeon_xkphys_read_8(CIU_FUSE);
 
-	aprint_naive(": %u core%s\n",
-	    popcount32((uint32_t)sc->sc_fuse),
-	    sc->sc_fuse == 1 ? "" : "s");
-
-	aprint_normal(": %u core%s",
-	    popcount32((uint32_t)sc->sc_fuse),
-	    sc->sc_fuse == 1 ? "" : "s");
+	aprint_naive(": %u core%s\n", popcount64(fuse), fuse == 1 ? "" : "s");
+	aprint_normal(": %u core%s", popcount64(fuse), fuse == 1 ? "" : "s");
+
 	const uint64_t cvmctl = mips_cp0_cvmctl_read();
 	aprint_normal(", %scrypto", (cvmctl & CP0_CVMCTL_NOCRYPTO) ? "no " : "");
 	aprint_normal((cvmctl & CP0_CVMCTL_KASUMI) ? "+kasumi" : "");
@@ -134,7 +127,7 @@ cpunode_mainbus_attach(device_t parent, 
 #endif
 	aprint_normal("\n");
 
-	for (uint64_t fuse = sc->sc_fuse; fuse != 0; fuse >>= 1, cpunum++) {
+	for (uint64_t f = fuse; f != 0; f >>= 1, cpunum++) {
 		struct cpunode_attach_args cnaa = {
 			.cnaa_name = "cpu",
 			.cnaa_cpunum = cpunum,
@@ -250,6 +243,7 @@ cpu_cpunode_attach_common(device_t self,
 	KASSERTMSG(cpu != NULL, "ci %p index %d", ci, cpu_index(ci));
 
 #if NWDOG > 0 || defined(DDB)
+	/* XXXXXX __mips_n32 and MIPS_PHYS_TO_XKPHYS_CACHED needed here?????? */
 	void **nmi_vector = (void *)MIPS_PHYS_TO_KSEG0(0x800 + 32*ci->ci_cpuid);
 	*nmi_vector = octeon_reset_vector;
 
@@ -266,9 +260,10 @@ cpu_cpunode_attach_common(device_t self,
 	KASSERT(cpu->cpu_wdog_sih != NULL);
 #endif
 
-	aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n",
-	    ci->ci_cpu_freq / 1000000,
-	    (ci->ci_cpu_freq % 1000000) / 10000,
+	aprint_normal(": %lu.%02luMHz\n",
+	    (ci->ci_cpu_freq + 5000) / 1000000,
+	    ((ci->ci_cpu_freq + 5000) % 1000000) / 10000);
+	aprint_debug_dev(self, "hz cycles = %lu, delay divisor = %lu\n",
 	    ci->ci_cycles_per_hz, ci->ci_divisor_delay);
 
 	if (CPU_IS_PRIMARY(ci)) {

Index: src/sys/arch/mips/cavium/octeon_iobus.c
diff -u src/sys/arch/mips/cavium/octeon_iobus.c:1.3 src/sys/arch/mips/cavium/octeon_iobus.c:1.4
--- src/sys/arch/mips/cavium/octeon_iobus.c:1.3	Sun May 31 06:27:06 2020
+++ src/sys/arch/mips/cavium/octeon_iobus.c	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_iobus.c,v 1.3 2020/05/31 06:27:06 simonb Exp $	*/
+/*	$NetBSD: octeon_iobus.c,v 1.4 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_iobus.c,v 1.3 2020/05/31 06:27:06 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_iobus.c,v 1.4 2020/06/23 05:14:18 simonb Exp $");
 
 #include "locators.h"
 
@@ -47,18 +47,17 @@ struct iobus_softc {
 	bus_space_handle_t	sc_ops_bush;
 };
 
-static int		iobus_match(device_t, struct cfdata *, void *);
-static void		iobus_attach(device_t, device_t, void *);
-static int		iobus_submatch(device_t, struct cfdata *,
-			    const int *, void *);
-static int		iobus_print(void *, const char *);
-static void		iobus_init(struct iobus_softc *);
-static void		iobus_init_map(struct iobus_softc *);
-static void		iobus_init_local(struct iobus_softc *);
-static void		iobus_init_local_pow(struct iobus_softc *);
-static void		iobus_init_local_fpa(struct iobus_softc *);
+static int	iobus_match(device_t, struct cfdata *, void *);
+static void	iobus_attach(device_t, device_t, void *);
+static int	iobus_submatch(device_t, struct cfdata *, const int *, void *);
+static int	iobus_print(void *, const char *);
+static void	iobus_init(struct iobus_softc *);
+static void	iobus_init_map(struct iobus_softc *);
+static void	iobus_init_local(struct iobus_softc *);
+static void	iobus_init_local_pow(struct iobus_softc *);
+static void	iobus_init_local_fpa(struct iobus_softc *);
 
-static void		iobus_bus_io_init(bus_space_tag_t, void *);
+static void	iobus_bus_io_init(bus_space_tag_t, void *);
 
 static struct mips_bus_space	*iobus_bust;
 static struct mips_bus_dma_tag	*iobus_dmat;
@@ -74,8 +73,8 @@ iobus_bootstrap(struct octeon_config *mc
 
 /* ---- autoconf */
 
-CFATTACH_DECL_NEW(iobus, sizeof(struct iobus_softc), iobus_match, iobus_attach, NULL,
-    NULL);
+CFATTACH_DECL_NEW(iobus, sizeof(struct iobus_softc),
+    iobus_match, iobus_attach, NULL, NULL);
 
 static int
 iobus_match(device_t parent, struct cfdata *match, void *aux)
@@ -97,6 +96,7 @@ iobus_attach(device_t parent, device_t s
 
 	iobus_init(sc);
 
+	/* XXX should only attach Octeon 1 and Octeon Plus drivers */
 	for (i = 0; i < (int)iobus_ndevs; i++) {
 		dev = iobus_devs[i];
 		for (j = 0; j < dev->nunits; j++) {
@@ -107,20 +107,20 @@ iobus_attach(device_t parent, device_t s
 			aa.aa_dmat = iobus_dmat;
 
 			(void)config_found_sm_loc(
-				self,
-				"iobus",
-				NULL,
-				&aa,
-				iobus_print,
-				iobus_submatch);
+			    self,
+			    "iobus",
+			    NULL,
+			    &aa,
+			    iobus_print,
+			    iobus_submatch);
 		}
 	}
 }
 
 static int
-iobus_submatch(device_t parent, struct cfdata *cf,
-    const int *ldesc, void *aux)
+iobus_submatch(device_t parent, struct cfdata *cf, const int *ldesc, void *aux)
 {
+
 	return config_match(parent, cf, aux);
 }
 
@@ -142,6 +142,7 @@ iobus_print(void *aux, const char *pnp)
 void
 iobus_init(struct iobus_softc *sc)
 {
+
 	iobus_init_map(sc);
 	iobus_init_local(sc);
 }
@@ -149,6 +150,7 @@ iobus_init(struct iobus_softc *sc)
 void
 iobus_init_map(struct iobus_softc *sc)
 {
+
 	/* XXX map all ``operations'' space at once */
 	bus_space_map(
 		iobus_bust,
@@ -161,6 +163,7 @@ iobus_init_map(struct iobus_softc *sc)
 void
 iobus_init_local(struct iobus_softc *sc)
 {
+
 	iobus_init_local_pow(sc);
 	iobus_init_local_fpa(sc);
 }
@@ -170,6 +173,7 @@ extern struct octeon_config octeon_confi
 void
 iobus_init_local_pow(struct iobus_softc *sc)
 {
+
 	void octpow_bootstrap(struct octeon_config *);
 
 	aprint_normal("%s: initializing POW\n", device_xname(sc->sc_dev));
@@ -180,6 +184,7 @@ iobus_init_local_pow(struct iobus_softc 
 void
 iobus_init_local_fpa(struct iobus_softc *sc)
 {
+
 	void octfpa_bootstrap(struct octeon_config *);
 
 	aprint_normal("%s: initializing FPA\n", device_xname(sc->sc_dev));

Index: src/sys/arch/mips/cavium/dev/octeon_asx.c
diff -u src/sys/arch/mips/cavium/dev/octeon_asx.c:1.3 src/sys/arch/mips/cavium/dev/octeon_asx.c:1.4
--- src/sys/arch/mips/cavium/dev/octeon_asx.c:1.3	Mon Jun 22 02:26:19 2020
+++ src/sys/arch/mips/cavium/dev/octeon_asx.c	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_asx.c,v 1.3 2020/06/22 02:26:19 simonb Exp $	*/
+/*	$NetBSD: octeon_asx.c,v 1.4 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -27,9 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_asx.c,v 1.3 2020/06/22 02:26:19 simonb Exp $");
-
-#include "opt_octeon.h"
+__KERNEL_RCSID(0, "$NetBSD: octeon_asx.c,v 1.4 2020/06/23 05:14:18 simonb Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -84,9 +82,9 @@ octasx_enable_tx(struct octasx_softc *sc
 
 	asx_tx_port = _ASX_RD8(sc, ASX0_TX_PRT_EN_OFFSET);
 	if (enable)
-		SET(asx_tx_port, 1 << sc->sc_port);
+		SET(asx_tx_port, __BIT(sc->sc_port));
 	else
-		CLR(asx_tx_port, 1 << sc->sc_port);
+		CLR(asx_tx_port, __BIT(sc->sc_port));
 	_ASX_WR8(sc, ASX0_TX_PRT_EN_OFFSET, asx_tx_port);
 	return 0;
 }
@@ -98,9 +96,9 @@ octasx_enable_rx(struct octasx_softc *sc
 
 	asx_rx_port = _ASX_RD8(sc, ASX0_RX_PRT_EN_OFFSET);
 	if (enable)
-		SET(asx_rx_port, 1 << sc->sc_port);
+		SET(asx_rx_port, __BIT(sc->sc_port));
 	else
-		CLR(asx_rx_port, 1 << sc->sc_port);
+		CLR(asx_rx_port, __BIT(sc->sc_port));
 	_ASX_WR8(sc, ASX0_RX_PRT_EN_OFFSET, asx_rx_port);
 	return 0;
 }
@@ -108,6 +106,7 @@ octasx_enable_rx(struct octasx_softc *sc
 int
 octasx_clk_set(struct octasx_softc *sc, int tx_setting, int rx_setting)
 {
+
 	_ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
 	_ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, rx_setting);
 	return 0;
Index: src/sys/arch/mips/cavium/dev/octeon_ciu.c
diff -u src/sys/arch/mips/cavium/dev/octeon_ciu.c:1.3 src/sys/arch/mips/cavium/dev/octeon_ciu.c:1.4
--- src/sys/arch/mips/cavium/dev/octeon_ciu.c:1.3	Mon Jun 22 02:26:19 2020
+++ src/sys/arch/mips/cavium/dev/octeon_ciu.c	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_ciu.c,v 1.3 2020/06/22 02:26:19 simonb Exp $	*/
+/*	$NetBSD: octeon_ciu.c,v 1.4 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2008 Internet Initiative Japan, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_ciu.c,v 1.3 2020/06/22 02:26:19 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_ciu.c,v 1.4 2020/06/23 05:14:18 simonb Exp $");
 
 #include "opt_octeon.h"
 
@@ -43,4 +43,4 @@ __KERNEL_RCSID(0, "$NetBSD: octeon_ciu.c
 #include <mips/cavium/octeonvar.h>
 #include <mips/cavium/dev/octeon_ciureg.h>
 
-/* XXX keep this file? */
+/* XXX Add MP IPI interrupt support */
Index: src/sys/arch/mips/cavium/dev/octeon_fau.c
diff -u src/sys/arch/mips/cavium/dev/octeon_fau.c:1.3 src/sys/arch/mips/cavium/dev/octeon_fau.c:1.4
--- src/sys/arch/mips/cavium/dev/octeon_fau.c:1.3	Thu Jun 18 13:52:08 2020
+++ src/sys/arch/mips/cavium/dev/octeon_fau.c	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_fau.c,v 1.3 2020/06/18 13:52:08 simonb Exp $	*/
+/*	$NetBSD: octeon_fau.c,v 1.4 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_fau.c,v 1.3 2020/06/18 13:52:08 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_fau.c,v 1.4 2020/06/23 05:14:18 simonb Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -52,7 +52,7 @@ octfau_op_load(uint64_t args)
 	paddr_t addr = OCTEON_ADDR_IO_DID(FAU_MAJOR_DID, FAU_SUB_DID) |
 	    __SHIFTIN(args, OCTEON_ADDR_OFFSET);
 
-	return octeon_read_csr(addr);
+	return octeon_xkphys_read_8(addr);
 }
 
 static inline void
@@ -61,7 +61,7 @@ octfau_op_store(uint64_t args, int64_t v
 	paddr_t addr = OCTEON_ADDR_IO_DID(FAU_MAJOR_DID, FAU_SUB_DID) |
 	    __SHIFTIN(args, OCTEON_ADDR_OFFSET);
 
-	octeon_write_csr(addr, value);
+	octeon_xkphys_write_8(addr, value);
 }
 
 /* ---- operation primitives */
Index: src/sys/arch/mips/cavium/dev/octeon_fauvar.h
diff -u src/sys/arch/mips/cavium/dev/octeon_fauvar.h:1.3 src/sys/arch/mips/cavium/dev/octeon_fauvar.h:1.4
--- src/sys/arch/mips/cavium/dev/octeon_fauvar.h:1.3	Thu Jun 18 13:52:08 2020
+++ src/sys/arch/mips/cavium/dev/octeon_fauvar.h	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_fauvar.h,v 1.3 2020/06/18 13:52:08 simonb Exp $	*/
+/*	$NetBSD: octeon_fauvar.h,v 1.4 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -118,6 +118,7 @@ octfau_op_iobdma_store_data(int scraddr,
 static inline void
 octfau_op_inc_fetch_8(struct octfau_desc *fd, int64_t v)
 {
+
 	octfau_op_iobdma_store_data(fd->fd_scroff, v, 0,
 	    OCT_FAU_OP_SIZE_64/* XXX */, fd->fd_regno);
 }
@@ -125,6 +126,7 @@ octfau_op_inc_fetch_8(struct octfau_desc
 static inline int64_t
 octfau_op_inc_read_8(struct octfau_desc *fd)
 {
+
 	OCTEON_SYNCIOBDMA;
 	return octeon_cvmseg_read_8(fd->fd_scroff);
 }

Index: src/sys/arch/mips/cavium/dev/octeon_fpa.c
diff -u src/sys/arch/mips/cavium/dev/octeon_fpa.c:1.7 src/sys/arch/mips/cavium/dev/octeon_fpa.c:1.8
--- src/sys/arch/mips/cavium/dev/octeon_fpa.c:1.7	Mon Jun 22 02:26:20 2020
+++ src/sys/arch/mips/cavium/dev/octeon_fpa.c	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_fpa.c,v 1.7 2020/06/22 02:26:20 simonb Exp $	*/
+/*	$NetBSD: octeon_fpa.c,v 1.8 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -29,9 +29,7 @@
 #undef	FPADEBUG
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_fpa.c,v 1.7 2020/06/22 02:26:20 simonb Exp $");
-
-#include "opt_octeon.h"
+__KERNEL_RCSID(0, "$NetBSD: octeon_fpa.c,v 1.8 2020/06/23 05:14:18 simonb Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -216,6 +214,7 @@ octfpa_init(struct octfpa_softc *sc)
 void
 octfpa_init_bus(struct octfpa_softc *sc)
 {
+
 	octfpa_init_bus_space(sc);
 }
 

Index: src/sys/arch/mips/cavium/dev/octeon_fpareg.h
diff -u src/sys/arch/mips/cavium/dev/octeon_fpareg.h:1.4 src/sys/arch/mips/cavium/dev/octeon_fpareg.h:1.5
--- src/sys/arch/mips/cavium/dev/octeon_fpareg.h:1.4	Mon Jun 22 12:26:11 2020
+++ src/sys/arch/mips/cavium/dev/octeon_fpareg.h	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_fpareg.h,v 1.4 2020/06/22 12:26:11 simonb Exp $	*/
+/*	$NetBSD: octeon_fpareg.h,v 1.5 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -177,6 +177,8 @@
 #define	FPA_BASE				0x0001180028000000ULL
 #define	FPA_SIZE				0x0200
 
+#define	FPA_NPOOLS				8
+
 #define	FPA_INT_SUM_OFFSET			0x0040
 #define	FPA_INT_ENB_OFFSET			0x0048
 #define	FPA_CTL_STATUS_OFFSET			0x0050

Index: src/sys/arch/mips/cavium/dev/octeon_fpavar.h
diff -u src/sys/arch/mips/cavium/dev/octeon_fpavar.h:1.6 src/sys/arch/mips/cavium/dev/octeon_fpavar.h:1.7
--- src/sys/arch/mips/cavium/dev/octeon_fpavar.h:1.6	Mon Jun 22 02:26:20 2020
+++ src/sys/arch/mips/cavium/dev/octeon_fpavar.h	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_fpavar.h,v 1.6 2020/06/22 02:26:20 simonb Exp $	*/
+/*	$NetBSD: octeon_fpavar.h,v 1.7 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -29,7 +29,10 @@
 #ifndef _OCTEON_FPAVAR_H_
 #define _OCTEON_FPAVAR_H_
 
+#include <mips/cache_octeon.h>
+
 #include <mips/cavium/octeonreg.h>
+#include <mips/cavium/dev/octeon_fpareg.h>
 
 struct octfpa_buf {
 	int		fb_poolno;	/* pool # */
@@ -54,18 +57,16 @@ void		*octfpa_buf_get(struct octfpa_buf 
 uint64_t	octfpa_query(int);
 int		octfpa_available_fpa_pool(int *available, int pool_no);
 
-#define OCTEON_CACHE_LINE_SIZE (128)
-
 /* Pool sizes in bytes, must be multiple of a cache line */
-#define FPA_POOL_0_SIZE (16 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_1_SIZE (1 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_2_SIZE (8 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_3_SIZE (4 * OCTEON_CACHE_LINE_SIZE)
-
-#define FPA_POOL_4_SIZE (16 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_5_SIZE (16 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_6_SIZE (16 * OCTEON_CACHE_LINE_SIZE)
-#define FPA_POOL_7_SIZE (16 * OCTEON_CACHE_LINE_SIZE)
+#define FPA_POOL_0_SIZE (16 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_1_SIZE (1 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_2_SIZE (8 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_3_SIZE (4 * OCTEON_CACHELINE_SIZE)
+
+#define FPA_POOL_4_SIZE (16 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_5_SIZE (16 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_6_SIZE (16 * OCTEON_CACHELINE_SIZE)
+#define FPA_POOL_7_SIZE (16 * OCTEON_CACHELINE_SIZE)
 
 /* Pools in use */
 #define FPA_RECV_PKT_POOL		(0)	/* Receive Packet buffers */
@@ -96,7 +97,7 @@ octfpa_load(uint64_t fpapool)
 	/* for FPA operations, subdid == pool number */
 	uint64_t addr = OCTEON_ADDR_IO_DID(FPA_MAJOR_DID, fpapool);
 
-	return octeon_read_csr(addr);
+	return octeon_xkphys_read_8(addr);
 }
 
 #ifdef notyet
@@ -118,7 +119,8 @@ octfpa_store(uint64_t addr, uint64_t fpa
 	    __SHIFTIN(addr, FPA_OPS_STORE_ADDR);
 
 	OCTEON_SYNCWS;
-	octeon_write_csr(ptr, __SHIFTIN(dwbcount, FPA_OPS_STORE_DATA_DWBCOUNT));
+	octeon_xkphys_write_8(ptr,
+	    __SHIFTIN(dwbcount, FPA_OPS_STORE_DATA_DWBCOUNT));
 }
 
 static __inline paddr_t

Index: src/sys/arch/mips/cavium/dev/octeon_usbnreg.h
diff -u src/sys/arch/mips/cavium/dev/octeon_usbnreg.h:1.2 src/sys/arch/mips/cavium/dev/octeon_usbnreg.h:1.3
--- src/sys/arch/mips/cavium/dev/octeon_usbnreg.h:1.2	Mon Jun 22 03:05:07 2020
+++ src/sys/arch/mips/cavium/dev/octeon_usbnreg.h	Tue Jun 23 05:14:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_usbnreg.h,v 1.2 2020/06/22 03:05:07 simonb Exp $	*/
+/*	$NetBSD: octeon_usbnreg.h,v 1.3 2020/06/23 05:14:18 simonb Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -109,8 +109,9 @@
 #define USBN_CLK_CTL_P_XENBN			UINT64_C(0x0000000000004000)
 #define USBN_CLK_CTL_P_COM_ON			UINT64_C(0x0000000000002000)
 #define USBN_CLK_CTL_P_C_SEL			UINT64_C(0x0000000000001800)
-#define  SET_USBN_CLK_CTL_P_C_SEL(v) (((v)<<11) & USBN_CLK_CTL_P_C_SEL)
-#define  GET_USBN_CLK_CTL_P_C_SEL(v) (((v) & USBN_CLK_CTL_P_C_SEL) >> 11)
+#define	  USBN_CLK_CTL_P_C_SEL_12MHZ		  0
+#define	  USBN_CLK_CTL_P_C_SEL_24MHZ		  1
+#define	  USBN_CLK_CTL_P_C_SEL_48MHZ		  2
 #define USBN_CLK_CTL_CDIV_BYP			UINT64_C(0x0000000000000400)
 #define USBN_CLK_CTL_SD_MODE			UINT64_C(0x0000000000000300)
 #define USBN_CLK_CTL_S_BIST			UINT64_C(0x0000000000000080)
@@ -119,15 +120,9 @@
 #define USBN_CLK_CTL_PRST			UINT64_C(0x0000000000000010)
 #define USBN_CLK_CTL_HRST			UINT64_C(0x0000000000000008)
 #define USBN_CLK_CTL_DIVIDE			UINT64_C(0x0000000000000007)
-#define  SET_USBN_CLK_CTL_DIVIDE(v) (((v)<<0) & USBN_CLK_CTL_DIVIDE)
-#define  GET_USBN_CLK_CTL_DIVIDE(v) (((v) & USBN_CLK_CTL_DIVIDE) >> 0)
 /* CN50xx extension */
 #define USBN_CLK_CTL_DIVIDE2			UINT64_C(0x00000000000c0000)
-#define  SET_USBN_CLK_CTL_DIVIDE2(v) (((v)<<18) & USBN_CLK_CTL_DIVIDE2)
-#define  GET_USBN_CLK_CTL_DIVIDE2(v) (((v) & USBN_CLK_CTL_DIVIDE2) >> 18)
 #define USBN_CLK_CTL_P_RTYPE			UINT64_C(0x000000000000c000)
-#define  SET_USBN_CLK_CTL_P_RTYPE(v) (((v)<<14) & USBN_CLK_CTL_P_RTYPE)
-#define  GET_USBN_CLK_CTL_P_RTYPE(v) (((v) & USBN_CLK_CTL_P_RTYPE) >> 14)
 
 #define USBN_USBP_CTL_STATUS_XXX_63_38		UINT64_C(0xffffffc000000000)
 #define USBN_USBP_CTL_STATUS_BIST_DONE		UINT64_C(0x0000002000000000)

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