Module Name:    src
Committed By:   hsuenaga
Date:           Wed Jun  3 03:04:21 UTC 2015

Modified Files:
        src/sys/arch/arm/marvell: mvsoc.c mvsoc_intr.h mvsocreg.h mvsocvar.h

Log Message:
dump Mbus settins on boot if AV_VERBOSE or AV_DEBUG is enabled.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/marvell/mvsoc.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/marvell/mvsoc_intr.h
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/marvell/mvsocreg.h
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/marvell/mvsocvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/marvell/mvsoc.c
diff -u src/sys/arch/arm/marvell/mvsoc.c:1.20 src/sys/arch/arm/marvell/mvsoc.c:1.21
--- src/sys/arch/arm/marvell/mvsoc.c:1.20	Mon May 11 05:49:48 2015
+++ src/sys/arch/arm/marvell/mvsoc.c	Wed Jun  3 03:04:21 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsoc.c,v 1.20 2015/05/11 05:49:48 hsuenaga Exp $	*/
+/*	$NetBSD: mvsoc.c,v 1.21 2015/06/03 03:04:21 hsuenaga Exp $	*/
 /*
  * Copyright (c) 2007, 2008, 2013, 2014 KIYOHARA Takashi
  * All rights reserved.
@@ -26,13 +26,17 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.20 2015/05/11 05:49:48 hsuenaga Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.21 2015/06/03 03:04:21 hsuenaga Exp $");
 
 #include "opt_cputypes.h"
 #include "opt_mvsoc.h"
+#ifdef ARMADAXP
 #include "mvxpe.h"
+#endif
 
 #include <sys/param.h>
+#include <sys/boot_flag.h>
+#include <sys/systm.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/errno.h>
@@ -47,6 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.
 #include <arm/marvell/orionreg.h>
 #include <arm/marvell/kirkwoodreg.h>
 #include <arm/marvell/mv78xx0reg.h>
+#include <arm/marvell/armadaxpvar.h>
 #include <arm/marvell/armadaxpreg.h>
 
 #include <uvm/uvm.h>
@@ -917,6 +922,9 @@ mvsoc_attach(device_t parent, device_t s
 		panic("unknown SoC: model 0x%04x, rev 0x%02x", model, rev);
 	tags = tagstbl[i].tags;
 
+	if (boothowto & (AB_VERBOSE | AB_DEBUG))
+		mvsoc_target_dump(sc);
+
 	for (i = 0; i < __arraycount(mvsoc_periphs); i++) {
 		if (mvsoc_periphs[i].model != model)
 			continue;
@@ -1247,3 +1255,43 @@ mvsoc_target_peripheral(uint32_t target,
 	}
 	return i;
 }
+
+int
+mvsoc_target_dump(struct mvsoc_softc *sc)
+{
+	uint32_t reg, base, size, target, attr, enable;
+	int i, n;
+
+	for (i = 0, n = 0; i < nwindow; i++) {
+		reg = read_mlmbreg(MVSOC_MLMB_WCR(i));
+		enable = reg & MVSOC_MLMB_WCR_WINEN;
+		target = MVSOC_MLMB_WCR_GET_TARGET(reg);
+		attr = MVSOC_MLMB_WCR_GET_ATTR(reg);
+		size = MVSOC_MLMB_WCR_GET_SIZE(reg);
+
+		reg = read_mlmbreg(MVSOC_MLMB_WBR(i));
+		base = MVSOC_MLMB_WBR_GET_BASE(reg);
+
+		if (!enable)
+			continue;
+
+		aprint_verbose_dev(sc->sc_dev,
+		    "Mbus window %2d: Base 0x%08x Size 0x%08x ", i, base, size);
+#ifdef ARMADAXP
+		armadaxp_attr_dump(sc, target, attr);
+#else
+		mvsoc_attr_dump(sc, target, attr);
+#endif
+		printf("\n");
+		n++;
+	}
+
+	return n;
+}
+
+int
+mvsoc_attr_dump(struct mvsoc_softc *sc, uint32_t target, uint32_t attr)
+{
+	aprint_verbose_dev(sc->sc_dev, "target 0x%x(attr 0x%x)", target, attr);
+	return 0;
+}

Index: src/sys/arch/arm/marvell/mvsoc_intr.h
diff -u src/sys/arch/arm/marvell/mvsoc_intr.h:1.5 src/sys/arch/arm/marvell/mvsoc_intr.h:1.6
--- src/sys/arch/arm/marvell/mvsoc_intr.h:1.5	Wed Apr  8 21:43:30 2015
+++ src/sys/arch/arm/marvell/mvsoc_intr.h	Wed Jun  3 03:04:21 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsoc_intr.h,v 1.5 2015/04/08 21:43:30 matt Exp $	*/
+/*	$NetBSD: mvsoc_intr.h,v 1.6 2015/06/03 03:04:21 hsuenaga Exp $	*/
 /*
  * Copyright (c) 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -34,6 +34,7 @@
 #if defined(ARMADAXP)
 #define __HAVE_PIC_SET_PRIORITY
 #define __HAVE_PIC_PENDING_INTRS
+#define PIC_MAXMAXSOURCES 256
 #endif
 #endif
 

Index: src/sys/arch/arm/marvell/mvsocreg.h
diff -u src/sys/arch/arm/marvell/mvsocreg.h:1.11 src/sys/arch/arm/marvell/mvsocreg.h:1.12
--- src/sys/arch/arm/marvell/mvsocreg.h:1.11	Tue May 19 09:20:19 2015
+++ src/sys/arch/arm/marvell/mvsocreg.h	Wed Jun  3 03:04:21 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsocreg.h,v 1.11 2015/05/19 09:20:19 hsuenaga Exp $	*/
+/*	$NetBSD: mvsocreg.h,v 1.12 2015/06/03 03:04:21 hsuenaga Exp $	*/
 /*
  * Copyright (c) 2007, 2008 KIYOHARA Takashi
  * All rights reserved.
@@ -86,15 +86,23 @@
 #define MVSOC_MLMB_WCR(w)		  ((w) < 8 ? ((w) << 4) + 0x0 :\
 						     (((w) - 8) << 3) + 0x90)
 #define MVSOC_MLMB_WCR_WINEN			(1 << 0)
+#define MVSOC_MLMB_WCR_SYNC			(1 << 1) /* sync barrier */
 #define MVSOC_MLMB_WCR_TARGET(t)		(((t) & 0xf) << 4)
+#define MVSOC_MLMB_WCR_GET_TARGET(reg)		(((reg) >> 4) & 0xf)
 #define MVSOC_MLMB_WCR_ATTR(a)			(((a) & 0xff) << 8)
+#define MVSOC_MLMB_WCR_GET_ATTR(reg)		(((reg) >> 8) & 0xff)
 #define MVSOC_MLMB_WCR_SIZE_MASK		0xffff0000
 #define MVSOC_MLMB_WCR_SIZE(s)		  (((s) - 1) & MVSOC_MLMB_WCR_SIZE_MASK)
+#define MVSOC_MLMB_WCR_GET_SIZE(reg) \
+    (((reg) & MVSOC_MLMB_WCR_SIZE_MASK) + (1 << 16))
 #define MVSOC_MLMB_WBR(w)		  ((w) < 8 ? ((w) << 4) + 0x4 :\
 						     (((w) - 8) << 3) + 0x94)
 #define MVSOC_MLMB_WBR_BASE_MASK		0xffff0000
+#define MVSOC_MLMB_WBR_GET_BASE(reg)		(reg & MVSOC_MLMB_WBR_BASE_MASK)
 #define MVSOC_MLMB_WRLR(w)		  (((w) << 4) + 0x8)
 #define MVSOC_MLMB_WRLR_REMAP_MASK		0xffff0000
+#define MVSOC_MLMB_WRLR_GET_REMAP(reg) \
+    (reg & MVSOC_MLMB_WRLR_REMAP_MASK)
 #define MVSOC_MLMB_WRHR(w)		  (((w) << 4) + 0xc)
 #define MVSOC_MLMB_IRBAR		  0x080 /* Internal regs Base Address */
 #define MVSOC_MLMB_IRBAR_BASE_MASK		0xfff00000

Index: src/sys/arch/arm/marvell/mvsocvar.h
diff -u src/sys/arch/arm/marvell/mvsocvar.h:1.8 src/sys/arch/arm/marvell/mvsocvar.h:1.9
--- src/sys/arch/arm/marvell/mvsocvar.h:1.8	Sat Mar 15 10:54:40 2014
+++ src/sys/arch/arm/marvell/mvsocvar.h	Wed Jun  3 03:04:21 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsocvar.h,v 1.8 2014/03/15 10:54:40 kiyohara Exp $	*/
+/*	$NetBSD: mvsocvar.h,v 1.9 2015/06/03 03:04:21 hsuenaga Exp $	*/
 /*
  * Copyright (c) 2007, 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -121,6 +121,8 @@ enum mvsoc_tags {
 	ARMADAXP_TAG_PEX3_IO,
 };
 int mvsoc_target(int, uint32_t *, uint32_t *, uint32_t *, uint32_t *);
+int mvsoc_target_dump(struct mvsoc_softc *);
+int mvsoc_attr_dump(struct mvsoc_softc *, uint32_t, uint32_t);
 
 extern int (*mvsoc_clkgating)(struct marvell_attach_args *);
 

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