At 21:10 -0700 07/09/2002, Kennedy Brandt wrote:

>With a G3, the maximum processor speed is 8x the system bus speed, or 320MHz
>in an Alchemy system and 400MHz in a Tsunami system.  G4's may apply an even
>higher multiplier.
>
>Of course, if anyone's actually running a G3 at faster than 400MHz in an
>SuperMac Tsunami system, then there are some holes in the plot.

Kennedy, IBM came out with a later revision of the G3 that has a 10X 
multiplier.  They dropped the lowest multiplier (1X, 2X?) to make 
room for it in the PID.   It jumps straight from 8X to 10X though 
with no intervening multipliers.

So there are now 500 MHz G3 upgrades that run 50 MHz bus, 10X 
multiplier and 500 MHz CPU speed.

The early G4 processors (I think 7400 and 7410) have up to a 9X 
multiplier.  So 450 MHz was the maximum for them with a 50 MHz bus 
speed.

The later G4s (7450 and something else?) go up to 16X but they have a 
different cache scheme, wherein they have a 256K (?) L2 cache on the 
chip and a controller and pins on the chip for an external L3 cache 
of up to 2 or 4 MB.  I'm a little hazy on the details.    Apparently 
this additional layer of caching made it more difficult to adapt the 
newer G4 chips to our older machines.  My expectation was that no-one 
ever would.  The 16X multiplier times a 50 MHz bus gives the 800 MHz 
CPU speed they're advertising.

I used 50 MHz for the bus speed here, because that is the nominal 
maximum for our machines, but many folks have found that higher bus 
speeds work pretty well.  It seems to depend a lot on a person's CPU 
card.  I have an old XLR8 PowerBoost Pro (adjustable 604e card) which 
runs at least 61.667 MHz bus in every S900 I've tried it in (eight 
and counting) and also in three PowerTower Pros.   My ancient 220/110 
G3 card won't do better than 49 MHz no matter what machine I install 
it in.  More modern G3 cards seem to go up about 55 MHz pretty 
commonly.

Personally, I'm kind of interested in the new IBM PPC750FX chip which 
has a built-in 512K L2 cache (no pins for external cache, so no 
complications) and up to a 20X bus multiplier.   It is supposed to 
ship in speeds from 700 to 1000 MHz, so one should be able to get up 
to 1 GHz on our machines with a 50 MHz bus.  I don't know what kind 
of real world performance one would get with such a high bus 
multiplier and only 512K (as opposed to 1 MB) of L2 cache, but the L2 
cache does run at the full core CPU speed because it is on the CPU 
chip.

You wouldn't have a source of information about the design of PCBs 
with BGAs on them?  And a how-to on soldering BGA chips?  If I knew 
what was required when laying out a BGA on a PCB design I could get a 
ZIF for the 750FX made.  But I would still need to attach the chip to 
the board...Oh, and I would need a supplier for the pin array that 
goes on teh bottom of the module.

The basic design and pinouts for the ZIF module are available on 
Motorola's site as MPCPCMEC.pdf and the pinout and such for the IBM 
750FX is available on IBM's site.   So in theory it wouldn't be that 
tough if one could get the chips from IBM and whip out a design for 
the PCB in something like Osmond PCB.

Jeff Walther

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